WO2010050451A1 - 半導体発光素子の製造方法 - Google Patents
半導体発光素子の製造方法 Download PDFInfo
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- WO2010050451A1 WO2010050451A1 PCT/JP2009/068366 JP2009068366W WO2010050451A1 WO 2010050451 A1 WO2010050451 A1 WO 2010050451A1 JP 2009068366 W JP2009068366 W JP 2009068366W WO 2010050451 A1 WO2010050451 A1 WO 2010050451A1
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- nitride semiconductor
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
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- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
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- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
- H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
Definitions
- the present invention relates to a method for manufacturing a semiconductor light emitting device.
- Semiconductor light emitting devices such as blue light emitting diodes and ultraviolet light emitting diodes are used in combination with phosphors. Blue light emitting diodes and ultraviolet light emitting diodes emit blue light and ultraviolet light. The emitted blue light or ultraviolet light is changed to white by the phosphor.
- a light emitting device having a blue light emitting diode, an ultraviolet light emitting diode, and a phosphor has also been studied.
- a crystal growth substrate is used. This crystal growth substrate is required to have heat resistance. In addition, the crystal growth substrate is required to have a thermal expansion coefficient close to that of the nitride semiconductor material. Therefore, a sapphire wafer is generally used as a crystal growth substrate. However, sapphire wafers generally have low electrical conductivity and thermal conductivity. And a sapphire wafer is hard. In addition, the sapphire wafer has a low cleavage property.
- a device having a semiconductor light emitting element including a sapphire substrate is limited in shape, and a device having a semiconductor light emitting element including a sapphire substrate needs to be designed to efficiently dissipate heat. That is, in order to emit a large amount of light to one semiconductor light emitting element, it is necessary to supply a large current to the semiconductor light emitting element. When a large current is supplied to the semiconductor light emitting device, the semiconductor light emitting device generates a lot of heat. Therefore, the device needs to have a design with high heat dissipation.
- a sapphire wafer is polished and thinned. Conventionally, the sapphire wafer is removed from the nitride semiconductor.
- a buffer layer is formed on the upper surface of the sapphire wafer.
- This buffer layer is, for example, GaN grown at a low temperature.
- an n-type nitride semiconductor layer is crystal-grown on the upper surface of the buffer layer.
- a p-type nitride semiconductor layer is crystal-grown on the upper surface of the n-type nitride semiconductor layer.
- a support wafer is bonded to the upper surface of the p-type nitride semiconductor layer.
- the buffer layer is irradiated with laser light such as ultraviolet light through a sapphire wafer. Thereby, the sapphire wafer is peeled from the n-type nitride semiconductor layer.
- a method for manufacturing such a semiconductor light emitting device has been studied.
- the sapphire wafer has a coefficient of thermal expansion different from that of the nitride semiconductor layer. Therefore, when the sapphire substrate is polished and thinned, the nitride semiconductor layer is subjected to stress caused by a difference in thermal expansion coefficient between the sapphire wafer and the nitride semiconductor layer. This stress causes warpage in the sapphire wafer and the multilayer nitride semiconductor layer. This warp causes cracks in the sapphire wafer and the multilayer nitride semiconductor layer.
- the multilayer nitride semiconductor layer is irradiated with laser light through the sapphire wafer. That is, the buffer layer of the multilayer nitride semiconductor layer receives laser light.
- the buffer layer receives the laser beam
- GaN is decomposed into Ga and N.
- N 2 is generated. Since this N 2 gas exists between the multilayer nitride semiconductor and the sapphire wafer, a gas pressure is applied to the multilayer nitride semiconductor layer. Therefore, the gas pressure of N 2 gas generates cracks on the order of micrometers in the multilayer nitride semiconductor layer. This crack causes current to leak. Therefore, the yield of the semiconductor light emitting device manufactured in this way is low.
- Patent Document 1 and Patent Document 2 disclose a process of providing a gap in advance at the interface between the transparent crystal wafer and the nitride semiconductor layer. This void relieves the gas pressure generated by N 2 generated between the transparent crystal wafer and the multilayer nitride semiconductor layer.
- Patent Document 1 and Patent Document 2 disclose the following steps. First, a base layer including a buffer layer constituting a part of the multilayer nitride semiconductor layer is crystal-grown on the upper surface of the sapphire wafer by the MOVPE method or the like. The buffer layer is made of GaN.
- n-type nitride semiconductor layer and a p-type nitride semiconductor layer are formed on the upper surface of the buffer layer and the sapphire wafer.
- the n-type nitride semiconductor layer and the p-type nitride semiconductor layer are formed by crystal growth by lateral epitaxial growth (Epitaxial Lateral Overgrowth). Thereby, a void is formed at the interface between the sapphire wafer and the multilayer nitride semiconductor layer.
- Patent Document 3 also discloses a process of forming irregularities on the upper surface of a sapphire wafer by photolithography and etching.
- Patent Document 3 first, irregularities are formed on the upper surface of a sapphire wafer.
- a step of forming a nitride semiconductor layer is performed.
- a step of irradiating the nitride semiconductor layer with laser light through a sapphire wafer is performed. Thereby, the sapphire wafer is peeled from the multilayer nitride semiconductor layer.
- a multilayer nitride semiconductor layer including a buffer layer is formed on the upper surface of a sapphire wafer having irregularities.
- the multilayer nitride semiconductor layer thus formed is formed by crystal growth having a property different from that of the lateral epitaxial growth method. That is, in the initial stage of crystal growth, the unevenness of the sapphire wafer affects the crystal of the multilayer nitride semiconductor. As a result, the quality of the multilayer nitride semiconductor layer is degraded.
- Patent Document 4 discloses another method for manufacturing a semiconductor light emitting element.
- Patent Document 4 discloses a process of crystal growth of a multilayer nitride semiconductor layer on the upper surface of a sapphire wafer. Subsequently, a step of forming a groove reaching the upper surface of the sapphire wafer from the upper surface of the multilayer nitride semiconductor layer is performed. Subsequently, the multilayer nitride semiconductor layer is irradiated with laser light through a sapphire wafer. Thereby, the sapphire wafer is peeled from the multilayer nitride semiconductor layer.
- a first object of the present invention is to provide a method for manufacturing a semiconductor light emitting device in which occurrence of cracks on the order of micrometers in a multilayer nitride semiconductor layer is suppressed.
- a second object of the present invention is to provide a method for manufacturing a semiconductor light emitting device in which a multilayer nitride semiconductor layer and a support substrate are securely bonded.
- the method for manufacturing a semiconductor light emitting device of the present invention includes a semiconductor layer forming step, a bonding step, a groove forming step, a light irradiation step, a peeling step, and a cutting step.
- the semiconductor layer forming step a multilayer nitride semiconductor layer is formed on the upper surface of the first wafer that transmits the first light.
- the first wafer has the first surface and the second surface. The second surface is located on the opposite side to the first surface.
- the multilayer nitride semiconductor layer includes an n-type or p-type first nitride semiconductor layer, a second nitride semiconductor layer positioned on the upper surface of the first nitride semiconductor layer and having a shape opposite to the first nitride semiconductor layer.
- the multilayer nitride semiconductor layer has a third surface opposite to the first surface.
- the joining step is performed after the semiconductor layer forming step. In the bonding step, the second wafer is bonded onto the multilayer nitride semiconductor layer.
- the groove forming step is performed after the joining step. In the groove forming step, a groove having a depth reaching at least the multilayer nitride semiconductor layer is formed from the second surface of the first wafer.
- the light irradiation process is performed after the groove forming process.
- the light irradiation step irradiates the lower surface of the multilayer nitride semiconductor layer with the first light through the first wafer, thereby decomposing the nitride semiconductor on the third surface of the multilayer nitride semiconductor layer.
- Nitrogen gas is generated by the decomposition of the nitride semiconductor on the third surface of the multilayer nitride semiconductor layer. This nitrogen gas is discharged to the outside through the groove.
- the nitride semiconductor on the third surface of the multilayer nitride semiconductor layer is decomposed, so that the bonding force between the multilayer nitride semiconductor layer and the first wafer is reduced.
- the peeling process is performed after the light irradiation process.
- the first nitride semiconductor layer is peeled from the first wafer.
- the cutting process is performed after the peeling process.
- the first nitride semiconductor layer, the second nitride semiconductor layer, and the second wafer are cut along the groove. Thereby, it divides
- the groove is formed after the multilayer nitride semiconductor layer is bonded to the support wafer.
- the multilayer nitride semiconductor layer is divided into a plurality of semiconductor light-emitting elements including a support substrate and a multilayer nitride semiconductor formed on the support substrate.
- a semiconductor light emitting device in which the multilayer nitride semiconductor and the support substrate are reliably bonded is obtained.
- the step of forming a new groove on the second wafer can be omitted in the cutting step. Therefore, it can be easily divided into a plurality of semiconductor light emitting elements.
- the groove When forming the groove, it is preferable to form the groove by irradiating a laser beam.
- the groove can be formed in a shorter time than the time required for forming the groove with a dicing saw. Moreover, a groove having a narrower width than that of the groove formed by the dicing saw can be formed. Thereby, many semiconductor light emitting elements can be manufactured from one second wafer. As a result, the cost of the semiconductor light emitting device can be reduced.
- the first light When irradiating the first light, it is preferable to irradiate the first light to a region away from the groove by a predetermined distance.
- the portion where the leak path element is formed can be removed together with the first wafer in the peeling step.
- the method for manufacturing a semiconductor light emitting device of the present invention preferably further includes an insulating film forming step.
- the insulating film forming step is performed after the first wafer is separated from the multilayer nitride semiconductor layer.
- an insulating film is formed on the inner surface of the groove.
- the cutting process is performed after the insulating film forming process.
- the side surfaces of the multilayer nitride semiconductor layer of the semiconductor light emitting device after the cutting process can be prevented from being exposed to the atmosphere. Thereby, it can prevent that a foreign material adheres to the side of a multilayer nitride semiconductor layer. As a result, current leakage of the semiconductor light emitting device can be prevented.
- the second wafer has a plurality of element formation regions and a scribe lane region.
- the element formation region is separated from other element formation regions by a scribe lane region.
- the groove is formed along a center line passing through the center in the width direction of the scribe lane region.
- the multilayer nitride semiconductor layer preferably further includes a buffer layer.
- the buffer layer is made of a nitride semiconductor.
- the buffer layer is located on the first wafer.
- the first nitride semiconductor layer is located on the upper surface of the buffer layer.
- the lower surface of the buffer layer defines the third surface of the multilayer nitride semiconductor layer.
- the buffer layer is preferably made of gallium nitride.
- the first light is preferably ultraviolet light.
- the multilayer nitride semiconductor layer preferably has a plurality of first regions and second regions.
- the plurality of first regions correspond to the semiconductor light emitting element.
- the second region separates the first region from other first regions.
- the first light is irradiated to the first region without being irradiated to the second region.
- the second region has a non-irradiation width having a center coinciding with the center of the groove width of the groove.
- the second region has a non-irradiation width larger than the groove width of the groove.
- FIG. 3 is a side cross-sectional view illustrating the method for manufacturing the semiconductor light emitting element of Embodiment 1.
- FIG. 10 is a side cross-sectional view illustrating the method for manufacturing the semiconductor light emitting element of Embodiment 2. It is side surface sectional drawing shown for demonstrating the manufacturing method of the semiconductor light-emitting device of Embodiment 3. It is explanatory drawing of the manufacturing method of a semiconductor light-emitting device same as the above. It is explanatory drawing of the manufacturing method of a semiconductor light-emitting device same as the above. It is side surface sectional drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 4.
- the semiconductor light emitting device A in the present embodiment is a light emitting diode using a nitride semiconductor material.
- the support wafer is turned over and manufactured. Therefore, in order to facilitate the explanation, in FIG. 1A to FIG. FIG. 1G shows a side cross-sectional view of the semiconductor light emitting element A.
- the semiconductor light emitting device A includes a support substrate 3, a multilayer nitride semiconductor layer 2, a cathode electrode 42, and an anode electrode 44.
- the support substrate 3 is made of silicon.
- the multilayer nitride semiconductor layer 2 includes a p-type nitride semiconductor layer 24, a light emitting layer 23, and an n-type nitride semiconductor layer 22. That is, the p-type nitride semiconductor layer is doped with a dopant of the opposite type to the dopant doped in the n-type nitride semiconductor layer.
- the anode electrode 44 is formed on the upper surface of the support substrate 3.
- the p-type nitride semiconductor layer is disposed on the upper surface of the anode electrode 44.
- the p-type nitride semiconductor layer is bonded to the upper surface of the support substrate 3.
- the light emitting layer 23 is disposed on the upper surface of the p-type nitride semiconductor layer.
- the n-type nitride semiconductor layer is disposed on the upper surface of the light emitting layer 23.
- the cathode electrode 42 is disposed on the upper surface of the n-type nit
- the light emitting diode of this embodiment is a blue light emitting diode.
- the n-type nitride semiconductor layer 22 is made of n-type GaN doped with an n-type dopant.
- the n-type dopant is, for example, Si.
- the light emitting layer 23 has a single quantum well structure. In this single quantum well structure, barrier layers made of GaN and well layers made of InGaN are alternately stacked.
- the p-type nitride semiconductor layer 24 includes a p-type AlGaN layer 24a doped with a p-type dopant and a p-type GaN layer 24 doped with a p-type dopant.
- the p-type dopant is, for example, Mg or Zn.
- the n-type nitride semiconductor layer 24 has a thickness of 2000 nm.
- the light emitting layer 23 has a thickness of 50 nm.
- the p-type nitride semiconductor layer 24 has a thickness of 100 nm.
- these numerical values are examples and are not limited to these thicknesses.
- the layer structures of the n-type nitride semiconductor layer 22, the light emitting layer 23, and the p-type nitride semiconductor layer are not particularly limited.
- the material, composition, and structure of the n-type nitride semiconductor layer 22, the light emitting layer 23, and the p-type nitride semiconductor layer are appropriately changed depending on the use.
- the n-type nitride semiconductor layer 22 can be composed of an n-type GaN layer and an n-type AlGaN layer having a larger band gap energy than the n-type GaN layer.
- the confinement efficiency of carriers is improved, thereby promoting recombination of electrons and holes in the light emitting layer 23, and as a result, the internal quantum efficiency is increased.
- it can replace with the above-mentioned light emitting layer 23, and can also employ
- the cathode electrode 42 is made of a Ni film, a Ti film, and an Au film.
- the Ni film is formed on the upper surface of the n-type nitride semiconductor layer 22.
- the Ti film is formed on the upper surface of the Ni film.
- the Au film is formed on the upper surface of the Ti film.
- the material and layer structure of the cathode electrode 42 are examples. Therefore, the material and layer structure of the cathode electrode are not limited.
- the anode 44 is made of a Pd film formed on the upper surface of the p-type nitride semiconductor layer 24 and an Au film on the Pd film.
- the material and layer structure of the anode electrode 44 are examples. Therefore, the material and layer structure of the anode electrode are not limited.
- the shapes of the cathode electrode 42 and the anode electrode 44 can be changed according to the design of the semiconductor light emitting device A.
- the n-type nitride semiconductor layer 22 has a surface on which the cathode electrode 42 is formed and a light emission surface other than the portion on which the cathode electrode is formed. Therefore, it is preferable to make the area of the cathode electrode 42 sufficiently smaller than the area of the upper surface of the n-type nitride semiconductor layer 22.
- the support substrate 3 is made of Si. However, the material of the support substrate 3 is not limited to Si.
- the support substrate 3 is preferably made of a material having higher thermal conductivity and rigidity than the transparent crystal wafer 1 described later. Examples of such a material include Si, Cu, CuW, and Ge.
- an anode electrode 44 is formed on the lower surface of the p-type nitride semiconductor layer 24. Then, the multilayer nitride semiconductor layer 2 and the support substrate 3 are bonded via a bonding layer 5 made of a conductive material.
- the bonding layer 5 is preferably a lead-free solder such as SnAgCu or AuSn. However, the bonding layer 5 is not limited to lead-free solder.
- a metal such as Au, Sn, Ag, or Cu can be used for the bonding layer 5.
- an alloy containing at least one of Au, Sn, Ag, and Cu can also be used. In the present embodiment, a conductive material is used as the material of the bonding layer 5.
- a part of the n-type nitride semiconductor layer 22 and a part of the light emitting layer 23 are etched from the upper surface of the multilayer nitride semiconductor layer 2 to expose a part of the upper surface of the p-type nitride semiconductor layer 24.
- a bonding layer made of a resin can be used.
- a conductive material or a resin may be used as the material of the bonding layer 5 in consideration of heat dissipation and bonding strength.
- a transparent crystal wafer 1 made of a sapphire wafer having an upper surface of (0001) is prepared.
- This transparent crystal wafer 1 is defined as a first wafer.
- the transparent crystal wafer 1 has a first surface 100 and a second surface 200.
- the first surface 100 defines the upper surface of the transparent crystal wafer 1.
- the second surface 200 is located on the opposite side to the first surface 100. That is, the second surface 200 defines the lower surface of the transparent crystal wafer 1.
- a buffer layer 21 made of GaN is epitaxially grown on the upper surface of the transparent crystal wafer 1 by the MOVPE method.
- an n-type nitride semiconductor layer 22 made of n-type GaN is epitaxially grown on the upper surface of the buffer layer 21 by the MOVPE method.
- the light emitting layer 23 is epitaxially grown on the upper surface of the n-type nitride semiconductor layer 22.
- the light emitting layer 23 has a single quantum well structure including a barrier layer made of GaN and a well layer made of InGaN.
- the p-type nitride semiconductor layer 24 composed of the p-type AlGaN layer 24a and the p-type GaN layer 24b is epitaxially grown by the MOVPE method.
- the transparent crystal wafer 1 is formed as shown in FIG.
- a multilayer nitride semiconductor layer 2 is formed on the upper surface.
- the multilayer nitride semiconductor layer 2 has a lower surface, which is defined as a third surface 300 and faces the first surface 100. More specifically, the buffer layer has a lower surface that defines the third surface 300.
- the buffer layer 21 (a) reduces threading transitions that occur in the n-type nitride semiconductor layer 22 due to lattice mismatch between the transparent crystal wafer 1 and the n-type nitride semiconductor layer 22; (B) Provided to reduce the residual strain of the n-type nitride semiconductor layer 22.
- the buffer layer 21 is made of GaN, but the material of the buffer layer 21 is not limited to GaN.
- the material of the buffer layer 21 may be AlN or AlGaN, for example.
- the transparent crystal wafer 1 is made of Al2O3. However, the material of the transparent crystal wafer 1 is not limited to Al2O3.
- the material of the transparent crystal wafer 1 may be, for example, SiC, MgAl 2 O 4, ZnO, MgO, GaP, GaAs or the like.
- the method of forming the multilayer nitride semiconductor layer is not limited to the MOVPE method.
- the method for forming a multilayer nitride semiconductor layer in the semiconductor layer forming step include other methods such as hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), and liquid phase epitaxy (LPE).
- HVPE hydride vapor phase epitaxy
- MBE molecular beam epitaxy
- LPE liquid phase epitaxy
- the epitaxial growth method can also be employed.
- an activation annealing step for annealing the p-type nitride semiconductor layer 24 is performed.
- the multilayer nitride semiconductor layer is annealed at a predetermined temperature (for example, 750 ° C.) for a predetermined time (for example, 5 minutes) in a N 2 gas atmosphere using a lamp annealing apparatus.
- a predetermined temperature for example, 750 ° C.
- a predetermined time for example, 5 minutes
- a first electrode forming step for forming the anode electrode 44 on the upper surface of the multilayer nitride semiconductor layer 2 is performed.
- an anode electrode is formed on the upper surface of the multilayer nitride semiconductor layer 2 as shown in FIG.
- the anode electrode 44 is formed as follows. First, a first resist layer patterned so as to expose only a region where the anode electrode 44 is formed on the upper surface of the multilayer nitride semiconductor layer 2 is formed by photolithography. Subsequently, the anode electrode 44 is formed by an electron beam evaporation method or the like. Subsequently, the first resist layer and the film formed on the first resist layer are lifted off.
- the anode electrode 44 is formed on the upper surface of the multilayer nitride semiconductor layer 2.
- the semiconductor light emitting element A has a support substrate 3 having a plane dimension of 1 square millimeter.
- the shape of the anode electrode 44 is a square shape smaller than the support substrate 3.
- the anode electrodes 44 are arranged in a matrix on the upper surface of the multilayer nitride semiconductor layer 2.
- the anode electrode 44 is separated from the adjacent anode electrode 44 by 1 mm.
- the support wafer 30 is defined as a second wafer.
- the joining step the multilayer nitride semiconductor layer 2 is joined to the support wafer 30 via the joining layer 5 made of a conductive material (such as non-lead solder made of SnAgCu). Specifically, first, a SnAgCu paste is applied to the lower surface of the support wafer 30.
- the multilayer nitride semiconductor layer 2 and the support wafer 30 are arranged so that the SnAgCu paste is interposed between the support wafer 30 and the multilayer nitride semiconductor layer 2.
- the multilayer nitride semiconductor layer 2, the support wafer 30, and the SnAgCu paste are put into a reflow furnace at a predetermined temperature (for example, 270 ° C.) for a predetermined time (for example, 10 minutes).
- a predetermined temperature for example, 270 ° C.
- a predetermined time for example, 10 minutes
- the support wafer 30 is turned over. Then, a groove forming step for forming a groove from the lower surface of the transparent crystal wafer 1 to the multilayer nitride semiconductor layer 2 is performed. This groove is formed along the center line of the width of the region corresponding to the scribe lane. Thereby, as shown in FIG.1 (c), the transparent crystal wafer and multilayer nitride semiconductor layer 2 in which the groove
- the groove forming step by scanning a laser beam of a THG-YAG laser having a wavelength of 355 nm, a frequency of 10 kHz, an output of 5 W, and a pulse width of 30 nsec at a scanning speed (for example, 1 mm / s), A groove having a depth of 350 ⁇ m and a width of 40 ⁇ m is formed.
- the depth and width of the groove are not limited to the above depth and width.
- the groove is formed so as to reach the multilayer nitride semiconductor layer 2 from the lower surface of the transparent crystal wafer 1.
- the groove has a depth larger than the thickness of the transparent crystal wafer 1, whereby the groove reaches the n-type nitride semiconductor layer from the lower surface of the transparent crystal wafer 1. Therefore, it is necessary to irradiate the transparent crystal wafer 1 with a laser beam having energy stronger than the energy of the laser beam irradiated when a groove is formed in the multilayer nitride semiconductor layer from the upper surface of the multilayer nitride semiconductor layer 2. Therefore, it is preferable to polish the transparent crystal wafer 1 to have a thickness of about 100 nm in order to prevent the influence of heat on the inner periphery of the groove and the expansion of the width of the groove.
- the handling property is lowered. Further, when the thickness of the transparent crystal wafer 1 is polished to 100 nm or less, the multilayer nitride semiconductor layer 2 may be cracked due to the warp of the transparent crystal wafer 1.
- a THG-YAG laser is used as a laser for forming the groove. Since the THG-YAG laser is an ultraviolet laser, the THG-YAG laser can be narrowed down to a focal point having a diameter smaller than the diameter of the focal point that narrows the visible light. Therefore, the energy density per unit area at the focal point increases. As a result, the estuary area can be reduced. Further, by using pulsed laser light, an energy peak value per unit area sufficient for processing the transparent crystal wafer 1 can be obtained.
- the pulse laser beam has an output of 3 W and a frequency of 10 kHz.
- the energy peak per unit area is about 42 J / cm 2 based on the formula: 3/10000 / ( ⁇ ⁇ 0.0015 ⁇ 0.0015).
- the pulse width of the laser beam is preferably short. That is, the laser beam used in the groove forming step is not limited to the THG-YAG laser.
- a KrF excimer femtosecond laser (wavelength: 248 nm, frequency: 350 kHz, pulse width: 800 fs) having a high output, a short wavelength, and a short pulse width may be used.
- the depth of the groove 6 formed in the groove forming step may be at least a depth that reaches the multilayer nitride semiconductor layer 2.
- the kerf 6 is formed using a laser.
- the means for forming the groove is not limited to the laser.
- the means for forming the groove can also be formed using a dicing saw, a dry etching apparatus, or the like.
- the groove 6 when the groove 6 is formed by laser light, the groove 6 can be formed at high speed in an arbitrary direction in combination with a galvanometer mirror or the like. Therefore, in this case, the groove 6 can be formed in a shorter time than when the kerf 6 is formed by a dicing saw or a dry etching apparatus.
- the width of the groove 6 can be reduced to about 20 to 40 ⁇ m, thereby reducing the width of the groove. Therefore, many semiconductor light emitting elements A can be obtained from one support wafer 30. That is, the cost of the semiconductor light emitting element A can be reduced.
- a light irradiation step of irradiating the lower surface of the multilayer nitride semiconductor layer 2 with light through the transparent crystal wafer 1 is performed.
- a peeling step for peeling the transparent crystal wafer 1 from the multilayer nitride semiconductor layer 2 is performed.
- a second electrode forming step for forming the cathode electrode 42 on the lower surface of the support wafer 30 in the multilayer nitride semiconductor layer 2 is performed.
- the support wafer 30 is attached to the adhesive resin tape 8, and then, as shown in FIG. 1 (e), the dicing groove 7 reaching the depth of about half the thickness of the support wafer 30 along the groove 6.
- a dicing groove forming step of forming is performed.
- the lower surface of the multilayer nitride semiconductor layer 2 is irradiated with laser light LB made of ultraviolet light through a transparent crystal wafer.
- the laser beam LB is defined as the first light.
- GaN of the buffer layer 21 is decomposed into Ga and N.
- N 2 gas is generated. This N 2 gas is released through the groove 6. Therefore, it is possible to prevent occurrence of cracks on the order of micrometers in the n-type nitride semiconductor layer 22 due to the gas pressure of N 2 gas.
- the bonding force between multilayer nitride semiconductor layer 2 and transparent crystal wafer 1 is reduced.
- the transparent crystal wafer 1 can be peeled from the multilayer nitride semiconductor layer 2. Therefore, in the peeling process, the transparent crystal wafer 1 is easily peeled off.
- the Ga remaining on the surface of the multilayer nitride semiconductor layer 2 and the inner surface of the kerf 6 after the transparent crystal wafer 1 is peeled off from the multilayer nitride semiconductor layer 2 is, for example, in a hydrochloric acid solution (for example, hydrochloric acid having a concentration of 50%) It can be removed by immersion for about 1 minute. Even when the transparent crystal wafer 1 cannot be peeled off, the decomposed Ga is a metal having a melting point of about 30 ° C., so the Ga near the interface is melted using a hot plate or the like (the support wafer 30 is mounted on the hot plate). The transparent crystal wafer 1 can be easily peeled by placing and melting the Ga).
- a hydrochloric acid solution for example, hydrochloric acid having a concentration of 50%
- the light irradiated onto the lower surface of the multilayer nitride semiconductor layer 2 through the transparent crystal wafer 1 is laser light LB composed of ultraviolet light having a larger photon energy than visible light.
- the irradiation energy of the laser beam LB is 0. About 18 J / cm 2 .
- a KrF excimer laser having a laser beam wavelength of 248 nm is used to irradiate ultraviolet light.
- the laser that irradiates ultraviolet light is not limited to KrF.
- Lasers that irradiate ultraviolet light include, for example, a XeCl excimer laser with a wavelength of 308 nm, a third harmonic YAG laser with a wavelength of 355 nm, a fourth harmonic YAG laser with a wavelength of 266 nm, a fifth harmonic YAG laser with a wavelength of 213 nm, etc. Can also be used. That is, the laser beam LB is appropriately selected according to the material thickness of the transparent crystal wafer 1 and the multilayer nitride semiconductor layer 2.
- a second resist layer having an opening in the region where the cathode electrode 42 is to be formed is formed by a photolithography technique.
- the cathode electrode 42 is formed by an electron beam evaporation method or the like.
- unnecessary films on the second resist and the second resist layer are lifted off with an organic solvent.
- the dicing groove forming process As shown in FIG. 1 (f), a dividing process of dividing into individual semiconductor light emitting elements A is performed by a general braking device 9. Thereafter, an expanding step of stretching the dicing sheet 8 is performed. Subsequently, each semiconductor light emitting element A is picked up to obtain individual semiconductor light emitting elements A as shown in FIG.
- the dicing groove forming process and the dividing process constitute a dicing process in which dicing is performed along the groove 6.
- the method for manufacturing the semiconductor light emitting device A includes the semiconductor layer forming step, the bonding step, the groove forming step, the light irradiation step, the peeling step, and the cutting step.
- the semiconductor layer forming step the multilayer nitride semiconductor layer 2 is crystal-grown on the upper surface of the transparent crystal wafer 1.
- the bonding step the multilayer nitride semiconductor layer 2 is bonded to the upper surface of the support wafer 30.
- the groove forming step a groove having a depth reaching the multilayer nitride semiconductor layer 2 from the lower surface of the transparent crystal wafer 1 is formed along the center line of the region corresponding to the scribe lane.
- the lower surface of the multilayer nitride semiconductor layer 2 is irradiated with the laser light LB through the transparent crystal wafer 1.
- GaN existing in the lower layer of the multilayer nitride semiconductor layer 2 is decomposed into Ga and N, thereby generating N 2 .
- the generated N 2 is discharged to the outside through the groove 6. Thereby, it is possible to prevent the occurrence of cracks on the order of micrometers in the multilayer nitride semiconductor layer 2.
- the multilayer nitride semiconductor layer 2 is bonded to the support wafer 30, and then the groove 6 is formed.
- the multilayer nitride semiconductor layer 2 is reliably bonded to the support wafer 30. That is, the multilayer nitride semiconductor layer 2 is reliably bonded to the support substrate 3.
- the physical bonding force between the multilayer nitride semiconductor layer 2 and the transparent crystal wafer 1 is lost. Since the physical bonding force is lost, the transparent crystal wafer 1 is peeled from the multilayer nitride semiconductor layer 2 in the peeling step.
- Embodiment 2 The manufacturing method of the semiconductor light emitting device A of the present embodiment is substantially the same as the manufacturing method of the semiconductor light emitting device A of the first embodiment. Therefore, steps different from those in the first embodiment will be described with reference to FIG.
- symbol is attached
- the polishing process is performed after the bonding process.
- the lower surface of the transparent crystal wafer 1 is polished, thereby thinning the transparent crystal wafer 1.
- the attaching process is performed after the polishing process.
- the support wafer 30 is attached to the dicing sheet 8.
- a groove forming step is performed after the attaching step.
- the groove is formed to a depth that reaches the middle of the support wafer 30 from the lower surface of the transparent crystal wafer 1.
- the thickness of the transparent crystal wafer 1 is set to 100 ⁇ m in the polishing step.
- the depth of the groove 6 is 250 ⁇ m.
- the width of the groove 6 is 30 ⁇ m.
- these numerical values are examples and are not particularly limited.
- a light irradiation step of scanning by irradiating the laser beam LB from the other surface side of the transparent crystal wafer 1 is performed as in the first embodiment.
- An arrow C in FIG. 2B shows an example of the scanning direction of the laser beam LB.
- the structure shown in FIG.2 (b) is obtained by performing the peeling process which peels the transparent crystal wafer 1.
- the process of newly forming the dicing grooves 7 described in the first embodiment in the support wafer 30 in the dicing process described in the first embodiment is omitted. be able to. Thereby, the dicing process can be simplified.
- the method for manufacturing a semiconductor light emitting device of this embodiment further includes a polishing step in addition to the steps of the first embodiment.
- the polishing process is performed after the bonding process.
- the transparent crystal wafer 1 is polished, thereby thinning the lower surface of the transparent crystal wafer 1.
- a groove forming process is performed.
- the groove forming step as shown in FIG. 3A, the groove 6 is formed from the lower surface of the transparent crystal wafer 1 so as to have a depth reaching the support wafer 30.
- the thickness of the transparent crystal wafer 1 is set to 100 ⁇ m in the polishing step, but this value is an example and is not particularly limited.
- a light irradiation region E ⁇ b> 2 for irradiating the laser beam LB is provided for each element formation region E ⁇ b> 1 of each semiconductor light emitting element A.
- the laser beam LB is irradiated to a region separated from the groove 6 by a predetermined distance. That is, the buffer layer has an irradiation region irradiated with the laser light LB and a non-irradiation region S1 not irradiated with the laser light LB.
- the non-irradiation region S1 that is not irradiated with the laser beam LB is provided along the groove 6.
- non-irradiation region S ⁇ b> 1 is provided to have a center in the width direction that coincides with the center in the width direction of the groove 6. Further, the non-irradiation region S ⁇ b> 1 is provided to have a width larger than the width of the groove 6.
- the laser beam LB is irradiated from the other surface side of the transparent crystal wafer 1 using a laser processing system as shown in FIG.
- This laser processing system uses an attenuator (optical attenuator) 51 for adjusting the energy density of laser light LB at a processing point, laser light LB from a laser (not shown) made of a KrF excimer laser, laser light LB.
- the imaging mask 52 for reflecting only the portion where the energy distribution of the laser beam LB is substantially uniform (the portion with good beam quality) and the laser beam LB are reflected.
- this laser processing system is a four-axis processing table 61 that can move a processing stage 62 on which the support wafer 30 is placed in four axis directions (X-axis direction, Y-axis direction, Z-axis direction, and ⁇ -axis direction).
- a control device (not shown) composed of a microcomputer or the like on which an appropriate program for controlling the four-axis machining table 61 is mounted, and the machining stage 62 can cope with step-like operations. .
- a second process of moving the processing stage 62 by the same distance as the arrangement pitch A (equal to the arrangement pitch of the anode electrodes 44 in this embodiment) is performed.
- the first process and the second process are alternately repeated.
- the laser beam LB is irradiated to all the light irradiation regions E2.
- the light irradiation region E2 is set so that the kerf 6 and the light irradiation region E2 do not overlap.
- the support wafer 30 is placed on a hot plate and heated to peel off the transparent crystal wafer 1.
- the transparent crystal wafer 1 can be peeled off.
- the portion corresponding to the non-irradiated region S1 remains on the transparent crystal wafer 1 or is pulverized with a gas pressure of N 2 gas. Therefore, the transparent crystal wafer 1 is easily peeled from the multilayer nitride semiconductor layer 2. Further, the portion corresponding to the non-irradiation region S 1 in the peripheral portion of the kerf 6 is removed together with the transparent crystal wafer 1.
- the metal Ga 81 remaining on the surface of the multilayer nitride semiconductor layer 2 and the dust (crushed GaN, etc.) 82 in the kerf 6 are removed from, for example, a hydrochloric acid solution (for example, having a concentration of 50% hydrochloric acid), the structure shown in FIG. 3D is obtained.
- a hydrochloric acid solution for example, having a concentration of 50% hydrochloric acid
- part of the bonding layer 5 made of a conductive material may evaporate and remain as deposits on the inner surface of the groove 6 due to heat generated when the laser beam LB is irradiated in the groove forming step.
- the deposit on the side surface of the multilayer nitride semiconductor layer 2 leaks current.
- the leak path element is formed in the vicinity of the kerf 6 in the kerf forming step.
- the unnecessary part part corresponding to the non-irradiation region S1 can be removed together with the transparent crystal wafer 1 in the peeling step.
- the distance D between the kerf 6 and the light irradiation region E2 in the range of about 10 to 30 ⁇ m.
- the distance D is shorter than 10 ⁇ m, there is a possibility that the position of the kerf 6 is irradiated with the laser beam LB due to the influence of the displacement of the processing stage 62. Thereby, the irradiated position may be shifted.
- the length is longer than 30 ⁇ m, the effect of relaxing the generated N 2 gas pressure may not be obtained.
- the shorter the distance D the easier the GaN in the non-irradiated region S1 is pushed toward the kerf 6 by the N 2 gas pressure, and the pushed GaN dust 82 can be removed by etching with a hydrochloric acid solution.
- the element formation region E1 is 930 square micrometers
- the width of the scribe lane is 70 ⁇ m
- the light irradiation region E2 is 950 square micrometers
- the width of the kerf 6 is 30 ⁇ m
- the distance D 10 ⁇ m
- the groove 6 is formed to a depth reaching the bonding layer 5 in the groove forming step. And the structure shown to Fig.6 (a) is obtained by performing a peeling process. Subsequently, as shown in FIG. 6D, an insulating film forming step is performed for forming an insulating film 71 made of a silicon oxide film on the inner surface of the groove 6. Following the insulating film forming step, a dicing step is performed.
- a third resist layer 71 having a region where the insulating film 71 is to be formed is opened on the surface side of the multilayer nitride semiconductor layer 2 by using a photolithography technique, so that FIG. Get the structure shown.
- an insulating film 71 made of a silicon oxide film having a predetermined film thickness (for example, about 100 nm) is formed by an electron beam evaporation method or the like.
- the third resist layer and unnecessary insulating film 71 on the third resist layer are removed by ultrasonic cleaning using an organic solvent (for example, acetone) (lift-off may be performed).
- an organic solvent for example, acetone
- the dicing groove forming process after the peeling process for example, when the dicing groove 7 is formed by irradiating the laser beam, a part of the bonding layer 5 made of a conductive material is caused by the heat when the laser beam is irradiated. It evaporates and remains on the inner surface of the dicing groove 7 as a deposit.
- the deposit is a leak path element as a result of the deposit on the side surface of the multilayer nitride semiconductor layer 2. As a result, current leakage or short circuit occurs.
- the side surfaces of the multilayer nitride semiconductor layer 2 exposed in the kerf forming process are covered with the insulating film 71 before the dicing process.
- the width of the dicing groove 7 so that the insulating film 71 remains on the side surface of the multilayer nitride semiconductor layer 2 in the process, the side surface of the multilayer nitride semiconductor layer 2 is the insulating film 71 in the semiconductor light emitting device A after the dicing process.
- the insulating film 71 is not limited to a silicon oxide film, and may be a silicon nitride film, for example.
- the visible light light emitting diode was illustrated as the semiconductor light emitting element A, it may be not only a visible light light emitting diode but an ultraviolet light emitting diode and an infrared light emitting diode.
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Abstract
Description
本実施形態における半導体発光素子Aは、窒化物半導体材料を用いた発光ダイオードである。なお、半導体発光素子Aの製造過程において、支持ウエハを裏返して製造する。したがって、説明を容易にするために、図1(a)~(g)において、矢印の方向を上方として説明する。図1(g)は、半導体発光素子Aの側面断面図を示している。図1(g)に示すように、半導体発光素子Aは、支持基板3と、多層窒化物半導体層2と、カソード電極42と、アノード電極44とを備える。支持基板3は、シリコンからなる。多層窒化物半導体層2は、p形窒化物半導体層24と、発光層23と、n型窒化物半導体層22とを備える。すなわち、p形窒化物半導体層は、n型窒化物半導体層にドープされたドーパントと反対の型のドーパントがドープされている。アノード電極44は、支持基板3の上面に形成されている。p形窒化物半導体層は、アノード電極44の上面に配置されている。また、p形窒化物半導体層は、支持基板3の上面に接合されている。発光層23は、p形窒化物半導体層の上面に配置されている。n形窒化物半導体層は、発光層23の上面に配置されている。カソード電極42は、n形窒化物半導体層の上面に配置されている。
本実施形態の半導体発光素子Aの製造方法は、実施形態1の半導体発光素子Aの製造方法と略同一である。したがって、実施形態1と異なる工程について図2を用いて説明する。なお、実施形態1と同一の構成には同一の符号を付して説明は省略する。
本実施形態の半導体発光素子Aの製造方法は、実施形態1と略同じである。したがって、本実施形態においては、特徴となる工程について、図3に基づいて説明する。なお、実施形態1と同一の構成には同一の符号を付して、説明を省略する。
さらに、非照射領域S1は、溝6の幅よりも大きな幅を持つように設けられている。
本実施形態の半導体発光素子A(図1(g)参照)の製造方法は実施形態3と略同じなので、特徴となる工程についてのみ図6を参照しながら説明する。なお、実施形態3と同様の構成要素には同一の符号を付して説明を省略する。
Claims (10)
- 半導体発光素子の製造方法であって、以下の工程を有する、
(a)第1の光を透過する第1ウエハの第1面に多層窒化物半導体層を形成し、前記第1ウエハは前記第1面と当該第1面と反対側のする第2面とを有しており、前記多層窒化物半導体層は、n型またはp形の第1窒化物半導体層と、当該第1窒化物半導体層の上面に位置し且つ当該第1窒化物半導体層と反対の形を有する第2窒化物半導体層とを含み、前記多層窒化物半導体層は、前記第2面と対向する第3面を有しており、
(b)前記多層窒化物半導体層を形成した後に、前記多層窒化物半導体層の上に第2ウエハを接合し、
(c)前記多層窒化物半導体層と前記第2ウエハとを接合した後に、前記第1ウエハの前記第2面から少なくとも前記多層窒化物半導体層に到達する深さの溝を形成し、
(d)前記溝を形成した後に、前記第1ウエハを介して前記多層窒化物半導体層の第3面に第1の光を照射し、これにより前記多層窒化物半導体層の第3面にある窒化物半導体を分解し、前記多層窒化物半導体層の第3面に存在する窒化物半導体は分解されることにより窒素ガスを発生し、当該窒素ガスは前記溝を介して外部に放出され、多層窒化物半導体層の第3面に存在する窒化物半導体は分解されることにより前記第1ウエハとの間の接合力が低下され、
(e)前記第1ウエハを前記第1窒化物半導体層から分離し、
(f)前記第1ウエハを分離した後に、前記第1窒化物半導体層と前記第2窒化物半導体層と前記第2ウエハとを前記溝に沿って切断し、これにより複数の半導体発光素子に分割することを特徴とする半導体発光素子の製造方法。
- 前記溝を形成する際に、前記第2ウエハに到達する深さの溝を形成することを特徴とする請求項1に記載の半導体発光素子の製造方法。
- 前記溝を形成する際に、レーザ光を照射して溝を形成することを特徴とする請求項1または2に記載の半導体発光素子の製造方法。
- 前記第1の光を照射する際に、前記第1の光を前記溝から所定の距離離れた領域に照射することを特徴とする請求項1から3のいずれかに記載の半導体発光素子の製造方法。
- 前記半導体発光素子の製造方法は、さらに以下の工程を有する、
(g)前記第1ウエハを除去した後に、前記溝の内面に絶縁膜を形成する、
前記絶縁膜を形成した後に、前記切断をすることを特徴とする請求項1から4のいずれかに記載の半導体発光素子の製造方法。
- 前記第2ウエハは、複数の素子形成領域と、当該素子形成領域を他の素子形成領域と分割するスクライブレーン領域とを有しており、
前記溝を形成する際に、前記スクライブレーン領域の幅方向の中心を通る中心線に沿うように溝を形成することを特徴とする請求項1から5のいずれかに記載の半導体発光素子の製造方法。
- 前記多層窒化物半導体層は、さらに、バッファ層を備えており、当該バッファ層は窒化物半導体からなり、
前記多層窒化物半導体層を形成する際に、前記バッファ層は、前記第1ウエハの上に位置しており、前記第1窒化物半導体層は前記バッファ層の上面に位置しており、
前記バッファ層の下面は、前記多層窒化物半導体層の前記第3面を規定することを特徴とする請求項1から6のいずれかに記載の半導体発光素子の製造方法。
- 前記バッファ層は、窒化ガリウムからなることを特徴とする請求項7に記載の半導体発光素子の製造方法。
- 前記第1の光は紫外光であることを特徴とする請求項1から8のいずれかに記載の半導体発光素子の製造方法。
- 前記多層窒化物半導体層は、複数の前記半導体発光素子に対応する複数の第1領域と、前記第1領域を他の前記第1領域から分離する第2領域とを有しており、
前記第1の光を照射する際に、前記第1の光は、前記第2領域に照射されることなく前記第1領域に照射され、
前記第2領域は、前記溝の溝幅の中心と一致する中心を有する非照射幅を有しており、
前記非照射幅は、前記溝の溝幅よりも大きいことを特徴とする請求項1から9のいずれかに記載の半導体発光素子の製造方法。
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