WO2010047297A1 - 窒化物系半導体発光素子を作製する方法、及びエピタキシャルウエハを作製する方法 - Google Patents
窒化物系半導体発光素子を作製する方法、及びエピタキシャルウエハを作製する方法 Download PDFInfo
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- WO2010047297A1 WO2010047297A1 PCT/JP2009/067988 JP2009067988W WO2010047297A1 WO 2010047297 A1 WO2010047297 A1 WO 2010047297A1 JP 2009067988 W JP2009067988 W JP 2009067988W WO 2010047297 A1 WO2010047297 A1 WO 2010047297A1
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- gallium nitride
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 231
- 238000000034 method Methods 0.000 title claims abstract description 82
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 28
- 230000012010 growth Effects 0.000 claims abstract description 253
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 199
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 165
- 230000004888 barrier function Effects 0.000 claims abstract description 125
- 239000000758 substrate Substances 0.000 claims abstract description 65
- 229910052738 indium Inorganic materials 0.000 claims abstract description 36
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims abstract description 36
- 239000000203 mixture Substances 0.000 claims description 42
- 229910002704 AlGaN Inorganic materials 0.000 claims description 29
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 24
- 238000010438 heat treatment Methods 0.000 claims description 16
- 229910021529 ammonia Inorganic materials 0.000 claims description 12
- 239000001257 hydrogen Substances 0.000 claims description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 6
- 230000010355 oscillation Effects 0.000 claims description 4
- 230000006866 deterioration Effects 0.000 abstract description 13
- 235000012431 wafers Nutrition 0.000 description 37
- 239000013078 crystal Substances 0.000 description 23
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 21
- 230000008859 change Effects 0.000 description 15
- 239000002994 raw material Substances 0.000 description 15
- 239000002019 doping agent Substances 0.000 description 14
- 230000015572 biosynthetic process Effects 0.000 description 11
- 229910052757 nitrogen Inorganic materials 0.000 description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 9
- 238000006731 degradation reaction Methods 0.000 description 9
- 229910052733 gallium Inorganic materials 0.000 description 9
- 238000005253 cladding Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 239000011777 magnesium Substances 0.000 description 6
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 6
- 239000007789 gas Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000005424 photoluminescence Methods 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000000103 photoluminescence spectrum Methods 0.000 description 3
- 238000000927 vapour-phase epitaxy Methods 0.000 description 3
- OMKCMEGHMLKVPM-UHFFFAOYSA-N CC=CC=C[Mg] Chemical compound CC=CC=C[Mg] OMKCMEGHMLKVPM-UHFFFAOYSA-N 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- 229910002114 biscuit porcelain Inorganic materials 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000005136 cathodoluminescence Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- -1 nitride compound Chemical class 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- MHYQBXJRURFKIN-UHFFFAOYSA-N C1(C=CC=C1)[Mg] Chemical compound C1(C=CC=C1)[Mg] MHYQBXJRURFKIN-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
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- H01L21/02104—Forming layers
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
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- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/34333—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser
Definitions
- the present invention relates to a method for producing a nitride-based semiconductor light-emitting element and a method for producing an epitaxial wafer.
- Patent Document 1 describes a method for manufacturing a semiconductor element.
- a large number of semiconductor layers are sequentially grown by crystal growth of a group III nitride compound semiconductor to form an active layer.
- This active layer has a semiconductor layer containing indium (In).
- After the formation of the active layer at least one p-type semiconductor layer is grown.
- the crystal growth temperature of the p-type semiconductor layer is not less than 820 degrees Celsius and not more than 910 degrees Celsius.
- a rare gas (He, Ne, Ar, Kr, Xe, Rn) or nitrogen gas (N 2 ) is used as a carrier gas for carrying the source gas of the p-type semiconductor layer.
- Patent Document 2 describes a method of manufacturing a nitride semiconductor light emitting device. In this method, after forming the active layer, to grow a p-type Al Z Ga 1-Z N layer at a deposition temperature which is within the range of 950 degrees 800 degrees Celsius on the active layer.
- Patent Document 3 describes a method for manufacturing a light-emitting element. After the well layer is grown, a part of the barrier layer is grown while being heated, and the remaining barrier layer is grown at a higher growth rate at a constant temperature. Thereafter, the temperature is lowered to grow a well layer. As a result, an MQW having excellent crystallinity and high luminous efficiency can be formed.
- Patent Document 2 after forming an active layer, a p-type AlGaN layer is grown at a growth temperature of 800 to 950 degrees Celsius.
- the growth temperature of the barrier layer is higher than the growth temperature of the well layer.
- the growth temperature of the well layer is 730 degrees Celsius
- the growth temperature of the barrier layer is 885 degrees Celsius.
- the p-type semiconductor layer is grown at a growth temperature of 820 ° C. or more and 910 ° C. or less. The growth temperature of this p-type semiconductor is lowered to maintain the crystallinity of the active layer in good quality.
- Patent Document 3 after the well layer is grown, a part of the barrier layer is grown while being heated, and the remainder of the barrier layer is grown at the temperature after the temperature is raised. This suppresses deterioration of the well layer and improves the crystal quality of the barrier layer.
- the growth temperature of the well layer made of InGaN decreases as the indium composition of InGaN increases. Therefore, a large temperature difference is generated between the growth temperature optimum for the well layer having a somewhat large indium composition and the growth temperature of the barrier layer.
- the substrate temperature is raised to the growth temperature of the barrier layer after the growth of the well layer.
- the well layer is exposed to a temperature higher than its own growth temperature. Therefore, although the degree of deterioration depends on the indium composition of the well layer, the crystal quality of the well layer is lowered by changing the temperature to the growth temperature of the barrier layer. Even in the method of depositing a part of the barrier layer while changing the temperature after the growth of the well layer, the well layer is still exposed to a high temperature due to the temperature change. Due to the temperature change, strain due to the stress between the barrier layer and the well layer is applied to the well layer. According to the inventor's knowledge, it is considered that InGaN growth is different from InGaN growth on the c-plane in a so-called semipolar plane.
- An object of the present invention is to provide a method for producing an epitaxial wafer for a semiconductor light emitting device.
- One aspect according to the present invention is a method of fabricating a nitride-based semiconductor light-emitting device.
- the method includes (a) growing a barrier layer for an active layer on a main surface of a semiconductor region made of a gallium nitride based semiconductor, and (b) forming a well layer for the active layer on the barrier layer. And (c) a step of growing a p-type gallium nitride based semiconductor region on the active layer.
- the main surface of the semiconductor region shows semipolarity inclined with respect to the c-plane of the gallium nitride semiconductor
- the barrier layer is made of a gallium nitride semiconductor different from the well layer
- the well layer is made of InGaN.
- the well layer has an indium composition of 0.15 or more, the growth temperature of the well layer is the same as the growth temperature of the barrier layer, and the p-type gallium nitride based semiconductor region has one or more p-types.
- a growth temperature in each of the p-type gallium nitride semiconductor layers is higher than a growth temperature of the well layer and a growth temperature of the barrier layer.
- Another aspect of the present invention is a method for producing an epitaxial wafer for a nitride-based semiconductor light-emitting device.
- the method includes (a) growing a barrier layer for an active layer on a main surface of a semiconductor region made of a gallium nitride based semiconductor, and (b) forming a well layer for the active layer on the barrier layer. And (c) a step of growing a p-type gallium nitride based semiconductor layer on the active layer.
- the main surface of the semiconductor region shows semipolarity inclined with respect to the c-plane of the gallium nitride semiconductor
- the barrier layer is made of a gallium nitride semiconductor different from the well layer
- the well layer is made of InGaN.
- the well layer has an indium composition of 0.15 or more, the growth temperature of the well layer is the same as the growth temperature of the barrier layer, and the p-type gallium nitride based semiconductor region has one or more p-types.
- a growth temperature in each of the p-type gallium nitride semiconductor layers is higher than a growth temperature of the well layer and a growth temperature of the barrier layer.
- the growth temperature of the well layer is the same as the growth temperature of the barrier layer, the deterioration of the crystal quality of the well layer during the growth of the barrier layer is suppressed.
- the growth temperature in each of the p-type gallium nitride based semiconductor layers is higher than the growth temperature of the well layer and the growth temperature of the barrier layer, the growth temperature of the well layer is the same as the growth temperature of the barrier layer. Degradation of the crystal quality of the well layer during the growth of the gallium nitride based semiconductor layer is suppressed.
- the growth temperature of the well layer and the growth temperature of the barrier layer may be 760 degrees Celsius or higher and 800 degrees Celsius or lower.
- both the growth temperature of the well layer and the barrier layer are the same temperature within a range of 760 degrees Celsius or higher and 800 degrees Celsius or lower, both the crystal quality of the well layer and the barrier layer is good.
- the growth temperature of the p-type gallium nitride based semiconductor region may be greater than 950 degrees Celsius and 1000 degrees Celsius or less. According to this method, since the growth temperature of the p-type gallium nitride based semiconductor region is in the above temperature range, the crystal quality and electrical characteristics of the p-type gallium nitride based semiconductor region are both good. In addition, the degradation of the crystal quality of the active layer during the growth of the p-type gallium nitride based semiconductor region is small.
- the indium composition of the well layer is 0.20 or more and 0.25 or less, the peak wavelength of light emission from the active layer is 500 nm or more, and light emission from the active layer at the peak wavelength.
- the intensity can indicate a maximum value.
- the p-type gallium nitride based semiconductor region may include an AlGaN layer. According to this method, the crystal quality and electrical characteristics of the AlGaN layer in the p-type gallium nitride semiconductor region are both good.
- the p-type gallium nitride based semiconductor region may have a thickness of 40 nm to 200 nm. According to this method, since the p-type gallium nitride based semiconductor region is deposited at the high temperature as described above, generation of pits in the p-type gallium nitride based semiconductor region can be suppressed. Further, since the growth surface of the p-type gallium nitride based semiconductor region can be kept flat, it is possible to deposit the p-type semiconductor region thick in order to reduce the resistance of the p-type gallium nitride based semiconductor region.
- the method according to the present invention may further include a step of preparing a substrate made of a gallium nitride based semiconductor.
- the main surface of the substrate is inclined with respect to the c-plane of the gallium nitride semiconductor.
- the substrate has a main surface made of a gallium nitride semiconductor.
- a semipolar semiconductor region inclined with respect to the c-plane can be obtained.
- the method according to the present invention may further include a step of preparing a substrate made of a gallium nitride based semiconductor.
- the main surface of the substrate is inclined with respect to the (000-1) plane which is the back surface of the c-plane ((0001) plane).
- the substrate has a main surface made of a gallium nitride based semiconductor.
- the inclination angle of the main surface of the substrate can be 60 degrees or more and 90 degrees or less. In the method according to the present invention, the inclination angle of the main surface of the semiconductor region can be not less than 60 degrees and not more than 90 degrees. Any tilt angle can be defined with respect to the (0001) plane) or the (000-1) plane.
- the method according to the present invention may further include a step of performing a heat treatment of the substrate prior to the growth of the gallium nitride based semiconductor.
- the atmosphere of the heat treatment contains at least ammonia and hydrogen.
- the substrate surface is cleaned and the substrate surface is modified by heat treatment in an atmosphere containing ammonia and hydrogen.
- a temperature difference between the maximum value of the growth temperature of the p-type gallium nitride based semiconductor region and the growth temperature of the well layer may be 250 degrees or less.
- the normal vector of the principal surface of the semiconductor region has a normal of either the c-plane ((0001) plane) or the (000-1) plane that is the back surface of the c-plane. It can be inclined with respect to the vector at an angle ranging from 60 degrees to 90 degrees.
- the active layer is grown on the main surface of the semiconductor region showing either semipolar or nonpolar tilted at an angle in the range of 60 degrees to 90 degrees. In this angle range, the amount of indium incorporated in the InGaN growth is good, so that InGaN with good crystal quality is formed.
- the indium composition of the well layer may be 0.20 or more, and the active layer may be provided to generate light having a peak wavelength in a wavelength region of 500 nm or more. This method can be applied to obtain long wavelength light emission.
- the growth temperature of the well layer and the growth temperature of the barrier layer may be 800 degrees centigrade or less, and the growth temperature of the p-type gallium nitride based semiconductor region is 1000 degrees centigrade or less. Can be. According to this method, since the growth temperature of the well layer is 800 degrees Celsius or less, the change range of the In composition in the InGaN layer can be widened. In addition, since the growth temperature of the p-type gallium nitride based semiconductor region is 1000 degrees Celsius or less, thermal degradation of the InGaN layer can be reduced.
- the growth temperature of the well layer and the growth temperature of the barrier layer may be 700 degrees Celsius or higher and may be 760 degrees Celsius or lower.
- This method can be applied to the formation of an active layer that generates light having a peak wavelength of emission wavelength of 400 nm or more and 540 nm or less. It is possible to avoid a decrease in light emission characteristics due to the crystal quality of the InGaN layer.
- the growth temperature of the p-type gallium nitride based semiconductor region may be greater than 850 degrees Celsius. According to this method, it is possible to suppress degradation of device characteristics due to an increase in resistance of the p-type gallium nitride semiconductor region.
- the growth temperature of the p-type gallium nitride based semiconductor region may be 950 degrees Celsius or less. According to this method, thermal degradation of the InGaN layer during the growth of the p-type gallium nitride based semiconductor region can be reduced.
- the temperature difference between the maximum growth temperature of the p-type gallium nitride based semiconductor region and the growth temperature of the well layer may be 200 degrees or less.
- the InGaN well layer has a relatively low growth temperature or when the In composition of the InGaN well layer is relatively high, the quality of the InGaN is sensitive to thermal stress after film formation.
- the indium composition of the well layer may be 0.25 or more and 0.35 or less, and the oscillation wavelength of light emitted from the active layer may be 500 nm or more. According to this method, an active layer that generates light having a wavelength longer than that of green light emission can be formed.
- the p-type gallium nitride based semiconductor region may have a thickness of 50 nm to 700 nm. According to this method, good optical confinement can be provided for the entire p-type gallium nitride based semiconductor region.
- the cladding layer can be 50 nm or more and 700 nm or less.
- the method according to the present invention may further include an end face for an optical resonator of the nitride semiconductor light emitting device.
- the inclination angle of the main surface of the substrate is preferably not less than 63 degrees and not more than 83 degrees. According to this angular range, good In uptake can be obtained in the growth of InGaN. Therefore, the change range of the In composition of the well layer can be expanded, and it is good for the production of an active layer that generates light having a wavelength of 500 nm or more.
- a method for manufacturing a nitride-based semiconductor light-emitting element that can reduce deterioration of a well layer when forming a p-type gallium nitride-based semiconductor region and a barrier layer.
- a method for producing an epitaxial wafer for a nitride-based semiconductor light-emitting device that can reduce deterioration of a well layer when forming a p-type gallium nitride-based semiconductor region and a barrier layer.
- FIG. 1 is a drawing showing a flow of main steps in a method for manufacturing a nitride-based semiconductor light-emitting device and a method for manufacturing an epitaxial wafer according to the present embodiment.
- FIG. 2 is a drawing showing the main steps in the method for producing a nitride-based semiconductor light-emitting device and the method for producing an epitaxial wafer according to the present embodiment.
- FIG. 3 is a drawing showing main steps in a method for producing a nitride-based semiconductor light-emitting device and a method for producing an epitaxial wafer according to the present embodiment.
- FIG. 1 is a drawing showing a flow of main steps in a method for manufacturing a nitride-based semiconductor light-emitting device and a method for manufacturing an epitaxial wafer according to the present embodiment.
- FIG. 2 is a drawing showing the main steps in the method for producing a nitride-based semiconductor light-emitting device and the method for producing an epi
- FIG. 4 is a drawing showing main steps in a method for producing a nitride-based semiconductor light-emitting element and a method for producing an epitaxial wafer according to the present embodiment.
- FIG. 5 is a timing chart showing a change in substrate temperature and a change in raw material gas flow in the subsequent steps after the formation of the active layer.
- 6 is a view showing a light emitting diode structure manufactured in Example 1.
- FIG. FIG. 7 is a drawing showing the full width at half maximum of the PL intensity in an LED structure manufactured using various growth conditions.
- FIG. 8 is a drawing showing a cathodoluminescence image in an LED structure in which a well layer and a barrier layer are grown at the same temperature, and a cathodoluminescence image in an LED structure in which the well layer and the barrier layer are grown at different temperatures.
- FIG. 9 is a drawing showing the flow of the main steps in the method for producing a nitride-based semiconductor light-emitting device and the method for producing an epitaxial wafer according to the present embodiment.
- FIG. 10 is a drawing showing the flow of the main steps in the method for producing a nitride-based semiconductor light-emitting device and the method for producing an epitaxial wafer according to the present embodiment.
- FIG. 9 is a drawing showing the flow of the main steps in the method for producing a nitride-based semiconductor light-emitting device and the method for producing an epitaxial wafer according to the present embodiment.
- FIG. 10 is a drawing showing the flow of the main steps in the method for
- FIG. 11 is a timing chart showing a change in substrate temperature and a change in raw material gas flow in a later process after the formation of the light emitting layer.
- 12 is a drawing showing an epitaxial substrate for a laser diode structure fabricated in Example 2.
- FIG. 13 is a drawing showing a laser diode structure fabricated in Example 2.
- FIG. 1 is a drawing showing a flow of main steps in a method for producing a nitride-based semiconductor light-emitting device and a method for producing an epitaxial wafer according to the present embodiment.
- 2 to 4 are drawings showing main steps in the method of manufacturing the nitride-based semiconductor light-emitting device and the method of manufacturing the epitaxial wafer according to the present embodiment.
- the nitride-based semiconductor light-emitting element includes, for example, a light-emitting diode or a laser diode.
- a substrate 11 made of a gallium nitride semiconductor is prepared.
- the substrate 11 can be made of, for example, GaN, InGaN, AlGaN, or the like.
- the main surface 11a and the back surface 11b are substantially parallel to each other.
- the main surface 11a of the substrate 11 is inclined from the c-plane of the gallium nitride semiconductor.
- the normal line of the main surface 11a intersects with the c-axis of the gallium nitride semiconductor at an inclination angle of 60 degrees or more and 90 degrees or less.
- the main surface 11a of the substrate 11 can be inclined with respect to the (000-1) plane that is the opposite surface of the c-plane ((0001) plane).
- the amount of indium incorporation in the InGaN growth of the well layer is on the (0001) plane and the plane having a tilt of 60 degrees or more and 90 degrees or less from the (0001) plane. Since it increases compared to InGaN growth, InGaN having a high In composition can be obtained by growth at a higher temperature than those of these surfaces. Thereby, a well layer with good crystallinity can be obtained.
- the main surface 11a having the above-mentioned angle exhibits semipolarity or nonpolarity.
- the substrate 11 is placed in the growth furnace 10.
- the substrate 11 is heat-treated in the growth furnace 10, as shown in FIG.
- the atmosphere of the heat treatment includes at least ammonia and hydrogen, for example.
- the substrate surface 11a is cleaned and the substrate surface 11a is modified by heat treatment in an atmosphere containing ammonia and hydrogen.
- the modified main surface 11c is provided.
- a microstep is formed on the substrate main surface 11c, and the microstep includes a plurality of terraces.
- a gallium nitride based semiconductor is deposited on the substrate 11 by metal organic vapor phase epitaxy using the growth furnace 10.
- the first conductivity type gallium nitride based semiconductor region 13 is grown on the main surface 11 c of the substrate 11 in the growth furnace 10.
- the gallium nitride based semiconductor region 13 can include, for example, an n-type AlGaN buffer layer 15 and an n-type GaN layer 17.
- the aluminum composition of AlGaN is, for example, 0.12.
- the n-type AlGaN buffer layer 15 is grown on the main surface 11 c of the substrate 11 at 1100 degrees Celsius by supplying an aluminum source, a gallium source, a nitrogen source and silane to the growth reactor 10.
- the n-type GaN layer 17 is grown on the n-type GaN buffer layer 15 at 1000 degrees Celsius by supplying the growth reactor 10 with a gallium raw material, a nitrogen raw material, and silane.
- step S ⁇ b> 104 an active layer is grown on the gallium nitride based semiconductor region 13 using the growth furnace 10.
- the main surface of the semiconductor region in which the active layer is grown shows semipolarity inclined with respect to the c-plane of the gallium nitride semiconductor.
- the formation of the active layer 25 will be described with reference to FIG.
- the growth of the underlying semiconductor region on which the active layer 25 is grown ends at time t0.
- the growth furnace 10 is at the first growth temperature T1 at time t0.
- the temperature of the growth furnace 10 is changed from the growth temperature T1 to the second growth temperature T2 of the barrier layer 21 (temperature TB in this embodiment) during the period from time t0 to time t1.
- a nitrogen material such as ammonia is supplied to the growth reactor 10.
- a barrier layer 21a is grown on the substrate 11 in step S105.
- the barrier layer 21a is formed at the growth temperature TB during the period from time t1 to time t2.
- the barrier layer 21a is made of a gallium nitride based semiconductor.
- This gallium nitride based semiconductor can be made of, for example, undoped GaN, undoped InGaN, undoped AlGaN, or the like.
- the barrier layer 21a is GaN
- the barrier layer 21a is grown at 760 degrees Celsius, for example, by supplying a gallium raw material and a nitrogen raw material to the growth reactor 10.
- the thickness of the barrier layer 21a can be, for example, not less than 10 nm and not more than 20 nm.
- the growth of the barrier layer 21a is completed.
- the well layer 23a is grown on the substrate 11 without interrupting the growth.
- the growth temperature TW is the same as the growth temperature TB, and can be in the range of 760 degrees Celsius or higher and 800 degrees Celsius or lower.
- the well layer 23a is made of an undoped InGaN semiconductor.
- the indium composition of the well layer 23a is 0.15 or more.
- the well layer 23a is InGaN
- the well layer 23a is grown at 760 degrees Celsius, for example, by supplying an indium raw material, a gallium raw material, and a nitrogen raw material to the growth reactor 10.
- the thickness of the well layer 23a can be, for example, not less than 2 nm and not more than 5 nm.
- the growth of the well layer 23a is completed.
- the barrier layer 21b is grown on the substrate 11 without interrupting the growth.
- the barrier layer 21b is formed at the growth temperature TB during the period from time t3 to t4.
- the growth temperature TB is the same as the growth temperature TW, and is in the range of 760 degrees Celsius or higher and 800 degrees Celsius or lower.
- the barrier layer 21b is made of an undoped GaN semiconductor.
- the barrier layer 21b is GaN
- the barrier layer 21b is grown at 760 degrees Celsius, for example, by supplying the gallium raw material and the nitrogen raw material to the growth reactor 10 as described above.
- the thickness of the barrier layer 21b can be, for example, not less than 10 nm and not more than 20 nm.
- step S108 the well layer and the barrier layer are repeatedly grown without interrupting the growth.
- the well layers 23b and 23c are grown in the same manner as the well layer 23a during the period of time t4 to t5 and t6 to t7.
- the barrier layers 21c and 21d are grown in the same manner as the barrier layer 21b.
- the barrier layers 21a to 21d and the well layers 23a to 23c are alternately and continuously grown.
- the barrier layers 21a to 21d are made of a gallium nitride based semiconductor different from the well layers 23a to 23c
- the growth temperature TW of the well layers 23a to 23c is the growth of the barrier layers 21a to 21d. Same as temperature TB. Therefore, deterioration of the crystal quality of the well layers 23a to 23c during the growth of the barrier layers 21a to 21d is suppressed.
- the main surface of the semiconductor region on which the barrier layer is grown exhibits semipolarity inclined with respect to the c-plane of the gallium nitride semiconductor.
- the main surface of the semiconductor region in which the well layer is grown exhibits semipolarity that is inclined with respect to the c-plane of the gallium nitride semiconductor.
- the growth of the active layer 25 is completed.
- the growth furnace 10 is at the temperature T2 at time t8.
- the temperature of the growth furnace 10 is changed from the temperature T2 to the growth temperature T3 of the p-type conductive gallium nitride based semiconductor region during the period from time t8 to time t9.
- the temperature change is completed, and the growth furnace 10 is set to the temperature T3.
- the p-type conductive gallium nitride semiconductor region 31 is grown on the active layer 25.
- the electron block layer 27 is grown on the active layer 25.
- the electron block layer 27 is made of, for example, AlGaN, and the growth of the p-type AlGaN layer is performed during a period from time t9 to t10.
- the AlGaN layer is grown on the substrate 11 at 1000 degrees Celsius by supplying an aluminum source, a gallium source, a nitrogen source and cyclopentadienyl magnesium (Cp 2 Mg) to the growth reactor 10.
- the aluminum composition of AlGaN is, for example, 0.18.
- the contact layer 29 is grown on the active layer 25.
- the growth of the contact layer 29 is performed during the period from time t10 to t11.
- the contact layer 29 is, for example, a p-type GaN layer, and the p-type GaN layer is grown on the electron block layer at 1000 degrees Celsius by supplying the growth reactor 10 with a gallium material, a nitrogen material, and Cp 2 Mg.
- the p-type GaN layer for the contact layer 29 is grown without changing the temperature of the growth reactor 10 and without interrupting the growth.
- an epitaxial wafer 33 is obtained as shown in FIG.
- step S110 electrodes are formed on the epitaxial wafer 33.
- An anode is formed on the p-type GaN layer 29 and a cathode is formed on the back surface of the substrate 11.
- the growth temperature T3 in the p-type gallium nitride based semiconductor layers 27 and 29 is higher than the growth temperature TW of the well layers 23a to 23c and the growth temperature TB of the barrier layers 21a to 21d
- the growth temperature T3 of the p-type gallium nitride based semiconductor layers 27 and 29 can be greater than 950 degrees Celsius and 1000 degrees Celsius or less. Since the growth temperature T3 of the p-type gallium nitride based semiconductor layers 27 and 29 is in the above temperature range, the crystal quality and electrical characteristics of the p-type gallium nitride based semiconductor layers 27 and 29 are both good. The quality of the active layer is also good.
- the p-type gallium nitride based semiconductor region 31 includes an AlGaN layer, and both the crystal quality and electrical characteristics of the AlGaN layer in the p-type gallium nitride based semiconductor region are good in the above temperature range.
- the thickness of the p-type gallium nitride based semiconductor region 31 can be 40 nm or more and 200 nm or less. Since the p-type gallium nitride based semiconductor region 31 is deposited at a high temperature greater than 950 degrees Celsius and 1000 degrees Celsius or less, generation of pits in the p-type gallium nitride based semiconductor region 31 can be suppressed. Since the growth surface of the p-type gallium nitride based semiconductor region 31 can be kept flat, the p-type contact layer can be grown thick in order to reduce the resistance of the p-type gallium nitride based semiconductor region 31. Such a thickness range is, for example, not less than 10 nm and not more than 100 nm.
- the temperature difference between the maximum value of the growth temperature of the p-type gallium nitride based semiconductor region 31 and the growth temperature of the well layers 23a to 23c can be 250 degrees or less. Thereby, deterioration of the crystal quality of the active layer during the growth of the p-type gallium nitride based semiconductor region 31 can be reduced.
- the temperature difference between the maximum growth temperature of the p-type gallium nitride based semiconductor region 31 and the growth temperature of the well layers 23a to 23c can be 140 degrees or more. A p-type gallium nitride semiconductor region 31 with good crystal quality can be obtained.
- the indium composition of the well layers 23a to 23c is 0.20 or more and 0.25 or less, and the peak wavelength of light emission from the active layer 25 is 500 nm or more.
- the light emission intensity from the active layer 25 can show the maximum value at the peak wavelength.
- the growth temperature TW of the well layers 23a to 23c is the same as the growth temperature TB of the barrier layers 21a to 21d. It can be suppressed that the crystal quality of the well layers 23a to 23c is deteriorated during the growth of the gallium nitride based semiconductor layers 27 and 29 and the barrier layers 21a to 21d.
- FIG. 6 is a view showing a light emitting diode structure LED manufactured in this example.
- Several GaN wafers 41 having a main surface made of a gallium nitride based semiconductor were prepared. The off-angles on the main surface of these GaN wafers 41 were 5 to 10 degrees with respect to the c-plane of GaN.
- the GaN wafer 41 exhibits n conductivity, and its main surface has semipolarity.
- a plurality of gallium nitride based semiconductor films were grown on these GaN wafers 41 by metal organic vapor phase epitaxy.
- Trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMI), and ammonia (MH 3 ) were used as raw materials for the metal organic chemical vapor deposition method. Further, silane (SiH 4 ) and bisque pentadienyl magnesium (Cp 2 Mg) were used as dopants. After the GaN wafer was placed in the growth furnace, the GaN wafer 41 was thermally cleaned. Hydrogen and ammonia were supplied to the growth furnace for this heat treatment. The temperature of the heat treatment was, for example, 1050 degrees Celsius. As the heat treatment temperature, a temperature in the range of 1000 degrees Celsius or higher and 1100 degrees Celsius or lower can be used.
- an n-type AlGaN buffer layer 43 was grown.
- the growth temperature was, for example, 1100 degrees Celsius.
- the Al composition was 0.12.
- the dopant concentration of the n-type AlGaN layer 43 is, for example, 1 ⁇ 10 18 cm ⁇ 3 and the film thickness is, for example, 50 nm.
- n-type GaN semiconductor layer 45 was grown on the buffer layer 43.
- the growth temperature was, for example, 1000 degrees Celsius.
- the dopant concentration of the n-type GaN layer 45 is 2 ⁇ 10 18 cm ⁇ 3 , for example, and the film thickness is 2000 nm, for example.
- the active layer 47 was grown on the n-type gallium nitride semiconductor region 49.
- the growth temperature of the active layer 47 was, for example, 760 degrees Celsius.
- a barrier layer 47a made of GaN was grown.
- the thickness of the barrier layer 47a was 15 nm.
- a well layer 47b made of InGaN was continuously grown without interrupting growth.
- the thickness of the well layer 47b was 5 nm.
- the indium composition of the well layer 47b was 20%.
- a barrier layer 47c made of GaN was continuously grown on the well layer 47b without interrupting the growth.
- the growth of the well layers 47d and 47f and the barrier layers 47e and 47g was repeated to form the active layer 47 including the three well layers 47b, 47d and 47f.
- the growth furnace temperature was changed to the growth temperature of the p-type gallium nitride based semiconductor region 51. This temperature was, for example, 1000 degrees Celsius.
- a p-type AlGaN layer 53 was grown on the active layer 47.
- the Al composition was 0.18.
- the dopant concentration of the p-type AlGaN layer 53 is, for example, 5 ⁇ 10 17 cm ⁇ 3 and the film thickness is, for example, 20 nm.
- a p-type GaN layer 55 was grown on the p-type AlGaN layer 53.
- the dopant concentration of the p-type GaN layer 55 is, for example, 1 ⁇ 10 18 cm ⁇ 3 and the film thickness is, for example, 50 nm.
- the epitaxial wafer E was completed by these epitaxial growth processes.
- An anode electrode 59 a was formed on the contact layer of the p-type GaN layer 57.
- Ni / Au is used for the anode electrode 59a.
- the back surface of the GaN wafer of this substrate product was ground to produce a substrate product having a thickness of 100 micrometers.
- a cathode electrode 59b was formed on the ground back surface.
- Al is used for the cathode electrode 59b.
- an epitaxial wafer C was fabricated using a well layer growth temperature of 760 degrees Celsius and a barrier layer growth temperature of 940 degrees Celsius.
- the primary satellite peak intensity (arbitrary unit) was as follows. Epitaxial wafer E: 28-32 Epitaxial wafer C: 5-15. Thus, the primary satellite peak intensity of the epitaxial wafer E was excellent, and it was shown that the interface between the well layer and the barrier layer of the epitaxial wafer E was steep.
- the inventor has grown at various temperatures with the same temperature of the well layer and the barrier layer of the active layer. This temperature ranges from 760 degrees Celsius to 800 degrees Celsius,
- the well layer was grown at an indium raw material flow rate suitable for the intended emission wavelength (for example, emission wavelength of 500 nm or more).
- the barrier layer was grown at the same temperature as this growth temperature.
- the growth temperature of an InGaN well layer having an In composition for obtaining an emission wavelength of 500 m or more must be a low temperature of 800 degrees Celsius or less. For this reason, the temperature difference between the well layer and the barrier layer becomes about 100 degrees, and the well layer is deteriorated due to etching of the well layer in the temperature raising process for realizing the temperature difference. As a result, the photoluminescence spectrum intensity decreased.
- the temperature difference between the well layer and the barrier layer is small compared to the above value, the temperature rise time is small, and the indium composition of the well layer is also low, resulting in growth with a temperature difference. As a result, the deterioration of the well layer is small. Also, by raising the temperature of the barrier layer above the growth temperature of the well layer, the crystal quality of the barrier layer is improved, resulting in an increase in emission intensity.
- the indium composition of the well layer becomes large, and it is necessary to increase the temperature difference between the well layer and the barrier layer. As a result, the deterioration of the well layer due to the phenomenon increases. For this reason, the emission intensity is weakened.
- the well layer and the barrier layer are preferably grown at the same growth temperature.
- the number of well layers in the active layer can be 2-5.
- FIG. 7 is a drawing showing the full width at half maximum of the PL intensity in an LED structure manufactured using various growth conditions. Referring to FIG. 7, there are shown plots P1 to P11 of the LED structure in which the well layer and the barrier layer are grown at the same temperature, and plots C1 to C10 of the LED structure in which the well layer and the barrier layer are grown at different temperatures. .
- P1 P1 770 degrees Celsius, 3 nm / 15 nm, 27 nm
- Plot P2 760 degrees Celsius, 2.7 nm / 15 nm, 29 nm
- Plot P3 760 degrees Celsius, 3 nm / 15 nm, 30 nm
- Plot P4 760 degrees Celsius, 3 nm / 15 nm, 31 nm
- Plot P5 760 degrees Celsius, 3 nm / 15 nm, 29 nm
- Plot P6 760 degrees Celsius, 3 nm / 15 nm, 29 nm
- Plot P7 760 degrees Celsius, 3 nm / 15 nm, 29 nm
- Plot P8 760 degrees Celsius, 3 nm / 15 nm, 33 nm
- Plot P9 760 degrees Celsius, 3 nm / 15 nm, 34 nm
- Plot P9 760 degrees Celsius, 3 nm / 15 nm
- the full width at half maximum is improved in the wavelength region of the emission wavelength of 500 nm or more.
- InGaN having a large indium composition for example, 0.2 or more
- the fluctuation of the indium composition is improved. Arise. Due to this fluctuation, the etching amount on the surface of the well layer varies when the temperature of the barrier layer is increased to the growth temperature after the well layer is grown.
- the distribution of the full width at half maximum increases as shown by the plot “ ⁇ ” in FIG. Due to the above-mentioned variation, it is considered that the in-plane distribution is increased at the full width at half maximum and the peak wavelength.
- the plot “ ⁇ ” when the barrier layer and the well layer are grown at the same growth temperature, the distribution of the full width at half maximum increases.
- FIG. 8A is a cathode luminescence image in an LED structure in which a well layer and a barrier layer are grown at the same temperature
- FIG. 8B is a cathode in an LED structure in which the well layer and the barrier layer are grown at different temperatures. It is a luminescence image. Referring to FIG. 8A, the light emission image is uniform and the light emission is uniform. However, referring to FIG. 8B, a black portion is observed. This is a non-light emitting area, and the light emission image is uneven.
- FIG. 11 is a timing chart showing a change in substrate temperature and a change in raw material gas flow in the steps after the formation of the light emitting layer.
- step S201 several GaN wafers 61 having a main surface made of a gallium nitride based semiconductor were prepared.
- the main surfaces of these GaN wafers 61 have (20-21) planes inclined at an angle of 75 degrees in the m-axis direction from the c-axis as constituent surfaces.
- the GaN wafer 61 exhibits n conductivity, and its main surface has semipolarity.
- a plurality of gallium nitride based semiconductor films were grown on these GaN wafers 61 by metal organic vapor phase epitaxy.
- Trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMI), and ammonia (MH 3 ) were used as raw materials for the metal organic chemical vapor deposition method. Further, silane (SiH 4 ) and bisque pentadienyl magnesium (Cp 2 Mg) were used as dopants.
- thermal cleaning of the GaN wafer 61 is performed in step S202. Hydrogen and ammonia were supplied to the growth furnace for this heat treatment.
- the temperature of the heat treatment was, for example, 1050 degrees Celsius. As the heat treatment temperature, a temperature in the range of 1000 degrees Celsius or higher and 1100 degrees Celsius or lower can be used.
- the gallium nitride based semiconductor layer 63 was grown at the substrate temperature T4.
- the gallium nitride based semiconductor layer 63 InAlGaN, AlGaN, GaN or the like can be grown.
- an n-type InAlGaN layer for example, containing at least gallium, indium, and aluminum as a group III and nitrogen as a group V was grown.
- the growth temperature was, for example, 1100 degrees Celsius.
- the Al composition was 0.14, for example, and the indium composition was 0.03, for example.
- the dopant concentration (for example, silicon) of the n-type InAlGaN layer is, for example, 1 ⁇ 10 18 cm ⁇ 3 and the film thickness is, for example, 2300 nm.
- the n-type InAlGaN layer 63 functions as an n-type cladding layer, for example.
- a light emitting layer was formed on the clad layer 63 in step S204.
- the light guide layer 65 was grown in step S205. The process from the growth of the n-side light guide layer to the growth of the p-side light guide layer will be described with reference to FIG.
- the optical guide layer 65 includes a gallium nitride based semiconductor having a band gap smaller than that of the cladding layer 63.
- the GaN semiconductor layer 65a was grown on the cladding layer 63 at the growth temperature T4 during the period of time S0 to S1.
- the growth temperature T4 was, for example, 1100 degrees Celsius.
- an n-type dopant is added to the GaN layer 65, and the dopant concentration (for example, silicon) is, for example, 1.0 ⁇ 10 18 cm ⁇ 3 .
- the film thickness was 250 nm, for example.
- the substrate temperature was changed from the growth temperature T4 for the GaN semiconductor layer 65a to the growth temperature T5 for the InGaN semiconductor layer 65b during the period of time S1 to S2.
- the InGaN semiconductor layer 65b was grown on the GaN semiconductor layer 65a during the period of time S2 to S3.
- the growth temperature T5 was, for example, 890 degrees Celsius.
- the InGaN layer 65b was undoped, for example.
- the film thickness was, for example, 100 nm, and the indium composition was, for example, 0.03.
- step S209 the active layer 67 was grown.
- step S209-1 the substrate temperature was changed from the growth temperature for the InGaN semiconductor layer 65b to the growth temperature for the active layer 67 during the period of time S3 to S4. After this temperature change, an active layer 67 was grown on the n-type gallium nitride based semiconductor region 63 and the InGaN semiconductor layer 65b.
- the growth temperature of the active layer 67 was, for example, 720 degrees Celsius.
- step S209-2 TMG and ammonia were supplied to the growth reactor during the period of time S4 to S5 to grow the barrier layer 67a made of GaN.
- the thickness of the barrier layer 67a was 15 nm.
- step S209-3 TMG, TMI, and ammonia were supplied to the growth reactor during the period of time S5 to S6 to grow the well layer 67b made of InGaN.
- the thickness of the well layer 67b was 3 nm.
- the indium composition of the well layer 67b was 0.30.
- Step S209-4 a barrier layer 67c made of GaN was continuously grown on the well layer 67b during the period of time S6 to S7 without interruption of growth.
- the well layers 67d and 67f and the process S209-4 in step S209-3 were formed by repeating the growth of the barrier layers 67e and 67g.
- the substrate temperature was changed from the growth temperature T5 for the active layer 67 to the growth temperature T6 for the InGaN semiconductor layer 71b in the period of time S11 to S12.
- the well layer is undoped.
- the barrier layer can be undoped, for example.
- step S210 the light guide layer 71 was grown.
- This light guide layer 71 was grown prior to the growth of the p-type gallium nitride semiconductor region 73.
- the light guide layer 71 includes a gallium nitride semiconductor having a band gap smaller than that of the p-type gallium nitride semiconductor region 73.
- the InGaN semiconductor layer 71b was grown on the active layer 67 during the period of time S12 to S13.
- the growth temperature was, for example, 890 degrees Celsius.
- the InGaN layer 71b was undoped.
- the film thickness was 100 nm, for example, and the indium composition was 0.03.
- step S212 the GaN semiconductor layer 71a was grown on the InGaN semiconductor layer 71b during the period of time S13 to S14.
- the growth temperature was, for example, 890 degrees Celsius.
- p dopant is added to the GaN layer 65, the dopant concentration (eg, magnesium) is, for example, 3 ⁇ 10 18 cm ⁇ 3 , and the film thickness is, for example, 250 nm.
- the p-type gallium nitride based semiconductor region 73 is grown.
- the growth temperature for the p-type gallium nitride based semiconductor region 73 was the same as the growth temperature for the light guide layer.
- the substrate temperature can be changed from the growth temperature for the light guide layer to the growth temperature for the p-type gallium nitride based semiconductor region 73 (for example, the electron block layer, the cladding layer, and the contact layer). In this case, the substrate temperature is changed to the growth temperature of the p-type gallium nitride semiconductor region 73 by adjusting the temperature of the growth furnace.
- the temperature for the p-type gallium nitride based semiconductor region 73 is, for example, 890 degrees Celsius.
- a p-type gallium nitride based semiconductor layer 75 was grown on the active layer 67 and the light guide layer 71 in step S214.
- As the p-type gallium nitride based semiconductor layer 75 for example, an AlGaN layer is grown. This AlGaN layer serves as an electron block layer, for example.
- the Al composition is, for example, 0.11
- the dopant concentration is, for example, 3 ⁇ 10 18 cm ⁇ 3
- the film thickness is, for example, 10 nm.
- the position of the electron blocking layer can be provided, for example, between the active layer and the light guide layer, or can be provided between the inner light guide layer and the outer light guide layer.
- a gallium nitride based semiconductor layer 77 was grown.
- the gallium nitride based semiconductor layer 77 can be made of, for example, p-type InAlGaN, p-type AlGaN semiconductor, or the like.
- a gallium nitride based semiconductor layer containing at least gallium, indium and aluminum as a group III and nitrogen as a group V was grown.
- the growth temperature was, for example, 890 degrees Celsius.
- the Al composition was 0.14 and the indium composition was 0.03.
- the dopant concentration (for example, magnesium) of the gallium nitride based semiconductor layer 77 is, for example, 1 ⁇ 10 18 cm ⁇ 3 and the film thickness is, for example, 400 nm.
- This InAlGaN layer serves as a cladding layer, for example.
- a p-type gallium nitride based semiconductor layer 79 was grown in step S216.
- the p-type gallium nitride based semiconductor layer 79 includes a gallium nitride based semiconductor such as GaN, AlGaN, or InAlGaN having a band gap smaller than that of the gallium nitride based semiconductor layer 77.
- a p-type GaN layer was grown as the p-type gallium nitride based semiconductor region 79.
- the dopant concentration of the p-type GaN layer is, for example, 1 ⁇ 10 18 cm ⁇ 3 and the film thickness is, for example, 50 nm.
- the p-type GaN layer serves as a contact layer, for example.
- the epitaxial wafer ELD shown in FIG. 12 was completed by these epitaxial growth processes.
- the epitaxial wafer ELD includes a laser diode structure formed on a semipolar substrate having a main surface inclined by 75 degrees.
- the photoluminescence (PL) spectrum of the epitaxial wafer ELD was measured.
- the full width at half maximum of the PL spectrum was 30 nm. This full width at half maximum showed a better spectrum than other growth flows. Since the active layer was formed at a single temperature, a light emitting layer without quality deterioration could be grown.
- step S217 electrodes were formed on the epitaxial wafer ELD.
- the anode electrode 59 a is formed on the contact layer of the p-type GaN layer 79.
- Ni / Au is used for the anode electrode 81a.
- the back surface of the GaN wafer of this substrate product was ground to produce a substrate product having a thickness of 100 micrometers.
- a cathode electrode 81b was formed on the ground back surface.
- Al is used for the cathode electrode 81b.
- FIG. 13 is a drawing showing a laser diode structure LD fabricated in this example.
- the laser diode structure LD shown in FIG. 13 includes a pair of cross sections CV1, CV2 for the resonator.
- the threshold current density was 4 kA / cm 2 or less.
- the growth temperature of the InGaN well layer and the barrier layer is preferably 700 degrees Celsius or higher.
- the growth temperature of the InGaN well layer and the barrier layer is preferably 760 degrees centigrade or less. This range is applicable to the formation of an active layer that generates light having a peak wavelength of 400 nm or more and 540 nm or less. By this temperature range, it is possible to avoid a decrease in light emission characteristics due to the crystal quality of the InGaN layer.
- the growth temperature of the p-type gallium nitride semiconductor region is preferably higher than 850 degrees Celsius.
- a growth temperature higher than 850 degrees Celsius can suppress a decrease in device characteristics due to an increase in resistance in the p-type gallium nitride based semiconductor region.
- the growth temperature of the p-type gallium nitride based semiconductor region is preferably 950 degrees Celsius or less.
- a growth temperature of 950 degrees Celsius or less can reduce thermal degradation of InGaN during the growth of the p-type gallium nitride based semiconductor region.
- the temperature difference between the maximum growth temperature of the p-type gallium nitride based semiconductor region and the growth temperature of the well layer is preferably 200 degrees or less.
- the growth temperature of the InGaN well layer is made relatively low, and the In composition of the InGaN well layer is made relatively high. At these times, the quality of the InGaN becomes sensitive to thermal stress after film formation. In order to avoid this thermal degradation of InGaN, it is preferable not to use a high growth temperature for the growth of the p-type gallium nitride based semiconductor region.
- the indium composition of the well layer is preferably 0.25 or more and 0.35 or less, and the oscillation wavelength of light emitted from the active layer can be 500 nm or more.
- the active layer can generate green light or light having a longer wavelength than green light emission.
- the thickness of the p-type gallium nitride based semiconductor region is preferably 50 nm or more and 700 nm or less. According to this method, good optical confinement can be provided for the entire p-type gallium nitride based semiconductor region.
- the thickness of the cladding layer can be 50 nm or more and 700 nm or less.
- the inclination angle of the main surface of the GaN substrate for the nitride-based semiconductor light-emitting device is in the range of not less than 63 degrees and not more than 83 degrees, good In uptake can be obtained in the growth of InGaN. Therefore, the change range of the In composition of the well layer can be expanded, and it is good for the production of an active layer that generates light having a wavelength of 500 nm or more.
- epitaxial wafer 41 ... GaN wafer, 43 ... n-type AlGaN layer, 45 ... n-type GaN semiconductor layer, 47 ... active layer 47a, 47c, 47e, 47g ... barrier layers, 47b, 47d, 47f ... well layers, 49 ... n-type gallium nitride semiconductor regions, 51 ... p-type gallium nitride semiconductor regions, 53 ... p AlGaN layer, 55 ... p-type GaN layer, 59a ... anode electrode, 59b ... cathode electrode, C ... epitaxial wafer, E ... epitaxial wafer, 61 ... GaN wafer, 63 ...
- gallium nitride based semiconductor layer 65 ... light guide layer, 65a ... GaN semiconductor layer, 65b ... InGaN semiconductor layer, 67 ... active layer, 67a, 67c, 67e, 67g ... barrier layer, 67b, 67d, 67f ... well layer, 71 ... light guide layer, 71b ... InGaN semiconductor layer, 71a ... GaN semiconductor layer, 73 ... p-type gallium nitride semiconductor region, 75 ... p-type gallium nitride semiconductor layer, 77 ... gallium nitride semiconductor layer, 79 ... p-type gallium nitride semiconductor layer, ELD ... epitaxial wafer
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Abstract
Description
この方法によれば、上記の基板は窒化ガリウム系半導体からなる主面を有する。この基板を用いることによって、(000-1)面に対して傾斜した半極性面の半導体領域を得ることができる。
図6は、本実施例で作製された発光ダイオード構造LEDを示す図面である。窒化ガリウム系半導体からなる主面を有する数枚のGaNウエハ41を準備した。これらのGaNウエハ41の主面におけるオフ角は、GaNのc面に対して5度から10度の角度であった。GaNウエハ41はn導電性を示し、その主面は半極性を有する。これらのGaNウエハ41上に、有機金属気相成長法によって複数の窒化ガリウム系半導体膜を成長した。有機金属気相成長法の原料は、トリメチルガリウム(TMG)、トリメチルアルミニウム(TMA)、トリメチルインジウム(TMI)、アンモニア(MH3)を用いた。また、ドーパントとしてシラン(SiH4)、ビスシク・ペンタジエニルマグネシウム(Cp2Mg)を用いた。GaNウエハを成長炉に配置した後に、GaNウエハ41のサーマルクリーニングを行った。この熱処理のために、成長炉に水素及びアンモニアを供給した。熱処理の温度は、例えば摂氏1050度であった。熱処理温度として、摂氏1000度以上摂氏1100度以下の範囲の温度を使用できる。熱処理の後に、n型AlGaNバッファ層43を成長した。その成長温度は、例えば摂氏1100度であった。そのAl組成は、0.12であった。n型AlGaN層43のドーパント濃度は、例えば1×1018cm-3であり、その膜厚は例えば50nmであった。
エピタキシャルウエハE:28-32
エピタキシャルウエハC:5-15。
このように、エピタキシャルウエハEの一次サテライトピーク強度は優れたものとなり、エピタキシャルウエハEの井戸層と障壁層との界面は急峻なものであることが示された。
試料名、 成長温度 、井戸層厚/障壁層厚、半値全幅
プロットP1:摂氏770度、3nm/15nm、27nm;
プロットP2:摂氏760度、2.7nm/15nm、29nm;
プロットP3:摂氏760度、3nm/15nm、30nm;
プロットP4:摂氏760度、3nm/15nm、31nm;
プロットP5:摂氏760度、3nm/15nm、29nm;
プロットP6:摂氏760度、3nm/15nm、29nm;
プロットP7:摂氏760度、3nm/15nm、29nm;
プロットP8:摂氏760度、3nm/15nm、33nm;
プロットP9:摂氏760度、3nm/15nm、34nm;
プロットP10:摂氏760度、3nm/15nm、33nm;
プロットP11:摂氏760度、3nm/15nm、36nm;
であった。
試料名、 成長温度(井戸/障壁)、井戸層厚/障壁層厚、半値全幅
プロットC1:摂氏750度/摂氏840度、3nm/15nm、61nm;
プロットC2:摂氏750度/摂氏840度、3nm/15nm、72nm;
プロットC3:摂氏760度/摂氏840度、3nm/15nm、50nm;
プロットC4:摂氏750度/摂氏840度、3nm/15nm、55nm;
プロットC5:摂氏760度/摂氏840度、3nm/15nm、70nm;
プロットC6:摂氏760度/摂氏840度、3nm/15nm、59nm;
プロットC7:摂氏760度/摂氏820度、3nm/15nm、56nm;
プロットC8:摂氏760度/摂氏840度、3nm/15nm、49nm;
プロットC9:摂氏760度/摂氏840度、3nm/15nm、62nm;
プロットC10:摂氏760度/摂氏840度、3nm/15nm、64nm;
であった。
工程S201において、窒化ガリウム系半導体からなる主面を有する数枚のGaNウエハ61を準備した。これらのGaNウエハ61の主面は、c軸からm軸方向に75度の角度で傾斜した(20-21)面を構成面として有する。GaNウエハ61はn導電性を示し、その主面は半極性を有する。これらのGaNウエハ61上に、有機金属気相成長法によって複数の窒化ガリウム系半導体膜を成長した。有機金属気相成長法の原料は、トリメチルガリウム(TMG)、トリメチルアルミニウム(TMA)、トリメチルインジウム(TMI)、アンモニア(MH3)を用いた。また、ドーパントとしてシラン(SiH4)、ビスシク・ペンタジエニルマグネシウム(Cp2Mg)を用いた。GaNウエハ61を成長炉に配置した後に、工程S202では、GaNウエハ61のサーマルクリーニングを行った。この熱処理のために、成長炉に水素及びアンモニアを供給した。熱処理の温度は、例えば摂氏1050度であった。熱処理温度として、摂氏1000度以上摂氏1100度以下の範囲の温度を使用できる。
Claims (21)
- 窒化物系半導体発光素子を作製する方法であって、
窒化ガリウム系半導体からなる半導体領域の主面上に、活性層のための障壁層を成長する工程と、
前記活性層のための井戸層を前記障壁層上に成長する工程と、
前記活性層上に、p型窒化ガリウム系半導体領域を成長する工程と
を備え、
前記半導体領域の前記主面は、前記窒化ガリウム系半導体のc面に対して傾斜した半極性を示しており、
前記井戸層はInGaNからなり、
前記井戸層のインジウム組成は0.15以上であり、
前記障壁層は、前記井戸層と異なる窒化ガリウム系半導体からなり、
前記井戸層の成長温度は前記障壁層の成長温度と同じであり、
前記p型窒化ガリウム系半導体領域は一又は複数のp型窒化ガリウム系半導体層を含み、
前記p型窒化ガリウム系半導体層の各々における成長温度は前記井戸層の成長温度及び前記障壁層の成長温度よりも大きい、ことを特徴とする方法。 - 前記半導体領域の前記主面の法線ベクトルが、c面((0001)面)又は該c面の裏面である(000-1)面のいずれかの面の法線ベクトルに対して60度以上90度以下の範囲の角度で傾斜している、ことを特徴とする請求項1に記載された方法。
- 前記井戸層のインジウム組成は0.20以上であり、
前記活性層は、500nm以上の波長領域にピーク波長を有する発光を生成するように設けられている、ことを特徴とする請求項1又は請求項2に記載された方法。 - 前記井戸層の前記成長温度及び前記障壁層の前記成長温度は摂氏800度以下であり、
前記p型窒化ガリウム系半導体領域の前記成長温度は摂氏1000度以下である、ことを特徴とする請求項1~請求項3のいずれか一項に記載された方法。 - 前記井戸層の前記成長温度及び前記障壁層の前記成長温度は摂氏700度以上摂氏760度以下である、ことを特徴とする請求項1~請求項4のいずれか一項に記載された方法。
- 前記p型窒化ガリウム系半導体領域の前記成長温度は摂氏850度より大きく摂氏950度以下である、ことを特徴とする請求項1~請求項5のいずれか一項に記載された方法。
- 前記p型窒化ガリウム系半導体領域の成長温度の最大値と前記井戸層の成長温度との温度差は200度以下である、ことを特徴とする請求項1~請求項6のいずれか一項に記載された方法。
- 前記井戸層のインジウム組成は0.25以上0.35以下であり、
前記活性層からの発光の発振波長は500nm以上である、ことを特徴とする請求項1~請求項7のいずれか一項に記載された方法。 - 前記p型窒化ガリウム系半導体領域の厚さは50nm以上700nm以下である、ことを特徴とする請求項1~請求項8のいずれか一項に記載された方法。
- 前記井戸層の前記成長温度及び前記障壁層の前記成長温度は摂氏760度以上摂氏800度以下である、ことを特徴とする請求項1~請求項4のいずれか一項に記載された方法。
- 前記p型窒化ガリウム系半導体領域の前記成長温度は摂氏950度より大きく摂氏1000度以下である、ことを特徴とする請求項1~請求項4、及び請求項10のいずれか一項に記載された方法。
- 前記井戸層のインジウム組成は0.20以上0.25以下であり、
前記活性層からの発光のピーク波長は500nm以上であり、
前記ピーク波長で前記活性層からの発光強度は最大値を示す、ことを特徴とする請求項1~請求項4、及び請求項10~請求項11のいずれか一項に記載された方法。 - 前記p型窒化ガリウム系半導体領域の厚さは40nm以上200nm以下である、ことを特徴とする請求項1~請求項4、及び請求項10~請求項12のいずれか一項に記載された方法。
- 前記p型窒化ガリウム系半導体領域の成長温度の最大値と前記井戸層の成長温度との温度差は250度以下である、ことを特徴とする請求項1~請求項4、及び請求項10~請求項13のいずれか一項に記載された方法。
- 前記p型窒化ガリウム系半導体領域はAlGaN層を含む、ことを特徴とする請求項1~請求項14のいずれか一項に記載された方法。
- 窒化ガリウム系半導体からなる基板を準備する工程を更に備え、
前記基板の主面は、前記窒化ガリウム系半導体のc面に対して傾斜している、ことを特徴とする請求項1~請求項15のいずれか一項に記載された方法。 - 窒化ガリウム系半導体からなる基板を準備する工程を更に備え、
前記基板の前記主面が、c面((0001)面)の裏面である(000-1)面に対して傾斜している、ことを特徴とする請求項1~請求項15のいずれか一項に記載された方法。 - 前記基板の前記主面の傾斜角は60度以上90度以下である、ことを特徴とする請求項16または請求項17に記載された方法。
- 前記窒化物系半導体発光素子の光共振器のための端面を更に備え、
前記基板の前記主面の傾斜角は63度以上83度以下である、ことを特徴とする請求項14~請求項18のいずれか一項に記載された方法。 - 窒化ガリウム系半導体の成長に先立って、前記基板の熱処理を行う工程を更に備え、
前記熱処理の雰囲気は少なくともアンモニア及び水素を含む、ことを特徴とする請求項1~請求項19のいずれか一項に記載された方法。 - 窒化物系半導体発光素子のためのエピタキシャルウエハを作製する方法であって、
窒化ガリウム系半導体からなる半導体領域の主面上に、活性層のための障壁層を成長する工程と、
前記活性層のための井戸層を前記障壁層上に成長する工程と、
前記活性層上に、p型窒化ガリウム系半導体層を成長する工程と
を備え、
前記半導体領域の前記主面は、前記窒化ガリウム系半導体のc面に対して傾斜した半極性を示しており、
前記障壁層は、前記井戸層と異なる窒化ガリウム系半導体からなり、
前記井戸層はInGaNからなり、
前記井戸層のインジウム組成は0.15以上であり、
前記井戸層の成長温度は前記障壁層の成長温度と同じであり、
前記p型窒化ガリウム系半導体領域は一又は複数のp型窒化ガリウム系半導体層を含み、
前記p型窒化ガリウム系半導体層の各々における成長温度は前記井戸層の成長温度及び前記障壁層の成長温度よりも大きい、ことを特徴とする方法。
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- 2009-10-19 CN CN2009801413901A patent/CN102187482B/zh not_active Expired - Fee Related
- 2009-10-19 WO PCT/JP2009/067988 patent/WO2010047297A1/ja active Application Filing
- 2009-10-19 KR KR1020117010469A patent/KR20110069147A/ko not_active Application Discontinuation
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Also Published As
Publication number | Publication date |
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EP2352182A1 (en) | 2011-08-03 |
CN102187482A (zh) | 2011-09-14 |
JP2010123920A (ja) | 2010-06-03 |
CN102187482B (zh) | 2013-11-06 |
US20110212560A1 (en) | 2011-09-01 |
EP2352182A4 (en) | 2015-02-11 |
KR20110069147A (ko) | 2011-06-22 |
TW201027803A (en) | 2010-07-16 |
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