WO2009128417A1 - 受信装置および通信システム - Google Patents
受信装置および通信システム Download PDFInfo
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- WO2009128417A1 WO2009128417A1 PCT/JP2009/057432 JP2009057432W WO2009128417A1 WO 2009128417 A1 WO2009128417 A1 WO 2009128417A1 JP 2009057432 W JP2009057432 W JP 2009057432W WO 2009128417 A1 WO2009128417 A1 WO 2009128417A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
- H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
- H04B7/0842—Weighted combining
- H04B7/0845—Weighted combining per branch equalization, e.g. by an FIR-filter or RAKE receiver per antenna branch
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
Definitions
- the present invention relates to a receiving apparatus and a communication system that receive a radio signal using a plurality of antennas.
- FIG. 13 is a diagram illustrating a schematic configuration of a transmitter and a receiver described in Patent Document 1.
- transmitter 1300 the information sequence is encoded by encoder 1301, and the encoded output is interleaved (reordered) by interleaver 1302. Thereafter, the carrier signal is modulated by the modulator 1303 and the modulated output is transmitted.
- This transmission signal is received by the receiver 1310 through a transmission path (multipath channels).
- delay waves are equalized by a soft input / soft output equalizer 1311.
- the input of the equalizer 1311 is generally obtained by converting a received signal into a baseband, and the received signal in the baseband is sampled at a frequency of 1 or more times the frequency of a symbol signal of an information sequence of a transmission signal to form a digital signal.
- the signal is converted and input to the equalizer 1311 as a digital signal.
- the equalizer 1311 is a linear equalizer, and as its equalization output, the log likelihood ratio ⁇ 1 (LLR: Log) of the probability that each coded bit ⁇ b (i) ⁇ is +1 and the probability that it is ⁇ 1. -Likelihood Ratio) is derived.
- ⁇ 1 [b (k)] is external information sent to the subsequent channel decoder 1314
- ⁇ 2 [b (k)] is a priori information given to the equalizer 1311.
- the prior information ⁇ 2 [b (k)] is subtracted from the LLR by the subtractor 1312 and further supplied to the channel decoder 1314 via the deinterleaver 1313.
- This channel decoder 1314 calculates a log likelihood ratio ⁇ 2 .
- ⁇ 2 [b (i)] is external information given as ⁇ 2 [b (k)] to the equalizer 1311 when iterating, and ⁇ 1 [b (k)] is sent to the channel decoder 1314. It is given as prior information ⁇ 1 [b (i)].
- ⁇ 2 [b (i)] is subtracted by ⁇ 1 [b (i)] by a subtractor 1315 and supplied to an equalizer 1311 and a subtractor 1312 via an interleaver 1316. In this way, iterative equalization and decoding are performed to improve the error rate.
- FIG. 14 is a diagram illustrating a schematic configuration of a receiver described in Patent Document 2.
- this receiver In the case of performing single carrier transmission, this receiver is configured to obtain a reception antenna diversity effect by combining diversity and adaptive equalization, and combining the filter outputs at each reception antenna.
- this receiver includes correlators 1401 and 1402 for estimating an impulse response by a correlation operation between a received signal and a reference signal, and matched filtering based on a complex conjugate time reversal weighting factor of the impulse response.
- adaptive filters 1403 and 1404 are provided.
- a synthesis circuit 1405 that synthesizes the filter output, a delay judgment feedback type sequence estimator 1406 that outputs tentative judgment data based on the output of the synthesis circuit 1405, and a replica that generates a received signal replica based on the tentative judgment data
- a generator 1407, a preamble generation circuit 1408 that generates a known signal, and switches 1409 and 1410 that supply the received signal replica or the known signal to the correlators 1404 and 1402 as reference signals are provided.
- this receiver includes receivers 1411 and 1412 having antennas and delay circuits 1413 and 1412.
- the present invention has been made in view of such circumstances, and a receiving apparatus and communication capable of improving the receiving antenna diversity effect by equalizing while exchanging likelihoods between a plurality of equalizers.
- the purpose is to provide a system.
- the receiving apparatus of the present invention is a receiving apparatus that receives a radio signal using a plurality of antennas, and is based on the pilot separation unit that separates a pilot signal and a received data signal from the radio signal, and the pilot signal.
- a channel estimation unit that calculates a channel estimation value corresponding to each antenna, and a signal detection of the reception data signal corresponding to each antenna, and the likelihood based on the reception data signal and the channel estimation value
- a reception processing unit having a plurality of equalization units for generating information, and any one equalization unit generates likelihood information using the likelihood information generated by the other equalization units, and The generated likelihood information is output to another equalization unit.
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization unit, and outputs the generated likelihood information to the other equalization unit. Therefore, it is possible to improve the reception diversity effect as compared with antenna processing of linear processing.
- the reception processing unit subtracts the likelihood information generated by another equalization unit from the likelihood information output from any one of the equalization units. 1 subtracting section is provided.
- the reception processing unit performs decoding using the likelihood information output from any of the equalization units, and outputs the decoded likelihood information.
- a decoding unit is provided.
- the decoding process is performed using the likelihood information output from any of the equalization units and the decoded likelihood information is output, it is possible to improve the reception diversity effect.
- each equalization unit performs interference using the received data signal corresponding to each antenna, the propagation path estimation value, and likelihood information generated by another equalization unit.
- An interference replica generation unit that generates a replica
- an interference removal unit that subtracts the interference replica from a reception data signal corresponding to each antenna.
- the interference replica is generated and the interference replica is subtracted from the received data signal corresponding to each antenna, it is possible to minimize the influence of the interference.
- any one of the equalization units generates likelihood information using the likelihood information generated by another equalization unit, and the generated likelihood information is The process of outputting to other equalization units is performed at least once.
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization unit, and outputs the generated likelihood information to the other equalization unit. Since it is performed at least once, likelihood information can be exchanged among a plurality of equalization units, and the reception antenna diversity effect can be improved.
- any one said equalization part produces
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization unit, and the generated likelihood information is transferred to the other equalization unit. Since the number of times of performing the process to be output is determined, for example, it is possible to reduce the number of processes or increase the number of processes according to QoS.
- the reception processing unit measures a reception quality of each reception data signal based on a propagation path estimation value corresponding to each antenna, and performs reception signal detection.
- an equalization order determining unit for ordering received data signals for performing signal selection and signal detection.
- the reception quality of each received data signal is measured based on the channel estimation value corresponding to each antenna, the received data signal for signal detection is selected, and the received data signal for signal detection is ordered. For example, processing can be performed in the order of good propagation path.
- the equalization order determination unit may generate likelihood information by using any one of the equalization units generated by other equalization units. Each time the process of outputting the generated likelihood information to another equalization unit is repeated, the number of received data signals to be selected and the order of received data signals for signal detection are changed.
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization units, and outputs the generated likelihood information to the other equalization units.
- the number of received data signals to be selected and the order of received data signals for signal detection are changed, so that it is possible to determine the best order for each process and perform the process.
- the reception processing unit performs a decoding process using the likelihood information output from any of the equalization units, and outputs the decoded likelihood information.
- the likelihood information is generated using the likelihood information output from the second decoding unit, and the generated likelihood information is output to the second decoding unit. Since the likelihood information including the likelihood information output from the second decoding unit can be exchanged as well as exchanging the likelihood information after equalization, the receiving antenna diversity effect and the decoding effect can be reduced. It becomes possible to improve.
- the reception processing unit selects either the likelihood information output from the other equalization unit or the likelihood information output from the second decoding unit. And a switching unit for outputting the output.
- likelihood information output by the other equalization unit or the likelihood information output by the second decoding unit is selected and output, the equalization of each antenna within the equalization unit
- likelihood information including the likelihood information output by the second decoding unit can be exchanged. As a result, it is possible to improve the receiving antenna diversity effect and the decoding effect.
- the communication system of the present invention is a communication system that performs wireless communication between a transmission device and a reception device having a plurality of antennas, and the reception device is connected to the plurality of antennas from the transmission device.
- a pilot separation unit that separates a pilot signal and a received data signal from a radio signal received using a propagation path estimation unit that calculates a propagation path estimation value corresponding to each antenna based on the pilot signal;
- a reception processing unit having a plurality of equalization units for performing signal detection of the reception data signal corresponding to each antenna and generating likelihood information based on the reception data signal and the propagation path estimation value.
- the two equalization units generate likelihood information using the likelihood information generated by the other equalization units, and output the generated likelihood information to the other equalization units. It is.
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization unit, and outputs the generated likelihood information to the other equalization unit. Therefore, it is possible to improve the reception diversity effect as compared with antenna processing of linear processing.
- any one equalization unit generates likelihood information using the likelihood information generated by the other equalization unit, and transmits the generated likelihood information to the other equalization unit. Since it is output, it is possible to improve the reception diversity effect as compared with antenna processing of linear processing.
- FIG. 3 is a diagram illustrating a schematic configuration of equalization units 501-1 to 501-2. It is a figure which shows schematic structure of the signal detection part which concerns on 2nd Embodiment. It is a figure which shows the reception quality for every received data signal.
- FIG. 1 It is a figure which shows schematic structure of the reception process part which concerns on 3rd Embodiment. It is a figure which shows schematic structure of a signal detection part. It is a figure which shows schematic structure of the reception process part which concerns on 3rd Embodiment. It is a figure which shows schematic structure of the signal processing part which concerns on 3rd Embodiment. It is a figure which shows schematic structure of the transmitter described in patent document 1, and a receiver. It is a figure which shows schematic structure of the receiver described in patent document 2.
- the present invention exchanges likelihoods between a plurality of equalizers based on the concept of turbo decoding for signals received through different propagation paths through the same transmission signal and different propagation paths at the receiver. It is characterized by equalization.
- FIG. 1 is a diagram illustrating a schematic configuration of a transmitter according to the first embodiment.
- the transmitter 100 includes an encoding unit 101, an interleaving unit 102, a modulation unit 103, a frame configuration unit 104, a pilot generation unit 105, a DA conversion unit 106, a radio transmission unit 107, and a transmission antenna unit 108.
- the transmitter 100 inputs the information data series to the encoding unit 101.
- the encoding unit 101 performs error correction encoding at a predetermined encoding rate by using a turbo code, LDPC (Low Density Parity Check) code, or the like to obtain a code bit sequence.
- LDPC Low Density Parity Check
- the code bit sequence is input to the interleave unit 102. After interleaving is performed by the interleaving unit 102, it is input to the modulation unit 103, and the code bit sequence is modulated into a data symbol sequence such as BPSK (Binary Phase Shift Keying) or 16QAM (Quadrature Amplitude Modulation).
- the data modulation sequence is input to the frame configuration unit 104.
- Frame configuration section 104 performs frame configuration using the pilot generated by pilot generation section 105 and the data symbol sequence input from modulation section 103.
- FIG. 2 is a diagram illustrating an example of a frame configuration.
- frame configuration section 104 adds N p pilots to the head of N symbol data symbols.
- the frame generated by the frame configuration unit 104 is converted into an analog signal by a DA (Digital to Analog) conversion unit 106.
- DA Digital to Analog
- the signal is transmitted by the transmission antenna unit 108 via the wireless transmission unit 107.
- the signal thus transmitted is received by the receiver.
- FIG. 3 is a diagram illustrating a schematic configuration of the receiver according to the first embodiment.
- a radio signal transmitted from the transmitter illustrated in FIG. 1 is received by the receiver 300 through the propagation path.
- the receiver 300 includes M antenna units 301-1 to 301-M (M is an integer of 2 or more). Also, wireless reception units 302-1 to 302-M, AD conversion units 303-1 to 303-M, pilot separation units 304-1 to 304-M, propagation path estimation unit 305, reception processing unit 306, and data determination unit 307 Is provided.
- the signal received by the wireless reception unit 302-1 via the antenna unit 301-1 is converted into a digital signal by an AD (Analog-to-Digital) conversion unit 303-1. Thereafter, the received signal is separated into a pilot signal and a data signal by pilot separation section 304-1, the pilot signal is input to propagation path estimation section 305, and the data signal is input to reception processing section 306. The same processing is performed for antenna M, and the pilot signal is input to propagation path estimation section 305 and the data signal is input to reception processing section 306.
- the propagation path estimation unit 305 uses the input reception pilot signals of the antenna units 301-1 to 301-M to transmit signals between the transmission antenna unit 108 and the reception antenna units 301-1 to 301-M in FIG. Propagation path estimation is performed, and each propagation path estimation value is input to the reception processing unit 306.
- Reception processing section 306 encodes the received data signal of each antenna input from pilot demultiplexing sections 304-1 to 304-M and the propagation path estimation value of each antenna input from propagation path estimation section 305.
- the bit LLR is calculated and input to the data determination unit 307.
- the data determination unit 307 extracts the information bit LLR from the sign bit LLR, and calculates an information bit sequence based on the sign of the bit LLR.
- FIG. 4 is a diagram illustrating a schematic configuration of the reception processing unit 306 according to the first embodiment.
- the reception processing unit 306 includes a signal detection unit 401, a deinterleaving unit 402, and a decoding unit 403.
- the reception data signal of each antenna and the propagation path estimation value of each antenna are input to the signal detection unit 401.
- the signal detection unit 401 calculates the LLR of the code bit using the input reception data signal of each antenna and the propagation path estimation value of each antenna.
- the calculated code bit LLR is input to deinterleaving section 402 and input to decoding section 403 after the process of returning the interleaving performed in interleaving section 102 of the transmitter shown in FIG.
- Decoding section 403 performs a decoding process corresponding to the encoding of the transmitter.
- Decoding section 403 calculates and outputs code bit LLR.
- FIG. 5 is a diagram illustrating a schematic configuration of the signal detection unit according to the first embodiment.
- the signal detection unit 401 includes transmission signal detection units (equalization units) 501-1 and 501-2 and subtraction units 502-1 and 502-2.
- Equalizing section 501-1 receives antenna 1 received data signal, code bit LLR ⁇ 2 output from subtracting section 502-2, and propagation path estimation value, performs equalization processing to compensate for multipath,
- the bit LLR ⁇ 1 is output to the subtracting unit 502-1.
- ⁇ 2 is given zero.
- Subtraction unit 502-1 uses the output sign bit LLRramuda 1 of equalizer 501-1 input and output code bits LLRramuda 2 of the subtraction section 502-2 performs subtraction processing of lambda 1 1-? 2, Output code bit LLR ⁇ 1 is obtained. The obtained ⁇ 1 is output to the equalization unit 501-2 and the subtraction unit 502-2.
- the equalization unit 501-2 performs equalization processing to compensate for multipath using the antenna 2 reception data signal, the code bit LLR ⁇ 1 output from the subtraction unit 502-1, and the propagation path estimation value in each reception antenna.
- the sign bit LLR ⁇ 2 is input to the subtracting unit 502-2.
- the subtraction unit 502-2 performs subtraction processing of ⁇ 2 - ⁇ 1 using the input output code bit LLR ⁇ 2 of the equalization unit 501-2 and the code bit LLR ⁇ 1 output of the subtraction unit 502-1.
- the sign bit LLR ⁇ 2 is obtained.
- the obtained ⁇ 2 is input to the equalization unit 501-1 and the subtraction unit 502-1.
- the code bit LLR ⁇ 2 output from the equalization unit 501-2 is input to the deinterleaving unit 402 in FIG.
- the code bit LLR ⁇ 2 output from the equalization unit 501-2 is used as the final output, but the code bit LLR ⁇ 1 output from the equalization unit 501-1 may be used as the final output.
- FIG. 6 is a diagram showing a schematic configuration of the equalization units 501-1 to 501-2.
- equalization for the kth symbol will be described.
- the input code bit LLR sequence is input to the symbol replica generation unit 601.
- the symbol replica generation unit 601 generates a symbol replica s est ((2L ⁇ 1) ⁇ 1 vector) other than the k-th symbol by using the input code bit LLR sequence by Expression (1).
- the calculated symbol replica s est is input to the interference replica generation unit 602 and the weight generation unit 603.
- the input propagation path estimation value H (L ⁇ (2L ⁇ 1) matrix, where L is the number of paths in the propagation path) is also input to the interference replica generation unit 602 and the weight generation unit 603. However, H is a matrix in which all the temporal and spatial structures of the propagation path are expressed.
- the interference replica generation unit 602 generates an interference replica using the input symbol replica s est and the propagation path estimation value H, and inputs the interference replica to the subtraction unit 604.
- the reception data signal r (k) (L ⁇ 1 vector) is input to the subtraction unit 604.
- the weight generation unit 603 to which the symbol replica s est (vector) and the propagation path estimation value are input calculates the propagation path compensation weight w (k) (L ⁇ 1 vector) and the equivalent gain ⁇ (k), and the propagation path.
- the compensation weight w (k) (vector) is input to the propagation path compensation unit 605, and the equivalent gain ⁇ (k) is input to the LLR calculation unit 606.
- the propagation path compensation weight w (k) (vector) and the equivalent gain ⁇ (k) are calculated by equations (2) and (3), respectively.
- ⁇ 2 is the variance of noise
- I is an L ⁇ L identity matrix
- e L is a (2L ⁇ 1) ⁇ 1 vector whose L-th element is 1 and the others are 0, T is transposed
- H is complex conjugate transposed ( Hermitian transposition).
- ⁇ (k) ((2L-1) ⁇ (2L-1) matrix) is expressed by the following equation.
- diag (x) means a diagonal matrix having the vector x as a diagonal element.
- the reception data signal r (k) (L ⁇ 1 vector) is input to the subtraction unit 604.
- the subtraction unit 604 subtracts the interference replica (multiplication of H and s est) from the received data signal r (vector), the interference to obtain a suppression signal r s (k) (L ⁇ 1 vector).
- the obtained r s (k) (vector) is input to the propagation path compensation unit 605.
- the propagation path compensation unit 605 performs processing of Expression (5) and inputs the compensated signal z (k) to the LLR calculation unit 606.
- the LLR calculation unit 606 obtains the LLR of the sign bit based on the equation (6) using the input compensated signal z (k) and the equivalent amplitude ⁇ (k).
- Re [] indicates processing for extracting only the real part.
- the above processing is performed on N symbols, and the calculated code bit LLR is input to the PS conversion unit 607.
- the PS conversion unit 607 performs PS (Parallel-Serial) conversion on the input code bit LLR, and outputs a code bit LLR.
- the configurations of the equalization units 501-1 and 501-2 are those described in Non-Patent Document 1. However, if the configuration compensates for multipath and outputs the LLR of the sign bit, the configuration is as follows. Any thing is acceptable.
- equalization processing is performed for each antenna, and instead of performing linear antenna synthesis, the equalized code bits LLR are exchanged between the antennas.
- the receiving antenna diversity effect can be improved.
- the receiver when the receiver has three or more receiving antennas, equalization is performed while the likelihood is exchanged between equalizers of the receiving antennas.
- the configuration of the transmitter may be the same as that of the first embodiment shown in FIG.
- the signal transmitted from the transmitter shown in FIG. 1 passes through the propagation path and is received by the receiver.
- FIG. 3 is a diagram illustrating a schematic configuration of a receiver according to the second embodiment.
- the receiver 300 includes M antenna units 301-1 to 301-M (M is an integer of 3 or more). Also, wireless reception units 302-1 to 302-M, AD conversion units 303-1 to 303-M, pilot separation units 304-1 to 304-M, propagation path estimation unit 305, reception processing unit 306, and data determination unit 307 Is provided.
- the signal received by the wireless reception unit 302-1 via the antenna unit 301-1 is converted into a digital signal by the AD conversion unit 303-1. Thereafter, the received signal is separated into a pilot signal and a data signal in pilot separation section 304-1, the pilot signal is input to propagation path estimation section 305, and the data signal is input to reception processing section 306. The same processing is performed for the antenna M.
- the pilot signal is input to the propagation path estimation unit 305, and the data signal is input to the reception processing unit 306.
- the propagation path estimation unit 305 uses the input reception pilot signals of the antenna units 301-1 to 301-M to transmit the transmission antenna unit 108 and the reception antenna units 301-1 to 301-M shown in FIG.
- the channel estimation is performed, and each channel estimation value is input to the reception processing unit 306.
- the reception processing unit 306 uses the received data signal of each antenna input from the pilot demultiplexing units 304-1 to 304-M and the channel estimation value of each antenna input from the channel estimation unit 305 to code bit LLR. Is calculated and input to the data determination unit 307.
- the data determination unit 307 extracts the information bit LLR from the sign bit LLR, and calculates an information bit sequence based on the sign of the bit LLR.
- the reception processing unit 306 includes a signal detection unit 401, a deinterleaving unit 402, and a decoding unit 403.
- the reception data signal of each antenna and the propagation path estimation value of each antenna are input to the signal detection unit 401.
- the signal detection unit 401 calculates the LLR of the code bit using the received reception data signal of each antenna and the propagation path estimation value of each antenna.
- the calculated code bit LLR is input to the deinterleaving unit 402, and after the process of returning the interleaving performed by the interleaving unit 102 of the transmitter shown in FIG. 1 is performed, the code bit LLR is input to the decoding unit 403.
- Decoding section 403 performs a decoding process corresponding to the encoding of the transmitter.
- the decoding unit 403 calculates and outputs a sign bit LLR.
- FIG. 7 is a diagram illustrating a schematic configuration of a signal detection unit according to the second embodiment.
- the signal detection unit 401 includes an equalization order changing unit 701, equalization units 702-1 to 702-M ', and subtraction units 703-1 to 703-M'.
- Received data signals of antennas 1 to M and propagation path estimation values of antennas 1 to M are input to equalization order changing section 701.
- the equalization order changing unit 701 obtains average reception quality for each antenna, for example, SNR (Signal-to-Noise power Ratio) and SINR (Signal-to-Interference plus Noise power Ratio), and equalizes based on the average reception quality.
- SNR Signal-to-Noise power Ratio
- SINR Signal-to-Interference plus Noise power Ratio
- the equalization order changing unit 701 first inputs the received data signal to be equalized and the channel estimation value to the equalization unit 702-1.
- Equalization section 702-1 includes a received data signal r 1 for performing first equalization processing input from the equalization order changing unit 701, the subtraction unit 703-M 'is input from the sign bit LLR ⁇ M', and propagation The path estimation value is input, equalization processing is performed to compensate for multipath, and the sign bit LLR ⁇ 1 is input to the subtracting unit 703-1.
- the configuration of the equalization unit 702-1 may be the same as that of the first embodiment, but any configuration may be used as long as it is a configuration that compensates for multipath and outputs an LLR of code bits. May be. However, since there is no output ⁇ M ′ of the subtracting unit 703 -M ′ at the first time, ⁇ M ′ is given zero.
- Subtraction unit 703-1 uses the 'output code bits LLRramuda M' and the output sign bit LLRramuda 1 of equalizer 702-1 inputted subtraction section 703-M, the subtraction processing of lambda 1 1-? M ' And output code bit LLR ⁇ 1 is obtained.
- the obtained ⁇ 1 is output to the equalization unit 702-2 and the subtraction unit 703-2.
- the equalization unit 702-2 receives the received data signal r 2 subjected to the second equalization process input from the equalization order changing unit 701, the sign bit LLR ⁇ 1 output from the subtraction unit 703-1, and each reception antenna.
- An equalization process is performed to compensate for multipath using the propagation path estimation value at, and the sign bit LLR ⁇ 2 is input to the subtraction unit 703-2.
- the subtraction unit 703-2 performs subtraction processing of ⁇ 2 - ⁇ 1 using the input output code bit LLR ⁇ 2 of the equalization unit 702-2 and the code bit LLR ⁇ 1 output of the subtraction unit 703-1, The sign bit LLR ⁇ 2 is obtained. Such processing is performed up to the M′th received data signal.
- the output of the equalization unit 702-M ′ that performs the M′-th equalization process is input to the subtraction unit 703-M ′.
- the subtracting unit 703-M ′ receives the output code bit LLR ⁇ M ′ and the code bit LLR ⁇ M′ ⁇ 1 of the equalizing unit 702-M ′, and performs a subtraction process of ⁇ M ′ - ⁇ M′ ⁇ 1 .
- the sign bit LLR ⁇ M ′ is obtained.
- ⁇ M ′ output from the subtraction unit 703-M ′ is input to the equalization unit 702-1 and the subtraction unit 703-1.
- the above process is repeated one or more times to obtain the code bit LLR ⁇ M ′ output from the equalization unit 702-M ′.
- FIG. 8 is a diagram illustrating reception quality for each received data signal.
- the equalization order changing unit 701 shown in FIG. 7 measures the reception quality for each received data signal such as 801 in FIG. 8 using the propagation path estimation value. Using the measured reception quality, reception data to be equalized is selected and ordered at the first time. In FIG. 8, received data signal 3 and received data signal 5 are selected, and equalization is performed in the order of received data signal 5 and received data signal 3 (802).
- the received data to be equalized is selected and ordered.
- the reception data signal 2, the reception data signal 3, and the reception data signal 5 are selected, and equalization is performed in the order of the reception data signal 2, the reception data signal 5, and the reception data signal 3 (803).
- the output code bit LLR of the equalization of the reception data signal 3 at the first time is used.
- received data to be equalized in the third iteration is selected and ordered. In FIG. 8, all received data is selected, and equalization is performed in the order of the received data signals 5, 3, 2, 1, 6 and 4 (804). However, when equalizing the received data signal 5, the output code bit LLR of equalization of the received data signal 3 in the second iteration is used.
- the number of received data, the number of repetitions, and the order in which equalization processing is performed may be determined in consideration of not only reception quality but also QoS (Quality of Service) such as allowable processing delay time and allowable communication quality. That is, when the allowable delay time is short or the allowable communication quality is low, the number of received data to be processed and the number of repetitions may be limited.
- QoS Quality of Service
- the second embodiment even when there are three or more receiving antennas, equalization processing is performed for each antenna and linear antenna synthesis is not performed, but three or more receiving antennas are used. By exchanging the equalized code bit LLR between the receiving antennas, the receiving antenna diversity effect can be greatly improved.
- the same transmission signal passes through different propagation paths, and signals received via different propagation paths in the receiver are converted into a plurality of equalizers and decoders based on the concept of turbo decoding.
- the bit error rate is improved by exchanging likelihood between the two.
- the configuration of the transmitter may be the same as that of the first embodiment shown in FIG.
- the signal transmitted from the transmitter shown in FIG. 1 passes through the propagation path and is received by the receiver.
- FIG. 4 is a diagram illustrating a schematic configuration of a receiving apparatus according to the third embodiment.
- the receiver includes M antenna units 301-1 to 301-M (M is an integer of 2 or more). Also, wireless reception units 302-1 to 302-M, AD conversion units 303-1 to 303-M, pilot separation units 304-1 to 304-M, propagation path estimation unit 305, reception processing unit 306, and data determination unit 307 Is provided.
- the signal received by the wireless reception unit 302-1 via the antenna unit 301-1 is converted into a digital signal by the AD conversion unit 303-1. Thereafter, the received signal is separated into a pilot signal and a data signal by pilot separation section 304-1, the pilot signal is input to propagation path estimation section 305, and the data signal is input to reception processing section 306. Similar processing is performed for antenna M, and a pilot signal is input to propagation path estimation section 305 and a data signal is input to reception processing section 306.
- the propagation path estimation unit 305 uses the input reception pilot signals of the antenna units 301-1 to 301-M to transmit the transmission antenna unit 108 and the reception antenna units 301-1 to 301-M shown in FIG.
- the channel estimation is performed, and each channel estimation value is input to the reception processing unit 306.
- the reception processing unit 306 uses the received data signal of each antenna input from the pilot separation units 304-1 to 304-M and the channel estimation value of each antenna input from the channel estimation unit 305 to code bits.
- the LLR is calculated and input to the data determination unit 307.
- the data determination unit 307 extracts the information bit LLR from the sign bit LLR, and calculates an information bit sequence based on the sign of the bit LLR.
- FIG. 9 is a diagram illustrating a schematic configuration of a reception processing unit according to the third embodiment.
- the reception processing unit 306 includes a signal detection unit 901, a subtraction unit 902, a deinterleaving unit 903, a decoding unit 904, a subtraction unit 905, and an interleaving unit 906.
- the reception data signal of each antenna and the propagation path estimation value of each antenna are input to the signal detection unit 901.
- the signal detection unit 901 calculates the LLR of the code bit using the input reception data signal of each antenna, the propagation path estimation value of each antenna, and the input from the interleaving unit 906.
- the calculated sign bit LLR is input to the subtraction unit 902.
- the subtraction unit 902 subtracts the code bit LLR input from the interleaving unit 906 from the code bit LLR input from the signal detection unit 901, and inputs the result to the deinterleaving unit 903.
- the deinterleaving unit 903 performs the process of returning the interleaving performed by the interleaving unit 102 of the transmitter shown in FIG. 1, and inputs the result to the decoding unit 904 and the subtracting unit 905.
- Decoding section 904 performs a decoding process corresponding to the encoding of the transmitter.
- the decoding unit 904 inputs the decoded code bit LLR to the subtraction unit 905.
- the subtraction unit 905 subtracts the code bit LLR input from the deinterleaving unit 903 from the code bit LLR input from the decoding unit 904, and inputs the result to the interleaving unit 906.
- Interleaving section 906 performs the same interleaving on the input code bit LLR as the interleaving performed by interleaving section 102 of the transmitter, and inputs the obtained code bit LLR to signal detection section 901 and subtraction section 902. To do. The above process is repeated at least once and the code bit LLR calculated by the decoding unit 904 is output to the data determination unit 307.
- FIG. 10 is a diagram illustrating a schematic configuration of the signal detection unit.
- the signal detection unit 901 includes switching units 1001-1 and 1001-2, equalization units 1002-1 and 1002-2, and subtraction units 1003-1 and 1003-2.
- the configuration of the equalization units 1002-1 and 1002-2 may be the same as that of the first embodiment, but any configuration is possible as long as it is a configuration that compensates for multipath and outputs an LLR of code bits. It may be.
- the code bit LLR output from the interleaving unit 906 in FIG. 9 and the output code bit LLR ⁇ 2 from the subtracting unit 1003-2 are input to the switching unit 1001-1.
- the switching unit 1001-1 inputs the input from the subtracting unit 1003-2 to the equalizing unit 1002-1 when exchanging the code bit LLR between the antennas, and outputs the signals from the signal detecting unit 901 and the decoding unit 904 in FIG.
- the input from the interleaving unit 906 in FIG. 9 is input to the equalizing unit 1002-1.
- the input code bits LLR and ⁇ 2 from the interleaving unit 906 in FIG. Give zero.
- Equalization section 1002-1 uses the received data signal of antenna 1, the propagation path estimation value, and the input from switching section 1001 to perform equalization processing so as to compensate for multipath, and generates code bit LLR ⁇ 1 Input to the subtraction unit 1003-1.
- Subtraction unit 1003-1 using the output code bits LLRramuda 2 output code bits LLRramuda 1 subtraction units 1003-2 of the equalization section 1002-1 inputted, performs subtraction processing of lambda 1 1-? 2, the output The sign bit LLR ⁇ 1 is obtained. The obtained ⁇ 1 is output to switching section 1001-2 and subtraction section 1003-2.
- the switching unit 1001-2 When exchanging the code bit LLR between the antennas, the switching unit 1001-2 inputs the input from the subtraction unit 1003-1 to the equalization unit 1002-2, and outputs the output codes of the signal detection unit 901 and the decoding unit 904 in FIG. When exchanging the bit LLRs, the input from the interleaving unit 906 in FIG. 9 is input to the equalizing unit 1002-2.
- the equalization unit 1002-2 performs an equalization process such that multipath is compensated using the antenna 2 reception data signal, the output of the switching unit 1001-2, and the propagation path estimation value in each reception antenna, and the code bit LLR ⁇ 2 is input to the subtraction unit 1003-2.
- the subtraction unit 1003-2 performs subtraction processing of ⁇ 2 - ⁇ 1 using the input output code bit LLR ⁇ 2 of the equalization unit 1002-2 and the code bit LLR ⁇ 1 output of the subtraction unit 1003-1, The sign bit LLR ⁇ 2 is obtained.
- the obtained ⁇ 2 is input to the switching unit 1001 and the subtracting unit 1003-1.
- the above process is repeated once or more, and the sign bit LLR ⁇ 2 output from the equalization unit 1002-2 is input to the subtraction unit 902 in FIG.
- the code bit LLR ⁇ 2 output from the equalization unit 1002-2 is the final output, but the code bit LLR ⁇ 1 output from the equalization unit 1002-1 may be the final output.
- the configuration of the receiving apparatus illustrated in FIG. 3 is not limited to the configuration illustrated in FIG. 9, but may be configured to include the signal detection unit 555 as illustrated in FIG.
- the signal detection unit 555 includes equalization units 1201-1 and 1201-2, deinterleave units 1202-1 and 1202-2, decoding units 1203-1 and 1203-2, a subtraction unit. 1204-1 and 1204-2, and interleave units 1205-1 and 1205-2.
- the likelihood information output from the equalization unit 1201-1 that equalizes the received signal at the antenna 1 is input to the decoding unit 1203-1 via the deinterleaving unit 1202-1, and the decoding unit 1203-1 outputs the likelihood information.
- the likelihood information may be input to the equalization unit 1201-2 that equalizes the received signal at the antenna 2 via the subtraction unit 1204-1 and the interleaving unit 1205-1.
- the bit LLR after equalization of each antenna is exchanged in the equalization unit, but also the bit LLR is exchanged including the bit LLR output from the decoding unit.
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Abstract
Description
図1は、第1の実施形態に係る送信機の概略構成を示す図である。送信機100は、符号化部101、インタリーブ部102、変調部103、フレーム構成部104、パイロット生成部105、DA変換部106、無線送信部107および送信アンテナ部108を備える。送信機100は、情報データ系列を符号化部101へ入力する。符号化部101はターボ符号、あるいはLDPC(Low Density Parity Check)符号等によって、所定の符号化率で誤り訂正符号化を行ない、符号ビット系列を得る。
第2の実施形態では、受信機が3本以上の受信アンテナを有する場合において、受信アンテナの等化器間で尤度を交換しながら等化する。送信機の構成は、図1で示した第1の実施形態と同様のものでよい。図1に示した送信機から送信された信号は、伝搬路を通り、受信機で受信される。
第3の実施形態は、同一の送信信号を異なる伝搬路を通し、受信機において異なる伝搬路を経由して受信された信号を、ターボ復号の概念に基づき、複数の等化器間および復号器間で尤度を交換することでビット誤り率を改善する。送信機の構成は、図1に示した第1の実施形態と同様のものでよい。図1に示した送信機から送信された信号は、伝搬路を通り、受信機で受信される。
101 符号化部
102 インタリーブ部
103 変調部
104 フレーム構成部
105 パイロット生成部
106 DA変換部
107 無線送信部
108 送信アンテナ部
114 復号器
300 受信機
301-1~301-M アンテナ部
302-1~302-M 無線受信部
303-1~303-M AD変換部
304-1~304-M パイロット分離部
305 伝搬路推定部
306 受信処理部
307 データ判定部
401 信号検出部
402 デインタリーブ部
403 復号部
501-1、501-2 等化部
502-1、502-2 減算部
555 信号検出部
601 シンボルレプリカ生成部
602 干渉レプリカ生成部
603 重み生成部
604 減算部
605 伝搬路補償部
606 LLR算出部
607 PS変換部
701 等化順序変更部
702-1~702-M’ 等化部
703-1~703-M’ 減算部
901 信号検出部
902 減算部
903 デインタリーブ部
904 復号部
905 減算部
906 インタリーブ部
1001-1、1001-2 切換部
1002-1、1002-2 等化部
1003-1、1003-2 減算部
Claims (11)
- 複数のアンテナを用いて無線信号を受信する受信装置であって、
前記無線信号からパイロット信号と受信データ信号とを分離するパイロット分離部と、
前記パイロット信号に基づいて、前記各アンテナに対応する伝搬路推定値をそれぞれ算出する伝搬路推定部と、
前記各アンテナに対応する受信データ信号の信号検出を行ない、受信データ信号および伝搬路推定値に基づいて尤度情報を生成する複数の等化部を有する受信処理部と、を備え、
いずれか一つの等化部は、他の等化部が生成した尤度情報を用いて尤度情報を生成すると共に、前記生成した尤度情報を他の等化部へ出力することを特徴とする受信装置。 - 前記受信処理部は、前記いずれか一つの等化部から出力された尤度情報から、他の等化部が生成した尤度情報を減算する第1の減算部を備えることを特徴とする請求項1記載の受信装置。
- 前記受信処理部は、いずれかの等化部から出力された尤度情報を用いて復号処理を行ない、復号した尤度情報を出力する第1の復号部を備えることを特徴とする請求項1または請求項2記載の受信装置。
- 前記各等化部は、前記各アンテナに対応する受信データ信号、前記伝搬路推定値および他の等化部が生成した尤度情報を用いて干渉レプリカを生成する干渉レプリカ生成部と、
前記各アンテナに対応する受信データ信号から前記干渉レプリカを減算する干渉除去部と、を備えることを特徴とする請求項1から請求項3のいずれかに記載の受信装置。 - いずれか一つの前記等化部は、他の等化部が生成した尤度情報を用いて尤度情報を生成し、前記生成した尤度情報を他の等化部へ出力する処理を、少なくとも一回行なうことを特徴とする請求項1から請求項4のいずれかに記載の受信装置。
- いずれか一つの前記等化部が、他の等化部が生成した尤度情報を用いて尤度情報を生成し、前記生成した尤度情報を他の等化部へ出力する処理を行なう回数を、QoSに基づいて決定することを特徴とする請求項5記載の受信装置。
- 前記受信処理部は、前記各アンテナに対応する伝搬路推定値に基づいて、各受信データ信号の受信品質を測定し、信号検出を行なう受信データ信号の選択および信号検出を行なう受信データ信号の順序付けを行なう等化順序決定部をさらに備えることを特徴とする請求項1記載の受信装置。
- 前記等化順序決定部は、いずれか一つの前記等化部が、他の等化部が生成した尤度情報を用いて尤度情報を生成し、前記生成した尤度情報を他の等化部へ出力する処理を繰り返す度に、選択する受信データ信号の数および信号検出を行なう受信データ信号の順序を変更することを特徴とする請求項7記載の受信装置。
- 前記受信処理部は、いずれかの等化部から出力された尤度情報を用いて復号処理を行ない、復号した尤度情報を出力する第2の復号部を備え、
前記等化部は、前記第2の復号部が出力した尤度情報を用いて尤度情報を生成すると共に、前記生成した尤度情報を前記第2の復号部へ出力することを特徴とする請求項1記載の受信装置。 - 前記受信処理部は、前記他の等化部が出力する尤度情報または前記第2の復号部が出力する尤度情報のいずれか一方を選択して出力する切替部を備えることを特徴とする請求項9記載の受信装置。
- 送信装置と、複数のアンテナを有する受信装置との間で無線通信を行なう通信システムであって、
前記受信装置は、前記送信装置から前記複数のアンテナを用いて受信した無線信号からパイロット信号と受信データ信号とを分離するパイロット分離部と、
前記パイロット信号に基づいて、前記各アンテナに対応する伝搬路推定値をそれぞれ算出する伝搬路推定部と、
前記各アンテナに対応する受信データ信号の信号検出を行ない、受信データ信号および伝搬路推定値に基づいて尤度情報を生成する複数の等化部を有する受信処理部と、を備え、
いずれか一つの等化部は、他の等化部が生成した尤度情報を用いて尤度情報を生成すると共に、前記生成した尤度情報を他の等化部へ出力することを特徴とする通信システム。
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