WO2007126460A1 - Sequential oxide removal using fluorine and hydrogen - Google Patents
Sequential oxide removal using fluorine and hydrogen Download PDFInfo
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- WO2007126460A1 WO2007126460A1 PCT/US2007/002373 US2007002373W WO2007126460A1 WO 2007126460 A1 WO2007126460 A1 WO 2007126460A1 US 2007002373 W US2007002373 W US 2007002373W WO 2007126460 A1 WO2007126460 A1 WO 2007126460A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P70/00—Cleaning of wafers, substrates or parts of devices
- H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H10P70/12—Cleaning before device manufacture, i.e. Begin-Of-Line process by dry cleaning only
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
- H10P14/271—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P70/00—Cleaning of wafers, substrates or parts of devices
- H10P70/20—Cleaning during device manufacture
- H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
- H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0431—Apparatus for thermal treatment
- H10P72/0434—Apparatus for thermal treatment mainly by convection
Definitions
- the present invention relates to semiconductor processing, and more particularly, to a low-temperature process for oxide removal from a substrate and subsequent formation of a film on the substrate.
- Si-containing films are used for a wide variety of applications in the semiconductor industry.
- Si-containing films include films such as epitaxial Si, polycrystalline Si (poly-Si), amorphous Si, epitaxial silicon germanium (SiGe), silicon germanium carbide (SiGeC), silicon carbide (SiC), silicon nitride (SiN), silicon carbonitride (SiCN), and silicon carboxide (SiCO).
- lower processing temperatures are preferred, for example because of introduction of new materials into semiconductor devices and/or reduction of thermal budgets for shallow implants in source and drain regions.
- Epitaxial Si deposition is a process where the crystal lattice of the bulk Si is extended through growth of a new Si-containing film that may have a different doping level than the bulk. Matching target epitaxial film thickness and resistivity parameters is important for the subsequent fabrication of property functioning devices.
- a Si-containing film e.g., epitaxial Si or epitaxial SiGe films
- a Si substrate Prior to depositing a Si-containing film, e.g., epitaxial Si or epitaxial SiGe films, on a Si substrate, it may be required to remove a native oxide layer from the surface of the substrate in order to prepare a proper starting growth surface (i.e., a seed layer) to deposit a high quality epitaxial film on.
- the Si-containing film subsequently deposited on the substrate may not grow epitaxially and may contain defects that can lead to a high leakage current through the film and cause the microelectronic device to not perform optimally.
- a poly-Si film can be deposited directly on a poly-Si film to form an electrical contact.
- the substrates wafers
- a native oxide layer can form on the substrates. If the native oxide layer is not removed prior to depositing the poly-Si film, the resulting contact can have high electrical resistance and/or other undesirable properties.
- high-k films include HfO 2 , HfSiO x , HfSiO x Ny, ZrO 2 , ZrSiO x , and ZrSiO x Ny.
- the presence of an oxide layer can reduce the effective dielectric constant of the gate stack since the oxide layer normally has a lower dielectric constant than the high-k film.
- a higher dielectric constant and higher level of control over the overall dielectric constant can be achieved if the oxide layer is effectively removed before depositing a high-k film.
- Plasma processing has been found to allow lowering of the substrate temperature during processing and thus offers an alternative to high-temperature annealing in a hydrogen atmosphere.
- exposure of the substrate to a plasma source can damage the substrate as a result of the interaction of excited species in the plasma with the substrate.
- Another oxide removal method is based on hydrogen fluoride (HF), but the use of HF can result in incomplete oxide removal and unwanted erosion of the substrate and various films on the substrate.
- Embodiments of the invention address the above-described problems associated with removing an oxide layer from a substrate.
- Embodiments of the invention provide a method for effective removal of an oxide layer from a substrate at a relatively low substrate temperature while minimizing damage to the substrate.
- the low substrate temperature provides the flexibility needed for integrating the oxide removal process into device manufacturing schemes.
- a method is provided for removing an oxide layer from a substrate at low substrate temperature and subsequently depositing a low defect film on the substrate.
- the method includes providing a substrate in a process chamber of a processing system, where the substrate has an oxide layer formed thereon, and performing a sequential oxide removal process.
- the sequential oxide removal process includes exposing the substrate to a first etching gas containing F 2 at a first substrate temperature to partially remove the oxide layer from the substrate. Thereafter, the substrate is heated from the first substrate temperature to a second substrate temperature, and the substrate is exposed to a second process gas containing H 2 to further remove the oxide layer from the substrate.
- the substrate can contain Si, SiGe, Ge, a glass substrate, a LCD substrate, or a compound semiconductor substrate.
- the deposited film can be a Si-containing film, such as Si or SiGe, Ge, or a high-k dielectric film, such as Ta 2 Os, TiO 2 , AI 2 O 3 , Y 2 O 3 , HfSiO x , HfO 2 , HfSiO x N y , ZrO 2 , ZrSiO x , TaSiO x , ZrSiO x Ny, SrO x , SrSiO x , LaO x , LaSiO x , YO x , or YSiO x .
- the Si substrate and the Si film can be epitaxial Si.
- the Si substrate and the Si film can be poly-Si.
- the method includes providing a Si substrate in a process chamber of a processing system, the Si substrate having an oxide layer formed thereon, and performing a sequential oxide removal process.
- the sequential oxide removal process includes exposing the Si substrate to an etching gas containing F 2 at a first substrate temperature between about 20 0 C and about 400 0 C to partially remove the oxide layer from the Si substrate. Thereafter, the substrate is heated from the first substrate temperature to a second substrate temperature lower than 900 0 C, and the substrate is exposed to a second etching gas containing H 2 to further remove the oxide layer from the substrate.
- FIG. 1 illustrates a simplified block diagram of a batch processing system configured for processing a substrate according to an embodiment of the invention
- FIG. 2A illustrates a flow diagram for oxide removal from a substrate according to an embodiment of the invention
- FIG. 2B illustrates the variation in substrate temperature as a function of processing time for oxide removal from a substrate and subsequent deposition of a film onto the substrate according to an embodiment of the invention
- [0017JFIGS. 3A - 3C illustrate Secondary Ion Mass Spectroscopy (SIMS) depth profiles of Si films deposited onto Si substrates with and without oxide removal according to an embodiment of the invention
- FIGS. 4A -4D schematically illustrate oxide removal from a patterned structure and subsequent deposition of a film onto the patterned structure according to an embodiment of the invention.
- Embodiments of the invention may be used for native oxide removal (NOR) from a substrate prior to depositing a film onto the substrate.
- the native oxide removal can be carried out prior to forming an epitaxial Si film, a poly-Si film, or a high-k film on a Si substrate.
- Embodiments of the invention may also be used to remove types of oxides other than native oxides, such as thin chemical oxides film grown or deposited on substrates, for example.
- the terms native oxide layer and oxide layer are used interchangeably to refer to any oxide layer to be removed from a substrate prior to further processing such as forming a film on the substrate.
- an oxide layer or a native oxide layer can, for example, be a SiO 2 layer or a SiO x (x ⁇ 2) layer.
- Fluorine containing gases are known to have aggressive etch characteristics that were thought to be suitable only for aggressive etch processes.
- NF 3 and CIF 3 have been used in chamber cleaning processes wherein deposited materials are removed from interior surfaces of the chamber.
- U.S. patent no. 6,194,327 discloses use of a fluorine gas for rapid thermal etching of thick sacrificial oxide layers. However, this process is performed at temperatures of 800 - 1200 0 C which, as with the hydrogen annealing discussed above, is too high for some current and future thermal budget requirements.
- the present inventors recognized that high-temperature fluorine etching is too aggressive, and can result in etching of the underlying substrate and forming a rough substrate surface unsuitable for subsequent film deposition.
- high temperature fluorine etching may aggressively etch process chamber components such as a process tube and a substrate holder.
- This effect is (in part) due to faster etching rate of the underlying Si substrate compared to the overlying native oxide layer. This faster etching of Si versus oxide has been observed when etching oxide layers formed on a Si substrate in a deposition process from TEOS gas.
- the (poly) Si etch rates were about 2.5 angstrom/min and the oxide etch rates were about 0.07 angstrom/min.
- the (poly) Si etch rates were about 8 angstrom/min and the oxide etch rates were about 0.1 angstrom/min.
- Embodiments of the current invention utilize F 2 etching and a hydrogen anneal in a sequential oxide removal process to reduce or eliminate the above- mentioned problems.
- a substrate containing an oxide layer thereon is exposed at a first substrate temperature to a flow of a first etching gas containing F 2 to partially remove the oxide layer from the substrate. Thereafter, the flow of the first etching gas is stopped and the temperature of the substrate is raised from the first substrate temperature to a second substrate temperature. Next, the substrate is exposed at the second temperature to a flow of a second etching gas containing H 2 to further remove the oxide layer from the substrate.
- the first etching gas containing F 2 partially removes the oxide layer in a low temperature process and enables complete removal of the remaining oxide layer and any F-containing impurities on the substrate in a subsequent hydrogen anneal at a substrate temperature below 900 0 C. It is contemplated that, in addition to partially removing the oxide layer, the first etching gas roughens or modifies the oxide layer, thereby facilitating further removal of the oxide layer by the second etching gas at a substrate temperature below 900 0 C.
- the hydrogen anneal can be done at conventional temperatures above 900 0 C, for example 900 0 C-HOO 0 C, but for a shortened time period less than 15 min., more preferably less than 5 min., for example.
- thermal budget savings from the low temperature F 2 process may be used in the H 2 process by a brief H 2 process at conventional H 2 anneal temperatures, or a longer H 2 process at lower temperatures.
- the temperature and time of the H 2 process will vary based on overall thermal budget and/or temperature limits of materials being processed.
- the two-step etch process of the current invention may also reduce the total exposure time needed compared to the exposure time needed when only one of the two etch processes is used to remove an oxide layer.
- an oxide layer can be fully removed by exposing the substrate at a substrate temperature between about 200 0 C and about 300 0 C to a first etching gas containing F 2 for 15-30 min, followed by exposing the substrate at a second substrate temperature between about 800 0 C and about 850 0 C to a second etching gas containing H 2 for 15 min.
- a 60 min hydrogen anneal at a substrate temperature of 900 0 C may be required to fully remove the same oxide layer in the absence of a prior low temperature exposure to a first etching gas containing F 2 .
- the two step process described in embodiments of the invention can reduce drawbacks of each of the individual etch steps.
- Embodiments of the invention further provide formation of a film on the substrate following the two step removal of the oxide layer.
- the film is formed on the substrate at a third substrate temperature greater than the first substrate temperature but lower than the second substrate temperature to achieve deposition rates that are high enough for device manufacturing and to ensure that the deposited film has the desired material properties.
- the desired material properties can, for example, include a crystal structure (i.e., epitaxial, polycrystalline, or amorphous), and elemental composition.
- the third substrate temperature can be selected to provide selective film deposition on exposed Si-containing surfaces of the substrate, or non-selective (blanket) film deposition on the whole substrate.
- the Si-containing film can be formed on the substrate following the oxide removal step without exposing the substrate to ambient air or other oxygen-containing ambients.
- the oxide removal steps and the subsequent formation of a film on the clean substrate may be performed in the same processing system or in a single processing tool containing a plurality of processing systems. These two approaches avoid exposure of the cleaned substrate to air prior to film formation, thereby forming a high quality substrate/film interface without formation of a new oxide layer.
- FIG. 1 illustrates a simplified block diagram of a batch processing system configured for processing a substrate according to an embodiment of the invention.
- the batch processing system 1 contains a process chamber 10 and a process tube 25 that has an upper end 23 connected to an exhaust pipe 80, and a lower end 24 hermetically joined to a lid 27 of cylindrical manifold 2.
- the exhaust pipe 80 discharges gases from the process tube 25 to a vacuum pumping system 88 to maintain a pre-determined atmospheric or below atmospheric pressure in the processing system 1.
- a substrate holder 35 for holding a plurality of substrates (wafers) 40 in a tier-like manner (in respective horizontal planes at vertical intervals) is placed in the process tube 25.
- the substrate holder 35 resides on a turntable 26 that is mounted on a rotating shaft 21 penetrating the lid 27 and driven by a motor 28.
- the turntable 26 can be rotated during processing to improve overall oxide etch uniformity and/or deposited film uniformity or, alternately, the turntable can be stationary during processing.
- the lid 27 is mounted on an elevator 22 for transferring the substrate holder 35 in and out of the process tube 25. When the lid 27 is positioned at its uppermost position, the lid 27 is configured to close the open end of the manifold 2.
- a gas delivery system 97 is configured to introduce gases into the process chamber 10.
- a plurality of gas supply lines can be arranged around the manifold 2 to supply a plurality of gases into the process tube 25 through the gas supply lines.
- the gas supply line 45 is connected to a first gas source 94.
- the first gas source 94 can supply gases for processing the substrates 40, including a first etching gas containing F 2 , a second etching gas containing H 2 , and gases for forming films (e.g., Si-containing gases for depositing Si-containing films) onto the substrates 40.
- one or more of the gases can be supplied from the (remote) plasma source 95 that is operatively coupled to a second gas source 96 and to the process chamber 10 by the gas supply line 45.
- the plasma-excited gas is introduced into the process tube 25 by the gas supply line 45.
- the plasma source 95 can, for example, be a microwave plasma source, a radio frequency (RF) plasma source, or a plasma source powered by light radiation.
- the microwave power can be between about 500 Watts (W) and about 5,000 W. Examples of microwave frequencies that could be used are 2.45 GHz or 8.3 GHz.
- the remote plasma source can be a Downstream Plasma Source Type AX7610, manufactured by MKS Instruments, Wilmington, Massachusetts, USA.
- a cylindrical heat reflector 30 is disposed so as to cover the reaction tube 25.
- the heat reflector 30 has a mirror-finished inner surface to suppress dissipation of radiation heat radiated by a main heater 20, a bottom heater 65, a top heater 15, and an exhaust pipe heater 70.
- a helical cooling water passage (not shown) is formed in the wall of the process chamber 10 as a cooling medium passage.
- the heaters 20, 65, and 15 can, for example, maintain the temperature of the substrates 40 between about 20 0 C and about 900 0 C.
- the vacuum pumping system 88 comprises a vacuum pump 86, a trap 84, and an automatic pressure controller (APC) 82.
- the vacuum pump 86 can, for example, include a dry vacuum pump capable of a pumping speed up to 20,000 liters per second (and greater).
- gases can be introduced into the process chamber 10 via the gas supply line 45 of the gas delivery system 97 and the process pressure can be adjusted by the APC 82.
- the trap 84 can collect unreacted process materials and by-products from the process chamber 10.
- the process monitoring system 92 comprises a sensor 75 capable of realtime process monitoring and can, for example, include a mass spectrometer (MS), a Fourier Transform Infrared (FTIR) spectrometer, or a particle counter.
- MS mass spectrometer
- FTIR Fourier Transform Infrared
- a controller 90 includes a microprocessor, a memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to the processing system 1 as well as monitor outputs from the processing system 1. Moreover, the controller 90 is coupled to, and can exchange information with, gas delivery system 97, motor 28, process monitoring system 92, heaters 20, 15, 65, and 70, and vacuum pumping system 88.
- the controller 90 may be implemented as a DELL PRECISION WORKSTATION 610TM.
- the controller 90 may also be implemented as a general purpose computer, processor, digital signal processor, etc., which causes a substrate processing apparatus to perform a portion or all of the processing steps of the invention in response to the controller 90 executing one or more sequences of one or more instructions stored in a computer readable medium.
- the computer readable medium or memory is configured to hold instructions programmed according to the teachings of the invention and to store data structures, tables, records, or other data described herein.
- Examples of computer. readable media are compact discs, hard disks, floppy disks, tape, magneto-optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave (described below), or any other medium from which a computer can read.
- the controller 90 may be locally located relative to the processing system 1 , or it may be remotely located relative to the processing system 1 via the internet or an intranet. Thus, the controller 90 can exchange data with the processing system 1 using at least one of a direct connection, an intranet, and the internet.
- the controller 90 may be coupled to an intranet at a customer site (i.e., a device maker, etc.), or coupled to an intranet at a vendor site (i.e., an equipment manufacturer).
- another computer i.e., controller, server, etc.
- controller 90 can access controller 90 to exchange data via at least one of a direct connection, an intranet, and the internet.
- the batch processing system 1 depicted in FIG. 1 is shown for exemplary purposes only, as many variations of the specific hardware can be used to practice the present invention, and these variations will be readily apparent to one having ordinary skill in the art.
- the processing system 1 in FIG. 1 can, for example, process substrates of any size, such as 200 mm substrates, 300 mm substrates, or even larger substrates.
- the processing system 1 can simultaneously process from one substrate up to about 200 substrates, or more. Alternatively, the processing system can simultaneously process up to about 25 substrates.
- the substrate can, for example, be a semiconductor substrate, such as a Si substrate, a SiGe substrate, a Ge substrate, a glass substrate, a LCD substrate, or a compound semiconductor substrate, and can include numerous active devices and/or isolation regions. Furthermore, the substrate can contain vias or trenches or combinations thereof. [0037] Reference will now be made to FIGS. 2A and 2B.
- FIG.2A illustrates a flow diagram for oxide removal from a substrate in a process chamber according to an embodiment of the invention.
- FIG. 2B illustrates the variation in substrate temperature as a function of processing time for oxide removal from a substrate and subsequent deposition of a film onto the substrate according to an embodiment of the invention.
- FIG.2A illustrates a flow diagram for oxide removal from a substrate in a process chamber according to an embodiment of the invention.
- FIG. 2B illustrates the variation in substrate temperature as a function of processing time for oxide removal from a substrate and subsequent deposition of a film onto the substrate according to an embodiment of the invention.
- the process 200 includes, in step 202, providing a substrate in a process chamber of a processing system where the substrate has an oxide layer formed thereon.
- the processing system can, for example, be the batch processing system 1 depicted in FIG. 1 capable of processing at least one substrate simultaneously.
- the processing system can be a single wafer processing system.
- the oxide layer can be a native oxide layer that is 1-3 angstrom thick and is formed by exposing the substrate to air following H 2 ⁇ :HF wet cleaning.
- the oxide layer can be thicker than 1-3 angstrom, for example up to about 10 angstrom, or even thicker.
- the presence of the oxide layer on the substrate can, if not removed, inhibit formation of a proper Si- containing seed (nucleation) film and thereby affect deposition of a Si-containing film on the substrate.
- T 1 can be about 400 0 C, or lower, to reduce process damage, such as etch damage to the substrate or to other materials on the substrate.
- the time period ti is a transition step and can, for example, be between about 2 min and about 15 min, but this is not required in embodiments of the invention.
- the substrate is exposed to a flow of a first etching gas containing F 2 gas at the first substrate temperature T 1 to partially remove the oxide layer from the substrate, thereby leaving an oxide layer with a reduced thickness on the substrate.
- the first substrate temperature Ti can be selected in consideration of efficient removal of the oxide layer from the substrate while minimizing damage such as etching of the substrate material or other materials formed on the substrate material from F 2 in the first etching gas. For example, where substrate etching is of little concern, then Ti may include or approach 400 0 C. However, when substrate damage is a concern, the substrate temperature Ti can be much lower, although the etch rate may also be lowered.
- Exemplary run times for the F 2 native oxide removal are between about 15 min and about 30 min at 300 0 C, or about 90 min at 200 0 C.
- the first substrate temperature can be between about 20 0 C and about 40O 0 C, or between about 200°C and about 400°C, or between about 300 0 C and about 400 0 C.
- the F 2 process can be monitored to determine an endpoint of this process.
- Such monitoring can be indirect monitoring based on known etch rate and initial oxide thickness.
- the processing chamber and/or substrate can be directly monitored to determine an end point for step 204.
- Direct monitoring may, for example, include detecting an oxygen and/or F 2 signal by mass spectroscopy.
- the oxygen signal from oxide removal should taper when the oxide is almost removed, which can be used to decide an endpoint of the F 2 process.
- the precise amount of oxygen and/or F 2 to determine endpoint may be determined by Design of Experiment (DOE).
- DOE Design of Experiment
- the substrate has other areas of thick oxides, then the oxygen signal due to the thin oxide being removed may be "masked" or buried by the signal of the thick oxide.
- Step 204 is performed until the amount of oxide remaining on the substrate is small enough that further removal using F 2 can damage the substrate.
- the processing conditions for the first oxide removal step 204 can include a gas pressure between about 0.1 Torr and about 100 Torr in the process chamber. Alternatively, the gas pressure can be between about 1 Torr and about 10 Torr in the process chamber.
- the etching gas for the oxide removal step contains F 2 gas and can further contain an inert gas.
- the inert gas can, for example, contain N 2 , argon (Ar), helium (He), neon (Ne), krypton (Kr), or xenon (Xe), or a combination of two or more thereof.
- the etching gas contains F 2 gas, an inert gas, and a reducing gas.
- the reducing gas can, for example, contain H 2 , H, or NH 3 , or other hydrogen-containing gases.
- the reducing gas can aid in the decomposition of F 2 on the substrate at low substrate temperature.
- the reducing gas can be plasma-excited in a remote plasma source.
- a gas flow rate between about 0.010 standard liters per minute (slm) and about 20 slm can be used for the etching gas.
- the inert gas can be used to control the concentration of F 2 in the first etching gas.
- the F 2 etchant gas is diluted to 20% F 2 and 80% N 2 from a gas source.
- the mixture may be diluted to provide from 3 - 20% F 2 , with the remaining gas N 2 .
- Exemplary compositions and flows of the etching gas include 8.8 slm N 2 and 0.2 slm F 2 (8 slm N 2 + 1 slm of 20% F 2 in N 2 ), and 8.6 slm N 2 and 0.4 slm F 2 (7 slm N 2 + 2 slm of 20% F 2 in N 2 ), but embodiments of the invention are not limited to those compositions and gas flows.
- time period fe is a transition step and may be variable in length depending on system design and processing temperature differences between the first oxide removal step 204 at substrate temperature Ti and the substrate temperature T 2 .
- the time period ⁇ can, for example, be between about 5 min and about 45 min, but this is not required in embodiments of the invention.
- the second substrate temperature T 2 can be between about 200 0 C and less than 900 0 C. According to another embodiment of the invention, the second substrate temperature T 2 can be between about 700 0 C and less than 900 0 C. According to yet another embodiment of the invention, the second substrate temperature T 2 can be between about 850 0 C and less than 900 0 C. Finally, as noted above, in some instances the temperature T 2 may be equal to or above 900 0 C, for example 900 0 C - 1100 0 C, where the substrate's exposure to this temperature is less than 15 min., more preferably less than 5 min. for example.
- step 208 during time period U, the substrate is exposed to a flow of a second etching gas containing H 2 gas at the second substrate temperature T 2 to further remove the oxide layer from the substrate.
- the second substrate temperature T 2 can be selected in consideration of the overall thermal budget and/or to allow efficient further removal of the oxide layer from the substrate while minimizing damage such as etching of the substrate material or other materials formed on the substrate material. For example, where a thermal budget allows for higher temperatures and substrate etching is of little concern, then T 2 may approach 900 0 C. However, with lower thermal budgets or when substrate damage is a concern, the substrate temperature T 2 can be lower, although the etch rate may also be lowered. Exemplary run times for the oxide removal in step 208 are between about 15 min and about 30 min at substrate temperatures between about 800 0 C and about 850°C.
- the processing conditions for the second oxide removal step 206 can include a gas pressure between about 0.1 Torr and about 100 Torr in the process chamber.
- the gas pressure can be between about 1 Torr and about 10 Torr, for example 5 Torr, in the process chamber.
- the second etching gas may consist of undiluted H 2 or, alternately, H 2 may be diluted with an inert gas from a gas source.
- the inert gas can, for example, contain N 2 , argon (Ar), helium (He), neon (Ne), krypton (Kr), or xenon (Xe), or a combination of two or more thereof.
- a gas flow rate between about 0.010 standard liters per minute (slm) and about 20 slm, for example about 4.5 slm can be used for the second etching gas.
- the inert gas can be used to control the concentration of H 2 in the second etching gas.
- the substrate may be further processed to form a semiconductor device.
- a film may be formed on the substrate following the oxide layer removal step 208, where the substrate temperature is first adjusted during time period t 5 from the second substrate temperature T 2 to a third substrate temperature T 3 lower than the second substrate temperature T 2 .
- Time period t 5 is a transition step and may be variable in length depending on system design and processing temperature differences between the oxide removal step 208 at substrate temperature T 2 and the substrate temperature T 3 .
- the time period t3 can, for example, be between about 5 min and about 45 min, but this is not required in embodiments of the invention.
- the third substrate temperature T 3 when depositing a Si-containing film on the substrate, can be between about 650 0 C and about 750 0 C. According to another embodiment of the invention, the third substrate temperature T 3 can be between about 750 0 C and about 850 0 C.
- the film may be formed on the substrate following the removal of the oxide layer in step 208 without exposing the substrate to ambient air that can form a new oxide layer on the substrate.
- the film can be a Si-containing film that is formed on the substrate by exposing the substrate to a gas containing a Si- containing gas, for example, SiH 4 , SiCI 4 , Si 2 H ⁇ , SiHaCb, or Si 2 CIe, or a combination of two or more thereof.
- the Si-containing gas can further contain a germanium-containing gas, including, for example, GeH 4 , GeCI 4 , or a combination thereof, for depositing a SiGe film on the substrate.
- the film may be a Ge film deposited from a germanium- containing gas.
- the deposited film can, for example, be an epitaxial Si film where the crystal lattice of a crystalline Si substrate is extended through growth of a new Si film.
- the deposited film can be a poly-Si film or an amorphous Si film.
- the deposited film can be SiGe film.
- the film may be a strained Si film deposited onto a SiGe film.
- the Si-containing film can be formed by providing a Si- containing gas from a non-plasma gas source such as the gas source 94 in FIG. 1.
- Time period t 6 is a film forming step and generally depends on the desired film thickness. For many applications with film thickness less than about 500 angstrom, the time period t 6 can be less than about one hour.
- the film can be a high-k film, for example Ta 2 O 5 , TiO 2 , AI 2 O 3 , Y 2 O 3 , HfSiO x , HfO 2 , HfSiO x Ny, ZrO 2 , ZrSiO x , TaSiO x , ZrSiO x Ny 1 SrO x , SrSiO x , LaO x , LaSiO x , YO x , or YSiO x .
- the third substrate temperature T 3 can be between about 200 0 C and about 600 0 C.
- the third substrate temperature T 3 can be between about 400 0 C and about 500 0 C.
- flow of the deposition gas is stopped, the substrate is allowed to cool down during time period t 7 , and the substrate may subsequently be removed from the process chamber or further processed in the process chamber.
- the time period t 7 is a transition step and may be variable in length.
- Time period t ⁇ can, for example, be between about 2 min and about 15 min, but this is not required in embodiments of the invention.
- purging steps may be performed in between the steps of the process 200.
- the process chamber may be purged during time periods ti, t 3 , t 5 , t 7 to keep the substrate surface clean.
- the purge gas can, for example, contain H 2 , an inert gas such as N 2 , or a noble gas.
- one or more of the purge steps may be replaced or complemented with pump down steps where no purge gas is flowed.
- FIGS. 3A - 3C illustrate SIMS depth profiles of poly-Si films deposited onto Si substrates with and without oxide removal according to an embodiment of the invention.
- Comparison of the depth profiles for the differently prepared substrates allows for evaluating oxide removal steps, since the poly-Si films prevent further oxidation of the interface between the Si substrate and the poly-Si films following the poly-Si film deposition.
- the as-received Si substrates were first cleaned ex- situ (outside the process chamber) using standard HF wet cleaning and thereafter the Si substrates were transferred to the process chamber for oxide removal and poly-Si deposition.
- FIG. 3A illustrates SIMS depth profile of a poly-Si film deposited onto a HF- cleaned substrate, where silicon (Si) signal 302, oxygen (O) signal 304, and carbon (C) signal 306 were monitored.
- the O signal 304 corresponds to an O surface coverage of about 9.6x10 14 atoms/cm 2 or a SiO 2 layer with a thickness of about 2 angstrom or about one monolayer of oxide. This demonstrates the sensitivity of SIMS depth profiling.
- the thickness of a native oxide layer on as- received (before HaOiHF cleaning) Si substrates is commonly between about 10 - 15 angstrom and the thin oxide layer (about 2 angstrom thick) shown in FIG. 3A was formed during transfer of the HaOrHF cleaned Si substrate in air to the process chamber.
- FIG. 3B shows a SIMS depth profile of a poly-Si film deposited onto a substrate that was H 2 OrHF cleaned and further cleaned in the process chamber.
- a native oxide layer was partially removed from the Si substrate ⁇ n-situ using an etching gas containing F2 prior to deposition of the poly-Si film.
- the etching gas contained 8 slm N2 + 1 slm of 20% F 2 in N2, the substrate temperature was 300 0 C, the process chamber pressure was 1 Torr, and the oxide removal process was carried out for 30 min.
- Si signal 312, O signal 314, C signal 316, and F signal 318 signals were monitored in FIG.
- the O signal 314 corresponds to an O surface coverage of about 0.24 x10 14 atoms/cm 2 or an SiO 2 layer with a thickness of about 0.05 angstrom. It is contemplated that the O surface coverage (and thus the average S1O 2 thickness) can be further reduced by utilizing a higher purity etching gas.
- Comparison of the depth profiles shown in FIGS. 3A and 3B demonstrates that the use of an etching gas containing F 2 results in effective partial removal of an oxide layer at a low substrate temperature but F-containing impurities can be left on the substrate surface following the F 2 exposure as illustrated by the F signal 318.
- FIG. 3C shows a SIMS depth profile of a poly-Si film deposited onto a substrate that was H 2 ⁇ :HF cleaned and further cleaned in the process chamber according to embodiments of the invention.
- a native oxide layer was partially removed from the Si substrate using a first etching gas containing F 2 .
- the first etching gas contained 8 slm N 2 + 1 slm of 20% F 2 in N 2
- the substrate temperature was 300 0 C
- the process chamber pressure was 1 Torr
- the oxide removal process was carried out for 15 min.
- the native oxide layer was further removed from the Si substrate using a second etching gas containing H 2
- the substrate temperature was 850 0 C
- the oxide removal process was carried out for 15min.
- the Si signal 322, O signal 324, C signal 326, and F signal 328 in FIG. 3C show that any remaining native oxide and F-containing impurities from the exposure to the first etching gas were fully removed by the second etching gas. It is believed that the C signal 326 originates from exposure to organic material in air during transfer of the substrate from the H 2 OrHF bath to the process chamber. The C signal 326 may be used to indicate the location of the interface between the poly-Si film and the substrate.
- FIGS.4A- 4D schematically illustrate oxide removal from a patterned structure and subsequent deposition of a Si-containing film onto the patterned structure according to an embodiment of the invention.
- FIG.4A illustrates a patterned structure 400 containing a substrate 410, a patterned film 420, and oxide layers 440 formed on the substrate 410 in the openings 430.
- the patterned film 420 may also contain an oxide layer.
- the patterned film 420 can, for example, be a dielectric film such as a SiO 2 film, a SiON film, a low-k film, or a high-k film.
- the openings 430 can, for example, be vias or trenches, or combinations thereof.
- the patterned structure 400 is an exemplary structure used in the device manufacturing and can contain a Si substrate 410 and an overlying photolithographically patterned film 420.
- FIG. 4B illustrates the patterned structure 400 following removal of the oxide layers 440 from the openings 430 according to embodiments of the invention as described above.
- FIG. 4C illustrates the patterned structure 400 following selective deposition of a film 450 onto the exposed portion of the substrate 410 according to embodiments of the invention.
- the selectively deposited film 450 can, for example, be an epitaxial Si film deposited on a crystalline Si substrate 410.
- the epitaxial Si film 450 can, for example, be selectively deposited on the exposed portion of the Si substrate 410, using, for example, a gas containing Si 2 CIe (HCD), a substrate temperature of between about 750°C and about 850 0 C, for example at about 800 0 C.
- HCD gas containing Si 2 CIe
- the selective deposition of the epitaxial Si-containing film 450 allows for subsequent removal of the patterned film 420 from the Si substrate 410 using methods known to those skilled in the art, to form a raised epitaxial Si-containing film 450 on the Si substrate 410.
- the patterned film 420 can include an oxide mask (e.g., SiOa) and a nitride mask (e.g., Si3N_t).
- Si-containing films can be used for manufacturing silicon- on-insulator (SOI) devices with raised source and drain regions.
- SOI silicon- on-insulator
- processing may consume an entire Si film in source and drain regions, thereby requiring extra Si in these regions that can be provided by selective epitaxial growth (SEG) of Si-containing films.
- SEG selective epitaxial growth
- Selective epitaxial deposition of Si-containing films can reduce the number of photolithography and etch steps that are needed, which can reduce the overall cost and complexity involved in manufacturing a device.
- FIG. 4D illustrates the patterned structure 400 following non-selective (blanket) deposition of a film 460 onto the patterned structure 400 according to an embodiment of the invention.
- the film 460 can be a Si film.
- the Si film 460 can be deposited on the patterned structure 400 with substantially uniform thickness, regardless of the type of materials comprising the substrate 410 and the patterned film 420.
- a Si film 460 can be formed on the patterned structure 400 using a process gas containing Si2CI 6 , a substrate temperature between about 550 0 C and about 750 0 C.
- a process gas containing Si 2 Cl ⁇ and SiH 4 may be used.
- the crystal structure of the deposited Si films can be a function of processing conditions, including substrate temperature, process pressure, and gas composition.
Landscapes
- Drying Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
- Cleaning Or Drying Semiconductors (AREA)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009502775A JP5638238B2 (ja) | 2006-03-31 | 2007-01-30 | フッ素及び水素を使用する順次の酸化物の取り除き |
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| Application Number | Priority Date | Filing Date | Title |
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| US11/393,736 | 2006-03-31 | ||
| US11/393,736 US7501349B2 (en) | 2006-03-31 | 2006-03-31 | Sequential oxide removal using fluorine and hydrogen |
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| PCT/US2007/002373 Ceased WO2007126460A1 (en) | 2006-03-31 | 2007-01-30 | Sequential oxide removal using fluorine and hydrogen |
Country Status (4)
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| US (1) | US7501349B2 (https=) |
| JP (2) | JP5638238B2 (https=) |
| TW (1) | TWI343079B (https=) |
| WO (1) | WO2007126460A1 (https=) |
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| DE3822947A1 (de) | 1988-07-07 | 1990-01-11 | Wilkinson Sword Gmbh | Spendersystem fuer rasierklingeneinheiten |
| US7780862B2 (en) * | 2006-03-21 | 2010-08-24 | Applied Materials, Inc. | Device and method for etching flash memory gate stacks comprising high-k dielectric |
| US8722547B2 (en) * | 2006-04-20 | 2014-05-13 | Applied Materials, Inc. | Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistries |
| US7628866B2 (en) * | 2006-11-23 | 2009-12-08 | United Microelectronics Corp. | Method of cleaning wafer after etching process |
| JP2008258349A (ja) * | 2007-04-04 | 2008-10-23 | Nec Electronics Corp | 半導体装置の製造方法 |
| KR20130092574A (ko) * | 2010-08-04 | 2013-08-20 | 어플라이드 머티어리얼스, 인코포레이티드 | 기판 표면으로부터 오염물들 및 자연 산화물들을 제거하는 방법 |
| US9437449B2 (en) * | 2012-12-31 | 2016-09-06 | Texas Instruments Incorporated | Uniform, damage free nitride etch |
| US20140186544A1 (en) * | 2013-01-02 | 2014-07-03 | Applied Materials, Inc. | Metal processing using high density plasma |
| JP2014189442A (ja) * | 2013-03-27 | 2014-10-06 | Sumitomo Electric Ind Ltd | 炭化珪素半導体基板の製造方法 |
| US8975706B2 (en) | 2013-08-06 | 2015-03-10 | Intermolecular, Inc. | Gate stacks including TaXSiYO for MOSFETS |
| KR102245729B1 (ko) | 2013-08-09 | 2021-04-28 | 어플라이드 머티어리얼스, 인코포레이티드 | 에피택셜 성장 이전에 기판 표면을 사전 세정하기 위한 방법 및 장치 |
| US8945414B1 (en) | 2013-11-13 | 2015-02-03 | Intermolecular, Inc. | Oxide removal by remote plasma treatment with fluorine and oxygen radicals |
| US9653291B2 (en) * | 2014-11-13 | 2017-05-16 | Applied Materials, Inc. | Method for removing native oxide and residue from a III-V group containing surface |
| WO2018052477A2 (en) * | 2016-09-15 | 2018-03-22 | Applied Materials, Inc. | An integrated method for wafer outgassing reduction |
| JP7373302B2 (ja) * | 2019-05-15 | 2023-11-02 | 株式会社Screenホールディングス | 基板処理装置 |
| US12272558B2 (en) * | 2022-05-09 | 2025-04-08 | Tokyo Electron Limited | Selective and isotropic etch of silicon over silicon-germanium alloys and dielectrics; via new chemistry and surface modification |
| CN115458409A (zh) * | 2022-08-25 | 2022-12-09 | 上海华力集成电路制造有限公司 | 一种SiGe沟道的形成方法 |
| CN117802582B (zh) * | 2024-03-01 | 2024-08-06 | 浙江求是半导体设备有限公司 | 外延炉清洗方法和N型SiC的制备方法 |
| CN120977894A (zh) * | 2024-05-15 | 2025-11-18 | 盛美半导体设备(上海)股份有限公司 | 种子层预处理装置及方法、基板处理设备 |
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- 2007-01-30 JP JP2009502775A patent/JP5638238B2/ja not_active Expired - Fee Related
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| US20030109095A1 (en) * | 1999-07-14 | 2003-06-12 | Seh America, Inc. | Growth of epitaxial semiconductor material with improved crystallographic properties |
| US6667489B2 (en) * | 2001-11-29 | 2003-12-23 | Hitachi, Ltd. | Heterojunction bipolar transistor and method for production thereof |
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Also Published As
| Publication number | Publication date |
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| JP5638238B2 (ja) | 2014-12-10 |
| TW200737346A (en) | 2007-10-01 |
| JP2014053643A (ja) | 2014-03-20 |
| JP2009532860A (ja) | 2009-09-10 |
| TWI343079B (en) | 2011-06-01 |
| US7501349B2 (en) | 2009-03-10 |
| US20070238302A1 (en) | 2007-10-11 |
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