Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
  • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
  • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
  • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
  • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
  • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
  • H05B45/30—Driver circuits
  • H05B45/37—Converter circuits
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
  • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
  • H05B45/40—Details of LED load circuits
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
  • H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
  • H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
  • H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
  • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
  • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
  • H01L2224/37001—Core members of the connector
  • H01L2224/37099—Material
  • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
  • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
  • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
  • H01L2224/401—Disposition
  • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
  • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
  • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
  • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/0001—Technical content checked by a classifier
  • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/12—Passive devices, e.g. 2 terminal devices
  • H01L2924/1204—Optical Diode
  • H01L2924/12041—LED
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
  • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
  • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
  • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

• the present invention relates to an AC light emitting device, and more particularly, to an AC light emitting device with a bridge rectifying circuit formed therein.
• a conventional AC light emitting device comprises first and second light emitting cell blocks 1200a and 1200b, each of which has a plurality of light emitting cells connected in series on a substrate 1000.
• the first and second light emitting cell blocks 1200a and 1200b are arrayed in two lines from both electrodes 1600a and 1600b in different directions, i.e., connected in reverse parallel.
• another conventional AC light emitting device comprises a bridge rectifying circuit having a light emitting cell block 1200 and four diodes 1400.
• the conventional reverse parallel light emitting device as shown in Fig. 1 does not comprise a rectifying circuit.
• the first and second light emitting cell blocks 1200a and 1200b are alternately turned on/off. Since only any one of the first and second light emitting cell blocks 1200a and 1200b is turned on in such a conventional reverse parallel light emitting device, there is a problem in that the light emitting efficiency per unit area is low.
• the present invention is conceived to solve the aforementioned problems in the prior art.
• An object of the present invention is to provide a light emitting device having a bridge rectifying circuit, which can effectively enhance the reliability of operation and/or the luminance by controlling the size and/or number of diodes provided in the bridge rectifying circuit.
• Another object of the present invention is to provide a light emitting device having a bridge rectifying circuit, which can enhance the reliability of operation and/or the luminance by setting the size of diodes and controlling the number of the diodes under the set size thereof.
• a light emitting device comprises a light emitting cell block having a plurality of light emitting cells; and a bridge rectifying circuit connected to input and output terminals of the light emitting cell block, wherein the bridge rectifying circuit includes a plurality of diodes between nodes.
• the number of the plurality of diodes is preferably 100 to 200% of that of the light emitting cells within the light emitting cell block, more preferably, 100 to 130% thereof.
• each diode is preferably 80% or less of that of the light emitting cell.
• the light emitting cell block and the bridge rectifying circuit are preferably formed on the same substrate.
• At least one light emitting diode is preferably included in the plurality of diodes.
• the plurality of diodes included in the bridge rectifying circuit are arrayed to surround the light emitting cell block. More preferably, at least two electrodes constituting each of the nodes are positioned within the array of the plurality of diodes.
• the entire shape of the light emitting device is a quadrangle.
• the reliability of operation and the luminance of the AC light emitting device can be enhanced by controlling the size and number of diodes provided in a bridge rectifying circuit. Further, the luminance and the reliability of the light emitting device can be greatly enhanced by setting the size of diodes to be less than a certain size and controlling the number of diodes.
• FIG. 1 is a conceptual view of a conventional reverse parallel light emitting device.
• FIG. 2 is a conceptual view of a conventional light emitting device with a bridge rectifying circuit formed therein.
• FIG. 3 is a plan view of a light emitting device according to the present invention.
• Fig. 4 is an equivalent circuit diagram of the light emitting device according to the present invention.
• FIGs. 5 to 7 are views illustrating a method of manufacturing the light emitting device according to the present invention.
• Substrate 120 Bridge rectifying circuit
• 121 Diode 140: Light emitting cell block
• Fig. 3 is a plan view of a light emitting device according to the present invention
• Fig. 4 is an equivalent circuit diagram of Fig. 3.
• the light emitting device comprises a substrate 100, a light emitting cell block 140, a bridge rectifying circuit 120 and wires 260.
• the light emitting cell block 140 is provided on the substrate 100 and comprises a plurality of light emitting cells 141 connected in series.
• the bridge rectifying circuit 120 is provided on the substrate 100 and comprises a plurality of diodes 121 surrounding a peripheral portion of the light emitting cell block 140.
• the light emitting cell block 140 and the bridge rectifying circuit 120 are connected through the wires 260.
• the light emitting device may further comprise electrodes 160 for applying external power to the bridge rectifying circuit 120 and applying a normal application current rectified into a DC by the bridge rectifying circuit 120 to the light emitting cell block 140.
• the light emitting cell block 140 comprises a plurality of light emitting cells 141 as a main light emitting source for emitting light when external power is applied thereto.
• the light emitting cell block 140 is formed at an approximately central region of the substrate 100 in order to increase the luminance of the light emitting device.
• the width and length of each light emitting cell 141 is about 50 to 500D
• the plurality of diodes 121 constitutes the bridge rectifying circuit 120 for rectifying AC power applied from the outside to have a normal application sine wave.
• Light emitting diodes as well as general diodes may be used as the plurality of diodes 121.
• the plurality of diodes 121 are provided between respective nodes in the bridge rectifying circuit 120. That is, the bridge rectifying circuit 120 comprises first, second, third and fourth diode blocks 120a, 120b, 120c and 12Od, each of which is a set of the diodes 121. At this time, since the bridge rectifying circuit 120 allows light to be emitted from two of the four diode blocks, it has a less influence on the luminance of the entire light emitting device than the light emitting cell block 140.
• each diode 121 is set to be 80% or less of that of the light emitting cell 141, so that a large number of the light emitting cells 141 can be formed on the substrate 100 of which the size is limited, and the increase in number of the light emitting cells 141 enhances the luminance of the entire light emitting device. Further, since the bridge rectifying circuit 120 has an amount of light less than the light emitting cell block 140 but always emits the light from two of the four diode blocks, the luminance of the light emitting device can be enhanced.
• the number of the diodes 121 is larger than that of light emitting cells 141, for example, roughly 100 to 130% or so of the number of the light emitting cells 141, the breakdown of the diode 121 can be effectively prevented when a reverse bias voltage is applied to the light emitting device.
• the influence on the entire light emitting efficiency is relatively small although the size of each diode 121 is maintained to be relatively small, the proper light emitting efficiency of the light emitting device can be maintained.
• the number of the diodes 121 is excessively larger than that of light emitting cells 141, the light emitting efficiency of the light emitting device may be reduced, and the power consumption may be increased by excessive increase of the driving voltage for the light emitting cell.
• the number of the diodes 121 do not exceed 200% of that of the light emitting cells 141.
• the wires 260 which are used to connect the light emitting cells 141 and the diodes
• the wires 260 are generally formed of Al or Au.
• the wires 260 may be formed through a bridge process, a step coverage process, a general wire bonding process or the like.
• FIG. 4 is an equivalent circuit diagram of Fig. 3.
• the second and third diode blocks 120b and 120c are in a turned-on state and the first and fourth diode blocks 120a and 12Od are in a turned-off state when a forward voltage is applied.
• the first diode block 120a is reverse biased with respect to a current applied to the first electrode 160a, the current does not flow through the first diode block but flows through the second diode block 120b.
• the fourth diode block 12Od is reverse biased with respect to a current flowing through the second diode block 120b, the current flows through the light emitting cell block 140. Thereafter, the current applied to the light emitting cell block 140 flows out to the third diode block 120c.
• the first and fourth diode blocks 120a and 12Od are in a turned-on state and the second and third diode blocks 120b and 120c are in a turned-off state.
• the applied current does not flows through the third diode block 120c but flows through the fourth diode block 12Od.
• the second diode block 120b is reverse biased with respect to the current flowing through the fourth diode block 12Od, the current passes through the second electrode 160b and flows through the light emitting cell bock 140. Thereafter, the current flows out to the first diode block 120a.
• the second and third diode blocks 120b and 120c are turned on to prevent a reverse voltage from flowing therethrough when a forward voltage is applied, while the first and fourth diode blocks 120a and 12Od are turned on to convert a reverse voltage into a forward voltage when the reverse voltage is applied. Accordingly, the externally applied AC voltage is full- wave rectified.
• a method of manufacturing the aforementioned light emitting device will be discussed below with reference to Figs. 5 to 7.
• an undoped GaN layer (not shown), as a buffer layer is formed on the substrate 100.
• An N-type semiconductor layer 200, an active layer 220 and a P-type semiconductor layer 240 are sequentially crystal-grown on the buffer layer (Fig. 5).
• a transparent electrode layer (not shown) may be further formed on the P-type semiconductor layer 240.
• the respective layers are formed through various deposition methods for depositing the aforementioned materials.
• the respective cells are electrically isolated from one another by performing a photo-etching process using a mask such that the substrate 100 is exposed (Fig. 6). That is, the substrate 100 is exposed by removing portions of the P- type semiconductor layer 240, the active layer 220 and the N-type semiconductor layer 200 through an etching process using the mask as an etching mask.
• the mask is formed of photoresist, and the light emitting cells 141, each of which has the width and length of 50 to 500D, are formed in the central region of the substrate 100.
• the diodes 121 surrounding the light emitting cells 141 are formed in the shape of a square or rectangle with the size of each diode 121 being 80% or less of that of the light emitting cell 141.
• the diodes 121 are formed such that the number thereof is larger than that of the light emitting cells 141, preferably, 100 to 200% of that of the light emitting cells 141.
• the diodes be formed such that the number thereof is 120 to 130% of that of the light emitting cells 141 in consideration of the luminance of a light emitting device as against loss.
• a wet or dry etching process may be performed as the etching process.
• a plasma assisted dry etching is performed in this embodiment.
• the P-type semiconductor layer 240 and the active layer 220 are etched such that the N-type semiconductor layer 200 for each light emitting cell is exposed.
• the etching process may be performed using a single mask as described above, etching processes may be performed using different masks from each other. That is, a first etching process of exposing the substrate 100 may be performed using a first mask, and then, a second etching process of exposing predetermined regions of the P-type semiconductor layer 240 and the active layer 220 may be performed using a second mask so as to expose the N-type semiconductor layer 200.
• N-electrodes are formed on the exposed N- type semiconductor layer 200, and P-electrodes (not shown) are formed on the P-type semiconductor layer 240.
• the present invention is not limited thereto but may be variously modified.
• a light emitting device may be manufactured by mounting separately manufactured unit elements on a substrate.
• the light emitting cells 141 and the diodes 121 are formed on a quadrangular substrate and the entire shape of the light emitting device is a quadrangle, the present invention is not limited thereto but may be a rhombus.
• the light emitting device may be manufactured in various shapes according to use of light emitting devices and convenience of manufacture. Industrial Applicability

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• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Led Devices (AREA)
• Non-Portable Lighting Devices Or Systems Thereof (AREA)

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• 2005
  • 2005-12-16 KR KR20050124882A patent/KR100968843B1/ko not_active Expired - Fee Related
• 2006
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