WO2007032057A1 - 半導体装置の製造方法及び半導体製造装置 - Google Patents
半導体装置の製造方法及び半導体製造装置 Download PDFInfo
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- WO2007032057A1 WO2007032057A1 PCT/JP2005/016805 JP2005016805W WO2007032057A1 WO 2007032057 A1 WO2007032057 A1 WO 2007032057A1 JP 2005016805 W JP2005016805 W JP 2005016805W WO 2007032057 A1 WO2007032057 A1 WO 2007032057A1
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- 239000004065 semiconductor Substances 0.000 title claims description 80
- 238000000034 method Methods 0.000 title claims description 33
- 230000008569 process Effects 0.000 title claims description 11
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 59
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 52
- 239000001257 hydrogen Substances 0.000 claims abstract description 52
- 239000011261 inert gas Substances 0.000 claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 claims description 59
- 239000007789 gas Substances 0.000 claims description 35
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 27
- 229910052760 oxygen Inorganic materials 0.000 claims description 27
- 239000001301 oxygen Substances 0.000 claims description 27
- 229910052710 silicon Inorganic materials 0.000 claims description 16
- 239000010703 silicon Substances 0.000 claims description 16
- 238000001035 drying Methods 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 5
- 238000003860 storage Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 238000007599 discharging Methods 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 230000006866 deterioration Effects 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 29
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 21
- 238000007254 oxidation reaction Methods 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 12
- 230000003647 oxidation Effects 0.000 description 12
- 230000005669 field effect Effects 0.000 description 9
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 229910052990 silicon hydride Inorganic materials 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000010306 acid treatment Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 230000033116 oxidation-reduction process Effects 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 201000002950 dengue hemorrhagic fever Diseases 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000010301 surface-oxidation reaction Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 2
- 150000001342 alkaline earth metals Chemical class 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000000861 blow drying Methods 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000001444 catalytic combustion detection Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 150000004678 hydrides Chemical class 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 238000002329 infrared spectrum Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910052761 rare earth metal Inorganic materials 0.000 description 2
- 150000002910 rare earth metals Chemical class 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910052723 transition metal Inorganic materials 0.000 description 2
- 150000003624 transition metals Chemical class 0.000 description 2
- 238000004483 ATR-FTIR spectroscopy Methods 0.000 description 1
- -1 Furthermore Substances 0.000 description 1
- 229910008045 Si-Si Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910006411 Si—Si Inorganic materials 0.000 description 1
- XMIJDTGORVPYLW-UHFFFAOYSA-N [SiH2] Chemical compound [SiH2] XMIJDTGORVPYLW-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 239000011146 organic particle Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000010129 solution processing Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
- B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
- B65G2201/00—Indexing codes relating to handling devices, e.g. conveyors, characterised by the type of product or load being conveyed or handled
- B65G2201/02—Articles
- B65G2201/0235—Containers
- B65G2201/0244—Bottles
- B65G2201/0247—Suspended bottles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Definitions
- the present invention relates to a method for holding a hydrogen termination property on a semiconductor surface, an apparatus for performing the holding process, and a product such as a semiconductor device obtained by performing the holding process.
- a manufacturing process of a field effect transistor constituting an integrated circuit formed in a semiconductor region will be described with reference to FIG. 1, taking an n-type field effect transistor having an LDD (Lightly Doped Drain) structure as an example.
- LDD Lightly Doped Drain
- p-type (100) silicon 101 which is a semiconductor substrate, for example, STI (Shallow
- Trench Isolation is used to isolate the element and form the element region 102 (Fig. 1 (a))
- the device region 102 is subjected to pre-oxidation cleaning such as RCA cleaning (FIG. 1 (b)), organic substances, particles and metal impurities are removed, and then rinsed with pure water following dilute hydrofluoric acid treatment.
- the element region 102 is terminated 103 with hydrogen (Fig. 1 (c)).
- a gate insulating film (SiO) 104 is formed (Fig. L (e)).
- a polycrystalline silicon film is deposited on the entire surface of the silicon 101, and this is patterned to form a gate electrode 105 of polycrystalline silicon on the gate insulating film 104 in the element region 102 (FIG. l (g)).
- n_source and drain regions that relax high electric fields by ion implantation of phosphorus at a low concentration
- a silicon oxide film (SiO 2) is formed so as to cover the gate electrode 105 by a CVD method or the like.
- n-type impurities such as arsenic are ion-implanted at a high concentration to form n source and drain regions 108 (Fig. 1 (1)).
- Patent Document 1 The inventors previously pointed out that hydrogen termination in the cleaning process is deteriorated in Patent Document 1, and proposed a solution to the problem.
- the process from the dilute hydrofluoric acid treatment to the hydrogen termination layer 103 to the formation of the gate insulating film 104 is discontinuous.
- the wafer is put into a transfer container, transferred to a gate oxidation processing apparatus, and gate oxidation is performed.
- the wafer is exposed to a CR (clean nolem) atmosphere from drying to gate oxidation.
- the terminal hydrogen 103 formed on the surface of the element region 102 is damaged over time, and surface oxidation proceeds (FIG. 1 (d)).
- the natural oxide film formed on the surface is unevenly formed on the element region 102 and the density of the film itself is low, which is one factor that deteriorates the quality of the gate insulating film 104 formed thereafter. Become.
- Patent Document 1 merely points out deterioration of hydrogen termination in the cleaning process, and does not disclose that hydrogen termination deterioration occurs during vacuum transportation.
- Patent Document 1 Japanese Patent Application Laid-Open No. 2005-51141
- the present invention has been made under such circumstances, and it is an object to provide a more efficient method for maintaining hydrogen termination by clarifying the cause of loss of hydrogen termination during wafer transfer. To do. Furthermore, by maintaining hydrogen termination and suppressing the growth of natural oxide film, A semiconductor device having a highly gate insulating film and a method for manufacturing the same
- the present invention is characterized in that the hydrogen termination property is maintained by exposing the hydrogen termination surface to an inert gas containing hydrogen.
- Figure 2 shows the behavior of the change in the hydrogen-terminated clean room standing time. The measurement was performed using the FTIR-ATR method. Si (100) surface is subjected to FPM treatment (a solution of 0.5% DHF and 0.5% H ⁇ in pure water), followed by N blow drying.
- Silicon Hyde Ride peak is distributed in 2060 ⁇ 2170Cm- 1, a sharp peak at around 2110cm 1 is a peak due to a silicon dihydride.
- the peak intensity of silicon hydride decreases with standing, and disappears completely after standing for one day.
- This peak is a peak generated when oxygen enters the Si back bond of Si—H bond, which means that a Si—O_Si bond is formed.
- the silicon hydride peak area begins to decrease immediately after the start of standing, and almost disappears after 6 hours.
- the hydride peak in which oxygen is inserted into the knock bond begins to increase in area immediately after being left, reaches its maximum value after 4 hours and saturates. From this data, it can be seen that hydrogen termination cannot be maintained if the clean nolem is left unattended. This data is for the Si (100) plane, but it has been confirmed that the same tendency is observed for the Si (110) and Si (111) planes.
- Figure 5 shows the results.
- Sampu Nore is FPM processed and placed in a metal container immediately after N blow drying.
- the present inventors examined the cause of the generation of oxidizing species on the hydrogen-terminated surface. First, it has been confirmed that the oxygen concentration in Ar gas is several ppt level. Even if all the oxygen present in the Ar gas is adsorbed on the wafer surface, it is about 6 X 10 12 after 24 hours. The number of Si-H terminations on the Si surface is 10 14 units, and all terminations cannot be erased by oxidation reaction. Therefore, the factor that reduces the hydrogen termination is not oxygen contained in Ar gas.
- the volume concentration of H was adjusted to 3%, and the flow rate of the mixed gas was lslm. Pressure is
- the lower explosion limit of hydrogen is 4%, and if it exceeds 4%, it is not a reality because there is a danger when air is mixed. For practical purposes, a maximum of 3% was deemed appropriate.
- the same effect can be obtained by using an inert gas mixed with 20 ppm of hydrogen.
- the number of H molecules may be larger than the number of O molecules in an inert gas atmosphere. In that case, water
- N and Ar used in ordinary semiconductor grades are controlled at an oxygen concentration of lOppm or less.
- FIGS. 1 (a) to 1 (j) are schematic diagrams for explaining the flow of manufacturing a field effect transistor in the prior art.
- Fig. 2 is a graph illustrating the dependence of hydrogen termination on CR exposure time by FTIR-FTR measurement.
- FIG. 3 is a graph illustrating the dependence of the silicon hydride peak and the hydride peak in which oxygen enters the back bond of the Si—Si bond on the standing time.
- FIGS. 4 (a) and 4 (b) are graphs showing the dependence of the peak areas shown in FIGS. 2 and 3 on the standing time.
- Figure 5 shows the silicon hydride peak of a sample left in an N or Ar atmosphere.
- Figure 6 shows the release of IR spectrum from a sample left in an Ar atmosphere to which H has been added.
- FIGS. 7 (a) to 7 (j) are schematic diagrams for explaining a flow of producing a field effect transistor according to the present invention.
- FIG. 8 is a diagram showing an example of wafer handling according to the present invention from hydrogen termination to gate insulating film formation.
- FIG. 7 shows a transistor flow
- FIG. 8 schematically shows a part of a semiconductor manufacturing apparatus according to an embodiment of the present invention to explain a wafer handling method from hydrogen termination to gate oxidation.
- An element region 702 including source, drain, and channel regions is separated on the surface of a p-type (100) silicon wafer 701 by, for example, STI (Shallow Trench Isolation) method. (Fig. 7 (a)).
- STI Shallow Trench Isolation
- the element region 702 is subjected to pre-oxidation cleaning to remove organic matter, particles, and metal contamination ( Figure 7 (b)).
- the device region 702 is hydrogen-terminated 703 (FIG. 7 (c)).
- Hydrogen termination treatment may be performed by DHF treatment, NH F treatment, hot water treatment, pure water treatment, etc. in addition to FPM treatment.
- the hydrogen-terminated atmosphere is a mixed gas of Ar and H (volume ratio of 3 to the hydrogen mixed gas).
- the treatment may be performed in an atmosphere. Furthermore, during the hydrogen termination treatment, the treatment may be performed while applying vacuum ultraviolet rays or soft X-ray irradiation to remove static electricity. Vacuum UV or soft X-ray irradiation may be performed directly on the semiconductor, but it may also be performed in a space where the semiconductor exists, instead of direct irradiation. Although pure water rinsing is performed, pure water to which hydrogen is added may be used. The water to which hydrogen is added is water whose oxidation-reduction potential has been lowered in advance, and effectively suppresses oxidation of the silicon surface. The number of H molecules in pure water is oxygen in pure water.
- Fig. 8 shows a dilute hydrofluoric acid treatment, pure water rinse, and wafer drying in a mixed gas atmosphere of Ar and H.
- the wafer is transferred to the wafer transfer box 20 and transferred to the gate oxidizer 30 (Fig. 8). It should be noted that Ar and H mixed gas can be transported with a flow rate of lOsccm or more. More
- the inside of the gate oxidizer 30 is also a mixed gas atmosphere of Ar and H.
- Gate oxidation equipment 3 Oxidize the silicon surface of the element region with 0 to form a 5 nm gate insulating film (SiO 2) 704
- the silicon oxide film formed in the present invention only needs to be present at least in a portion in contact with silicon, and an oxide or nitride using a different material, an alkaline earth metal, a rare earth metal, or a transition metal as an upper layer thereof.
- an insulating film formed by stacking more than force layers such as oxynitride and silicate may be used.
- a single layer or a stacked structure of an oxide, nitride, oxynitride, silicate, or the like using an alkaline earth metal, a rare earth metal, or a transition metal may be used.
- a film including one or more of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film may be used.
- boron is ion-implanted into the entire surface of the silicon wafer 701 in order to control the threshold voltage (FIG. 7 (f)).
- a polycrystalline silicon film is deposited on the entire surface of the silicon wafer 701 and patterned to form a gate electrode 705 made of polycrystalline silicon on the gate insulating film 704 in the element region 702. ( Figure 7 (g)).
- phosphorus is ion-implanted at a low concentration to form n_source and drain regions 7006 that relieve the high electric field (FIG. 7 (h)).
- a silicon oxide film (SiO 2) is formed so as to cover the gate electrode 705 by CVD or the like.
- n-type impurities such as arsenic are ion-implanted at a high concentration to form n + source and drain regions 708 (Fig. 7 (1)).
- the wafer is stored in an inert gas to which H is added in order to prevent deterioration of hydrogen termination.
- the same effect can be obtained with any surface orientation of silicon, and it is effective with other semiconductors such as SiGe and Ge. Furthermore, it can be used not only for MOSFETs in Fig. 7, but also for storage of wafers after forming contact holes and DHF treatment.
- the present invention can also be applied to semiconductor devices such as TFTs, CCDs, IGBTs, and the like that can be used only for the semiconductor device having the gate insulating film of the MOS transistor and the manufacturing method thereof.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200580051562 CN101263589B (zh) | 2005-09-13 | 2005-09-13 | 半导体装置的制造方法及半导体制造装置 |
PCT/JP2005/016805 WO2007032057A1 (ja) | 2005-09-13 | 2005-09-13 | 半導体装置の製造方法及び半導体製造装置 |
US11/991,908 US8895410B2 (en) | 2005-09-13 | 2005-09-13 | Method of manufacturing semiconductor device and semiconductor manufacturing apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/016805 WO2007032057A1 (ja) | 2005-09-13 | 2005-09-13 | 半導体装置の製造方法及び半導体製造装置 |
Publications (1)
Publication Number | Publication Date |
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WO2007032057A1 true WO2007032057A1 (ja) | 2007-03-22 |
Family
ID=37864663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2005/016805 WO2007032057A1 (ja) | 2005-09-13 | 2005-09-13 | 半導体装置の製造方法及び半導体製造装置 |
Country Status (3)
Country | Link |
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US (1) | US8895410B2 (ja) |
CN (1) | CN101263589B (ja) |
WO (1) | WO2007032057A1 (ja) |
Families Citing this family (1)
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JP2012004269A (ja) * | 2010-06-16 | 2012-01-05 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置の製造方法および炭化珪素半導体装置の製造装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0613333A (ja) * | 1992-02-18 | 1994-01-21 | Nec Corp | 熱cvd方法 |
JPH07142438A (ja) * | 1993-11-22 | 1995-06-02 | Tadahiro Omi | 洗浄装置、半導体製造装置及び半導体製造ライン |
JPH07302775A (ja) * | 1994-05-10 | 1995-11-14 | Toshiba Corp | 半導体装置の製造方法 |
JP2003077844A (ja) * | 2001-09-03 | 2003-03-14 | Hitachi Ltd | 半導体装置及びその製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2977098B2 (ja) * | 1990-08-31 | 1999-11-10 | 忠弘 大見 | 帯電物の中和装置 |
JP2953263B2 (ja) * | 1993-07-16 | 1999-09-27 | 信越半導体株式会社 | n型シリコンエピタキシャル層の抵抗率測定方法 |
JP3414044B2 (ja) * | 1995-04-27 | 2003-06-09 | アルプス電気株式会社 | 座標入力装置およびその製造方法 |
JP3125770B2 (ja) * | 1998-11-11 | 2001-01-22 | 日本電気株式会社 | 容量素子の形成方法 |
JP3426560B2 (ja) | 2000-04-11 | 2003-07-14 | 島田理化工業株式会社 | 基板洗浄方法 |
US6498107B1 (en) * | 2000-05-01 | 2002-12-24 | Epion Corporation | Interface control for film deposition by gas-cluster ion-beam processing |
EP1403913B1 (en) * | 2001-07-05 | 2008-04-23 | OHMI, Tadahiro | Substrate treating device and substrate treating method |
JP4554146B2 (ja) * | 2002-09-24 | 2010-09-29 | 忠弘 大見 | 回転式シリコンウエハ洗浄装置 |
JP4351497B2 (ja) | 2003-07-31 | 2009-10-28 | 財団法人国際科学振興財団 | 半導体装置の製造方法、及び半導体製造装置 |
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2005
- 2005-09-13 CN CN 200580051562 patent/CN101263589B/zh not_active Expired - Fee Related
- 2005-09-13 US US11/991,908 patent/US8895410B2/en not_active Expired - Fee Related
- 2005-09-13 WO PCT/JP2005/016805 patent/WO2007032057A1/ja active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0613333A (ja) * | 1992-02-18 | 1994-01-21 | Nec Corp | 熱cvd方法 |
JPH07142438A (ja) * | 1993-11-22 | 1995-06-02 | Tadahiro Omi | 洗浄装置、半導体製造装置及び半導体製造ライン |
JPH07302775A (ja) * | 1994-05-10 | 1995-11-14 | Toshiba Corp | 半導体装置の製造方法 |
JP2003077844A (ja) * | 2001-09-03 | 2003-03-14 | Hitachi Ltd | 半導体装置及びその製造方法 |
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US20100173477A1 (en) | 2010-07-08 |
CN101263589A (zh) | 2008-09-10 |
US8895410B2 (en) | 2014-11-25 |
CN101263589B (zh) | 2010-08-25 |
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