WO2006100764A1 - プリント配線基板 - Google Patents
プリント配線基板 Download PDFInfo
- Publication number
- WO2006100764A1 WO2006100764A1 PCT/JP2005/005230 JP2005005230W WO2006100764A1 WO 2006100764 A1 WO2006100764 A1 WO 2006100764A1 JP 2005005230 W JP2005005230 W JP 2005005230W WO 2006100764 A1 WO2006100764 A1 WO 2006100764A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- printed wiring
- wiring board
- board
- signal line
- pattern
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09809—Coaxial layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
Definitions
- the present invention relates to a printed wiring board.
- signal line wiring patterns are formed on the front and back surfaces of a substrate.
- the signal lines are connected to each other by vias penetrating the substrate, for example. Outside the via, a ground via is formed coaxially with the via. In this way, a coaxial cable is established in the substrate. Signal line noise is blocked by ground vias.
- Patent Document 1 Japanese Patent Laid-Open No. 2001-244635
- Patent Document 2 Japanese Unexamined Patent Publication No. 2000-216513
- Patent Document 3 JP 2000-183541 A
- a so-called multilayer printed wiring board is proposed.
- multiple double-sided wiring boards are stacked in order.
- signal lines cannot be connected in the substrate due to ground vias surrounding the vias. If ground vias are not formed, high-speed signal transmission cannot be realized.
- the present invention has been made in view of the above circumstances, and an object thereof is to provide a printed wiring board that is very useful for realizing high-speed signal transmission.
- the substrate body, the signal line formed in the substrate body, the ground layer formed on the surface of the substrate body, and the substrate body are formed.
- a printed wiring board comprising: an outer via connected to the signal line; and an inner via disposed inside the outer via in the substrate body and connected to the ground layer is provided.
- the inner via may be formed coaxially with the outer via. If the inner via penetrates through the board body.
- the outer via functions as a signal line.
- Inner via is grau It functions as a command.
- Signal lines in the printed wiring board can be connected to the outer vias without being interrupted by the ground. As a result, the signal lines can be stretched in the printed wiring board with a more complicated pattern than before.
- Such a printed wiring board can be used for a large board such as a mother board that can be used for a so-called package board.
- the inner via functioning as the ground is arranged inside the outer via functioning as the signal line, the impedance matching can be reliably established. Therefore, signals can be reliably exchanged between mounted components mounted on the printed wiring board. This! / High-speed transmission exceeding several GHz can be realized with a single printed wiring board.
- the substrate body, the signal line formed in the substrate body, the conductive solid film formed on the surface of the substrate body, and the signal formed in the substrate body There is provided a printed wiring board comprising an outer via connected to a line and an inner via disposed inside the outer via in the substrate body and connected to the solid film.
- the outer via functions as a signal line.
- the inner via functions as, for example, a ground or power pattern.
- the signal lines in the printed wiring board can be connected to the outer vias without being interrupted by the ground or power supply pattern.
- the signal lines can be stretched around the printed wiring board with a more complicated pattern than before.
- Such a printed wiring board can be used for a large board such as a mother board which can be used for a so-called package board.
- FIG. 1 is a vertical sectional view showing a printed wiring board unit according to an embodiment of the present invention.
- FIG. 2 is a vertical sectional view showing embedded substrates that are bonded to each other.
- FIG. 3 is a vertical sectional view showing a through hole for an outer via formed in a substrate body.
- FIG. 4 is a vertical sectional view showing an outer via formed in a substrate body.
- FIG. 5 is a vertical sectional view showing a copper foil bonded to a substrate body.
- FIG. 6 is a vertical sectional view showing a through hole formed in the outer via.
- FIG. 7 is a vertical sectional view showing a printed wiring board unit according to another embodiment of the present invention.
- FIG. 1 shows a printed wiring board unit according to an embodiment of the present invention.
- the printed wiring board unit 11 includes a printed wiring board 12 having a multilayer board structure.
- a plurality of sets of built-in boards 14a, 14b, 14c, and 14d are built into the board body 13 of the printed wiring board 12.
- Embedded boards 14a, 14b, 14c, 14d are stacked on each other.
- An insulating resin layer 15 such as a pre-preda is sandwiched between the thread punching substrates 14a, 14b, 14c, and 14d.
- the insulating resin layer 15 bonds the embedded substrates 14a, 14b, 14c, and 14d together.
- Each embedded substrate 14a-14d includes a core substrate 16.
- the core substrate 16 is formed of, for example, a resin material or a ceramic material.
- the core substrate 16 has rigidity enough to maintain its shape independently.
- a signal line pattern 17, a power supply pattern 18, and a ground pattern 19 are formed on the front and back surfaces of the core substrate 16.
- the power supply pattern 18 and the ground pattern 19 may be formed of, for example, a conductive solid film that extends over the entire front surface and back surface of the core substrate 16. However, the power supply pattern 18 may be divided into a plurality of regions for each supplied voltage.
- Another substrate 21 may be superimposed on the front surface or the back surface of the core substrate 16.
- a signal line pattern 17, a power supply pattern 18, and a ground pattern 19 are formed on the surface of the substrate 21.
- the signal line pattern 17, the power supply pattern 18, and the ground pattern 19 are formed of, for example, copper foil and a thin metal film!
- Insulating layers 22 are formed on the front and back surfaces of the substrate body 13.
- the insulating layer 22 may be formed of, for example, a pre-preder and / or an insulating resin as described above.
- a power pattern 23 and a ground pattern 24 are formed on the surface of the insulating layer 22.
- the power supply pattern 23 and the ground pattern 24 may be formed of a conductive solid film extending over the entire insulating layer 22, for example, as described above.
- the power supply pattern 23 and the ground pattern 24 may be formed from, for example, copper foil and a thin metal film.
- a conductive terminal pad 25 is formed on the surface of the insulating layer 22 between the power supply pattern 23 and the ground pattern 24. Mounted components (illustrated) on these terminal pads 25 Terminal) are joined. For example, ball bumps can be used for the terminals. For example, solder is used for joining.
- the terminal pad 25 is connected to the signal line pattern 17 in the substrate body 13 through, for example, a non-penetrating via 26. On the surface of the insulating layer 22, a wiring pattern or a terminal pad connected to such a conductive terminal pad 25 may be formed.
- An outer via 27 and an inner via 28 are formed in the substrate body 13.
- the inner via 28 is formed coaxially with the outer via 27 inside the outer via 27.
- the outer via 27 and the inner via 28 are made of, for example, copper and! /, A cylindrical wall made of metal.
- An insulator 29 is embedded between the outer via 27 and the inner via 28. Thus, the electrical contact between the outer via 27 and the inner via 28 is blocked by the action of the insulator 29.
- the outer via 27 is connected to a signal line pattern 17 formed on the front and back surfaces of the substrate body 13 and a signal line pattern 17 incorporated in the substrate body 13.
- the inner via 28 is connected to the ground pattern 24 formed on the surface of the insulating layer 22.
- the via may be formed of a metal material such as copper.
- the signal line pattern 17 on the embedded boards 14a to 14d can be connected to the outer via 27 outside the inner via 28 functioning as the ground.
- the mounted components can be electrically connected with a more complicated pattern than before.
- Such a printed wiring board 12 can be used not only for so-called package substrates but also for large substrates such as mother boards.
- the impedance matching can be reliably established. Signals can be reliably exchanged between mounted components.
- the embedded boards 14a to 14d are prepared. Such embedded substrates 14a-14d may be manufactured in the same manner as in the past.
- the embedded substrates 14a-14d are overlaid in order.
- the pre-preder 33 is sandwiched between the embedded substrates 14a-14d.
- the embedded substrates 14a-14d are bonded to each other by the action of the pre-preder 33.
- the substrate body 13 is formed.
- a signal line pattern 17 is formed on the front and back surfaces of the substrate body 13.
- a through hole 34 is formed in the substrate body 13.
- the through hole 34 penetrates through the embedded substrates 14a to 14d at a predetermined position. Subsequently, the eyelash is processed. As a result, the signal line pattern 17 can be formed on the front and back surfaces of the substrate body 13.
- an outer via 27 is formed in the through hole 34 as shown in FIG. The outer via 27 can be connected to the signal line pattern 17.
- the inside of the outer via 27 is filled with a grease material 35.
- the pre-preder 36 and the copper foil 37 are sequentially laminated on the front surface and the back surface of the substrate body 13.
- a reference hole 38 is formed along the axis of the outer via 27.
- a through hole 39 is formed coaxially with the outer via 27 based on the reference hole 38.
- plating is formed inside the through-hole 39, the inner via 28 is established.
- the inner via 28 is connected to, for example, the copper foil 37 on the front surface or the back surface of the substrate body 13.
- the power supply pattern 23 and the ground pattern 24 are formed from the copper foil 37.
- the printed wiring board 12 is formed.
- a single inner via 28 may be formed in common with the multiple outer vias 27.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020077021891A KR101145038B1 (ko) | 2005-03-23 | 2005-03-23 | 프린트 배선판 |
CN2005800491958A CN101142860B (zh) | 2005-03-23 | 2005-03-23 | 印刷线路板 |
JP2007509117A JP4283327B2 (ja) | 2005-03-23 | 2005-03-23 | プリント配線板 |
PCT/JP2005/005230 WO2006100764A1 (ja) | 2005-03-23 | 2005-03-23 | プリント配線基板 |
EP05727172.8A EP1863326B1 (en) | 2005-03-23 | 2005-03-23 | Printed wiring board with inverted coaxial via |
US11/896,520 US7679006B2 (en) | 2005-03-23 | 2007-09-04 | Printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/005230 WO2006100764A1 (ja) | 2005-03-23 | 2005-03-23 | プリント配線基板 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/896,520 Continuation US7679006B2 (en) | 2005-03-23 | 2007-09-04 | Printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006100764A1 true WO2006100764A1 (ja) | 2006-09-28 |
Family
ID=37023461
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/005230 WO2006100764A1 (ja) | 2005-03-23 | 2005-03-23 | プリント配線基板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7679006B2 (ja) |
EP (1) | EP1863326B1 (ja) |
JP (1) | JP4283327B2 (ja) |
KR (1) | KR101145038B1 (ja) |
CN (1) | CN101142860B (ja) |
WO (1) | WO2006100764A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007065168A2 (en) | 2005-12-02 | 2007-06-07 | Cisco Technology, Inc. | Coaxial via in pcb for high-speed signaling designs |
CN101212858B (zh) * | 2006-12-27 | 2010-05-12 | 日月光半导体制造股份有限公司 | 线路基板 |
JPWO2014034443A1 (ja) * | 2012-08-31 | 2016-08-08 | ソニー株式会社 | 配線基板及び配線基板の製造方法 |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4800606B2 (ja) | 2004-11-19 | 2011-10-26 | Okiセミコンダクタ株式会社 | 素子内蔵基板の製造方法 |
US8723047B2 (en) | 2007-03-23 | 2014-05-13 | Huawei Technologies Co., Ltd. | Printed circuit board, design method thereof and mainboard of terminal product |
US20090201654A1 (en) * | 2008-02-08 | 2009-08-13 | Lambert Simonovich | Method and system for improving electrical performance of vias for high data rate transmission |
CN102056400B (zh) * | 2009-10-27 | 2013-12-11 | 鸿富锦精密工业(深圳)有限公司 | 印刷电路板 |
CN107408786B (zh) | 2014-11-21 | 2021-04-30 | 安费诺公司 | 用于高速、高密度电连接器的配套背板 |
CN105430868B (zh) * | 2015-11-20 | 2018-01-30 | 上海斐讯数据通信技术有限公司 | 一种兼顾辐射静电及散热的光模块布板方法 |
US10045435B2 (en) * | 2015-11-23 | 2018-08-07 | L-3 Communications Corporation | Concentric vias and printed circuit board containing same |
US10201074B2 (en) | 2016-03-08 | 2019-02-05 | Amphenol Corporation | Backplane footprint for high speed, high density electrical connectors |
WO2017155997A1 (en) | 2016-03-08 | 2017-09-14 | Amphenol Corporation | Backplane footprint for high speed, high density electrical connectors |
KR20190041215A (ko) * | 2017-10-12 | 2019-04-22 | 주식회사 아모그린텍 | 인쇄회로기판 제조 방법 및 이에 의해 제조된 인쇄회로기판 |
US10559534B2 (en) | 2017-11-12 | 2020-02-11 | Industrial Technology Research Institute | Circuit substrate |
TWI830739B (zh) | 2018-06-11 | 2024-02-01 | 美商安芬諾股份有限公司 | 包含用於高速且高密度之電連接器的連接器佔位面積之印刷電路板和互連系統以及其製造方法 |
EP3973597A4 (en) | 2019-05-20 | 2023-06-28 | Amphenol Corporation | High density, high speed electrical connector |
CN115315855A (zh) | 2020-01-27 | 2022-11-08 | 安费诺有限公司 | 具有高速安装接口的电连接器 |
CN115298912A (zh) | 2020-01-27 | 2022-11-04 | 安费诺有限公司 | 具有高速安装接口的电连接器 |
US20220240375A1 (en) * | 2021-01-28 | 2022-07-28 | Unimicron Technology Corp. | Co-axial via structure and manufacturing method of the same |
US11792918B2 (en) | 2021-01-28 | 2023-10-17 | Unimicron Technology Corp. | Co-axial via structure |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3739469A (en) | 1971-12-27 | 1973-06-19 | Ibm | Multilayer printed circuit board and method of manufacture |
JPH0462894A (ja) * | 1990-06-25 | 1992-02-27 | Hitachi Chem Co Ltd | 多層印刷配線板とその製造方法 |
JPH08111589A (ja) * | 1994-10-12 | 1996-04-30 | Oki Electric Ind Co Ltd | プリント配線板およびその製造方法 |
JPH1041630A (ja) * | 1996-07-25 | 1998-02-13 | Fujitsu Ltd | 多層プリント板及びこれを利用した高周波回路装置 |
JP2001244635A (ja) * | 2000-03-01 | 2001-09-07 | Ibiden Co Ltd | プリント配線板の製造方法 |
US20020017399A1 (en) | 2000-08-11 | 2002-02-14 | Huey-Ru Chang | Coaxial via hole and process of fabricating the same |
Family Cites Families (8)
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JPH0529767A (ja) | 1991-07-18 | 1993-02-05 | Mitsubishi Electric Corp | 多層プリント配線板 |
CN1115081C (zh) * | 1997-03-12 | 2003-07-16 | 西门子公司 | 有高频构件电气设备特别是移动无线设备用的印刷电路板 |
US6392160B1 (en) * | 1998-11-25 | 2002-05-21 | Lucent Technologies Inc. | Backplane for radio frequency signals |
JP2000183541A (ja) | 1998-12-11 | 2000-06-30 | Toshiba Iyo System Engineering Kk | 多層プリント基板 |
JP2000216513A (ja) | 1999-01-22 | 2000-08-04 | Hitachi Ltd | 配線基板及びそれを用いた製造方法 |
JP2002217543A (ja) | 2001-01-22 | 2002-08-02 | Ibiden Co Ltd | 多層プリント配線板 |
US6617526B2 (en) * | 2001-04-23 | 2003-09-09 | Lockheed Martin Corporation | UHF ground interconnects |
US7081650B2 (en) * | 2003-03-31 | 2006-07-25 | Intel Corporation | Interposer with signal and power supply through vias |
-
2005
- 2005-03-23 CN CN2005800491958A patent/CN101142860B/zh not_active Expired - Fee Related
- 2005-03-23 EP EP05727172.8A patent/EP1863326B1/en not_active Not-in-force
- 2005-03-23 JP JP2007509117A patent/JP4283327B2/ja not_active Expired - Fee Related
- 2005-03-23 WO PCT/JP2005/005230 patent/WO2006100764A1/ja not_active Application Discontinuation
- 2005-03-23 KR KR1020077021891A patent/KR101145038B1/ko not_active IP Right Cessation
-
2007
- 2007-09-04 US US11/896,520 patent/US7679006B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3739469A (en) | 1971-12-27 | 1973-06-19 | Ibm | Multilayer printed circuit board and method of manufacture |
JPH0462894A (ja) * | 1990-06-25 | 1992-02-27 | Hitachi Chem Co Ltd | 多層印刷配線板とその製造方法 |
JPH08111589A (ja) * | 1994-10-12 | 1996-04-30 | Oki Electric Ind Co Ltd | プリント配線板およびその製造方法 |
JPH1041630A (ja) * | 1996-07-25 | 1998-02-13 | Fujitsu Ltd | 多層プリント板及びこれを利用した高周波回路装置 |
JP2001244635A (ja) * | 2000-03-01 | 2001-09-07 | Ibiden Co Ltd | プリント配線板の製造方法 |
US20020017399A1 (en) | 2000-08-11 | 2002-02-14 | Huey-Ru Chang | Coaxial via hole and process of fabricating the same |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007065168A2 (en) | 2005-12-02 | 2007-06-07 | Cisco Technology, Inc. | Coaxial via in pcb for high-speed signaling designs |
EP1955410A2 (en) * | 2005-12-02 | 2008-08-13 | Cisco Technology, Inc. | Coaxial via in pcb for high-speed signaling designs |
EP1955410A4 (en) * | 2005-12-02 | 2012-10-31 | Cisco Tech Inc | COAXIAL ORIFICE IN A PRINTED CIRCUIT BOARD FOR HIGH SPEED SIGNAL DESIGNS |
CN101212858B (zh) * | 2006-12-27 | 2010-05-12 | 日月光半导体制造股份有限公司 | 线路基板 |
JPWO2014034443A1 (ja) * | 2012-08-31 | 2016-08-08 | ソニー株式会社 | 配線基板及び配線基板の製造方法 |
US10187971B2 (en) | 2012-08-31 | 2019-01-22 | Sony Corporation | Wiring board and method of manufacturing wiring board |
Also Published As
Publication number | Publication date |
---|---|
KR20070108258A (ko) | 2007-11-08 |
JPWO2006100764A1 (ja) | 2008-08-28 |
EP1863326B1 (en) | 2013-10-09 |
CN101142860B (zh) | 2010-12-08 |
CN101142860A (zh) | 2008-03-12 |
EP1863326A4 (en) | 2010-03-31 |
KR101145038B1 (ko) | 2012-05-16 |
US20080000681A1 (en) | 2008-01-03 |
US7679006B2 (en) | 2010-03-16 |
EP1863326A1 (en) | 2007-12-05 |
JP4283327B2 (ja) | 2009-06-24 |
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