WO2006087065A3 - Leistungshalbleiterbaugruppe - Google Patents

Leistungshalbleiterbaugruppe Download PDF

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Publication number
WO2006087065A3
WO2006087065A3 PCT/EP2006/000457 EP2006000457W WO2006087065A3 WO 2006087065 A3 WO2006087065 A3 WO 2006087065A3 EP 2006000457 W EP2006000457 W EP 2006000457W WO 2006087065 A3 WO2006087065 A3 WO 2006087065A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor chip
main connection
disposed
section
connection
Prior art date
Application number
PCT/EP2006/000457
Other languages
English (en)
French (fr)
Other versions
WO2006087065A2 (de
Inventor
Reinhold Bayerer
Markus Thoben
Original Assignee
Infineon Technologies Ag
Reinhold Bayerer
Markus Thoben
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Reinhold Bayerer, Markus Thoben filed Critical Infineon Technologies Ag
Priority to JP2007555474A priority Critical patent/JP4685884B2/ja
Priority to US11/816,340 priority patent/US8472949B2/en
Publication of WO2006087065A2 publication Critical patent/WO2006087065A2/de
Publication of WO2006087065A3 publication Critical patent/WO2006087065A3/de

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Abstract

Die Erfindung betrifft eine Leistungshalbleiterbaugruppe mit einem Träger (50), einem ersten Halbleiterchip (10) und einem zweiten Halbleiterchip (20). Dabei weist der erste Halbleiterchip (10) einen ersten Hauptanschluss (11) und einen zweiten Hauptanschluss (12) auf, die auf einander gegenüberliegenden Seiten des ersten Halbleiterchips (10) angeordnet sind. Der zweite Halbleiterchip (20) weist einen ersten Hauptanschluss (21) und einen zweiten Hauptanschluss (22) auf, die auf einander gegenüberliegenden Seiten des zweiten Halbleiterchips (20) angeordnet sind. Eine erste Seite (51) des Trägers (50) ist mit einer strukturierten Metallisierung (60) versehen, die einen ersten Abschnitt (61) und einen von diesem beabstandeten zweiten Abschnitt (62) aufweist. Der erste Halbleiterchip (10) ist auf der ersten Seite (51) des Trägers (50) angeordnet, und mittels seines zweiten Hauptanschlusses (12) mechanisch und elektrisch leitend mit dem ersten Abschnitt (61) verbunden. Der zweite Halbleiterchip (20) ist auf der ersten Seite (51) des Trägers (50) angeordnet und mittels seines zweiten Hauptanschlusses (22) mechanisch und elektrisch leitend mit dem zweiten Abschnitt (62) verbunden. Der erste Hauptanschluss (11) des ersten Halbleiterchips (10) und der erste Hauptanschluss (21) des zweiten Halbleiterchips (20) sind miteinander sowie mit einem zum Anschluss einer externen Last (100) oder einer externen Versorgungsspannung vorgesehenen ersten Anschlusskontakt (71) elektrisch leitend miteinander verbunden.
PCT/EP2006/000457 2005-02-17 2006-01-19 Leistungshalbleiterbaugruppe WO2006087065A2 (de)

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JP2007555474A JP4685884B2 (ja) 2005-02-17 2006-01-19 パワー半導体アセンブリ
US11/816,340 US8472949B2 (en) 2005-02-17 2006-01-19 Semiconductor assembly

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DE102005007373A DE102005007373B4 (de) 2005-02-17 2005-02-17 Leistungshalbleiterbaugruppe
DE102005007373.5 2005-02-17

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WO2006087065A2 (de) 2006-08-24
DE102005007373A1 (de) 2006-08-24
DE102005007373B4 (de) 2013-05-29

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