Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/52—Circuit arrangements for protecting such amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
  • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
  • H03F3/191—Tuned amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2200/00—Indexing scheme relating to amplifiers
  • H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2200/00—Indexing scheme relating to amplifiers
  • H03F2200/75—Indexing scheme relating to amplifiers the amplifier stage being a common source configuration MOSFET
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
  • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
  • H03F2203/21178—Power transistors are made by coupling a plurality of single transistors in parallel

Definitions

• the present invention relates to a semiconductor device suitable for use in, for example, a high-frequency circuit of a wireless communication device and a power amplifier configured using the semiconductor device.
• a semiconductor device in which a plurality of amplification circuits that perform power amplification of a high-frequency signal are connected in parallel between an input terminal and an output terminal (for example, Patent Documents 1 to 4).
• the amplifier circuit is configured using a bipolar transistor.
• the bipolar transistor has a configuration in which the collector is connected to the output terminal, the emitter is connected to the ground terminal, and the high frequency signal input to the base is amplified.
• a ballast resistor is connected to the base in order to suppress thermal runaway of the bipolar transistor.
• Patent Documents 1 and 2 disclose a configuration in which a high-frequency signal and a bias voltage are separately input to the base of the bipolar transistor and a ballast resistor is connected in the middle of the path on the bias voltage side. ing. In this case, since the ballast resistor is connected in parallel to the path of the high frequency signal, the gain of the high frequency signal is not reduced.
• Patent Document 3 discloses a configuration in which a high-frequency signal and a bias voltage are supplied together via a ballast resistor, and a capacitor is connected in parallel to the ballast resistor. As a result, the prior art of Patent Document 3 alleviates the decrease in gain with respect to the high-frequency signal in the used frequency band.
• Patent Document 4 a high-frequency signal and a bias voltage are separately input to the base of a bipolar transistor, and in addition to connecting a ballast resistor in the middle of the path on the bias voltage side, A configuration in which a bypass capacitor is connected between the bias terminal (bias voltage terminal) is disclosed. In this case, a bypass capacitor is used to bypass part of the AC component of the base current to the ballast resistor, thereby reducing distortion of the high-frequency signal.
• Patent Document 1 US Pat. No. 5,629,648
• Patent Document 2 Japanese Patent Laid-Open No. 2001-196865
• Patent Document 3 Specification of US Pat. No. 5,321,279
• Patent Document 4 Japanese Patent Laid-Open No. 2003-324325
• the ballast resistor is connected in parallel to the path of the high-frequency signal. For this reason, the ballast resistor itself does not contribute to the oscillation stability, and the neuropolar transistor is in an unstable state in a wide band on the low frequency side.
• the first resistor is connected in the middle of the path of the high-frequency signal, and the second resistor is connected in series with the first resistor in the middle of the path of the bias voltage.
• the first and second resistors act as ballast resistors, and the first resistor can suppress abnormal oscillation of the bipolar transistor and improve stability.
• the stability at the use frequency (high frequency) is taken into consideration, the band on the lower frequency side than the use frequency is not studied, and the resistance value of the first resistor is, for example, The value is about 1Z10 with respect to the resistance value of the second resistor. For this reason, for example, when the use frequency of a high frequency signal is 5 GHz, the bipolar transistor becomes unstable in a low frequency region below 1 GHz.
• the resistance value of the first resistor when the resistance value of the first resistor is increased, the voltage drop due to the base current increases and the increase in current is suppressed. At this time, for example, when a semiconductor device is used as a power amplifier, a necessary output power is obtained by an increase in current accompanying an increase in input power. On the other hand, if the resistance value of the first resistor is increased too much, there is a problem that the increase in output power is also suppressed by suppressing the increase in current. Such suppression of increase in output power also occurs when a capacitor is connected in parallel to the first resistor. Furthermore, the semiconductor device described in Patent Document 3 has a configuration in which a capacitor is connected in parallel to the ballast resistor and a high-frequency signal and a bias voltage are supplied together.
• the resistance value of the ballast resistor necessary for the thermal stability can provide sufficient stability against oscillation in the low frequency range. Can not.
• the resistance value of the ballast resistor is increased, like the case of Patent Document 2, the voltage drop at the base current becomes too large and the increase in output power is suppressed.
• the semiconductor device described in Patent Document 4 has a configuration in which a capacitor is connected between the input terminal and the bias terminal to reduce distortion of the high-frequency signal.
• a capacitor is connected between the input terminal and the bias terminal to reduce distortion of the high-frequency signal.
• the ballast resistor is connected in parallel to the path of the high-frequency signal. For this reason, there is a problem that the bipolar transistor becomes unstable in a wide band on the low frequency side.
• the present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to prevent thermal runaway of a bipolar transistor and to improve stability against oscillation including a low frequency region. Is to provide a semiconductor device and a power amplifier
• the present invention provides a semiconductor device in which a plurality of amplifier circuits for amplifying power of a high-frequency signal are connected in parallel between an input terminal and an output terminal.
• the amplifier circuit is connected between the bipolar transistor whose collector is connected to the output terminal and the input terminal and the base of the bipolar transistor and is in a resistance state with respect to the low frequency signal, and is short-circuited with respect to the high frequency signal.
• the oscillation stabilization circuit to be in a state and the one end side force S bias terminal and the other end side is connected between the oscillation stabilization circuit and the base of the bipolar transistor to prevent a thermal runaway of the bipolar transistor. It is characterized by comprising a circuit.
• oscillation stabilization is provided between the input terminal and the base of the bipolar transistor. Since the circuit is provided, the oscillation stabilization circuit is in a resistance state with respect to the low frequency signal input to the input terminal force and is in a short circuit state with respect to the high frequency signal. For this reason, the oscillation stabilization circuit acts as a resistor for signals on the lower frequency side than the operating frequency, so that the oscillation of the low frequency signal can be suppressed and the stability can be improved. On the other hand, since the oscillation stabilization circuit is short-circuited with respect to a signal on the higher frequency side than the operating frequency, the high frequency signal can be input to the base of the bipolar transistor without loss, and power can be amplified.
• ballast circuit is provided between the bias terminal of the bipolar transistor and the base of the bipolar transistor, even when an overcurrent flows to the base due to heating of the bipolar transistor or the like, the ballast circuit is used. A voltage drop according to the current can be generated, and thermal runaway of the bipolar transistor can be prevented.
• the oscillation stabilization circuit and the ballast circuit are provided in parallel and the oscillation stabilization circuit and the ballast circuit are independently connected to the base of the bipolar transistor, the oscillation stabilization circuit and the ballast circuit are connected. It can be designed independently and independently without interfering with the circuit. For this reason, even when both the prevention of thermal runaway and stabilization of oscillation are ensured, the minimum necessary for preventing thermal runaway, in which an excessive voltage drop is not caused by the ballast circuit as in the prior art. A voltage drop can be caused. As a result, unnecessary voltage drop can be eliminated and high output power can be obtained.
• the oscillation stabilization circuit may be configured by an RC parallel circuit in which a resistor and a capacitor are connected in parallel.
• the capacitor of the RC parallel circuit is cut off with respect to the low-frequency signal, and the capacitor of the RC parallel circuit is short-circuited with respect to the high-frequency signal. For this reason, since the low frequency signal passes through the resistor and the high frequency signal passes through the capacitor, the RC parallel circuit is in a resistance state with respect to the low frequency signal and is in a short circuit state with respect to the high frequency signal. As a result, the RC parallel circuit is in a resistance state with respect to the signal on the lower frequency side than the operating frequency, and can suppress the oscillation of the low frequency signal and improve the stability.
• the RC parallel circuit is short-circuited for signals on the higher frequency side than the operating frequency, and the high frequency signal can be input to the base of the bipolar transistor without loss. it can.
• the low frequency signal passes through the resistor and the high frequency signal passes through the capacitor, so the oscillation stability can be adjusted according to the resistance value of the resistor, for example, depending on the capacitance of the capacitor.
• the frequency of the short-circuited signal can be adjusted.
• the ballast circuit is constituted by a ballast resistor connected between the bias terminal and a base of the bipolar transistor.
• the neuropolar transistor may be formed of a heterojunction bipolar transistor.
• a low-distortion resistor for reducing distortion of the high-frequency signal on the output terminal side is connected between the input terminal and the bias terminal.
• the low-distortion resistor allows a part of the AC component of the base current to flow between the base of the bipolar transistor and the bias terminal, bypassing the ballast resistor. For this reason, the collector current can be increased in accordance with the increase in power of the input signal, and the distortion of the high frequency signal can be reduced.
• the low distortion resistance has almost no frequency dependency of impedance, a part of the AC component of the base current can be bypassed over a wide band. For this reason, the distortion of the high frequency signal can be reduced over a wide band.
• the plurality of amplifier circuits are preferably formed monolithically on the semiconductor substrate in a state of being connected in parallel to each other.
• an amplifier circuit can be configured using the bipolar transistor, capacitor, and resistor formed on the semiconductor substrate, and an MMIC (Monolithic Microwave Integrated Circuit) for amplifying the power of the high-frequency signal can be formed.
• MMIC Monitoring Microwave Integrated Circuit
• a power amplifier may be configured using the semiconductor device according to the present invention. [0029] Thus, in addition to preventing thermal runaway while stabilizing oscillation over all frequencies, high output power can be obtained.
• FIG. 1 is a circuit diagram showing a semiconductor device according to a first embodiment.
• FIG. 2 is a circuit diagram showing a state in which the semiconductor device in FIG. 1 is connected to a signal source and a load.
• FIG. 3 is a characteristic diagram showing frequency characteristics of the stability coefficient, maximum stable power gain, and maximum available power gain of the semiconductor device in FIG.
• FIG. 4 is a characteristic diagram showing output power and current consumption with respect to input power of the semiconductor device in FIG.
• FIG. 5 is a characteristic diagram showing power gain and current consumption with respect to input power of the semiconductor device in FIG.
• FIG. 6 is a circuit diagram showing a state in which the semiconductor device according to the first comparative example is connected to a signal source and a load.
• FIG. 7 is a characteristic diagram showing the frequency characteristics of the stability coefficient, maximum stable power gain, and maximum available power gain of the semiconductor device in FIG.
• FIG. 8 is a circuit diagram showing a state in which a semiconductor device according to a second comparative example is connected to a signal source and a load.
• FIG. 9 is a characteristic diagram showing frequency characteristics of the stability coefficient, maximum stable power gain, and maximum available power gain of the semiconductor device in FIG.
• FIG. 10 is a circuit diagram showing a state in which a semiconductor device according to a third comparative example is connected to a signal source and a load.
• FIG. 11 is a characteristic diagram showing the frequency characteristics of the stability coefficient, maximum stable power gain, and maximum available power gain when the ballast resistor is set to 300 ⁇ in the semiconductor device in FIG.
• FIG. 12 is a characteristic diagram showing the frequency characteristics of the stability coefficient, maximum stable power gain, and maximum available power gain when the ballast resistor is set to 1500 ⁇ in the semiconductor device in FIG.
• FIG. 13 is a characteristic diagram showing output power and current consumption with respect to input power when the ballast resistor is set to 300 ⁇ and 1500 ⁇ in the semiconductor device in FIG.
• FIG. 14 is a characteristic diagram showing power gain and current consumption with respect to input power when the ballast resistor is set to 300 ⁇ and 1500 ⁇ in the semiconductor device in FIG.
• FIG. 15 is a circuit diagram showing a semiconductor device according to a second embodiment.
• FIG. 16 is a characteristic diagram showing AM-PM characteristics of the semiconductor device in FIG.
• FIG. 17 is a circuit diagram showing a semiconductor device according to a fourth comparative example.
• FIG. 18 is a characteristic diagram showing AM-PM characteristics of the semiconductor device in FIG.
• FIG. 19 is a plan view showing a power amplifier using a semiconductor device according to a third embodiment.
• HBT Heterojunction Bipolar Transistor
• FIG. 1 shows a semiconductor device according to the first embodiment.
• semiconductor The body device 1 is configured by connecting a plurality of amplifier circuits 2 (unit cells) described later in parallel between an input terminal RFin and an output terminal RFout.
• the amplifier circuit 2 that performs power amplification of the high-frequency signal RF includes a heterojunction bipolar transistor 3 (hereinafter referred to as HBT3), and an oscillation stabilization circuit 4 connected between the input terminal RFin and the base B of the HBT3.
• the ballast resistor 5 is configured as a ballast circuit having one end connected to the bias terminal Bin and the other end connected between the oscillation stabilization circuit 4 and the base B of the HBT 3.
• the collectors C of the HBT 3 are connected to each other, and the emitters E are connected to each other.
• the collector C is connected to the output terminal RFout, and the emitter E is connected to the ground terminal GND.
• the input side of the oscillation stabilization circuit 4 is connected to the input terminal RFin, and the input side of the ballast resistor 5 is connected to the noise terminal Bin.
• the plurality of amplifier circuits 2 are connected in parallel between the input terminal RFin and the output terminal RFout.
• the ballast resistor 5 is connected between a bias terminal Bin for applying a bias voltage and the base B of the HBT 3. For this reason, even when an overcurrent flows toward the bias terminal Bin force base B due to heating of the HBT3, a voltage drop corresponding to the overcurrent can be caused by using the ballast resistor 5 to prevent thermal runaway of the HBT3. be able to. At this time, the resistance value of the ballast resistor 5 is set to a value that causes a minimum voltage drop necessary for preventing thermal runaway.
• the oscillation stabilization circuit 4 is configured by an RC parallel circuit that forms a high-pass filter in which a resistor 6 and a capacitor 7 are connected in parallel.
• the capacitor 7 is cut off from a low-frequency signal, and thus a high-frequency filter. A short circuit occurs with respect to the signal. For this reason, the low frequency signal passes through the resistor 6 and the high frequency signal passes through the capacitor 7. Therefore, the oscillation stabilization circuit 4 is in a resistance state with respect to the low frequency signal and is in a short circuit state with respect to the high frequency signal.
• the capacity of the capacitor 7 is set to such a value that the use frequency of the desired high-frequency signal becomes the pass band.
• the resistance value of the resistor 6 is set to a value that can prevent the oscillation of the HBT 3 in the cutoff band of the oscillation stabilizing circuit 4.
• the semiconductor device 1 according to the present embodiment has the above-described configuration. Will be described.
• the ground terminal GND is connected to the ground, and a predetermined bias voltage is applied to the bias terminal Bin.
• the bias voltage is applied to the base B of the HBT 3 via the ballast resistor 5, and the HBT 3 is in a driving state.
• a high frequency signal with a working frequency of several GHz to several tens of GHz is input to the input terminal RFin.
• the plurality of HBTs 3 connected in parallel to the input terminal RFin each amplifies the high frequency signal according to the power supplied to the base B, and outputs it from the output terminal RFout.
• the output terminal RFout outputs the high-frequency signals amplified by the plurality of amplifier circuits 2 in total. Therefore, a high-output high-frequency signal can be obtained according to the number of amplifier circuits 2.
• a coupling capacitor 11 is connected between the base B of the HBT 3 of the amplifier circuit 2 and the input terminal RF in, and the base B and the bias terminal Bin A ballast resistor 12 is connected between the two.
• the frequency characteristics of the stability coefficient K which is an index indicating the stability against oscillation of the circuit
• the frequency characteristics of the maximum stable power gain MSG and the maximum available power gain MAG are simulated.
• the results are shown in Fig. 7.
• the semiconductor device 1 has ten amplifier circuits 2, and the capacitance of the capacitor 11 is, for example, 0.5 pF that allows a desired high-frequency signal to pass through.
• the resistance value is set to, for example, 300 ⁇ as a value that can prevent thermal runaway.
• the collector voltage Vc which is the driving voltage, was 3 V, and the collector current Ic was 50.24 mA.
• the signal source S side (input side) and the load L side (output side) are each provided with a signal source impedance Zs and a load impedance ZL, and the signal source S side is provided with a capacitor for cutting off DC components.
• an inductor L 0 is connected to the load L side for RF choke.
• the stability coefficient K is smaller than 1 (K 1) in the wide band on the low frequency side from DC to 13 GHz, and HBT3 is unstable. It has become. This is because the ballast resistor 12 itself is not connected to the oscillation stability because the ballast resistor 12 is connected in parallel to the path of the high-frequency signal.
• the maximum stable power gain MSG increases as the frequency decreases. For this reason, in the first comparative example, even when a small low-frequency signal is input, HBT3, which easily oscillates, tends to be very unstable. As a result, there is a problem that the maximum available power gain MAG can be obtained only for high-frequency signals of 13 GHz or higher.
• the capacitor 13 and the first resistor 14 are connected in series in the middle of the high-frequency signal path, and the first voltage is in the middle of the noise voltage path.
• the second resistor 15 is connected in series with the resistor 14.
• the semiconductor device 1 has ten amplifier circuits 2, the capacitance of the capacitor 13 is, for example, 0.5 pF, and the first resistor 14 The resistance value is, for example, 300 ⁇ , and the resistance value of the second resistor 15 is, for example, 10 ⁇ .
• the drive voltage (collector voltage Vc) was 3 V, and the collector current Ic was 50.06 mA.
• the signal source impedance Zs, load impedance ZL, capacitor C0, and inductor L0 are connected to the signal source S side (input side) and load L side (output side), respectively, as in the first comparative example. Assumed
• a capacitor 17 is connected in parallel to the ballast resistor 16 to supply a high-frequency signal and a bias voltage through the same path.
• the frequency characteristics of the stability coefficient K, the maximum stable power gain MSG, and the maximum available power gain MAG were examined using simulation.
• Figure 11 shows the results.
• the semiconductor device 1 has ten amplifier circuits 2, the resistance value of the ballast resistor 16 is, for example, 300 ⁇ , and the capacitance of the capacitor 17 is For example, 0.5 pF.
• the drive voltage (collector voltage Vc) was 3V and the collector current Ic was 50.24mA.
• the signal source impedance Zs, load impedance ZL, capacitor C0, and inductor L0 are connected to the signal source S side (input side) and load L side (output side), respectively, as in the first comparative example. It was supposed to be.
• the ballast resistor 16 is provided in the middle of the path of the high-frequency signal in a state of being connected in parallel with the capacitor 17. Abnormal oscillation on the low frequency side of HBT3 can be suppressed, and stability is improved compared to the first comparative example.
• the ballast resistor 16 is set to a value that can prevent thermal runaway (for example, 300 ⁇ ), so that the stability on the low frequency side is insufficiently secured. For this reason, the stability coefficient K is smaller than 1 (K 1) on the lower frequency side than several hundred MHz, and the HBT 3 is in an unstable state. Therefore, the maximum available power gain MAG can be obtained only for high-frequency signals of several hundred MHz or higher.
• the capacitance of the capacitor 17 is, for example, 0.25 pF
• the drive voltage (collector voltage Vc) is 3 V
• the collector current Ic is 50.61 mA
• the semiconductor device 1 when the semiconductor device 1 is used for a power amplifier, in addition to ensuring oscillation stability, it is necessary to increase output power and power gain with respect to input power. Therefore, next, in the semiconductor device 1 according to the third comparative example, when the resistance values of the ballast resistor 16 were 300 ⁇ and 1500 ⁇ , the output power, power gain, and current consumption with respect to the input power were examined using simulation. . The results are shown in Fig. 13 and Fig. 14.
• the frequency of the high-frequency signal was 5 GHz
• the load impedance ZL was (9.73 + j7.24) ⁇ .
• the signal source impedance Zs was set to a value that is conjugate with the input impedance of the HBT 3 including the ballast resistor 16 and the capacitor 17. Therefore, when the ballast resistor 16 is 300 ⁇ , the signal source impedance Zs is (1.13 + j7.5) ⁇ , and when the ballast resistor 16 is 1500 ⁇ , the signal source impedance Zs is (1.25 + j 14). 27) ⁇ .
• the frequency characteristics of the stability coefficient K, the maximum stable power gain MSG, and the maximum available power gain MAG are compared for the semiconductor device 1 according to the present embodiment. It investigated using simulation. The results are shown in Fig. 3.
• the semiconductor device 1 is assumed to have ten amplifier circuits 2.
• the resistance value of the nost resistor 5 is set to 300 ⁇
• the resistance value of the resistor 6 of the oscillation stabilization circuit 4 is set to 1500 ⁇
• the capacitance of the capacitor 7 is set to 0.25 pF, for example.
• the drive voltage (collector voltage Vc) was 3V
• the collector current Ic was 50.24mA.
• the signal source S side (input Side) and load L side (output side) are connected to signal source impedance Zs, load impedance ZL, capacitor C0, and inductor L0, respectively, as in the first comparative example.
• the stability factor K is larger than 1 (K> 1) even on the low frequency side of several hundred MHz or less, and almost all frequency bands are obtained. It can be seen that the oscillation stability is also improved. This is because the low-frequency signal passes through the resistor 6 and drops in voltage because the oscillation stabilization circuit 4 in which the resistor 6 and the capacitor 7 are connected in parallel is connected in the middle of the path of the high-frequency signal. At this time, the resistance value of the resistor 6 is set larger than the resistance value of the ballast resistor 5, and is set to a value that causes a sufficient voltage drop even on the low frequency side where the maximum stable power gain MSG is large. For this reason, for example, oscillation can be suppressed even for low frequency signals of several hundred MHz or less.
• the output power, the power gain, and the current consumption with respect to the input power were examined using simulation. The results are shown in Figs.
• the frequency of the high-frequency signal was 5 GHz
• the load impedance ZL was (9.73 + j7.24) ⁇ .
• the signal source impedance Zs was set to (1.13 + jl4.55) ⁇ as a value conjugate with the input impedance of the HBT3 including the ballast resistor 16 and the capacitor 17.
• the output power and the output power are almost the same as in the case where the resistance value of the last resistor 16 is set to 300 ⁇ in the third comparative example. It can be seen that power gain can be obtained.
• the oscillation stabilization circuit 4 since the oscillation stabilization circuit 4 is provided between the input terminal RFin and the base B of the HBT 3, the oscillation stabilization circuit 4 has a low frequency input from the input terminal RFin. It becomes a resistance state to the signal and a short circuit state to the high frequency signal. For this reason, the oscillation stabilization circuit 4 works as a resistor for a signal on the lower frequency side than the operating frequency (for example, several GHz), so that the oscillation of the low frequency signal can be suppressed and the stability is improved. be able to.
• the oscillation stabilization circuit 4 since the oscillation stabilization circuit 4 is in a short circuit state with respect to a signal on the higher frequency side than the operating frequency, the high frequency signal can be input to the base B of the HBT 3 without loss, and the power can be increased.
• a ballast resistor 5 is provided between the bias terminal Bin and the base B of the HBT 3. For this reason, even when an overcurrent flows to the base B due to heating of the HBT3, a voltage drop corresponding to the overcurrent can be caused by using the ballast resistor 5, and the thermal runaway of the HBT3 can be prevented.
• the oscillation stabilization circuit 4 and the ballast resistor 5 are provided in parallel, and the oscillation stabilization circuit 4 and the ballast resistor 5 are independently connected to the base B of the HBT 3.
• the oscillation stabilization circuit 4 and the ballast resistor 5 can be designed separately and independently from each other. For this reason, even when both thermal runaway prevention and oscillation stabilization are ensured, the minimum voltage drop necessary to prevent thermal runaway occurs without causing an excessive voltage drop due to the nost resistor 5. Can be made. As a result, unnecessary voltage drop can be eliminated and high output power can be obtained.
• the oscillation stabilization circuit 4 since the oscillation stabilization circuit 4 is configured by an RC parallel circuit in which the resistor 6 and the capacitor 7 are connected in parallel, the capacitor 7 is in a cut-off state with respect to a low-frequency signal, The capacitor 7 is short-circuited with respect to the high-frequency signal. For this reason, since the low frequency signal passes through the resistor 6 and the high frequency signal passes through the capacitor 7, the oscillation stabilization circuit 4 may be in a resistance state with respect to the low frequency signal and in a short circuit state with respect to the high frequency signal. it can.
• the oscillation stabilization circuit 4 is in a resistance state with respect to a signal on the lower frequency side than the operating frequency, and can suppress the oscillation of the low frequency signal and improve the stability.
• the oscillation stabilization circuit 4 can input a high-frequency signal to the base B of the HBT 3 in a short-circuited state with respect to a signal on the higher frequency side than the operating frequency without loss.
• the oscillation stability can be adjusted according to the resistance value of the resistor 6, and the capacitor 7
• the frequency of a signal that is in a short-circuit state can be adjusted according to the capacitance of the signal.
• the semiconductor device 1 is configured using the HBT 3, it is possible to amplify the power of the high-frequency signal while achieving high speed, low power consumption, etc., and can be applied to, for example, a wireless communication device.
• FIG. 15 shows a power amplifier (power amplification module) using the semiconductor device according to the second embodiment of the present invention.
• the features of this embodiment are the input terminal and the bar. This is because a low-distortion resistor is connected to the first terminal.
• the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
• a distortion reducing resistor 21 is connected between the input terminal RFin and the bias terminal Bin.
• the low-distortion resistor 21 is configured using a resistance element that has almost no frequency dependence of impedance.
• the resistance value of the low-distortion resistor 21 is set to a value that allows a part of the AC component of the base current to flow between the base B of the HBT 3 and the noise terminal Bin by bypassing the ballast resistor 5. Yes.
• the low distortion resistance 21 is set to a relatively small value (eg, 50 ⁇ ) compared to the ballast resistance 5 (eg, 300 ⁇ ).
• the resistance 6 of the oscillation stabilization circuit 4 is set to a sufficiently large value (for example, 100 0 ⁇ ) as compared with the ballast resistance 5 that is several times (for example, twice or more) larger than the ballast resistance 5. For this reason, the amount of the DC component of the base current flowing through the low-distortion resistor 21 is small, and the bias condition hardly changes.
• the voltage drop due to the resistor 6 of the oscillation stabilization circuit 4 is large, the base current passing through the low-distortion resistor 21 does not cause thermal runaway.
• the semiconductor device 1 according to the present embodiment has the above-described configuration, and the power amplification operation for the high-frequency signal RF is the same as that of the first embodiment.
• a low distortion resistance 21 is connected between the input terminal RFin and the bias terminal Bin.
• a coupling capacitor 31 is connected between the base B of the HBT 3 of the amplifier circuit 2 and the input terminal R Fin, and the base B and the bias terminal B in The ballast resistor 32 is connected between the two.
• a bypass capacitor 33 for bypassing the AC component of the base current is connected between the input terminal RFin and the bias terminal Bin.
• the output signal (output) that is output when an input signal (high-frequency signal RF on the input terminal RFin side) of the lowest level (for example, 20 dBm) is input.
• the phase of the high-frequency signal RF on the terminal RFout side is the reference (phase 0 °).
• the AM-PM characteristics in Fig. 18 show how the phase of the output signal is relative to the reference phase when only the level (input power) is increased without changing the phase of the input signal. It shows how it will change.
• the capacitance of the coupling capacitor 31 is, for example, 0.
• the resistance value of the ballast resistor 32 is, for example, 300 ⁇ , and the capacitance of the bypass capacitor 33 is, for example, 0.17 pF. Furthermore, the high-frequency signal RF is assumed to have a signal band of ⁇ 0.5 GHz centered at, for example, 5.4 GHz.
• the bypass capacitor 33 has an impedance that decreases as the frequency increases, and the bypass path passing through the capacitor 33 has frequency dependency.
• a phase difference of about 1.2 ° occurs between the lower limit frequency ⁇ and the upper limit frequency f3 of the signal band, and distortion can be reduced over the entire signal band. There is a problem.
• the phase changes greatly when the input power is about 10 dBm or more. This is a region where HBT3 is saturated and is not used in applications that require good AM-PM characteristics. This also applies to the AM-PM characteristic in FIG. 16 described later.
• the AM-PM characteristics of the semiconductor device 1 according to the second embodiment were examined using simulation. The results are shown in Fig. 16. Note that the AM-PM characteristic in FIG. 16 is the same as the AM-PM characteristic in FIG. 18, and the output signal that is output when an input signal of the lowest level (eg, ⁇ 20 dBm) is input.
• the phase of is the reference (phase 0 °).
• the resistance value of the ballast resistor 5 is set to 300 ⁇
• the resistance value of the resistor 6 of the oscillation stabilization circuit 4 is set to 1000 ⁇
• the capacitance of the capacitor 7 is set to 0.44 pF, for example.
• the resistance value of the low-distortion resistor 21 is set to 50 ⁇ , for example.
• the phase difference between the lower limit frequency ⁇ and the upper limit frequency f3 of the signal band is reduced to about 0.7 °, which is, for example, about half compared to the fourth comparative example.
• the low-distortion resistor 21 has almost no impedance frequency dependency, so that a part of the AC component of the base current can be bypassed over a wide band. This is because the suppression of the collector current can be reduced.
• this embodiment can provide the same operational effects as those of the first embodiment.
• the low distortion resistance 21 is connected between the input terminal RFin and the bias terminal Bin, the distortion of the high frequency signal RF can be reduced over a wide band. As a result, the high-frequency signal RF can be amplified with less distortion over the entire signal band.
• FIG. 19 shows a power amplifier (power amplification module) using the semiconductor device according to the third embodiment of the present invention.
• a feature of this embodiment is that a plurality of amplifier circuits are monolithically formed on a semiconductor substrate in a state of being connected in parallel to each other.
• the semiconductor substrate 41 constituting the semiconductor device 1 is formed using a semiconductor material such as gallium arsenide (GaAs), and on the surface thereof, an amplifier circuit 2 including an HBT 3, an oscillation stabilizing circuit 4, and a ballast resistor 5 is formed. For example, four are connected in parallel.
• GaAs gallium arsenide
• the ballast resistor 5 and the resistor 6 of the oscillation stabilization circuit 4 are formed on the semiconductor substrate 41 by a resistor such as Ni Cr.
• the capacitor 7 is constituted by, for example, a MIM (MetaHnsulator-Metal) capacitor having an insulating film sandwiched between metal conductor films, and is connected in parallel to the resistor 6.
• the HBT 3 is formed on the semiconductor substrate 41, and the ballast resistor 5, the resistor 6 and the capacitor 7 are connected to the base B, respectively.
• the oscillation stabilization circuit 4 is connected to the high-frequency signal input terminal RFin through an electrode pattern provided on the surface of the semiconductor substrate 41.
• the ballast resistor 5 is a bias terminal Bin using an electrode pattern provided on the surface of the semiconductor substrate 41 in an insulated state with an insulating film (not shown) with respect to the electrode pattern on the input terminal R Fin side. It is connected to the. Furthermore, the emitter E of the HBT3 is connected to the ground terminal GND using a ground electrode provided so as to cover the HBT3, and the collector C of the HBT3 is connected to the output terminal RFout of the high frequency signal using an electrode pattern. As a result, the semiconductor device 1 is monolithically formed on the semiconductor substrate 41.
• the amplifier circuit 2 is configured using the HBT 3, the oscillation stabilization circuit 4 and the ballast resistor 5, and a plurality of amplifier circuits 2 are monolithically formed on the semiconductor substrate in a state of being connected in parallel to each other. ing.
• the area used for the semiconductor substrate 41 can be made almost the same by simply increasing the ballast resistance 5, and the oscillation is high with the same productivity as the conventional technology.
• a power amplifier capable of stability and high output can be formed.
• the amplifier circuit 2 since the plurality of amplifier circuits 2 are monolithically formed on the semiconductor substrate 41 in a state of being connected in parallel with each other, the HBT 3, the noise resistor 5, the resistor 6, and the capacitor 7 formed on the semiconductor substrate 41 are used. Thus, the amplifier circuit 2 can be configured, and an MMI C for amplifying the power of the high-frequency signal can be formed.
• a power amplifier using a semiconductor device 1 including an oscillation stabilization circuit 4 and a ballast resistor 5 thus, while stabilizing oscillation over all frequencies, thermal runaway can be prevented and high output power can be obtained.
• the semiconductor device 1 according to the first embodiment is formed monolithically on the semiconductor substrate 41.
• the present invention is not limited to this.
• the semiconductor device according to the second embodiment may be monolithically formed on a semiconductor substrate.
• a heterojunction bipolar transistor (HBT3) is used as a neuropolar transistor.
• HBT3 a heterojunction bipolar transistor
• the present invention is not limited to this.
• a bipolar transistor other than a heterojunction bipolar transistor may be used.

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• 2005
  • 2005-09-28 DE DE112005002800T patent/DE112005002800B4/de active Active
  • 2005-09-28 WO PCT/JP2005/017827 patent/WO2006057104A1/ja active Application Filing

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