WO2005098877A1 - 静電気対策部品 - Google Patents
静電気対策部品 Download PDFInfo
- Publication number
- WO2005098877A1 WO2005098877A1 PCT/JP2005/005322 JP2005005322W WO2005098877A1 WO 2005098877 A1 WO2005098877 A1 WO 2005098877A1 JP 2005005322 W JP2005005322 W JP 2005005322W WO 2005098877 A1 WO2005098877 A1 WO 2005098877A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- layer
- varistor
- glass
- bismuth oxide
- Prior art date
Links
- 230000005611 electricity Effects 0.000 title abstract description 6
- 230000003068 static effect Effects 0.000 title abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 98
- 229910000416 bismuth oxide Inorganic materials 0.000 claims abstract description 29
- TYIXMATWDRGMPF-UHFFFAOYSA-N dibismuth;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Bi+3].[Bi+3] TYIXMATWDRGMPF-UHFFFAOYSA-N 0.000 claims abstract description 29
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 28
- 238000009792 diffusion process Methods 0.000 claims abstract description 15
- 239000010410 layer Substances 0.000 claims description 100
- 239000012790 adhesive layer Substances 0.000 claims description 18
- 239000011521 glass Substances 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 16
- 239000002241 glass-ceramic Substances 0.000 claims description 15
- 239000002245 particle Substances 0.000 claims description 11
- 239000000843 powder Substances 0.000 claims description 11
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 8
- 239000000654 additive Substances 0.000 claims description 6
- 230000000996 additive effect Effects 0.000 claims description 5
- 238000010304 firing Methods 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 4
- 239000011787 zinc oxide Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 2
- 229910052797 bismuth Inorganic materials 0.000 description 10
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 10
- 238000005245 sintering Methods 0.000 description 7
- 241001411492 Melon leaf curl virus Species 0.000 description 6
- 230000002829 reductive effect Effects 0.000 description 6
- 238000000926 separation method Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910000410 antimony oxide Inorganic materials 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910000428 cobalt oxide Inorganic materials 0.000 description 1
- IVMYJDGYRUAWML-UHFFFAOYSA-N cobalt(ii) oxide Chemical compound [Co]=O IVMYJDGYRUAWML-UHFFFAOYSA-N 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- VTRUBDSFZJNXHI-UHFFFAOYSA-N oxoantimony Chemical compound [Sb]=O VTRUBDSFZJNXHI-UHFFFAOYSA-N 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
- H01C17/06506—Precursor compositions therefor, e.g. pastes, inks, glass frits
- H01C17/06513—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component
- H01C17/06533—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component composed of oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
Definitions
- the present invention relates to an antistatic component used for various electronic devices and the like.
- FIG. 9 is a cross-sectional view of a multilayer chip varistor (hereinafter, referred to as MLCV).
- the MLCV includes a varistor layer 2 having an internal electrode 1 and a terminal 3 connected to the internal electrode 1 on an end face of the varistor layer 2.
- Protective layers 4 are provided on the upper and lower surfaces of the norister layer 2.
- a multilayer chip varistor of the present invention includes a varistor layer and a substrate on which a norister layer is laminated.
- the Norista layer is laminated on the substrate, so that even if the mechanical strength of the varistor layer is small, the mechanical strength of the substrate is added, so that the thickness can be reduced.
- the norister layer is made of a material containing at least oxidized bismuth, and the varistor layer and the substrate are sintered to diffuse the oxidized bismuth into the substrate.
- the substrate is provided with the bismuth oxide diffusion layer, the Norister layer and the substrate become an integral substance, and separation at the interface between the Norister layer and the substrate can be prevented. As a result, it is possible to provide an antistatic component which is reduced in thickness while maintaining the varistor characteristics with respect to a minute surge voltage.
- FIG. 1 is a sectional view of an antistatic component (component) according to an embodiment of the present invention.
- FIG. 2 is an exploded perspective view of the components shown in FIG. 1.
- FIG. 3 is a perspective view of the component shown in FIG. 1.
- FIG. 4 is an enlarged schematic view of the substrate showing a state of oxidized bismuth diffused into the substrate.
- FIG. 5 is a cross-sectional view of the component shown in FIG. 1 before the varistor layer and the substrate are sintered.
- FIG. 6A is an analysis graph showing the component composition of the component shown in FIG. 1.
- FIG. 6B is an analysis graph showing the component composition of the component shown in FIG. 1.
- FIG. 7 is a cross-sectional view of a component according to another embodiment.
- FIG. 8 is a cross-sectional view of the component shown in FIG. 7 before the varistor layer and the substrate are sintered.
- FIG. 9 is a cross-sectional view of an MLCV as a conventional component.
- components in the present embodiment include a varistor layer 12 in which a plurality of planar internal electrodes 11 are buried, a substrate 13 containing alumina in which varistor layers 12 are stacked, It has a terminal 14 connected to the electrode 11 and formed on the side surface of the varistor layer 12.
- the Norista layer 12 is formed by laminating and firing a plurality of unfired green sheets 15 each containing powder of a varistor material containing zinc oxide as a main component and at least bismuth oxide as an additive. ing.
- the average particle size of the varistor material powder is 0.5-2. O / zm
- the average particle size of the bismuth oxide powder is 1.0 m or less. If a conductive paste having a material strength such as silver is applied to the green sheet 15 in a planar shape and laminated, the internal electrodes 11 can be embedded in the varistor layer 12.
- the bismuth oxide of the varistor layer 12 is diffused into the substrate 13 by sintering the Norister layer 12 and the substrate 13, thereby forming a bismuth oxide diffusion layer 16 on the substrate 13.
- the firing of the unfired green sheet 15 containing the powder of the varistor material to form the varistor layer 12 and the sintering of the norister layer 12 and the substrate 13 are performed simultaneously.
- the oxidized bismuth is diffused into the substrate 13 so that the oxidized bismuth particles 17 are interposed at the interface of the alumina particles contained in the substrate 13.
- the substrate 13 is a low-temperature fired ceramic substrate (formed by firing an unfired ceramic sheet that can be fired at a low temperature)
- a flash is applied to the unfired ceramic sheet that can be fired at a low temperature.
- the unsintered green sheets 15 containing the powder of the star material are laminated, and these are simultaneously fired at a firing temperature lower than a general temperature, so that the Norister layer 12 and the substrate 13 can be sintered. In this way, even when a material such as silver is used for the internal electrode 11, heat-induced adverse effects are not given to the internal electrode 11.
- an adhesive layer 18 is provided between the Norister layer 12 and the substrate 13.
- the bismuth oxide is diffused into the substrate 13 through the adhesive layer 18.
- the adhesive layer 18 will be in one of three ways: First, the adhesive layer 18 completely disappears, second, a part of the component remains as the adhesive layer 18, and third, a part of the component diffuses into the varistor layer 12 or the substrate 13.
- FIGS. 6A and 6B show the results of XMA analysis of the component composition near the interface between the varistor layer 12 and the substrate 13.
- FIG. The horizontal axis represents wavelength (that is, energy), and the vertical axis represents intensity.
- the wavelength force the kind of the element is known, and the content of the element is known from the strength.
- the Norista layer 12 contains zinc oxide as a main component and bismuth oxide as an additive, and the substrate 13 is diffused with bismuth oxide.
- a mass diffusion layer 16 is formed.
- the main component means that zinc oxide is 80% by weight or more and the additive is less than 20% by weight.
- the amount of bismuth oxide in the additive is preferably in the range of 50% by weight to 80% by weight.
- additives other than bismuth oxide include cobalt oxide, antimony oxide, and glass. Then, borosilicate glass or the like is used as the glass.
- the mechanical strength of the substrate 13 is added even if the mechanical strength of the varistor layer 12 is small, so that the thickness can be reduced. it can.
- the substrate 13 is an alumina substrate 20 containing alumina, the mechanical strength of the alumina substrate 20 is higher than the mechanical strength of the varistor layer 12.
- the norister layer 12 contains at least bismuth acid Due to the material strength, the varistor layer 12 and the substrate 13 are sintered to diffuse the oxidized bismuth into the substrate 13, and the oxidized bismuth diffusion layer 16 is provided on the substrate 13. In this manner, the Norister layer 12 and the substrate 13 become an integral material, and separation at the interface between the varistor layer 12 and the substrate 13 can be prevented.
- an adhesive layer 18 is provided between the Norister layer 12 and the substrate 13, and bismuth oxide is diffused into the substrate 13 via the adhesive layer 18.
- the bismuth oxide is diffused in a state where the varistor layer 12 and the substrate 13 are prevented from being separated from each other.
- the bismuth oxide diffusion layer 16 By forming the bismuth oxide diffusion layer 16 on the substrate 13, the separation between the Norister layer 12 and the substrate 13 can be prevented.
- the average particle diameter of the varistor material powder is preferably in the range of 0.5 ⁇ m to 2.0 ⁇ m.
- the average particle size of the powder of the bismuth oxide is 1.0 m or less. In this manner, the varistor layer 12 is easily diffused into the substrate 13, and the varistor layer 12 and the substrate 13 can be further prevented from being separated.
- a glass ceramic layer 19 containing glass is laminated on an alumina substrate 20 as a substrate 13. Then, the oxidized bismuth of the Norista layer 12 is diffused into the glass ceramic layer 19 to form the oxidized bismuth diffusion layer 16 on the glass ceramic layer 19.
- the glass of the glass ceramic layer 19 may be diffused into the alumina substrate 20 to form the glass diffusion layer 21 on the alumina substrate 20. This makes it difficult for the Norister layer 12, the glass ceramic layer 19, and the alumina substrate 20 to be separated from each other.
- the Norister layer 12 since the Norister layer 12 is in contact with the glass ceramic layer 19, the influence of the alumina substrate 20 on the varistor layer 12 is smaller than when the alumina substrate 20 and the varistor layer 12 are in contact. Deterioration of the characteristics of the resistor can be suppressed.
- an adhesive layer 18 may be provided between the glass ceramic layer 19 and the alumina substrate 20, and glass may be diffused into the alumina substrate 20 via the adhesive layer 18.
- the glass diffuses into the alumina substrate 20 via the adhesive layer 18 during sintering of the Norister layer 12 and the substrate 13.
- the adhesive layer 18 can be one of three Become one. The first is that the adhesive layer 18 is completely eliminated, the second is that a part of the component remains as the adhesive layer 18, and the third is that a part of the component is diffused into the Norista layer 12 or the alumina substrate 20.
- the glass when the glass is diffused from the glass ceramic layer 19 to the alumina substrate 20, the glass is diffused in a state where the separation between the glass ceramic layer 19 and the alumina substrate 20 is suppressed. In this manner, the glass diffusion layer 21 is formed on the alumina substrate 20 easily and easily, so that separation of the glass ceramic layer 19 and the alumina substrate 20 can be prevented. Further, a glass-ceramic layer 19 containing glass may be laminated on the upper surface of the norister layer 12. As a result, the bismuth oxide of the norister layer 12 is suppressed from being diffused into the air from the surface of the varistor layer 12, and the bismuth oxide is easily diffused into the substrate 13. It is easy to prevent peeling.
- a strong electronic circuit such as another resistor, coil, or capacitor may be formed in such a component.
- a circuit board on which an electronic component circuit is formed is used as the substrate of the present invention, or a circuit layer on which an electronic component circuit is formed is laminated on the surface of the substrate 13 opposite to the side on which the varistor layer 12 is laminated. You may. Electronic component circuits can be made thinner by forming them in thin films. In this way, a thinner antistatic component can be realized by applying it to various electronic devices.
- the component of the present invention can be reduced in thickness while maintaining the varistor characteristics with respect to a minute surge voltage, and can be applied to various electronic devices and the like.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Thermistors And Varistors (AREA)
- Laminated Bodies (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/591,255 US7864025B2 (en) | 2004-04-02 | 2005-03-24 | Component with countermeasure to static electricity |
EP05727186A EP1715494A4 (en) | 2004-04-02 | 2005-03-24 | COMPONENT WITH COUNTERMEASURE AGAINST STATIC ELECTRICITY |
CN2005800119448A CN1942981B (zh) | 2004-04-02 | 2005-03-24 | 抗静电部件 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-109779 | 2004-04-02 | ||
JP2004109779A JP4432586B2 (ja) | 2004-04-02 | 2004-04-02 | 静電気対策部品 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005098877A1 true WO2005098877A1 (ja) | 2005-10-20 |
Family
ID=35125337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/005322 WO2005098877A1 (ja) | 2004-04-02 | 2005-03-24 | 静電気対策部品 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7864025B2 (ja) |
EP (1) | EP1715494A4 (ja) |
JP (1) | JP4432586B2 (ja) |
CN (1) | CN1942981B (ja) |
WO (1) | WO2005098877A1 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006269876A (ja) | 2005-03-25 | 2006-10-05 | Matsushita Electric Ind Co Ltd | 静電気対策部品 |
CN101156221B (zh) * | 2005-04-01 | 2012-02-08 | 松下电器产业株式会社 | 变阻器和使用该变阻器的电子部件模块 |
CN101401172B (zh) * | 2006-03-10 | 2011-01-26 | 卓英社有限公司 | 陶瓷组件元件、陶瓷组件及其制造方法 |
US7741948B2 (en) * | 2006-10-02 | 2010-06-22 | Inpaq Technology Co., Ltd. | Laminated variable resistor |
US8508325B2 (en) | 2010-12-06 | 2013-08-13 | Tdk Corporation | Chip varistor and chip varistor manufacturing method |
JP5799672B2 (ja) * | 2011-08-29 | 2015-10-28 | Tdk株式会社 | チップバリスタ |
JP5696623B2 (ja) * | 2011-08-29 | 2015-04-08 | Tdk株式会社 | チップバリスタ |
KR101309326B1 (ko) * | 2012-05-30 | 2013-09-16 | 삼성전기주식회사 | 적층 칩 전자부품, 그 실장 기판 및 포장체 |
KR101309479B1 (ko) | 2012-05-30 | 2013-09-23 | 삼성전기주식회사 | 적층 칩 전자부품, 그 실장 기판 및 포장체 |
KR101483259B1 (ko) | 2012-08-28 | 2015-01-14 | 주식회사 아모센스 | 무수축 바리스타 기판 및 그 제조 방법 |
WO2014035143A1 (ko) * | 2012-08-28 | 2014-03-06 | ㈜ 아모엘이디 | 무수축 바리스타 기판 및 그 제조 방법 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5577104A (en) * | 1978-12-05 | 1980-06-10 | Matsushita Electric Ind Co Ltd | Method of fabricating thick varistor |
JPS57184207A (en) * | 1981-05-08 | 1982-11-12 | Matsushita Electric Ind Co Ltd | Thick film varistor |
JPS5885502A (ja) * | 1981-11-17 | 1983-05-21 | 松下電器産業株式会社 | 厚膜バリスタの製造法 |
JPH11233309A (ja) * | 1998-02-10 | 1999-08-27 | Murata Mfg Co Ltd | 積層バリスタ |
JPH11251152A (ja) * | 1998-03-03 | 1999-09-17 | Matsushita Electric Ind Co Ltd | 複合部品およびその製造方法 |
JP2001326108A (ja) * | 2000-05-18 | 2001-11-22 | Mitsubishi Electric Corp | 電圧非直線抵抗体およびその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1346851A (en) * | 1971-05-21 | 1974-02-13 | Matsushita Electric Ind Co Ltd | Varistors |
DE2735484C2 (de) * | 1977-08-05 | 1984-06-07 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung von Dickfilm-Varistoren mit Zinkoxid als Hauptkomponente |
JPS5577103A (en) * | 1978-12-05 | 1980-06-10 | Matsushita Electric Ind Co Ltd | Method of fabricating thick varistor |
JPS63316405A (ja) * | 1987-06-18 | 1988-12-23 | Matsushita Electric Ind Co Ltd | 厚膜バリスタ |
CN1034370A (zh) | 1988-01-22 | 1989-08-02 | 上海科技大学 | 电子束辐射合成水凝胶材料的方法 |
EP0581969B1 (en) * | 1992-02-25 | 1999-10-06 | Matsushita Electric Industrial Co., Ltd. | Zinc oxide varistor and production thereof |
JP2970191B2 (ja) * | 1992-03-27 | 1999-11-02 | 松下電器産業株式会社 | 酸化亜鉛バリスタ用電極材料 |
JP3453857B2 (ja) | 1994-07-20 | 2003-10-06 | 松下電器産業株式会社 | 積層型バリスタの製造方法 |
TW394961B (en) * | 1997-03-20 | 2000-06-21 | Ceratech Corp | Low capacitance chip varistor and fabrication method thereof |
CN1251250C (zh) * | 2001-04-05 | 2006-04-12 | 佳邦科技股份有限公司 | 暂态过电压保护元件的材料 |
-
2004
- 2004-04-02 JP JP2004109779A patent/JP4432586B2/ja not_active Expired - Fee Related
-
2005
- 2005-03-24 CN CN2005800119448A patent/CN1942981B/zh not_active Expired - Fee Related
- 2005-03-24 US US10/591,255 patent/US7864025B2/en not_active Expired - Fee Related
- 2005-03-24 WO PCT/JP2005/005322 patent/WO2005098877A1/ja active Application Filing
- 2005-03-24 EP EP05727186A patent/EP1715494A4/en not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5577104A (en) * | 1978-12-05 | 1980-06-10 | Matsushita Electric Ind Co Ltd | Method of fabricating thick varistor |
JPS57184207A (en) * | 1981-05-08 | 1982-11-12 | Matsushita Electric Ind Co Ltd | Thick film varistor |
JPS5885502A (ja) * | 1981-11-17 | 1983-05-21 | 松下電器産業株式会社 | 厚膜バリスタの製造法 |
JPH11233309A (ja) * | 1998-02-10 | 1999-08-27 | Murata Mfg Co Ltd | 積層バリスタ |
JPH11251152A (ja) * | 1998-03-03 | 1999-09-17 | Matsushita Electric Ind Co Ltd | 複合部品およびその製造方法 |
JP2001326108A (ja) * | 2000-05-18 | 2001-11-22 | Mitsubishi Electric Corp | 電圧非直線抵抗体およびその製造方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1715494A4 * |
Also Published As
Publication number | Publication date |
---|---|
CN1942981B (zh) | 2010-05-05 |
JP2005294673A (ja) | 2005-10-20 |
CN1942981A (zh) | 2007-04-04 |
EP1715494A1 (en) | 2006-10-25 |
EP1715494A4 (en) | 2010-03-17 |
US20070171025A1 (en) | 2007-07-26 |
JP4432586B2 (ja) | 2010-03-17 |
US7864025B2 (en) | 2011-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2005098877A1 (ja) | 静電気対策部品 | |
KR101769037B1 (ko) | 적층형 소자 및 이를 구비하는 전자기기 | |
US9363896B2 (en) | Ceramic electronic component and method for manufacturing the same | |
KR101321836B1 (ko) | 적층 세라믹 전자부품 | |
KR102048094B1 (ko) | 전자 부품 및 이의 제조 방법 | |
KR101760877B1 (ko) | 복합 소자 및 이를 구비하는 전자기기 | |
WO2006106717A1 (ja) | バリスタおよびそれを用いた電子部品モジュール | |
WO2005088654A1 (ja) | 静電気対策部品 | |
JP4432489B2 (ja) | 静電気対策部品の製造方法 | |
KR102076152B1 (ko) | 적층 세라믹 커패시터 및 적층 세라믹 커패시터 실장 기판 | |
KR20180078189A (ko) | 복합 소자의 제조 방법, 이에 의해 제조된 복합 소자 및 이를 구비하는 전자기기 | |
JP4074299B2 (ja) | 積層型チップバリスタ | |
JP2006269876A (ja) | 静電気対策部品 | |
KR20140046301A (ko) | 적층 세라믹 전자부품 및 이의 제조방법 | |
KR20130026217A (ko) | 자성체 기판, 커먼모드필터, 자성체 기판 제조방법 및 커먼모드필터 제조방법 | |
JP3008567B2 (ja) | チップ型バリスタ | |
JP5760894B2 (ja) | 静電気保護素子 | |
KR101958775B1 (ko) | 복합 보호 소자 및 이를 구비하는 전자기기 | |
JP2000012375A (ja) | 積層セラミック電子部品 | |
JP2008270391A (ja) | 積層型チップバリスタおよびその製造方法 | |
JP2006313877A (ja) | 静電気対策部品 | |
JP2022552069A (ja) | 多層バリスタ及び多層バリスタの製造方法 | |
WO2012153655A1 (ja) | Esd保護デバイス | |
CN116387033A (zh) | 多层电子组件 | |
KR19980067591A (ko) | 칩 바리스터(Chip Varistor) 및 그 설치 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2005727186 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007171025 Country of ref document: US Ref document number: 10591255 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 200580011944.8 Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 2005727186 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 10591255 Country of ref document: US |