WO2005003793A1 - プローブカード及びプローブシートまたはプローブカードを用いた半導体検査装置および半導体装置の製造方法 - Google Patents
プローブカード及びプローブシートまたはプローブカードを用いた半導体検査装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- WO2005003793A1 WO2005003793A1 PCT/JP2004/009412 JP2004009412W WO2005003793A1 WO 2005003793 A1 WO2005003793 A1 WO 2005003793A1 JP 2004009412 W JP2004009412 W JP 2004009412W WO 2005003793 A1 WO2005003793 A1 WO 2005003793A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- metal film
- electrodes
- contact terminals
- probe
- probe card
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06733—Geometry aspects
- G01R1/06744—Microprobes, i.e. having dimensions as IC details
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/0735—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card arranged on a flexible frame or film
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
Definitions
- the present invention relates to a probe card, a semiconductor inspection apparatus using a probe sheet or a probe card, and a method for manufacturing a semiconductor device.
- FIG. 1 In a semiconductor device manufacturing process performed after a semiconductor element circuit is formed on a wafer, an example of a flow of an inspection process is mainly described as an example of a packaged product, a bare chip, and a CSP, which are typical types of semiconductor device shipping. This is shown in FIG.
- FIG. 1 In the manufacturing process of a semiconductor device, the following three inspections are roughly performed as shown in FIG. First, it is performed in a wafer state where the semiconductor element circuits and electrodes are formed on the wafer, and a wafer inspection is performed to understand the conduction state and the operation state of the electric signal of the semiconductor element. Subsequently, the semiconductor element is unstable at a high temperature or a high applied voltage. These are burn-in inspections for extracting semiconductor devices and screening inspections to understand product performance before shipping semiconductor devices.
- US Pat. No. 5,461,326 is a prior art of a device (semiconductor inspection device) used for testing such a semiconductor device.
- the technique of U.S. Pat.No. 5,461,326 is provided with a thin film support frame, a flexible thin film secured to the support frame, and a central region on the outer surface of the thin film to be pressed onto the contact pads of the device under test. Multiple test probe contacts, multiple conductive traces on the membrane connecting each probe contact to the test circuit, and the probe test contacts being pressed onto the contact pads of the equipment to be tested.
- a self-leveling thin film test probe comprising:
- a contact pressure applying means for applying pressure to the contact terminal group and a compliance mechanism in which, when the tip end face of the contact terminal group is brought into contact with the surface of the electrode group, the tip end face of the contact terminal group comes out parallel to the electrode group surface.
- a detection system that performs electrical detection by bringing the connection device into contact with an electrode of an object to be detected.
- the thin film is in a stretched state, the arrangement of the distal end portion of the contact terminal is expanded, and it is difficult to secure the positional accuracy of the distal end. Furthermore, the pivot post and the pressure plate may be hit against the test object in an inclined state by the initial parallelizing mechanism, and there is a great risk of damaging the test object. .
- the probing corresponding to the narrow pitch multi-pins accompanying the increase in the density of the object to be inspected such as a semiconductor element is performed by using the object to be inspected. And ensure the position accuracy of the tip of the contact terminal without damaging the contact terminal. It was unsatisfactory to realize a method that was stable under load and easy to assemble.
- the pitch of the electrodes has become narrower (for example, about 0.1 mm or less) and the density has been further increased. Operation tests at high temperatures (for example, 85 ° C and 150 ° C) for grasping the tendency have been conducted, and a detection device that can cope with these has been desired.
- An object of the present invention is to provide a probe card having a probe sheet capable of ensuring the positional accuracy of the tip end of a contact terminal and reliably detecting a semiconductor element having a narrow pitch electrode structure, and the probe sheet or the probe.
- An object of the present invention is to provide an inspection method and apparatus using a card.
- a probe having a plurality of contact terminals that come into contact with electrodes provided on an object to be inspected, wiring drawn out from each of the contact terminals, and a multilayer wiring board having electrodes that are electrically connected to the wiring.
- an electrode of the multilayer wiring board and the wiring are electrically connected through a peripheral electrode.
- a multilayer wiring board electrically connected to a tester for inspecting electrical characteristics of a device under test, a plurality of peripheral electrodes connected to electrodes of the multilayer wiring substrate, and a plurality of peripheral electrodes provided on the device under test.
- a probe sheet having a plurality of contact terminals in contact with the electrodes, wherein the probe sheet further comprises a first metal film formed so as to surround the plurality of contact terminals. And a second metal film formed so as to surround the first metal film.
- Dicing the wafer and separating each of the semiconductor elements, wherein the step of detecting the electrical characteristics of the semiconductor elements comprises:
- a plurality of contact terminals for contacting the electrodes of the semiconductor element Using a probe sheet having a first metal film formed as described above and a second metal film formed so as to surround the first metal film,
- a semiconductor device may be in a wafer state (eg, FIG. 1A) on which circuits are formed, or may be a semiconductor device (eg, FIG. 1B), and may be packaged thereafter. (QFP, BGA, CSP, etc.).
- FIG. 1B is an example of the object to be inspected, and the arrangement of the electrodes 3 does not matter whether it is a peripheral electrode arrangement or a full-surface electrode arrangement.
- the probe sheet refers to a sheet having contact terminals that come into contact with an electrode to be tested and wiring drawn out therefrom.
- a probe card is a structure that is connected to an electrode to be tested and functions as a connector for electrically connecting a tester, which is a measuring instrument, to the test object (for example, the structure shown in FIGS. 2A and 2B). Structure).
- FIG. 2A is a cross-sectional view showing a main part of the probe card according to the first embodiment of the present invention
- FIG. 2B is an exploded perspective view showing main components thereof.
- a support member (upper fixing plate) 7 and an intermediate plate 24 screwed to the support member 7 are fixed to the center of the probe card so as to be adjustable in the height direction.
- a spring 12b which has a projection 12a, serves as a center pivot, and is provided with a spring 12b for applying a pressing force to the probe sheet 6 via a push piece 22 movable with the tip of the projection 12a as a fulcrum.
- a frame 21 bonded and fixed to the back surface so as to surround the region where the plurality of contact terminals 4 of the probe sheet 6 are formed, and the back surface of the region of the probe sheet 6 where the contact terminals 4 are formed.
- an intermediate plate 24 having a cushioning member 23 such as a silicone sheet and a push piece 22 at the center thereof and screwed to the frame 21. Then, the support member 7 is parallelized between the surface of the contact terminal 4 of the probe card and the corresponding electrode surface of the semiconductor element by the parallel adjustment screw 25 provided on the support member 7.
- the push probe 22 held at the front end of the spring probe 12 installed at the center of the intermediate plate 24 so as to be tilted slightly by the projection 12a at the tip of the spring probe 12 is moved to a desired position by the spring probe 12.
- a substantially constant pressing force for example, about 500 pins, about 20 mm at a pushing amount of 150 ⁇ m
- a desired substantially constant pressing force is applied to the area where a plurality of contact terminals are formed.
- a compliance mechanism with a structure that gives a pressing force is formed at the center of the upper surface of the push piece 22.
- the probe sheet 6 has a plurality of contact terminals 4 for contacting the electrode group 3 of the semiconductor element 2 in the central area on the probing side of the sheet.
- a metal film 30b is formed in a region corresponding to the metal film 30a and the frame 21 so as to double surround the contact terminal 4, and signals are transmitted / received to / from the multilayer wiring board 50 around four sides of the probe sheet 6.
- a plurality of peripheral electrodes 5 are formed, and a metal film 30c is formed in a region corresponding to the peripheral electrode fixing plate 9 so as to surround the peripheral electrode 5, and a metal film 30c is formed between the contact terminal 4 and the peripheral electrode 5.
- the probe sheet 6 is formed with a large number of lead wires 20 formed thereon.
- a frame 21 is adhered and fixed to the rear surface of the probe sheet 6 in the area where the contact terminals 4 are formed, and the peripheral electrode is fixed to the rear surface of the portion of the probe sheet 6 for transmitting and receiving signals where the peripheral electrode 5 is formed.
- the plate 9 is fixed by bonding.
- the frame 21 is screwed to the intermediate plate 24.
- the spring probe 12 is fixed to the intermediate plate 24, and the projection 12 a at the lower end is configured to engage with a conical groove 22 a formed at the center of the upper surface of the push piece 22.
- the metal film 30d may be formed also in the center.
- the metal film 30c has a pattern of knocking pin holes 30e and screw insertion holes 30f for positioning. Thereby, the assemblability can be improved.
- a knock pin hole 30 e for positioning the metal film 30 c, a corresponding knock pin hole 50 e of the multilayer wiring board 50, a knock pin hole 33 e of the lower holding plate 33, and the surroundings Using the knock pin holes 9 e of the electrode fixing plate 9, the entirety is positioned by the dowel pins 34, and the peripheral electrode fixing plate 9 is screwed and fixed to the lower holding plate 33.
- a peripheral holding plate 32 is sandwiched between the peripheral electrode fixing plate 9 fixed to the probe sheet 6 so as to surround the group of the peripheral electrodes 5, and a dowel pin hole 9 e of the peripheral electrode fixing plate 9 and the periphery are formed.
- the group of peripheral electrodes 5 is connected to the electrodes 50a of the multilayer wiring board 50 via the cushioning material 31. Press and connect.
- the metal film 30a secures the positional accuracy of the contact terminal group, and has a flexible probe system without the metal film 30 between the metal film 30b formed in the region corresponding to the frame 21 and the metal film 30a inside the metal film 30b. It is possible to realize a structure in which the copying operation can be performed while maintaining the portion lined with the metal film at the subtle inclination of the wafer surface to be contacted in the contact area.
- the metal film 30a since the plurality of contact terminals 4 are surrounded by the metal film 30a, it is possible to prevent an extra stress from being applied to a region where the contact terminals are formed at the time of the inspection operation. Contact can be realized.
- the metal film 30 can be made to substantially match the object to be inspected (silicon wafer). , The position accuracy of the contact terminal tip can be secured even at high temperatures
- the strength of the probe sheet 6 is reduced by forming the metal film 30c in the region corresponding to the peripheral electrode fixing plate 9 so as to surround the group of the peripheral electrodes 5 in the peripheral portion of the probe sheet 6.
- the positional accuracy of the peripheral electrode group can be ensured, and handling during assembly becomes easy.
- the assembling work can be facilitated.
- FIG. 3A is a sectional view showing a main part of a connection device according to a second embodiment of the present invention
- FIG. 3B is an exploded perspective view showing main components thereof.
- the second embodiment of the present connection device differs from the first embodiment in that a spring plunger 13 and a protruding pusher are used instead of the spring probe 12 as a means for applying a pressing force to the pusher piece 22.
- a pin 14 or using a structure in which the intermediate plate 24 to which the spring plunger 13 is fixed and the supporting member 7 are movably held by a leaf spring 15 or a contact terminal group of the metal film 3 Oa. If there is an interval in the center of 4, the point is that the metal film 30d is also formed in the center. Any of the changes can be implemented in combination with the structure disclosed in the example of the first embodiment as necessary.
- the compliance mechanism for applying a desired substantially constant pressing force is not limited to the above embodiment, and may be variously changed.
- FIGS. 4A to 4H show, among the manufacturing processes for forming the probe card shown in FIGS. 2A and 2B, a truncated pyramid-shaped hole formed by anisotropic etching in a silicon wafer 80 as a mold.
- a metal film is bonded to the polyimide sheet with a polyimide adhesive sheet, and a reinforcing plate and a positioning knock pin hole are formed on the metal film.
- the manufacturing process for forming the probe sheet 6 formed by etching is shown in the order of steps.
- a silicon dioxide film 81 of about 0.5 ⁇ m is formed on both sides of the (100) plane of a silicon wafer 80 having a thickness of 0.2-0.6 mm by thermal oxidation, a photoresist is applied, and photolithography is performed.
- the silicon dioxide film 81 is etched and removed with a mixed solution of hydrofluoric acid and ammonium fluoride using the photoresist as a mask.
- the silicon wafer 80 is anisotropically etched with a strong alkaline solution (for example, potassium hydroxide) to form a truncated pyramid-shaped etching hole 80a surrounded by a (111) plane. Is performed.
- a strong alkaline solution for example, potassium hydroxide
- the die material using the silicon wafer 80 as a die material can be variously changed as long as it has crystallinity.
- the hole formed by anisotropic etching has a truncated pyramid shape. Various changes can be made within the range described above. Also, it is possible to contact the electrode to be contacted with a plurality of contact terminals.
- the step shown in FIG. 4B is performed.
- the silicon dioxide film 81 used as a mask is removed by etching with a mixed solution of hydrofluoric acid and ammonium fluoride, and the entire surface of the silicon wafer 80 is again thermally oxidized in wet oxygen to form the silicon dioxide film 82.
- a conductive coating 83 is formed on the surface
- a polyimide film 84 is formed on the surface of the conductive coating 83
- a contact terminal 4 is formed at the position where the contact terminal 4 is to be formed.
- a step of removing a certain polyimide film 84 up to the surface of the conductive coating 83 is executed.
- a chromium film having a thickness of about 0.1 / m is formed by forming a chromium film by a sputtering method or an evaporation method.
- a copper film having a thickness of about 1 ⁇ m may be formed by depositing copper on the surface by sputtering or vapor deposition.
- a copper film having a thickness of several meters may be formed on the copper film so as to increase the resistance to laser radiation.
- laser drilling or dry etching with an aluminum mask formed on the surface of the polyimide film 84 may be used.
- the step shown in FIG. 4C is performed.
- the conductive coating 83 is used as an electrode, and a material having high hardness is used as a main component, and the contact terminal 4 and the connection electrode portion 4b are electrically attached to the conductive coating 83 exposed at the opening of the polyimide film 84.
- a material having a high hardness for example, nickel terminal 8a, rhodium 8b, and nickel 8c are sequentially plated to form contact terminal portion 8 integrally with contact terminal 4 and connection electrode portion 4b.
- a conductive coating 86 is formed on the contact terminal portion 8 and the polyimide film 84, a photoresist mask 87 is formed, and a wiring material 88 is applied.
- a chromium film having a thickness of about 0.1 ⁇ m is formed by forming a chromium film by a sputtering method or a vapor deposition method.
- a copper film having a thickness of about 1 ⁇ m may be formed by forming copper on the surface by sputtering or vapor deposition. Further, copper may be used as a wiring material.
- the step shown in FIG. 4D is performed.
- the photoresist mask 87 is removed, and the conductive coating 86 is soft-etched and removed using the wiring material 88 as a mask.
- an adhesive layer 89 and a metal film 30 are formed, and a photoresist mask 91 is formed on the metal film 30. I can do it.
- the adhesive layer 89 for example, a polyimide-based adhesive sheet or an epoxy-based adhesive sheet may be used.
- a 42 alloy linear expansion coefficient of 4 ppm Z ° C with an alloy of 42% nickel and 58% iron
- invar for example, a linear expansion coefficient of 1% with an alloy of 36% nickel and 64% iron.
- 5 ppm / ° C and a metal sheet close to the linear expansion coefficient of a silicon wafer (silicon mold material) 80 are bonded to a polyimide film 84 on which a wiring material 88 is formed with an adhesive layer 89.
- the strength of the formed probe sheet 6 can be increased, the area can be increased, and positional accuracy can be ensured under various conditions, such as prevention of displacement due to temperature during inspection.
- a material having a linear expansion coefficient close to the linear expansion coefficient of the semiconductor element to be inspected may be used as the metal film 30 in order to ensure positional accuracy during burn-in inspection.
- the bonding step is performed, for example, by using a polyimide film on which the contact terminals 8 and the wiring material 88 are formed.
- the step shown in FIG. 4E is performed.
- a process ring 95 is fixed to the metal film 30 with an adhesive 96, a protective film 97 is bonded to the process ring 95, and the center is cut out.
- the protective film 98 as a mask, the silicon dioxide 82 is removed by etching with a mixed solution of hydrofluoric acid and ammonium fluoride.
- spray etching may be performed with a ferric chloride solution.
- the photoresist mask may be a liquid resist or a film resist (dry film).
- the step shown in FIG. 4F is performed.
- the protective films 97 and 98 are used.
- a silicon etching protection jig 100 is attached to remove silicon by etching.
- the process ring 95 is screwed to the intermediate fixing plate 100d, and is mounted between the stainless fixing jig 100a and the stainless steel lid 100b via the o-ring 100c. May be removed by etching with a strong alkaline solution (for example, potassium hydroxide).
- a strong alkaline solution for example, potassium hydroxide
- the step shown in FIG. 4G is performed.
- the protective jig 100 for silicon etching was removed, and a protective film was adhered to the process ring 95 as in FIG. 4D, and the silicon dioxide 82, the conductive coating 83 (chromium and copper), and the nickel 8a were removed by etching.
- the protective film After removing the protective film, apply an adhesive 96b between the frame 21 of the probe sheet and the metal film 30b, and between the peripheral electrode fixing plate 9 and the metal film 30c. It is fixed at a fixed position.
- the silicon dioxide film 82 may be removed by etching with a mixture of hydrofluoric acid and ammonium fluoride, the chromium film may be removed by etching with a potassium permanganate solution, and the copper film and the nickel film 8a may be removed by etching with an alkaline copper etching solution. .
- rhodium plating 8b exposed on the contact terminal surface is used because the hardness of the electrode 3 is higher than that of Eckenole, which is hard to be oxidized, and the contact resistance is low. This is because it is stable.
- 5A to 5E show another manufacturing process for forming a probe sheet in the order of steps.
- a pyramid-shaped etching hole 80a is formed in the silicon wafer 80 shown in FIG. 4A, a silicon dioxide film 82 is formed on the surface thereof, and a connection terminal is formed on the surface of the conductive coating 83 formed thereon.
- a step of forming a photoresist mask 85 so as to open the portion 8 is performed.
- the conductive coating 83 is applied.
- a step is performed in which the contact terminals 4a and the connection electrode portions 4b are integrally formed as a power supply layer by electroplating, and the photoresist mask 85 is removed.
- the plating material for example, nickel 8a, rhodium 8b, and nickel 8c are sequentially plated to form the contact terminal portion 8 integrally with the contact terminal 4a and the connection electrode portion 4b.
- a polyimide film 84b is formed so as to cover the contact terminal portion 8 and the conductive coating 83, and the polyimide film 84b at a position where a lead wiring connection hole from the contact terminal portion 8 is to be formed is formed. Then, the contact material is removed to the surface of the contact terminal portion 8, a conductive coating 86 is formed on the polyimide film 84b, a photoresist mask 87 is formed, and then a wiring material 88 is deposited.
- a chromium film having a thickness of about 0.1 ⁇ m is formed by a method or a vapor deposition method, and copper is formed on the surface on which the chromium film is formed by a sputtering method or a vapor deposition method.
- a copper film having a thickness of about 1 ⁇ m may be formed.
- the wiring material use copper plating or nickel plated copper plating.
- the step shown in FIG. 5D is performed.
- the photoresist mask 87 is removed, the conductive coating 86 is removed by etching using the wiring material 88 as a mask, the adhesive layer 89 and the metal film 90 are bonded, and the metal film 90 is etched with the photoresist mask.
- a desired metal film pattern is formed.
- the probe sheet is attached to the probe card 105 as shown in FIG. 5E.
- the method of manufacturing the probe sheet is the same as the method of manufacturing the probe sheet described with reference to FIGS. 4A-4H and FIGS. 5A-5E, except that a plating film for selective etching is initially formed.
- the selective plating film 61 secures the height of the contact terminals (the amount of protrusion of the polyimide film). It is something you need to do. In this manufacturing process, even when making contact terminals using holes formed by anisotropic etching as mold members, the height can be adjusted independently and freely while maintaining a narrow pitch and high density of contact terminals. You.
- FIGS. 6A to 6G An example of a manufacturing method for forming a probe sheet using the selective plating film 61 will be described below with reference to FIGS. 6A to 6G.
- a pyramid-shaped etching hole is formed in the silicon wafer 80, and a silicon dioxide film 82 and a conductive coating 83 are formed on the surface thereof.
- a pattern of a photoresist 60 or a dry film is formed on a portion where the contact terminal portion 8 is to be formed.
- the step shown in FIG. 6B is performed.
- the selective plating film 61 is deposited.
- the selective plating film 61 for example, copper is plated by 1050 ⁇ m.
- a chromium film is formed on the surface of the photoresist 60 and the selective plating film (copper plating layer) 61, a polyimide film 62 is formed on the surface, and an aluminum mask 63 is formed on the surface of the polyimide film 62.
- the chromium film having a thickness of about 0.1 / m is formed in order to secure adhesion to polyimide in the process, and the chromium film can be omitted.
- the step shown in FIG. 6D is performed.
- the aluminum film 63 formed on the surface of the polyimide film 62 is used to remove the polyimide film 62 and the photoresist 60 by laser or dry etching to remove the portion corresponding to the portion where the contact terminal portion 8 is formed. Is executed.
- the step shown in FIG. 6E is performed.
- the aluminum mask 63 is removed, the conductive coating 83 and the selective plating film 61 are used as electrodes, and a material having a high hardness is used as a main component to perform electroplating.
- 4b is integrally formed.
- a plating material having high hardness for example, nickel contact 8a, rhodium 8b, and nickel 8c may be sequentially plated to form the contact terminal portion 8 integrally with the contact terminal 4a and the connection electrode portion 4b.
- the probe sheet shown in FIG. 6G is formed by the same steps as in FIGS. 4E to 4G.
- a plating film for selective etching is initially formed in the same manner as in FIGS. 6A to 6G in order to secure the height of the contact terminal (projection amount from the polyimide film). Except for this point, the method is the same as the method of manufacturing the probe sheet described in FIGS. 4A-4H and FIGS. 5A-5E.
- the difference from the process shown in FIGS. 6A-6G is that the photoresist 60 formed on the portion where the contact terminal portion 8 is formed is removed and the contact terminal portion is integrally filled with polyimide.
- FIGS. 7A to 7E2 An example of a manufacturing method for forming a probe sheet using the selective plating film 61 will be described below with reference to FIGS. 7A to 7E2.
- a pyramid-shaped etching hole is formed in a silicon wafer 80, a silicon dioxide film 82 and a conductive coating 83 are formed on the surface thereof, and a contact terminal portion 8 is formed.
- a pattern of a photoresist 60 or a dry film is formed on the portion to be formed, and a selective plating film 61 is deposited using the conductive coating 83 as an electrode.
- the photoresist 60 is completely removed up to the surface of the conductive coating 83, and thereafter, a chromium film 64 is formed, and a polyimide film is formed by filling the contact terminals integrally with the polyimide 62a. In this case, the chromium film can be omitted.
- the probe sheet shown in FIG. 6G is formed in the same steps as in FIGS. 6D to 6G.
- the polyimide adhesive layer and the polyimide film are removed around the contact terminals by laser or dry etching or the like, and are reinforced with the metal film.
- a cantilever having a contact terminal portion supported by a wiring material or a cantilever as shown in FIG. 7E may be formed.
- the height of the contact surface of the contact terminal varies and the absorption amount can be increased.
- the structure of these cantilever beams or cantilever beams may be formed in the same manner in other probe sheet manufacturing methods.
- FIGS. 8A to 8D a method of manufacturing the probe sheet according to the fifth embodiment will be described. The fabrication process will be described.
- the contact terminals 8 are formed using a photoresist 65, and the photoresist 65 is removed to expose the contact terminals 8, and after covering with a polyimide film 84b,
- the method is the same as the method for manufacturing the probe sheet described with reference to FIGS. 6A to 6G, except that a part of the polyimide film 84b is removed to form the lead wiring 88.
- the step shown in FIG. 8A is performed.
- This step is similar to the steps shown in FIGS. 6A to 6E, and uses the pattern of the photoresist 65 on the surface of the selective plating film 61 to form a pyramid-shaped etching hole formed in the silicon wafer 80 as a mold material to form the contact terminal portion 8.
- the step shown in FIG. 8B is performed.
- the photoresist 65 is removed, the surface of the contact terminal portion 8 opposite to the silicon wafer 80 is exposed, covered with a polyimide film 84b, and then an aluminum mask 63a is formed.
- the step shown in FIG. 8C is performed.
- the polyimide film 84b at a portion connected to the lead-out wiring 88 is removed to reach the surface of the contact terminal portion 8, and then the lead-out wiring and bonding are performed in the same process as FIG. 6F. This forms the pattern of the layer 89 and the metal film 30.
- the probe sheet shown in FIG. 8D is formed by the same steps as in FIGS. 4E to 4G.
- a probe sheet surface both surfaces or one surface
- a probe sheet structure sandwiching a ground layer Just fine.
- a sputtered film of a conductive material is formed on the surface on which the pattern of the metal film is formed. Chromium, titanium, copper, gold, nickel, etc. can be used alone or in combination as a sputtering film material.
- the metal film 30 it is also possible to leave the metal film 30 as much as possible and use it as the ground layer 70.
- a copper film is drawn out of the adhesive layer 89 on the lead wiring 20 and the metal film 30. It may be formed as a multilayer film between them and used as the ground layer 70.
- FIG. 10 for example, immediately after FIG. 4F, the silicon wafer 80 is etched away, and at the stage where the conductive coating 83 is exposed on the surface, a photoresist mask is formed and the conductive coating 83 is grounded. It is also possible to form the layer 70.
- the method of forming the ground layer of the probe sheet can be applied to the probe cards of any of the manufacturing methods shown in FIGS. 4A and 8D described above.
- FIGS. 14A and 14B are cross-sectional views in which the ground layer 70 and the power supply layer 71 are formed in a sheet shape, and the mounted components 72 are connected to the sequentially laminated probe sheet 6, and FIG. 14B is a plan view in which the mounted components 72 are connected to the surface of the probe sheet 6.
- a schematic diagram is shown. For example, when connecting the mounted component 72 to the probe sheet 6 in the state shown in Fig.
- the wiring width of the ground and power supply wiring as wide as possible to reduce the wiring resistance, and connect the ground wiring and the power supply wiring.
- the insulating layer that will be the connection electrode for the components to be mounted on each wiring is drilled using a drilling technique such as laser or dry etching.
- a via forming hole 72a is provided, the hole is filled with a conductive material 72b such as solder or plating, and the mounted component 72 may be bonded to the probe sheet 6 by solder bonding or metal diffusion bonding.
- the pattern of the peripheral electrode group 5 for conducting the group of the peripheral electrode 5 of the probe sheet 6 to the electrode group 5 Oa formed on the surface of the multilayer wiring substrate 50 and the corresponding electrode of the multilayer wiring substrate 50 An example of the pattern of group 50a is shown in FIG.
- the wirings 20 and the peripheral electrodes 5 of the probe sheet 6 are formed, for example, by forming thin-film wirings by the manufacturing process of FIGS. 4A to 8D so that the contact terminals protrude from one surface of the polyimide sheet.
- the wiring 20 is formed inside. Therefore, since the wiring 20 is covered with the polyimide, the wiring 20 does not come into contact with the electrode group 50a formed on the surface of the multilayer wiring board 50, so that a short circuit does not occur.
- the group of the peripheral electrodes 5 of the probe sheet 6 is positioned using the above-mentioned knock pins 34 to the electrode group 50a connected to the internal wiring 50b of the multilayer wiring board 50 by the through-hole vias 50d, and the buffer material 31 is placed. Holding plate around The two electrodes are pressed against each other.
- the formation of a plurality of peripheral electrodes 5 of the probe sheet 6 with respect to the individual electrodes 50a reduces the possibility of contact failure due to abnormal contact surface, foreign matter, unevenness, etc. This is to ensure that the contact has been made.
- the provision of a plurality of contact terminals on each of the peripheral electrodes 5 may be formed when the dimensions of the electrodes have a margin, and it is needless to say that only one contact terminal may be provided.
- the peripheral electrode 5 can be a contact terminal having a pyramid shape or a truncated pyramid shape.
- a contact terminal with hardness can achieve stable contact characteristics with low contact pressure, and since it is formed by the photolithography process, a connection with good tip position accuracy can be achieved. realizable. Since the tip position accuracy is good for the above-described reason, accurate connection with the electrode group 50a of the multilayer wiring board 50 can be easily realized only by positioning using the positioning holes.
- the peripheral electrodes 5 for connecting to the electrode group 50a of the multilayer wiring board can be formed together with the contact terminals 4 for connecting the wafer electrodes on the same surface side, which is efficient.
- FIG. 11 is a diagram showing an overall configuration of an inspection system including a semiconductor inspection device according to the present invention.
- FIG. 11 shows a test apparatus for performing an electrical characteristic inspection by applying a desired load to the surface of the wafer 1.
- the load of the spring probe 12 is applied to all the contact terminals, and the contact terminal 4, which is in contact with the electrode 3 of the wafer 1, the lead-out wiring 20, the peripheral electrode 5, the electrode 50a of the wiring board 50, the internal wiring 50b, and the connection
- An electric signal for inspection is transmitted / received to / from a tester (not shown) for inspecting electric characteristics of the semiconductor device through the terminal 50c.
- the probe card is configured as a wafer prober.
- the inspection system includes a sample support system 160 that supports a semiconductor wafer 1 to be inspected, and a probe card 120 that contacts an electrode 3 of the inspection object (wafer) 1 to transmit and receive an electric signal.
- a drive control system 150 for controlling the operation of the sample support system 160, a temperature control system 140 for controlling the temperature of the test object 1, and a test of the electrical characteristics of the semiconductor element (chip) 2.
- a tester 170 that performs This semiconductor wafer 1 has a large number of semiconductor elements (chips) arranged thereon, and a plurality of electrodes 3 as external connection electrodes are arranged on the surface of each semiconductor element.
- the sample support system 160 includes a sample stage 162 provided with the semiconductor wafer 1 detachably mounted thereon and provided substantially horizontally, an elevating shaft 164 vertically arranged to support the sample stage 162, and an elevating shaft It comprises a lifting drive 165 that drives the 164 up and down, and an XY stage 167 that supports the lifting drive 165.
- the X—Y stage 167 is fixed on the housing 166.
- the elevating / lowering drive unit 165 includes, for example, a stepping motor.
- the positioning operation of the sample table 162 in the horizontal and vertical directions is performed by combining the moving operation of the XY stage 167 in the horizontal plane, the vertical movement by the elevation drive unit 165, and the like.
- the sample table 162 is provided with a rotation mechanism (not shown) so that the sample table 162 can be rotationally displaced in a horizontal plane.
- the probe system 120 is arranged above the sample table 162. That is, for example, the probe card 120 and the multilayer wiring board 50 shown in FIGS. 2A and 2B are provided in a posture facing the sample table 162 in parallel.
- Each contact terminal 4 is connected to the wiring board 50 through the lead wire 20 provided on the probe sheet 6 of the probe card 120, the peripheral electrode 5 and the electrode 50a and the internal wiring 50b of the multilayer wiring board 50. It is connected to the provided connection terminal 50c, and is connected to the tester 170 via a cable 171 connected to the connection terminal 50c.
- a heating element capable of controlling the temperature may be formed on the surface or inside of the probe sheet or the probe card in advance.
- a heating element for example, a metal material having a high resistance value such as Ni-Cr or a high-resistance conductive resin is directly formed on the probe sheet or the multilayer wiring board layer, or a sheet formed with the material is formed on the probe sheet. You can put it on the probe card or sandwich it.
- the heated liquid as a heating element is caused to flow through the tubes in the heat block, and the heat block is brought into contact with the probe card.
- the probe sheet is independently maintained at the inspection temperature as described above. As a result, it is possible to prevent the occurrence of a temperature difference during the inspection between the wafer and the probe sheet, and it is possible to perform accurate positioning accuracy probing.
- the drive control system 150 is connected to the tester 170 via the cable 172. Further, the drive control system 150 sends a control signal to an actuator of each drive unit of the sample support system 160 to control its operation. That is, the drive control system 150 includes a computer therein and controls the operation of the sample support system 160 in accordance with the progress information of the test operation of the tester 170 transmitted via the cable 172. In addition, the drive control system 150 includes an operation unit 151, and receives input of various instructions related to drive control, for example, receives an instruction of a manual operation.
- the sample stage 162 is provided with a heater 141 for heating the semiconductor element 2.
- the temperature control system 140 controls the temperature of the semiconductor wafer 1 mounted on the sample table 162 by controlling the heater 141 or the cooling jig of the sample table 162. Further, the temperature control system 140 includes an operation unit 151, and receives input of various instructions related to temperature control, for example, receives an instruction of a manual operation. Here, the temperature may be controlled by interlocking the temperature controllable heating element provided in a part of the probe sheet or the probe card and the heater 141 of the sample table 162.
- the semiconductor wafer 1 to be inspected is positioned and placed on the sample table 162, and the drive of the XY stage 167 and the rotating mechanism is controlled to form a plurality of semiconductor wafers 1 arranged on the semiconductor wafer 1.
- the group of electrodes 3 formed on the semiconductor element is positioned immediately below a number of contact terminals 4 arranged side by side on the probe card 120.
- the drive control system 150 operates the lifting / lowering drive unit 165 to push up about 30-100 ⁇ m from the time when the entire surface of the large number of electrodes (contacted materials) 3 contacts the tip of the contact terminal.
- each of the many contact terminals 4 having a high degree of flatness secured with high accuracy.
- the leading ends of the semiconductor wafers 1 are arranged in parallel on the semiconductor wafer 1 by following the surface of a group (total) of a large number of electrodes 3 arranged on the semiconductor element by a compliance mechanism (pressing mechanism). Material to be contacted (Pole) The contact is performed by pushing in based on a uniform load (about 3 to 150 mN per pin) according to (3), and the resistance between each contact terminal (4) and each electrode (3) is low (0.01 ⁇ -0. 1 ⁇ ).
- an operation current, an operation inspection signal, and the like are exchanged between the semiconductor element formed on the semiconductor wafer 1 and the tester 170 via the cable 171, the wiring board 50, and the contact terminal 4, and It is determined whether or not the operation characteristics of the semiconductor element are acceptable. Further, the above-described series of detection operations is performed for each of the plurality of semiconductor elements formed on the semiconductor wafer 1, and it is determined whether or not the operation characteristics are acceptable.
- the method of manufacturing a semiconductor device includes the steps of forming a circuit on a wafer to form a semiconductor element, and the electrical characteristics of a plurality of semiconductor elements 2 at the wafer level by the semiconductor inspection apparatus according to the present invention. All at once, a step of dicing the wafer and separating each of the semiconductor elements, and a step of sealing the semiconductor elements with a resin or the like.
- Another method for manufacturing a semiconductor device includes a step of forming a circuit on a wafer to form a semiconductor element, and a step of forming a plurality of semiconductor elements 2 at a wafer level by the semiconductor inspection apparatus according to the present invention.
- the method includes a step of inspecting electrical characteristics at a time, and a step of dicing the wafer and separating the wafer into individual semiconductor elements.
- a step of forming a circuit on a wafer to form a semiconductor element a step of sealing the wafer with a resin or the like, a step of sealing the wafer, And a step of collectively detecting the electrical characteristics of the plurality of semiconductor elements 2 formed by the semiconductor inspection apparatus according to the present invention.
- Another method for manufacturing a semiconductor device includes a step of forming a circuit on a wafer to form a semiconductor element, a step of sealing the wafer with a resin or the like, and a step of sealing the wafer with a resin or the like. Having a step of collectively inspecting the electrical characteristics of the plurality of semiconductor elements 2 formed by the semiconductor inspection apparatus according to the present invention, and a step of dicing the wafer and separating each semiconductor element It is. [0096] In the step of inspecting the electrical characteristics of the semiconductor element 2 in the above-described method for manufacturing a semiconductor device, good contact characteristics can be obtained with good positional accuracy by using the probe card disclosed in the present application.
- the indentation on the electrode of the semiconductor element 2 becomes a point (point having a hole in a pyramid shape or a truncated pyramid shape), a small area having no indentation is formed on the electrode surface. Will remain, and even if there are multiple contact inspections as shown in Fig. 12, it can be handled.
- FIG. 1A is a perspective view showing a wafer to be contacted on which semiconductor elements (chips) are arranged
- FIG. 1B is a perspective view showing semiconductor elements (chips) in the wafer. .
- FIG. 2A is a cross-sectional view showing a main part of a first embodiment of the probe card according to the present invention
- FIG. 2B is a perspective view showing main parts of A in an exploded manner.
- FIG. 3A is a sectional view showing a main part of a second embodiment of the probe card according to the present invention
- FIG. 2B is a perspective view showing the main components of A in an exploded manner.
- FIGS. 4A to 4H show a manufacturing process for forming a probe sheet portion in a probe card according to the present invention in the order of steps.
- FIGS. 5A to 5E show another manufacturing process for forming a probe sheet in the probe card according to the present invention in the order of steps.
- FIGS. 6A to 6G show another manufacturing process for forming a probe sheet in the probe card according to the present invention in the order of steps.
- FIGS. 7A to 7C show another manufacturing process for forming a probe sheet in the probe card according to the present invention in the order of steps
- D1 and E1 are the probe sheets in the probe card according to the present invention, respectively.
- D2 is a schematic cross-sectional view of a part of the region where the contact terminal portion is formed
- D2 is a plan view of a part of the region where the contact terminal portion of D1 is formed, as viewed from the lower surface of D1.
- FIG. 4 is a plan view of a part of a region where a contact terminal portion of E1 is formed, as viewed from a lower surface of E1.
- FIGS. 8A to 8D show another manufacturing process for forming a probe sheet in the probe card according to the present invention in the order of steps.
- FIG. 9 is a schematic sectional view of a probe sheet on which a ground layer is formed in the probe card according to the present invention.
- FIG. 10 is a schematic sectional view of another probe sheet on which a ground layer is formed in the probe card according to the present invention.
- FIG. 11 is a diagram showing an overall schematic configuration showing an embodiment of an inspection system according to the present invention.
- FIG. 12 is a process chart showing one embodiment of a semiconductor device inspection process.
- FIG. 13 is a schematic view showing a method of assembling a probe card according to the present invention.
- FIG. 14A is a cross-sectional view showing a main part of an embodiment of the probe card according to the present invention
- FIG. 14B is a schematic plan view showing, in an enlarged manner, wiring of a component mounting portion of A.
- FIG. 15 shows an example of a peripheral electrode pattern on the surface of a multilayer wiring board and a wiring pattern of a probe sheet according to the present invention.
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/562,797 US7420380B2 (en) | 2003-07-02 | 2004-07-02 | Probe card and semiconductor testing device using probe sheet or probe card semiconductor device producing method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003-189949 | 2003-07-02 | ||
JP2003189949A JP4465995B2 (ja) | 2003-07-02 | 2003-07-02 | プローブシート、プローブカード、半導体検査装置および半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005003793A1 true WO2005003793A1 (ja) | 2005-01-13 |
Family
ID=33562314
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/009412 WO2005003793A1 (ja) | 2003-07-02 | 2004-07-02 | プローブカード及びプローブシートまたはプローブカードを用いた半導体検査装置および半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7420380B2 (ja) |
JP (1) | JP4465995B2 (ja) |
KR (1) | KR100781856B1 (ja) |
CN (1) | CN100458450C (ja) |
WO (1) | WO2005003793A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7990168B2 (en) * | 2007-01-30 | 2011-08-02 | Samsung Electronics Co., Ltd. | Probe card including a sub-plate with a main supporter and a sub-supporter with the sub-supporter having probe needles |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4755597B2 (ja) | 2004-11-18 | 2011-08-24 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
WO2006097982A1 (ja) | 2005-03-11 | 2006-09-21 | Renesas Technology Corp. | 半導体集積回路装置の製造方法 |
JP2007101373A (ja) | 2005-10-05 | 2007-04-19 | Renesas Technology Corp | プローブシート接着ホルダ、プローブカード、半導体検査装置および半導体装置の製造方法 |
JP4800007B2 (ja) | 2005-11-11 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法およびプローブカード |
JP2007205960A (ja) * | 2006-02-03 | 2007-08-16 | Tokyo Electron Ltd | プローブカード及びプローブ装置 |
JP5191646B2 (ja) * | 2006-10-24 | 2013-05-08 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
JP5002007B2 (ja) * | 2006-11-16 | 2012-08-15 | シーメンス アクチエンゲゼルシヤフト | 導体路構造体を検査するセンサ素子、導体路構造体の検査装置、導体路構造体の検査方法、および、センサ素子の製造方法 |
JP2008151573A (ja) * | 2006-12-15 | 2008-07-03 | Micronics Japan Co Ltd | 電気的接続装置およびその製造方法 |
JP5065674B2 (ja) * | 2006-12-28 | 2012-11-07 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
US7705619B2 (en) * | 2007-06-06 | 2010-04-27 | Integrated Device Technology, Inc. | Small pitch ball grid array of a package assembly for use with conventional burn-in sockets |
JP4932618B2 (ja) * | 2007-06-29 | 2012-05-16 | 東京エレクトロン株式会社 | 検査方法及びこの方法を記録したプログラム記録媒体 |
JP5049694B2 (ja) | 2007-08-07 | 2012-10-17 | ルネサスエレクトロニクス株式会社 | プローブカード、半導体検査装置および半導体装置の製造方法 |
JP2009204393A (ja) * | 2008-02-27 | 2009-09-10 | Renesas Technology Corp | プローブカード、プローブカードの製造方法、半導体検査装置および半導体装置の製造方法 |
JP5314684B2 (ja) * | 2008-06-02 | 2013-10-16 | 株式会社アドバンテスト | 試験用ウエハ、および、試験システム |
WO2009147720A1 (ja) * | 2008-06-02 | 2009-12-10 | 株式会社アドバンテスト | 半導体ウエハ、半導体回路、試験用基板、および、試験システム |
JP2010050437A (ja) * | 2008-07-25 | 2010-03-04 | Yokogawa Electric Corp | Icテスタ |
JP2010276541A (ja) * | 2009-05-29 | 2010-12-09 | Renesas Electronics Corp | 薄膜プローブシートおよびその製造方法、プローブカード、ならびに半導体チップ検査装置 |
JP5504698B2 (ja) * | 2009-06-02 | 2014-05-28 | 日本電産リード株式会社 | 検査用治具及び検査用接触子 |
JP5453938B2 (ja) * | 2009-06-09 | 2014-03-26 | 住友電気工業株式会社 | コンタクトプローブの製造方法およびコンタクトプローブ |
KR101149760B1 (ko) * | 2009-07-03 | 2012-06-01 | 리노공업주식회사 | 검사용 탐침 장치 |
JP2011022198A (ja) | 2009-07-13 | 2011-02-03 | Molex Inc | 光コネクタ |
KR100955597B1 (ko) * | 2009-08-11 | 2010-05-03 | (주)메리테크 | 반도체나 평판표시소자 검사에 사용되는 프로브의 제조방법 |
US20120043987A1 (en) * | 2010-08-23 | 2012-02-23 | Star Technologies Inc. | Probe Card for Testing Semiconductor Devices and Vertical Probe Thereof |
US20160110859A1 (en) * | 2014-10-17 | 2016-04-21 | Macronix International Co., Ltd. | Inspection method for contact by die to database |
JP6630117B2 (ja) * | 2015-03-27 | 2020-01-15 | 株式会社ヨコオ | コンタクトユニット及び検査治具 |
US10535572B2 (en) | 2016-04-15 | 2020-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device arrangement structure assembly and test method |
KR102653198B1 (ko) * | 2016-10-18 | 2024-04-01 | 삼성전기주식회사 | 전기 특성 측정 유닛 |
JP2019109101A (ja) * | 2017-12-18 | 2019-07-04 | 株式会社ヨコオ | 検査治具 |
JP2019109103A (ja) * | 2017-12-18 | 2019-07-04 | 株式会社ヨコオ | 検査治具 |
JP7336176B2 (ja) * | 2017-12-18 | 2023-08-31 | 株式会社ヨコオ | 検査治具 |
US11454650B2 (en) * | 2018-07-18 | 2022-09-27 | Nidec-Read Corporation | Probe, inspection jig, inspection device, and method for manufacturing probe |
JP2020088204A (ja) * | 2018-11-27 | 2020-06-04 | 東京エレクトロン株式会社 | 検査装置、温度制御装置及び温度制御方法 |
CN109959966A (zh) * | 2019-04-30 | 2019-07-02 | 昆山泰德兴自动化设备有限公司 | 汽车雷达感应支架内泡棉检测装置 |
CN112798823A (zh) * | 2020-12-17 | 2021-05-14 | 中国电子科技集团公司第十三研究所 | 用于老化加电的cos夹具 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000150594A (ja) * | 1998-11-05 | 2000-05-30 | Hitachi Ltd | 接続装置および押さえ部材付配線フィルムの製造方法並びに検査システムおよび半導体素子の製造方法 |
JP2001091543A (ja) * | 1999-09-27 | 2001-04-06 | Hitachi Ltd | 半導体検査装置 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5177439A (en) * | 1991-08-30 | 1993-01-05 | U.S. Philips Corporation | Probe card for testing unencapsulated semiconductor devices |
US5461326A (en) | 1993-02-25 | 1995-10-24 | Hughes Aircraft Company | Self leveling and self tensioning membrane test probe |
US5399505A (en) * | 1993-07-23 | 1995-03-21 | Motorola, Inc. | Method and apparatus for performing wafer level testing of integrated circuit dice |
JP2995134B2 (ja) * | 1993-09-24 | 1999-12-27 | 東京エレクトロン株式会社 | プローブ装置 |
JPH10506459A (ja) * | 1994-09-09 | 1998-06-23 | マイクロモジュール・システムズ | 回路のメンブレンプローブ |
EP0788729A4 (en) * | 1994-10-28 | 1998-06-03 | Micromodule Systems Inc | PROGRAMMABLE HIGH DENSITY ELECTRONIC TEST DEVICE |
US5665609A (en) * | 1995-04-21 | 1997-09-09 | Sony Corporation | Prioritizing efforts to improve semiconductor production yield |
US5621333A (en) * | 1995-05-19 | 1997-04-15 | Microconnect, Inc. | Contact device for making connection to an electronic circuit device |
KR100212169B1 (ko) * | 1996-02-13 | 1999-08-02 | 오쿠보 마사오 | 프로브, 프로브의 제조, 그리고 프로브를 사용한 수직동작형 프로브 카드 어셈블리 |
JP3645203B2 (ja) | 1997-05-09 | 2005-05-11 | 株式会社ルネサステクノロジ | 半導体素子の製造方法並びに半導体素子へのプロービング方法及びその装置 |
JP3315339B2 (ja) | 1997-05-09 | 2002-08-19 | 株式会社日立製作所 | 半導体素子の製造方法並びに半導体素子へのプロービング方法およびその装置 |
JPH1123615A (ja) | 1997-05-09 | 1999-01-29 | Hitachi Ltd | 接続装置および検査システム |
US6014032A (en) * | 1997-09-30 | 2000-01-11 | International Business Machines Corporation | Micro probe ring assembly and method of fabrication |
JP4006081B2 (ja) * | 1998-03-19 | 2007-11-14 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
US6586955B2 (en) * | 2000-03-13 | 2003-07-01 | Tessera, Inc. | Methods and structures for electronic probing arrays |
US6426638B1 (en) * | 2000-05-02 | 2002-07-30 | Decision Track Llc | Compliant probe apparatus |
US6379982B1 (en) * | 2000-08-17 | 2002-04-30 | Micron Technology, Inc. | Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing |
JP3839347B2 (ja) | 2002-04-25 | 2006-11-01 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JP4099412B2 (ja) * | 2003-03-19 | 2008-06-11 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
US7285968B2 (en) * | 2005-04-19 | 2007-10-23 | Formfactor, Inc. | Apparatus and method for managing thermally induced motion of a probe card assembly |
-
2003
- 2003-07-02 JP JP2003189949A patent/JP4465995B2/ja not_active Expired - Lifetime
-
2004
- 2004-07-02 US US10/562,797 patent/US7420380B2/en not_active Expired - Fee Related
- 2004-07-02 KR KR1020057025223A patent/KR100781856B1/ko not_active IP Right Cessation
- 2004-07-02 CN CNB2004800186664A patent/CN100458450C/zh not_active Expired - Fee Related
- 2004-07-02 WO PCT/JP2004/009412 patent/WO2005003793A1/ja active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000150594A (ja) * | 1998-11-05 | 2000-05-30 | Hitachi Ltd | 接続装置および押さえ部材付配線フィルムの製造方法並びに検査システムおよび半導体素子の製造方法 |
JP2001091543A (ja) * | 1999-09-27 | 2001-04-06 | Hitachi Ltd | 半導体検査装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7990168B2 (en) * | 2007-01-30 | 2011-08-02 | Samsung Electronics Co., Ltd. | Probe card including a sub-plate with a main supporter and a sub-supporter with the sub-supporter having probe needles |
Also Published As
Publication number | Publication date |
---|---|
US20060192575A1 (en) | 2006-08-31 |
US7420380B2 (en) | 2008-09-02 |
JP4465995B2 (ja) | 2010-05-26 |
KR100781856B1 (ko) | 2007-12-03 |
CN1816748A (zh) | 2006-08-09 |
KR20060028780A (ko) | 2006-04-03 |
CN100458450C (zh) | 2009-02-04 |
JP2005024377A (ja) | 2005-01-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4465995B2 (ja) | プローブシート、プローブカード、半導体検査装置および半導体装置の製造方法 | |
JP4145293B2 (ja) | 半導体検査装置および半導体装置の製造方法 | |
US7656174B2 (en) | Probe cassette, semiconductor inspection apparatus and manufacturing method of semiconductor device | |
US7423439B2 (en) | Probe sheet adhesion holder, probe card, semiconductor test device, and manufacturing method of semiconductor device | |
US7049837B2 (en) | Probe sheet, probe card, semiconductor test equipment and semiconductor device fabrication method | |
US8314624B2 (en) | Probe card, semiconductor inspecting apparatus, and manufacturing method of semiconductor device | |
TW502354B (en) | Inspection device for semiconductor | |
US20080029763A1 (en) | Transmission Circuit, Connecting Sheet, Probe Sheet, Probe Card, Semiconductor Inspection System and Method of Manufacturing Semiconductor Device | |
JP3315339B2 (ja) | 半導体素子の製造方法並びに半導体素子へのプロービング方法およびその装置 | |
TWI227781B (en) | Semiconductor-device inspecting apparatus and a method for manufacturing the same | |
JP2009204393A (ja) | プローブカード、プローブカードの製造方法、半導体検査装置および半導体装置の製造方法 | |
WO2007142204A1 (ja) | プローブカード | |
KR20040077971A (ko) | 실리콘 핑거 접촉기를 갖는 접촉 구조체 | |
KR100393452B1 (ko) | 반도체소자검사용 기판의 제조방법 | |
JP2004144742A (ja) | プローブシート、プローブカード、半導体検査装置および半導体装置の製造方法 | |
KR20030085142A (ko) | 집적회로 웨이퍼 프로브카드 조립체의 구조 및 그 제조방법 | |
JP3645203B2 (ja) | 半導体素子の製造方法並びに半導体素子へのプロービング方法及びその装置 | |
JP2009098153A (ja) | 薄膜プローブの製造方法 | |
JP2004015030A (ja) | 半導体装置の製造方法 | |
JP4246558B2 (ja) | プローブ用配線基板及び半導体素子の製造方法 | |
JP2004029035A (ja) | 接続装置 | |
JP2002151558A (ja) | 半導体検査装置の製造方法および半導体検査装置、ならびに半導体装置の検査方法 | |
JP2006071486A (ja) | 接続装置、半導体チップ検査装置および半導体装置の製造方法 | |
JP3563361B2 (ja) | 半導体装置の製造方法 | |
JP2001165993A (ja) | 半導体検査装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2006192575 Country of ref document: US Ref document number: 10562797 Country of ref document: US Ref document number: 1020057025223 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20048186664 Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 1020057025223 Country of ref document: KR |
|
WWP | Wipo information: published in national office |
Ref document number: 10562797 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase |