WO2003021603A1 - Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer - Google Patents

Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer Download PDF

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Publication number
WO2003021603A1
WO2003021603A1 PCT/JP2002/006709 JP0206709W WO03021603A1 WO 2003021603 A1 WO2003021603 A1 WO 2003021603A1 JP 0206709 W JP0206709 W JP 0206709W WO 03021603 A1 WO03021603 A1 WO 03021603A1
Authority
WO
WIPO (PCT)
Prior art keywords
high voltage
state
mos transistor
integrated circuit
output driver
Prior art date
Application number
PCT/JP2002/006709
Other languages
English (en)
French (fr)
Inventor
Masamichi Fujito
Yuko Nakamura
Kazufumi Suzukawa
Toshihiro Tanaka
Yutaka Shinagawa
Original Assignee
Renesas Technology Corp.
Hitachi Ulsi Systems Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp., Hitachi Ulsi Systems Co., Ltd. filed Critical Renesas Technology Corp.
Priority to US10/486,638 priority Critical patent/US7072218B2/en
Publication of WO2003021603A1 publication Critical patent/WO2003021603A1/ja

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Microcomputers (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
PCT/JP2002/006709 2001-08-31 2002-07-03 Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer WO2003021603A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/486,638 US7072218B2 (en) 2001-08-31 2002-07-03 Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001-262924 2001-08-31
JP2001262924A JP2003077283A (ja) 2001-08-31 2001-08-31 半導体集積回路、半導体不揮発性メモリ、メモリカード及びマイクロコンピュータ

Publications (1)

Publication Number Publication Date
WO2003021603A1 true WO2003021603A1 (en) 2003-03-13

Family

ID=19089753

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/006709 WO2003021603A1 (en) 2001-08-31 2002-07-03 Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer

Country Status (3)

Country Link
US (1) US7072218B2 (ja)
JP (1) JP2003077283A (ja)
WO (1) WO2003021603A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7450434B2 (en) 2004-05-12 2008-11-11 Spansion Llc Semiconductor device and its control method
CN111613254A (zh) * 2020-04-11 2020-09-01 复旦大学 一种基于柔性材料的堆叠模拟存储器
WO2022251443A1 (en) 2021-05-26 2022-12-01 FUJIFILM Cellular Dynamics, Inc. Methods to prevent rapid silencing of genes in pluripotent stem cells

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KR100634172B1 (ko) * 2004-05-04 2006-10-16 삼성전자주식회사 불 휘발성 메모리 장치 및 그것의 프로그램 방법
JP4703162B2 (ja) * 2004-10-14 2011-06-15 株式会社東芝 不揮発性半導体記憶装置及びその書き込み方法
US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7443202B2 (en) * 2006-06-02 2008-10-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic apparatus having the same
JP5071764B2 (ja) * 2006-11-07 2012-11-14 独立行政法人産業技術総合研究所 半導体集積回路
US8378407B2 (en) * 2006-12-07 2013-02-19 Tower Semiconductor, Ltd. Floating gate inverter type memory cell and array
US7518921B2 (en) * 2007-03-20 2009-04-14 Kabushiki Kaish Toshiba Semiconductor memory device which includes memory cell having charge accumulation layer and control gate
US7468916B2 (en) * 2007-03-20 2008-12-23 Ememory Technology Inc. Non-volatile memory having a row driving circuit with shared level shift circuits
JP5183087B2 (ja) * 2007-03-30 2013-04-17 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US7782673B2 (en) * 2007-12-13 2010-08-24 Kabushiki Kaisha Toshiba Semiconductor memory device which includes memory cell having charge accumulation layer and control gate
JP5329116B2 (ja) * 2008-04-04 2013-10-30 ルネサスエレクトロニクス株式会社 表示装置用駆動回路、テスト回路、及びテスト方法
JP5295706B2 (ja) * 2008-10-03 2013-09-18 株式会社東芝 電圧発生回路、及びそれを備えた半導体記憶装置
US7940580B2 (en) * 2008-12-19 2011-05-10 Advanced Micro Devices, Inc. Voltage shifting word-line driver and method therefor
JP2010244671A (ja) * 2009-03-19 2010-10-28 Toshiba Corp 内部電源電圧発生回路
JP4908560B2 (ja) * 2009-08-31 2012-04-04 株式会社東芝 強誘電体メモリ及びメモリシステム
JP5394278B2 (ja) 2010-02-09 2014-01-22 ルネサスエレクトロニクス株式会社 半導体装置
US8149017B2 (en) * 2010-06-25 2012-04-03 Xerox Corporation Low-voltage to high-voltage level translation using capacitive coupling
JP2012038401A (ja) 2010-08-11 2012-02-23 Elpida Memory Inc 半導体装置及び半導体装置の電源制御方法
JP2013200932A (ja) * 2012-03-26 2013-10-03 Toshiba Corp 不揮発性半導体記憶装置
JP2014003541A (ja) * 2012-06-20 2014-01-09 Toshiba Corp 半導体集積回路、および、スイッチ装置
US9117547B2 (en) * 2013-05-06 2015-08-25 International Business Machines Corporation Reduced stress high voltage word line driver
KR102156230B1 (ko) 2013-10-24 2020-09-15 삼성전자주식회사 잔류 전압을 강제로 방전시킬 수 있는 데이터 저장 장치, 이의 동작 방법, 및 이를 포함하는 데이터 처리 시스템
US10402319B2 (en) * 2014-07-25 2019-09-03 Micron Technology, Inc. Apparatuses and methods for concurrently accessing different memory planes of a memory
KR102261813B1 (ko) * 2014-11-26 2021-06-07 삼성전자주식회사 저항성 메모리 장치 및 저항성 메모리 장치의 동작 방법
US9595332B2 (en) * 2015-06-15 2017-03-14 Cypress Semiconductor Corporation High speed, high voltage tolerant circuits in flash path
US9515075B1 (en) 2015-08-31 2016-12-06 Cypress Semiconductor Corporation Method for fabricating ferroelectric random-access memory on pre-patterned bottom electrode and oxidation barrier
KR102471413B1 (ko) * 2016-07-28 2022-11-29 에스케이하이닉스 주식회사 반도체 장치
US10347320B1 (en) * 2017-12-28 2019-07-09 Micron Technology, Inc. Controlling discharge of a control gate voltage
US10491218B2 (en) * 2018-04-13 2019-11-26 Avago Technologies International Sales Pte. Limited Clocked miller latch design for improved soft error rate
JP2020149746A (ja) * 2019-03-14 2020-09-17 キオクシア株式会社 半導体記憶装置
US11502690B1 (en) * 2021-10-27 2022-11-15 Avago Technologies International Sales Pte. Limited Power supply generation for transmitter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07282579A (ja) * 1994-04-12 1995-10-27 Hitachi Ltd 駆動回路
JPH11176180A (ja) * 1997-12-09 1999-07-02 Hitachi Ltd 半導体記憶装置
JP2001028189A (ja) * 1999-07-13 2001-01-30 Mitsubishi Electric Corp 半導体記憶装置
JP2002197881A (ja) * 2000-12-27 2002-07-12 Toshiba Corp レベルシフタ及びレベルシフタを備えた半導体記憶装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2835215B2 (ja) * 1991-07-25 1998-12-14 株式会社東芝 不揮発性半導体記憶装置
JP3450896B2 (ja) * 1994-04-01 2003-09-29 三菱電機株式会社 不揮発性メモリ装置
JP3883687B2 (ja) 1998-02-16 2007-02-21 株式会社ルネサステクノロジ 半導体装置、メモリカード及びデータ処理システム
JP4090570B2 (ja) 1998-06-02 2008-05-28 株式会社ルネサステクノロジ 半導体装置、データ処理システム及び不揮発性メモリセルの閾値変更方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07282579A (ja) * 1994-04-12 1995-10-27 Hitachi Ltd 駆動回路
JPH11176180A (ja) * 1997-12-09 1999-07-02 Hitachi Ltd 半導体記憶装置
JP2001028189A (ja) * 1999-07-13 2001-01-30 Mitsubishi Electric Corp 半導体記憶装置
JP2002197881A (ja) * 2000-12-27 2002-07-12 Toshiba Corp レベルシフタ及びレベルシフタを備えた半導体記憶装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7450434B2 (en) 2004-05-12 2008-11-11 Spansion Llc Semiconductor device and its control method
US7729170B2 (en) 2004-05-12 2010-06-01 Spansion Llc Semiconductor device and its control method
US7821833B2 (en) 2004-05-12 2010-10-26 Spansion Llc Semiconductor device and its control method
CN111613254A (zh) * 2020-04-11 2020-09-01 复旦大学 一种基于柔性材料的堆叠模拟存储器
CN111613254B (zh) * 2020-04-11 2023-09-05 复旦大学 一种基于柔性材料的堆叠模拟存储器
WO2022251443A1 (en) 2021-05-26 2022-12-01 FUJIFILM Cellular Dynamics, Inc. Methods to prevent rapid silencing of genes in pluripotent stem cells

Also Published As

Publication number Publication date
US20040212014A1 (en) 2004-10-28
JP2003077283A (ja) 2003-03-14
US7072218B2 (en) 2006-07-04

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