WO1999000905A1 - Processeur et procede de traitement - Google Patents
Processeur et procede de traitement Download PDFInfo
- Publication number
- WO1999000905A1 WO1999000905A1 PCT/JP1998/002909 JP9802909W WO9900905A1 WO 1999000905 A1 WO1999000905 A1 WO 1999000905A1 JP 9802909 W JP9802909 W JP 9802909W WO 9900905 A1 WO9900905 A1 WO 9900905A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- arithmetic processing
- path
- metric
- processing device
- metrics
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3961—Arrangements of methods for branch or transition metric calculation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
- H03M13/4169—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6561—Parallelized implementations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6563—Implementations using multi-port memories
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE69827915T DE69827915T2 (de) | 1997-06-30 | 1998-06-29 | Verarbeitungsverfahren und -vorrichtung |
EP98929741A EP0923197B1 (en) | 1997-06-30 | 1998-06-29 | Processor and processing method |
US09/147,663 US6330684B1 (en) | 1997-06-30 | 1998-06-29 | Processor and processing method |
US10/748,242 US7139968B2 (en) | 1997-06-30 | 2003-12-31 | Processing unit and processing method |
US11/022,811 US7325184B2 (en) | 1997-06-30 | 2004-12-28 | Communications digital signal processor and digital signal processing method |
US11/929,126 US20080072129A1 (en) | 1997-06-30 | 2007-10-30 | Communications digital signal processor and digital signal processing method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9/173878 | 1997-06-30 | ||
JP17387897 | 1997-06-30 | ||
JP10/168567 | 1998-06-16 | ||
JP16856798A JP3338374B2 (ja) | 1997-06-30 | 1998-06-16 | 演算処理方法および装置 |
Related Child Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/147,663 A-371-Of-International US6330684B1 (en) | 1997-06-30 | 1998-06-29 | Processor and processing method |
US09147663 A-371-Of-International | 1998-06-29 | ||
US09/974,807 Division US6477661B2 (en) | 1997-06-30 | 2001-10-12 | Processing unit and processing method |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999000905A1 true WO1999000905A1 (fr) | 1999-01-07 |
Family
ID=26492229
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1998/002909 WO1999000905A1 (fr) | 1997-06-30 | 1998-06-29 | Processeur et procede de traitement |
Country Status (6)
Country | Link |
---|---|
US (6) | US6330684B1 (ja) |
EP (1) | EP0923197B1 (ja) |
JP (1) | JP3338374B2 (ja) |
CN (3) | CN101018103B (ja) |
DE (1) | DE69827915T2 (ja) |
WO (1) | WO1999000905A1 (ja) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3338374B2 (ja) * | 1997-06-30 | 2002-10-28 | 松下電器産業株式会社 | 演算処理方法および装置 |
US6473088B1 (en) * | 1998-06-16 | 2002-10-29 | Canon Kabushiki Kaisha | System for displaying multiple images and display method therefor |
US6647071B2 (en) * | 1998-11-06 | 2003-11-11 | Texas Instruments Incorporated | Method and apparatus for equalization and tracking of coded digital communications signals |
JP3683128B2 (ja) * | 1999-07-06 | 2005-08-17 | 日本電気株式会社 | 無線通信機および無線通信機の消費電力制御方法 |
WO2001069411A2 (en) | 2000-03-10 | 2001-09-20 | Arc International Plc | Memory interface and method of interfacing between functional entities |
US6760385B1 (en) * | 2000-05-30 | 2004-07-06 | Adtran, Inc. | Universal parallel processing decoder |
JP2001352254A (ja) * | 2000-06-08 | 2001-12-21 | Sony Corp | 復号装置及び復号方法 |
US7234100B1 (en) * | 2000-09-28 | 2007-06-19 | Intel Corporation | Decoder for trellis-based channel encoding |
US6904105B1 (en) * | 2000-10-27 | 2005-06-07 | Intel Corporation | Method and implemention of a traceback-free parallel viterbi decoder |
JP3984790B2 (ja) * | 2001-01-15 | 2007-10-03 | 日本電気株式会社 | ビタビ復号処理装置 |
US6848074B2 (en) * | 2001-06-21 | 2005-01-25 | Arc International | Method and apparatus for implementing a single cycle operation in a data processing system |
US7020830B2 (en) * | 2001-12-24 | 2006-03-28 | Agere Systems Inc. | High speed add-compare-select operations for use in viterbi decoders |
US7127667B2 (en) * | 2002-04-15 | 2006-10-24 | Mediatek Inc. | ACS circuit and viterbi decoder with the circuit |
US7089481B2 (en) * | 2002-07-22 | 2006-08-08 | Agere Systems Inc. | High speed arithmetic operations for use in turbo decoders |
US7359464B2 (en) * | 2003-12-31 | 2008-04-15 | Intel Corporation | Trellis decoder and method of decoding |
US20050157823A1 (en) * | 2004-01-20 | 2005-07-21 | Raghavan Sudhakar | Technique for improving viterbi decoder performance |
JP4230953B2 (ja) * | 2004-03-31 | 2009-02-25 | 株式会社ケンウッド | ベースバンド信号生成装置、ベースバンド信号生成方法及びプログラム |
CN1906857B (zh) * | 2004-05-14 | 2011-09-28 | 松下电器产业株式会社 | Acs电路 |
EP1762005A2 (en) * | 2004-06-23 | 2007-03-14 | Koninklijke Philips Electronics N.V. | Addressing strategy for viterbi metric computation |
US7231586B2 (en) * | 2004-07-21 | 2007-06-12 | Freescale Semiconductor, Inc. | Multi-rate viterbi decoder |
TWI255622B (en) * | 2004-10-21 | 2006-05-21 | Mediatek Inc | Method of computing path metrics in a high-speed Viterbi detector and related apparatus thereof |
US7607072B2 (en) * | 2005-01-28 | 2009-10-20 | Agere Systems Inc. | Method and apparatus for-soft-output viterbi detection using a multiple-step trellis |
EP1746756B1 (en) * | 2005-07-21 | 2013-01-16 | STMicroelectronics Srl | A method and system for decoding signals, corresponding receiver and computer program product |
US7938819B2 (en) | 2005-09-12 | 2011-05-10 | Bridgepoint Medical, Inc. | Endovascular devices and methods |
KR100729619B1 (ko) * | 2005-11-07 | 2007-06-19 | 삼성전자주식회사 | 고속 데이터 전송을 위한 비터비 디코딩 방법 및 장치 |
JPWO2007074583A1 (ja) * | 2005-12-27 | 2009-06-04 | パナソニック株式会社 | 再構成可能な演算器を持つプロセッサ |
JP4607958B2 (ja) * | 2006-01-20 | 2011-01-05 | パナソニック株式会社 | プロセッサおよびプログラム変換装置 |
US20070239182A1 (en) * | 2006-04-03 | 2007-10-11 | Boston Scientific Scimed, Inc. | Thrombus removal device |
JP4303256B2 (ja) * | 2006-04-04 | 2009-07-29 | パナソニック株式会社 | デジタル信号受信装置およびデジタル信号受信方法 |
US20080005842A1 (en) * | 2006-07-07 | 2008-01-10 | Ferno-Washington, Inc. | Locking mechanism for a roll-in cot |
US20080270658A1 (en) * | 2007-04-27 | 2008-10-30 | Matsushita Electric Industrial Co., Ltd. | Processor system, bus controlling method, and semiconductor device |
US8140949B2 (en) * | 2007-11-13 | 2012-03-20 | Alpha Imaging Technology Corp. | ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder |
CA2621147C (en) * | 2008-02-15 | 2013-10-08 | Connotech Experts-Conseils Inc. | Method of bootstrapping an authenticated data session configuration |
KR101410697B1 (ko) | 2008-03-20 | 2014-07-02 | 삼성전자주식회사 | 수신기 및 상기 수신기의 동작 제어 방법 |
US8943392B2 (en) * | 2012-11-06 | 2015-01-27 | Texas Instruments Incorporated | Viterbi butterfly operations |
US20150170067A1 (en) * | 2013-12-17 | 2015-06-18 | International Business Machines Corporation | Determining analysis recommendations based on data analysis context |
WO2015129519A1 (ja) * | 2014-02-25 | 2015-09-03 | 東レ株式会社 | 海島複合繊維、複合極細繊維および繊維製品 |
DE102015107509A1 (de) * | 2014-10-14 | 2016-04-14 | Infineon Technologies Ag | Chip und Verfahren zum Betreiben einer Verarbeitungsschaltung |
JP7007115B2 (ja) * | 2017-06-01 | 2022-01-24 | Necプラットフォームズ株式会社 | ビタビ復号装置、及び、ビタビ復号方法 |
Citations (3)
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JPS63215227A (ja) * | 1987-03-04 | 1988-09-07 | Toshiba Corp | ビタビ復号回路 |
US5633897A (en) * | 1995-11-16 | 1997-05-27 | Atmel Corporation | Digital signal processor optimized for decoding a signal encoded in accordance with a Viterbi algorithm |
JPH09148943A (ja) * | 1995-11-17 | 1997-06-06 | Nec Corp | ビタビ復号装置 |
Family Cites Families (40)
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JPS6081925A (ja) * | 1983-10-12 | 1985-05-10 | Nec Corp | 誤り訂正装置 |
JPS60173930A (ja) * | 1984-02-20 | 1985-09-07 | Fujitsu Ltd | パイプライン処理ビタビ復号器 |
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JPH01102541A (ja) * | 1987-10-16 | 1989-04-20 | Toshiba Corp | 放射線画像装置 |
JPH03128552A (ja) * | 1989-07-31 | 1991-05-31 | Nec Corp | データ伝送システムのための変復調装置 |
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JP2702831B2 (ja) * | 1991-08-28 | 1998-01-26 | 松下電送株式会社 | ヴィタビ復号法 |
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US5280489A (en) * | 1992-04-15 | 1994-01-18 | International Business Machines Corporation | Time-varying Viterbi detector for control of error event length |
JPH05335972A (ja) * | 1992-05-27 | 1993-12-17 | Nec Corp | ビタビ復号器 |
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JPH0722969A (ja) | 1993-06-16 | 1995-01-24 | Matsushita Electric Ind Co Ltd | 演算装置 |
JPH06164423A (ja) | 1992-11-20 | 1994-06-10 | Murata Mach Ltd | ビタビ復号器 |
DE69424908T2 (de) * | 1993-09-20 | 2000-11-09 | Canon Kk | Signalverarbeitungsapparat |
ZA947317B (en) * | 1993-09-24 | 1995-05-10 | Qualcomm Inc | Multirate serial viterbi decoder for code division multiple access system applications |
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JP3241210B2 (ja) * | 1994-06-23 | 2001-12-25 | 沖電気工業株式会社 | ビタビ復号方法及びビタビ復号回路 |
FR2724273B1 (fr) * | 1994-09-05 | 1997-01-03 | Sgs Thomson Microelectronics | Circuit de traitement de signal pour mettre en oeuvre un algorithme de viterbi |
JP3304631B2 (ja) | 1994-09-14 | 2002-07-22 | ソニー株式会社 | ビタビ復号方法及びビタビ復号装置 |
JPH0946240A (ja) | 1995-07-27 | 1997-02-14 | Mitsubishi Electric Corp | ビタビ復号機能を有するデータ処理装置 |
KR0144505B1 (ko) * | 1995-09-18 | 1998-08-17 | 구자홍 | 영상표시기기의 화면 자동 조정장치 및 방법 |
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JPH10107651A (ja) | 1996-09-27 | 1998-04-24 | Nec Corp | ビタビ復号装置 |
EP0851591B1 (en) | 1996-12-24 | 2001-09-12 | Matsushita Electric Industrial Co., Ltd. | Data processor and data processing method |
JPH10209882A (ja) | 1997-01-24 | 1998-08-07 | Japan Radio Co Ltd | ビタビ復号方法 |
JP3242059B2 (ja) | 1997-06-04 | 2001-12-25 | 沖電気工業株式会社 | ビタビ復号器 |
JP3338374B2 (ja) * | 1997-06-30 | 2002-10-28 | 松下電器産業株式会社 | 演算処理方法および装置 |
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-
1998
- 1998-06-16 JP JP16856798A patent/JP3338374B2/ja not_active Expired - Fee Related
- 1998-06-29 CN CN2006101003464A patent/CN101018103B/zh not_active Expired - Fee Related
- 1998-06-29 CN CN98800905A patent/CN1118140C/zh not_active Expired - Fee Related
- 1998-06-29 WO PCT/JP1998/002909 patent/WO1999000905A1/ja active IP Right Grant
- 1998-06-29 US US09/147,663 patent/US6330684B1/en not_active Expired - Lifetime
- 1998-06-29 EP EP98929741A patent/EP0923197B1/en not_active Expired - Lifetime
- 1998-06-29 CN CNB031451616A patent/CN100512075C/zh not_active Expired - Fee Related
- 1998-06-29 DE DE69827915T patent/DE69827915T2/de not_active Expired - Lifetime
-
2001
- 2001-10-12 US US09/974,807 patent/US6477661B2/en not_active Expired - Lifetime
-
2002
- 2002-09-24 US US10/252,394 patent/US6735714B2/en not_active Expired - Lifetime
-
2003
- 2003-12-31 US US10/748,242 patent/US7139968B2/en not_active Expired - Fee Related
-
2004
- 2004-12-28 US US11/022,811 patent/US7325184B2/en not_active Expired - Fee Related
-
2007
- 2007-10-30 US US11/929,126 patent/US20080072129A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63215227A (ja) * | 1987-03-04 | 1988-09-07 | Toshiba Corp | ビタビ復号回路 |
US5633897A (en) * | 1995-11-16 | 1997-05-27 | Atmel Corporation | Digital signal processor optimized for decoding a signal encoded in accordance with a Viterbi algorithm |
JPH09148943A (ja) * | 1995-11-17 | 1997-06-06 | Nec Corp | ビタビ復号装置 |
Non-Patent Citations (3)
Title |
---|
LOU H: "VITERBI DECODER DESIGN FOR THE IS-95 CDMA FORWARD LINK", 1996 IEEE 46TH. VEHICULAR TECHNOLOGY CONFERENCE. MOBILE TECHNOLOGY FOR THE HUMAN RACE. ATLANTA, APR. 28 - MAY 1, 1996., NEW YORK, IEEE., US, vol. 02, no. 02, 1 January 1996 (1996-01-01), US, pages 1346 - 1350, XP002913962, ISBN: 978-0-7803-3158-7 * |
See also references of EP0923197A4 * |
UEDA K, ET AL.: "A 16-BIT DIGITAL SIGNAL PROCESSOR WITH SPECIALLY ARRANGED MULTIPLY-ACCUMULATOR FOR LOW POWER CONSUMPTION", IEICE TRANSACTIONS ON ELECTRONICS, INSTITUTE OF ELECTRONICS, TOKYO, JP., vol. E78-C, no. 12, 1 December 1995 (1995-12-01), Tokyo, JP., pages 1709 - 1716, XP002913961, ISSN: 0916-8524 * |
Also Published As
Publication number | Publication date |
---|---|
US6330684B1 (en) | 2001-12-11 |
JPH1174801A (ja) | 1999-03-16 |
US20050163233A1 (en) | 2005-07-28 |
US20030066022A1 (en) | 2003-04-03 |
US20080072129A1 (en) | 2008-03-20 |
CN101018103A (zh) | 2007-08-15 |
US6477661B2 (en) | 2002-11-05 |
EP0923197B1 (en) | 2004-12-01 |
CN100512075C (zh) | 2009-07-08 |
DE69827915D1 (de) | 2005-01-05 |
US7325184B2 (en) | 2008-01-29 |
JP3338374B2 (ja) | 2002-10-28 |
CN1118140C (zh) | 2003-08-13 |
CN101018103B (zh) | 2013-02-27 |
US20040177313A1 (en) | 2004-09-09 |
US7139968B2 (en) | 2006-11-21 |
CN1231083A (zh) | 1999-10-06 |
DE69827915T2 (de) | 2005-04-07 |
US20020016946A1 (en) | 2002-02-07 |
CN1516381A (zh) | 2004-07-28 |
EP0923197A1 (en) | 1999-06-16 |
US6735714B2 (en) | 2004-05-11 |
EP0923197A4 (en) | 2000-10-04 |
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