US6015720A - Method of forming polycrystalline semiconductor thin film - Google Patents
Method of forming polycrystalline semiconductor thin film Download PDFInfo
- Publication number
- US6015720A US6015720A US08/544,569 US54456995A US6015720A US 6015720 A US6015720 A US 6015720A US 54456995 A US54456995 A US 54456995A US 6015720 A US6015720 A US 6015720A
- Authority
- US
- United States
- Prior art keywords
- film
- precursory
- polycrystalline semiconductor
- thin film
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 239000010409 thin film Substances 0.000 title claims abstract description 47
- 238000000034 method Methods 0.000 title claims abstract description 33
- 239000010408 film Substances 0.000 claims abstract description 97
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 239000013078 crystal Substances 0.000 claims abstract description 29
- 239000001257 hydrogen Substances 0.000 claims abstract description 14
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 14
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims abstract description 12
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 claims abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 21
- 239000004973 liquid crystal related substance Substances 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 11
- 230000003667 anti-reflective effect Effects 0.000 claims description 9
- 238000009826 distribution Methods 0.000 claims description 9
- 239000011521 glass Substances 0.000 claims description 9
- 230000001678 irradiating effect Effects 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 7
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 5
- 239000002994 raw material Substances 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 abstract description 21
- 230000005855 radiation Effects 0.000 abstract description 7
- 238000005224 laser annealing Methods 0.000 abstract description 5
- 229920005591 polysilicon Polymers 0.000 description 19
- 239000011159 matrix material Substances 0.000 description 18
- 229910021417 amorphous silicon Inorganic materials 0.000 description 16
- 239000010410 layer Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000000354 decomposition reaction Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 108010053481 Antifreeze Proteins Proteins 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 230000037230 mobility Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000010420 art technique Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 150000004756 silanes Chemical class 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000004627 transmission electron microscopy Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02686—Pulsed laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02678—Beam shaping, e.g. using a mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
Definitions
- the present invention relates to a method of forming a polycrystalline semiconductor thin film. More particularly, the invention relates to techniques for increasing the grain size of a polycrystalline semiconductor thin film by irradiating it with an energy beam. The invention also relates to a method of fabricating a semiconductor device in which TFTs (thin-film transistors) are formed at a high density using a polycrystalline semiconductor thin film as an active layer. Furthermore, the invention relates to a method of fabricating an active matrix liquid crystal display incorporating semiconductor devices as an active matrix array substrate.
- the TFT semiconductor device has used a heatproof insulating substrate made of quartz or the like. TFTs have been fabricated at a high density by performing a high-temperature process above 1000° C. Such TFT semiconductor devices have been earnestly developed, for example, as active matrix array substrates for active matrix liquid crystal displays. To realize wider application of liquid crystal displays, there is a demand for reductions in the cost of fabricating TFT semiconductor devices. Low-temperature processes with which cheap glass substrates can be used have been discussed. Especially, in order to fabricate a large-sized, high-information content liquid crystal display, low-temperature processes capable of utilizing cheap glass substrates have been earnestly developed.
- amorphous silicon is used as a precursory film of clusters, even if the silicon is irradiated with a laser beam, it is impossible to obtain sufficiently large grain size. Rather, only crystallites are obtained. With silicon thin films in the state of crystallites, it is difficult to obtain TFTs of high performance.
- the energy of the irradiating laser beam is optimized to some extent, it is possible to convert amorphous silicon into polysilicon. Also in this case, the range of the irradiating energy enabling satisfactory grain sizes is very narrow and so it is difficult to stably mass-produce high-quality polysilicon thin films in practice. It is common practice to form amorphous silicon thin films by plasma-assisted CVD. However, the films contain a large amount of hydrogen. For this reason, the contained hydrogen is caused to bump by the laser irradiation, and other problems occur. These make it difficult to put this technique into practical use.
- a polycrystalline semiconductor thin film is formed by the following steps. First, a film formation step is performed to grow a semiconductor layer on an insulating substrate to form a precursory film of polycrystalline comprising clusters of microscopic crystal grains. Then, an irradiation step is carried out. That is, the precursory film is irradiated with an energy beam to increase the grain sizes of the crystal grains. As a result, the precursory film is converted into a polycrystalline semiconductor thin film. More specifically, a precursory film having crystal grains of more than 3 nm in grain diameter is formed by LPCVD or atmospheric-pressure CVD at a film formation temperature of 500 to 650° C. In this film formation step, the polycrystalline precursory film can be formed under film formation conditions which substantially preclude inclusion of hydrogen. In the above-described irradiation step, an energy beam consisting, for example, of an excimer laser pulse is shot once.
- an energy beam consisting, for example, of an excimer laser pulse is shot once.
- the method of the invention of forming a polycrystalline semiconductor thin film is applicable to a method of fabricating TFT semiconductor devices.
- This fabrication method is initiated with a film formation step.
- a semiconductor is grown under certain film formation conditions on an insulating substrate to form a polycrystalline precursory film comprising clusters of microscopic crystal grains.
- an irradiation step is carried out. That is, the precursory film is irradiated with an energy beam to increase the grain sizes of the crystal grains. In consequence, the precursory film is converted into a polycrystalline semiconductor thin film.
- a working step is carried out. Using the polycrystalline semiconductor thin film as an active layer, TFTs are formed at a high density, thus completing TFT semiconductor devices.
- the aforementioned method of fabricating the TFT semiconductor devices can be especially preferably applied to manufacture of active matrix liquid crystal displays.
- This fabrication method is started with a film formation step.
- a semiconductor layer is grown on an insulating substrate under certain film formation conditions to form a polycrystalline precursory film comprising clusters of microscopic crystal grains.
- an irradiation step is carried out. That is, the precursory film is irradiated with an energy beam to increase the grain sizes of the crystal grains. In consequence, the precursory film is converted into a polycrystalline semiconductor thin film.
- a first working step is performed to form TFTs at a high density, using the polycrystalline semiconductor thin film as an active layer.
- a second working step is carried out to form pixel electrodes at a high density and to connect them with their respective TFTs.
- an assembly step is performed. That is, a counter substrate having a counter electrode previously formed thereon is bonded to the insulating substrate via a gap. Then, a liquid crystal material is injected into the gap, thus completing an active matrix liquid crystal display.
- a precursory cluster film consisting, for example, of polycrystalline silicon is first formed on an insulating substrate by low-pressure chemical vapor deposition (LPCVD) or atmospheric-pressure chemical vapor deposition (APCVD).
- LPCVD low-pressure chemical vapor deposition
- APCVD atmospheric-pressure chemical vapor deposition
- This cluster film is irradiated with an energy beam such as a laser beam to crystallize the film.
- the polysilicon formed as a film by LPCVD or APCVD is substantially free from hydrogen. Since the hydrogen content of the precursory cluster film is low, it is easy to increase the grain sizes.
- the thin-film semiconductor formed on the insulating substrate can be converted into a high-quality polycrystalline semiconductor having large grain sizes by the use of the energy beam.
- FIG. 1(A) is a view illustrating a method of forming a polycrystalline semiconductor thin film according to the present invention
- FIG. 1(B) is a view illustrating a prior art method of forming a polycrystalline semiconductor thin film
- FIG. 2 is a schematic diagram illustrating a method of calculating crystal grain diameters
- FIG. 3 is a diagram illustrating one example of a laser irradiation step
- FIG. 4 is a graph showing a cross-sectional intensity distribution of laser radiation
- FIG. 5 is a schematic perspective view of one example of a TFT semiconductor device for a display device, the TFT semiconductor device being fabricated according to the invention
- FIGS. 6(A)-6(D) are schematic cross sections illustrating the process sequence of a method of fabricating a TFT semiconductor device according to the invention.
- FIGS. 7(E)-7(G) are views illustrating the process sequence of the method of fabricating a TFT semiconductor device according to the invention.
- FIG. 8 is a schematic perspective view of an active matrix liquid crystal display fabricated according to the invention.
- FIG. 1(A) is a view illustrating a novel method of forming a polycrystalline semiconductor thin film.
- FIG. 1(B) illustrates a prior art method of forming a polycrystalline semiconductor thin film, for comparison purposes.
- a film formation step is first carried out to grow a semiconductor layer on an insulating substrate (not shown) under certain film formation conditions so as to form a precursory film 1.
- This precursory film 1 consists of clusters of microscopic crystal grains 2 and is polycrystalline.
- an irradiation step is performed.
- An energy beam such as a laser beam is directed at the film.
- the film is subjected to thermal hysteresis.
- the grain sizes are increased to convert the precursory film into a thin film 3 of polycrystalline semiconductor.
- polysilicon having grain sizes of more than 3 nm is formed as the precursory film 1 on the insulating substrate at a film formation temperature of 500 to 650° C. by LPCVD, APCVD, or another method.
- the insulating substrate is made of a transparent material such as glass.
- the crystal grains 2 contained in the polysilicon have grain sizes of at least about 3 nm. If the grain sizes are less than this value, the state is close to an amorphous state rather than a polycrystalline state.
- polysilicon having grain sizes of 30 to 50 nm is formed as a film by LPCVD or another method.
- LPCVD 100% SiH 4 , for example, is used as a gaseous raw material.
- the polysilicon is grown by CVD, using the direct decomposition of this silane. Desired grain sizes can be accomplished at a film formation temperature of about 500 to 600° C. Glass material or the like which can withstand this film formation temperature may be used as the material of the insulating substrate. Since the film is formed by making use of direct decomposition of silane, the polysilicon is substantially free from hydrogen. If a trace amount of hydrogen is contained, it is released during the film formation step, because the film formation temperature is higher than 400° C.
- the film is irradiated, for example, with excimer laser radiation having a wavelength of 308 nm, an energy density of 150 to 450 mJ/cm 2 , and a pulse duration time of about 10 to 1000 ns such that a substrate temperature of about 20 to 450° C. is obtained.
- the polysilicon is once melted by single-shot irradiation with an excimer laser pulse and then recrystallizes. The crystal grains increase in size because of this thermal hysteresis.
- amorphous silicon is formed as a film by plasma- assisted chemical vapor deposition (PCVD).
- PCVD plasma- assisted chemical vapor deposition
- a mixture gas of silane and hydrogen is used as a gaseous raw material, and amorphous silicon is grown by plasma decomposition.
- the substrate temperature is about 180 to 350° C. Because the gaseous raw material contains a large amount of hydrogen, and because the film formation temperature is below 450° C., the amorphous silicon contains, for example, approximately 15-20% hydrogen. If this precursory film 1 consisting of the amorphous silicon is irradiated with laser radiation, a polycrystalline semiconductor thin film 3 is obtained.
- Crystallization of both polysilicon and amorphous silicon is made to progress by performing laser annealing as described above.
- FIG. 1(A) where polysilicon is used as the precursory film, the grain sizes of the crystal grains 2 not yet having undergone laser irradiation have been increased greatly by the laser irradiation. For instance, the grain sizes obtained after the laser irradiation reach 500 nm, for example.
- FIG. 1(B) where the amorphous silicon is used as the precursory film 1, the laser irradiation may result in a semiconductor thin film 3 but the crystal grain sizes are smaller than the sizes obtained where polysilicon is used as the precursory film.
- Table 1 shows the relation between the average crystal grain size of the polycrystalline semiconductor thin film obtained in this way and the energy density. For comparison, results obtained by laser annealing amorphous silicon similarly are also shown.
- the data on the crystal grain sizes listed in Table 1 was calculated by the method illustrated in FIG. 2. In particular, crystal grain sizes were found by actually measuring the longer diameter a and the shorter diameter b of each individual crystal grain by transmission electron microscopy (TEM) and calculating the square root of the product of both diameters. As can be seen from the results of measurements listed in Table 1, where the amorphous silicon is used as the precursory film, the average crystal grain diameters depend heavily on the energy density. The range of conditions providing large grain sizes is narrow.
- the hydrogen content of the film is lower than the content in the case of the amorphous silicon. Therefore, the average crystal grain diameters obtained after the laser irradiation depend to a lesser extent on the energy. Large grain sizes can be obtained over a wide range of energies. Furthermore, the crystal grain sizes are larger than the sizes obtained where amorphous silicon is employed. Large grain sizes amounting to 500 nm are obtained.
- FIG. 3 shows a specific example of laser irradiation shown in FIGS. 1(A) and 1(B).
- an insulating substrate 11 consisting of a large wafer is irradiated with a single shot of laser pulse 12.
- This irradiated region is a square area region 13, for example, of 5 ⁇ 5 cm 2 .
- the wafer is partitioned into such area regions 13, thus obtaining desired thin-film semiconductor devices. That is, each area region 13 corresponds to one chip.
- a precursory film consisting, for example, of polysilicon is formed on the surface of the insulating substrate 11.
- the distribution of cross-sectional intensities of the laser pulse 12 along the diagonal line A--A across the area region 13 is represented by the graph of FIG. 4.
- the laser beam intensity is so set that it is lower at the center of the area region and higher in the peripheral regions. More specifically, the laser beam intensity in the peripheral regions is set higher than that at the center by about 1 to 70%.
- the graph of FIG. 4 shows the distribution of the cross-sectional intensities along the diagonal line A--A shown in FIG. 3. Similar intensity distribution is observed in other orientations.
- the shape obtained by rotating the profile shown in FIG. 4 about a normal line passing through the midpoint of the diagonal line A--A shows a three-dimensional energy distribution of the laser pulse.
- FIG. 5 illustrates one example of application of the present invention, i.e., a method of fabricating a TFT semiconductor device used as a display device.
- a film formation step is first carried out. That is, a semiconductor thin film 32 is formed on a transparent insulating substrate 31 made of a glass material.
- This semiconductor thin film 32 is polycrystalline and has relatively small grain sizes in a clustered state.
- the thin film consists of polysilicon.
- a series of processes including laser annealing of the semiconductor thin film 32 is performed. TFTs are formed at a high density on the area region 33 corresponding to one chip.
- a matrix array 34, a horizontal scanning circuit 35, and a vertical scanning circuit 36 are included within the area region 33.
- TFTs are formed at a high density.
- pixel electrodes for one frame of image are formed on the matrix array 34, thus completing the TFT semiconductor device for a display device.
- the fabrication method described above includes a laser irradiation step.
- the area region 33 is irradiated with single shot of laser pulse 38.
- the semiconductor film 32 for one chip is heat-treated in a batch.
- This laser irradiation step is intended to crystallize the semiconductor thin film 32 by the batch heat treatment.
- the present invention is characterized in that the semiconductor thin film 32 is polycrystalline and has relatively small grain sizes in a clustered state. The film is melted by the batch heat treatment. Then, they are recrystallized. As a result, the small grains can be converted into polycrystals having relatively large grain sizes.
- Excimer laser light can be used as the laser pulse 38.
- the excimer laser light is intense pulsed UV light, it is absorbed by the surface layer of the semiconductor thin film 32 which is made of silicon or the like to thereby elevate the temperature in this portion. However, it is unlikely that even the insulating substrate 31 is heated.
- the threshold energy for melting when XeCl excimer laser light is emitted is about 130 mJ/cm 2 .
- An energy of about 220 mJ/cm 2 is needed to melt the whole film thickness.
- the time taken for the film to resolidify after melting is about 70 ns.
- the insulating substrate 31 consists of a large-sized wafer from which a number of TFT semiconductor devices 37 for display devices can be taken. That is, a plurality of area regions 33 have been previously established on the wafer.
- each area region is successively irradiated with a single shot of laser pulse 38.
- each area region 33 excluding a separator 39, is shot with a single pulse 38 of the laser radiation, the separator 39 being formed between adjacent area regions 33.
- each area region 33 is rectangular in shape.
- a single pulse 38 of the laser radiation having a rectangular cross section 40 conforming to the rectangular region 33 is directed at the region 33.
- a transparent insulating substrate 61 is prepared in the step illustrated in FIG. 6(A).
- This transparent insulating substrate 61 is made from glass material, for example, whose maximum processing temperature is slightly in excess of 600° C.
- a semiconductor thin film 62 serving as an active layer of TFTs is formed on this transparent insulating substrate 61.
- Polysilicons having very small grain sizes are formed as a thin film by LPCVD, for example.
- the semiconductor thin film 62 is patterned into a desired shape acting as device regions of the TFTs.
- Impurities are introduced into the device regions, for example by ion implantation or some other method. In this way, source regions S and drain regions D are formed.
- an antireflective film 63 is formed prior to laser processing to enhance the efficiency of the laser processing.
- This antireflective film consists, for example, of SiO 2 , and is deposited to a thickness of 30 to 100 nm. It is necessary that this antireflective film 63 be formed below the maximum processing temperature of the transparent insulating substrate 61.
- a laser pulse is directed to the regions via the antireflective film 63.
- the energy is about 150 to 500 mJ/cm 2 .
- the pulse width is set above 40 nm. This laser irradiation crystallizes those portions of the semiconductor thin film 62 which will become channel regions Ch. Also, the impurities injected in the source regions S and the drain regions D are activated. Single-shot irradiation of the laser pulse can crystallize the silicon film below the maximum processing temperature of the transparent insulating substrate 61 and activate the impurities.
- the processing then proceeds to the step illustrated in FIG. 7(E).
- the antireflective film 63 which is made unnecessary after the laser irradiation is peeled off.
- a gate-insulating film 66 is formed on the channel regions Ch.
- This gate-insulating film 66 is made of SiO 2 , P-SiN, or other material and has a thickness of 150 nm, for example.
- Gate electrodes 67 are formed on the gate-insulating film 66. In this example, the gate electrodes are made of aluminum to permit processing below 600° C.
- a first interlayer dielectric film 68 made from PSG is formed to a thickness of 500 nm.
- Contact holes 69 which are in communication with the source regions S are formed in the first interlayer dielectric film 68.
- conductive interconnects 70 which are connected with the source regions S are formed by patterning techniques.
- PSG is deposited to a thickness of 500 nm as a second interlayer dielectric film 71.
- Contact holes 72 which are in communication with the drain regions D via the second interlayer dielectric film 71 and via the first interlayer dielectric film 68 are formed.
- ITO is deposited as a film on the second interlayer dielectric film 71 and patterned into a desired shape to create pixel electrodes 73. In this way, TFTs for activating pixel electrodes contained in the matrix array of the TFT devices for display devices are completed.
- FIG. 8 is a perspective view showing one example of an active matrix liquid crystal display assembled, using the TFT semiconductor device for a display device as an active matrix array substrate, the TFT semiconductor device being shown in FIG. 5.
- the present liquid crystal display has a panel structure comprising the active matrix array substrate 101, a counter substrate 102, and a liquid crystal material 103 held between both substrates.
- a pixel array 104 and a driver circuit portion are integrally formed on the active matrix array substrate 101.
- the driver circuit portion is divided into a vertical scanning circuit 105 and a horizontal scanning circuit 106.
- a terminal portion 107 for external connection is formed at the top end of the peripheral portion of the active matrix array substrate 101.
- the terminal portion 107 is connected with the vertical scanning circuit 105 and with the horizontal scanning circuit 106 via interconnects 108.
- the matrix array 104 includes gate lines 109 and signal lines 110 which are arranged so as to be perpendicular to each other. Pixel electrodes 111 and TFTs 112 for activating the pixel electrodes are provided at the intersections of the lines 109 and 110.
- the source electrodes of the individual TFTs 112 are connected with their respective signal lines 110.
- the gate electrodes are connected with their respective gate lines 109.
- the drain electrodes are connected with their respective pixel electrodes 111.
- the gate lines 109 are connected to the vertical scanning circuit 105, while the signal lines 110 are connected to the horizontal scanning circuit 106.
- a polycrystalline semiconductor thin film having crystal grains which are uniform over a wide range of energies and have large grain sizes can be obtained. Consequently, TFTs using this thin film as their active layer can be designed so that they have uniform characteristics and high mobilities. Hence, when large-area, high-information content active matrix liquid crystal displays are realized in the future, the present invention will produce great advantages.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6-280097 | 1994-10-19 | ||
JP28009794A JP3421882B2 (ja) | 1994-10-19 | 1994-10-19 | 多結晶半導体薄膜の作成方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
US6015720A true US6015720A (en) | 2000-01-18 |
Family
ID=17620282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/544,569 Expired - Lifetime US6015720A (en) | 1994-10-19 | 1995-10-18 | Method of forming polycrystalline semiconductor thin film |
Country Status (5)
Country | Link |
---|---|
US (1) | US6015720A (fr) |
EP (1) | EP0708479B1 (fr) |
JP (1) | JP3421882B2 (fr) |
KR (1) | KR100398829B1 (fr) |
DE (1) | DE69520538T2 (fr) |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6187088B1 (en) * | 1998-08-03 | 2001-02-13 | Nec Corporation | Laser irradiation process |
US6193482B1 (en) * | 1999-10-22 | 2001-02-27 | Chih-Ming Chen | Structure of a piston of an air-filing device |
US6346462B1 (en) * | 1999-06-25 | 2002-02-12 | Lg. Philips Lcd Co., Ltd. | Method of fabricating a thin film transistor |
US20030003179A1 (en) * | 2000-08-18 | 2003-01-02 | Farnworth Warren M. | Apparatus for increased dimensional accuracy of 3-D object creation |
US6521492B2 (en) * | 2000-06-12 | 2003-02-18 | Seiko Epson Corporation | Thin-film semiconductor device fabrication method |
US20030064571A1 (en) * | 2001-10-02 | 2003-04-03 | Hitachi, Ltd. | Process for producing polysilicon film |
US6653179B1 (en) * | 1998-07-17 | 2003-11-25 | Sony Corporation | Method for manufacturing a thin film semiconductor device, method for manufacturing a display device, method for manufacturing a thin film transistors, and method for forming a semiconductor thin film |
US20040155295A1 (en) * | 2000-12-06 | 2004-08-12 | Hitachi, Ltd. | Thin film transistor and display using the same |
US20050092998A1 (en) * | 1999-02-12 | 2005-05-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and method of forming the same |
US20060006467A1 (en) * | 2004-07-07 | 2006-01-12 | Yoshiaki Nakazaki | Transistor structure and circuit suitable for input/output protection of liquid crystal display device |
US20070087488A1 (en) * | 2005-10-18 | 2007-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
CN100347819C (zh) * | 2002-09-02 | 2007-11-07 | 株式会社日立显示器 | 显示装置的制造方法以及制造装置 |
US20080213984A1 (en) * | 2007-03-02 | 2008-09-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US20090017292A1 (en) * | 2007-06-15 | 2009-01-15 | Henry Hieslmair | Reactive flow deposition and synthesis of inorganic foils |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU749571B2 (en) * | 1998-07-02 | 2002-06-27 | Astropower Inc. | Silicon thin-film, integrated solar cell, module, and methods of manufacturing the same |
JP4434115B2 (ja) | 2005-09-26 | 2010-03-17 | 日新電機株式会社 | 結晶性シリコン薄膜の形成方法及び装置 |
JP4529855B2 (ja) | 2005-09-26 | 2010-08-25 | 日新電機株式会社 | シリコン物体形成方法及び装置 |
Citations (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4309224A (en) * | 1978-10-06 | 1982-01-05 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
US4409724A (en) * | 1980-11-03 | 1983-10-18 | Texas Instruments Incorporated | Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereby |
US4448632A (en) * | 1981-05-25 | 1984-05-15 | Mitsubishi Denki Kabushiki Kaisha | Method of fabricating semiconductor devices |
US4933296A (en) * | 1985-08-02 | 1990-06-12 | General Electric Company | N+ amorphous silicon thin film transistors for matrix addressed liquid crystal displays |
US5213997A (en) * | 1989-03-31 | 1993-05-25 | Canon Kabushiki Kaisha | Method for forming crystalline film employing localized heating of the substrate |
US5278093A (en) * | 1989-09-23 | 1994-01-11 | Canon Kabushiki Kaisha | Method for forming semiconductor thin film |
US5290712A (en) * | 1989-03-31 | 1994-03-01 | Canon Kabushiki Kaisha | Process for forming crystalline semiconductor film |
US5365875A (en) * | 1991-03-25 | 1994-11-22 | Fuji Xerox Co., Ltd. | Semiconductor element manufacturing method |
US5372836A (en) * | 1992-03-27 | 1994-12-13 | Tokyo Electron Limited | Method of forming polycrystalling silicon film in process of manufacturing LCD |
US5403762A (en) * | 1993-06-30 | 1995-04-04 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a TFT |
US5413958A (en) * | 1992-11-16 | 1995-05-09 | Tokyo Electron Limited | Method for manufacturing a liquid crystal display substrate |
US5459092A (en) * | 1989-01-27 | 1995-10-17 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating an active matrix addressed liquid crystal image device |
EP0681316A2 (fr) * | 1994-05-02 | 1995-11-08 | Sony Corporation | Procédé de traitement d'un film mince sur un substrat pour dispositif d'affichage |
US5466638A (en) * | 1990-06-26 | 1995-11-14 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a metal interconnect with high resistance to electromigration |
US5471330A (en) * | 1993-07-29 | 1995-11-28 | Honeywell Inc. | Polysilicon pixel electrode |
US5529951A (en) * | 1993-11-02 | 1996-06-25 | Sony Corporation | Method of forming polycrystalline silicon layer on substrate by large area excimer laser irradiation |
US5550066A (en) * | 1994-12-14 | 1996-08-27 | Eastman Kodak Company | Method of fabricating a TFT-EL pixel |
US5561081A (en) * | 1993-02-04 | 1996-10-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming a semiconductor device by activating regions with a laser light |
US5591668A (en) * | 1994-03-14 | 1997-01-07 | Matsushita Electric Industrial Co., Ltd. | Laser annealing method for a semiconductor thin film |
US5605866A (en) * | 1993-10-20 | 1997-02-25 | Varian Associates, Inc. | Clamp with wafer release for semiconductor wafer processing equipment |
US5610736A (en) * | 1993-12-24 | 1997-03-11 | Kabushiki Kaisha Toshiba | Active matrix type display device in which elongated electrodes underlie the signal lines to form capacitors with the pixel electrodes and manufacturing method |
US5633182A (en) * | 1991-12-02 | 1997-05-27 | Canon Kabushiki Kaisha | Method of manufacturing an image display device with reduced cell gap variation |
US5712191A (en) * | 1994-09-16 | 1998-01-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device |
US5756364A (en) * | 1994-11-29 | 1998-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing method of semiconductor device using a catalyst |
US5804471A (en) * | 1992-12-04 | 1998-09-08 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating thin film transistor |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62297289A (ja) * | 1986-06-17 | 1987-12-24 | Matsushita Electronics Corp | 単結晶薄膜の形成方法 |
JP3203652B2 (ja) * | 1990-10-29 | 2001-08-27 | セイコーエプソン株式会社 | 半導体薄膜の製造方法 |
-
1994
- 1994-10-19 JP JP28009794A patent/JP3421882B2/ja not_active Expired - Lifetime
-
1995
- 1995-10-17 DE DE69520538T patent/DE69520538T2/de not_active Expired - Fee Related
- 1995-10-17 EP EP95116366A patent/EP0708479B1/fr not_active Expired - Lifetime
- 1995-10-18 US US08/544,569 patent/US6015720A/en not_active Expired - Lifetime
- 1995-10-18 KR KR1019950035897A patent/KR100398829B1/ko not_active IP Right Cessation
Patent Citations (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4309224A (en) * | 1978-10-06 | 1982-01-05 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
US4409724A (en) * | 1980-11-03 | 1983-10-18 | Texas Instruments Incorporated | Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereby |
US4448632A (en) * | 1981-05-25 | 1984-05-15 | Mitsubishi Denki Kabushiki Kaisha | Method of fabricating semiconductor devices |
US4933296A (en) * | 1985-08-02 | 1990-06-12 | General Electric Company | N+ amorphous silicon thin film transistors for matrix addressed liquid crystal displays |
US5459092A (en) * | 1989-01-27 | 1995-10-17 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating an active matrix addressed liquid crystal image device |
US5213997A (en) * | 1989-03-31 | 1993-05-25 | Canon Kabushiki Kaisha | Method for forming crystalline film employing localized heating of the substrate |
US5290712A (en) * | 1989-03-31 | 1994-03-01 | Canon Kabushiki Kaisha | Process for forming crystalline semiconductor film |
US5278093A (en) * | 1989-09-23 | 1994-01-11 | Canon Kabushiki Kaisha | Method for forming semiconductor thin film |
US5466638A (en) * | 1990-06-26 | 1995-11-14 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a metal interconnect with high resistance to electromigration |
US5365875A (en) * | 1991-03-25 | 1994-11-22 | Fuji Xerox Co., Ltd. | Semiconductor element manufacturing method |
US5633182A (en) * | 1991-12-02 | 1997-05-27 | Canon Kabushiki Kaisha | Method of manufacturing an image display device with reduced cell gap variation |
US5372836A (en) * | 1992-03-27 | 1994-12-13 | Tokyo Electron Limited | Method of forming polycrystalling silicon film in process of manufacturing LCD |
US5413958A (en) * | 1992-11-16 | 1995-05-09 | Tokyo Electron Limited | Method for manufacturing a liquid crystal display substrate |
US5804471A (en) * | 1992-12-04 | 1998-09-08 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating thin film transistor |
US5561081A (en) * | 1993-02-04 | 1996-10-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming a semiconductor device by activating regions with a laser light |
US5403762A (en) * | 1993-06-30 | 1995-04-04 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a TFT |
US5471330A (en) * | 1993-07-29 | 1995-11-28 | Honeywell Inc. | Polysilicon pixel electrode |
US5605866A (en) * | 1993-10-20 | 1997-02-25 | Varian Associates, Inc. | Clamp with wafer release for semiconductor wafer processing equipment |
US5529951A (en) * | 1993-11-02 | 1996-06-25 | Sony Corporation | Method of forming polycrystalline silicon layer on substrate by large area excimer laser irradiation |
US5610736A (en) * | 1993-12-24 | 1997-03-11 | Kabushiki Kaisha Toshiba | Active matrix type display device in which elongated electrodes underlie the signal lines to form capacitors with the pixel electrodes and manufacturing method |
US5591668A (en) * | 1994-03-14 | 1997-01-07 | Matsushita Electric Industrial Co., Ltd. | Laser annealing method for a semiconductor thin film |
EP0681316A2 (fr) * | 1994-05-02 | 1995-11-08 | Sony Corporation | Procédé de traitement d'un film mince sur un substrat pour dispositif d'affichage |
US5712191A (en) * | 1994-09-16 | 1998-01-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device |
US5756364A (en) * | 1994-11-29 | 1998-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing method of semiconductor device using a catalyst |
US5550066A (en) * | 1994-12-14 | 1996-08-27 | Eastman Kodak Company | Method of fabricating a TFT-EL pixel |
Non-Patent Citations (11)
Title |
---|
Bonnel et al, "Polycrystalline Silicon Thin Films Trasistors With Two-Step Annealing Process" IEEE Electrical Device Letters, vol. 16, No. 12, Dec. 1993. |
Bonnel et al, Polycrystalline Silicon Thin Films Trasistors With Two Step Annealing Process IEEE Electrical Device Letters, vol. 16, No. 12, Dec. 1993. * |
Kimura, Masakazu, et al., "Influence of AS-Deposited Film Structure on (100) Texture in Laser-Recrystallized Silicon on Fused Quartz", Applied Physics Letters, vol. 44, No. 4, pp. 420-422, Feb. 1, 1984, New York, USA. |
Kimura, Masakazu, et al., Influence of AS Deposited Film Structure on (100) Texture in Laser Recrystallized Silicon on Fused Quartz , Applied Physics Letters, vol. 44, No. 4, pp. 420 422, Feb. 1, 1984, New York, USA. * |
Sameshima, T, "Self Organized Grain Growth Larger Than μm Through Pulsed-Laser-Induced Melting of Silicon Films", Japanese Journal of Applied Physics, vol. 32, No. 108, pp. L 1485-1488, Oct. 15, 1993. |
Sameshima, T, Self Organized Grain Growth Larger Than m Through Pulsed Laser Induced Melting of Silicon Films , Japanese Journal of Applied Physics, vol. 32, No. 108, pp. L 1485 1488, Oct. 15, 1993. * |
T. Kamins, Polycrystalline Silicon for Integrated Circuit Applications. * |
Troxell, John R., et al., "Laser-Recrystallized Silicon Thin-Film Transistors on Expansion-Matched 800AC Glass", I.E.E.E. Electron Device Letters, vol. EDL-8, No. 12, pp. 576-578, Dec. 1, 1987. |
Troxell, John R., et al., Laser Recrystallized Silicon Thin Film Transistors on Expansion Matched 800AC Glass , I.E.E.E. Electron Device Letters, vol. EDL 8, No. 12, pp. 576 578, Dec. 1, 1987. * |
Tsai, M.J., et al., "Grain Growth of Laser-Recrystallized Polycrystalline and Amorphous Silicon Films", Thin Solid Films, vol. 249, No. 2, pp. 224-229, Sep. 15, 1994, Lausanne, CH. |
Tsai, M.J., et al., Grain Growth of Laser Recrystallized Polycrystalline and Amorphous Silicon Films , Thin Solid Films, vol. 249, No. 2, pp. 224 229, Sep. 15, 1994, Lausanne, CH. * |
Cited By (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6653179B1 (en) * | 1998-07-17 | 2003-11-25 | Sony Corporation | Method for manufacturing a thin film semiconductor device, method for manufacturing a display device, method for manufacturing a thin film transistors, and method for forming a semiconductor thin film |
US6187088B1 (en) * | 1998-08-03 | 2001-02-13 | Nec Corporation | Laser irradiation process |
US20050092998A1 (en) * | 1999-02-12 | 2005-05-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and method of forming the same |
US9097953B2 (en) | 1999-02-12 | 2015-08-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and method of forming the same |
US6346462B1 (en) * | 1999-06-25 | 2002-02-12 | Lg. Philips Lcd Co., Ltd. | Method of fabricating a thin film transistor |
US6193482B1 (en) * | 1999-10-22 | 2001-02-27 | Chih-Ming Chen | Structure of a piston of an air-filing device |
US6521492B2 (en) * | 2000-06-12 | 2003-02-18 | Seiko Epson Corporation | Thin-film semiconductor device fabrication method |
US20030003179A1 (en) * | 2000-08-18 | 2003-01-02 | Farnworth Warren M. | Apparatus for increased dimensional accuracy of 3-D object creation |
US6544465B1 (en) * | 2000-08-18 | 2003-04-08 | Micron Technology, Inc. | Method for forming three dimensional structures from liquid with improved surface finish |
US20030155693A1 (en) * | 2000-08-18 | 2003-08-21 | Farnworth Warren M. | Method for increased dimensional accuracy of 3-D object creation |
US7063524B2 (en) | 2000-08-18 | 2006-06-20 | Micron Technology, Inc. | Apparatus for increased dimensional accuracy of 3-D object creation |
US20050202612A1 (en) * | 2000-12-06 | 2005-09-15 | Hitachi, Ltd. | Thin film transistor and method of manufacturing the same |
US20040155295A1 (en) * | 2000-12-06 | 2004-08-12 | Hitachi, Ltd. | Thin film transistor and display using the same |
US6903371B2 (en) * | 2000-12-06 | 2005-06-07 | Hitachi, Ltd. | Thin film transistor and display using the same |
US7227186B2 (en) | 2000-12-06 | 2007-06-05 | Hitachi, Ltd. | Thin film transistor and method of manufacturing the same |
US7413604B2 (en) | 2001-10-02 | 2008-08-19 | Hitachi, Ltd. | Process for producing polysilicon film |
US6806099B2 (en) * | 2001-10-02 | 2004-10-19 | Hitachi, Ltd. | Process for producing polycrystalline silicon film by crystallizing on amorphous silicon film by light irradiation |
US20050051081A1 (en) * | 2001-10-02 | 2005-03-10 | Hitachi, Ltd. | Process for producing polysilicon film |
US20030064571A1 (en) * | 2001-10-02 | 2003-04-03 | Hitachi, Ltd. | Process for producing polysilicon film |
CN100347819C (zh) * | 2002-09-02 | 2007-11-07 | 株式会社日立显示器 | 显示装置的制造方法以及制造装置 |
US20060006467A1 (en) * | 2004-07-07 | 2006-01-12 | Yoshiaki Nakazaki | Transistor structure and circuit suitable for input/output protection of liquid crystal display device |
US20070087488A1 (en) * | 2005-10-18 | 2007-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US7709309B2 (en) * | 2005-10-18 | 2010-05-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US20100207253A1 (en) * | 2005-10-18 | 2010-08-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US8058709B2 (en) | 2005-10-18 | 2011-11-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US20080213984A1 (en) * | 2007-03-02 | 2008-09-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US7972943B2 (en) | 2007-03-02 | 2011-07-05 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US20090017292A1 (en) * | 2007-06-15 | 2009-01-15 | Henry Hieslmair | Reactive flow deposition and synthesis of inorganic foils |
Also Published As
Publication number | Publication date |
---|---|
JP3421882B2 (ja) | 2003-06-30 |
DE69520538T2 (de) | 2001-10-04 |
EP0708479A2 (fr) | 1996-04-24 |
DE69520538D1 (de) | 2001-05-10 |
KR100398829B1 (ko) | 2004-03-02 |
EP0708479A3 (fr) | 1996-09-11 |
JPH08124852A (ja) | 1996-05-17 |
EP0708479B1 (fr) | 2001-04-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6015720A (en) | Method of forming polycrystalline semiconductor thin film | |
JP4026182B2 (ja) | 半導体装置の製造方法、および電子機器の製造方法 | |
JP3326654B2 (ja) | 表示用半導体チップの製造方法 | |
US6051453A (en) | Process for fabricating semiconductor device | |
KR100297318B1 (ko) | 반도체장치제작방법 | |
KR100291970B1 (ko) | 반도체디바이스및그제조방법 | |
JP3254072B2 (ja) | 半導体装置の作製方法 | |
US20020056839A1 (en) | Method of crystallizing a silicon thin film and semiconductor device fabricated thereby | |
KR20010033202A (ko) | 반도체박막의 제조방법과 그 제조장치 및 반도체소자와 그제조방법 | |
JP4282954B2 (ja) | ポリシリコン結晶化方法、そして、これを用いたポリシリコン薄膜トランジスタの製造方法及び液晶表示素子の製造方法 | |
JPH05175235A (ja) | 多結晶半導体薄膜の製造方法 | |
KR100385693B1 (ko) | 다결정반도체박막의작성방법 | |
KR20050003283A (ko) | 결정화 특성이 향상된 다결정 실리콘 박막의 제조방법 및이를 이용한 액정표시장치의 제조방법 | |
JP3411408B2 (ja) | 半導体装置の作製方法 | |
JP2000260709A (ja) | 半導体薄膜の結晶化方法及びそれを用いた半導体装置 | |
US20040118335A1 (en) | Method of laser crystallization | |
JP3392325B2 (ja) | 液晶表示装置 | |
JP3361670B2 (ja) | 半導体装置およびその製造方法 | |
JP3949639B2 (ja) | 半導体装置の作製方法 | |
JPH09246183A (ja) | 多結晶半導体膜の製造方法 | |
JP3204489B2 (ja) | 半導体装置の製造方法 | |
KR20030015617A (ko) | 결정질 실리콘의 제조방법 | |
KR100333134B1 (ko) | 전계와 자외선을 이용한 비정질 막의 결정화 방법 | |
JP4514908B2 (ja) | 半導体装置の製造方法 | |
CN100388423C (zh) | 多晶硅薄膜的制造方法以及由此获得的薄膜晶体管 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SONY CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MINEGISHI, MASAHIRO;INO, MASUMITSU;KUNII, MASAFUMI;AND OTHERS;REEL/FRAME:007777/0395 Effective date: 19960116 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
FEPP | Fee payment procedure |
Free format text: PAYER NUMBER DE-ASSIGNED (ORIGINAL EVENT CODE: RMPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: JAPAN DISPLAY WEST INC., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SONY CORPORATION;REEL/FRAME:031377/0803 Effective date: 20130325 |