US4837520A - Fuse status detection circuit - Google Patents

Fuse status detection circuit Download PDF

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Publication number
US4837520A
US4837520A US07/129,891 US12989187A US4837520A US 4837520 A US4837520 A US 4837520A US 12989187 A US12989187 A US 12989187A US 4837520 A US4837520 A US 4837520A
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US
United States
Prior art keywords
transistor
fuse
fuses
electrically connected
transistors
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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US07/129,891
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English (en)
Inventor
Keith W. Golke
Robert L. Rabe
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Samsung Electronics Co Ltd
Honeywell Inc
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Honeywell Inc
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Publication date
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Priority to US07/129,891 priority Critical patent/US4837520A/en
Assigned to HONEYWELL INC., A CORP. OF DE reassignment HONEYWELL INC., A CORP. OF DE ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: GOLKE, KEITH W., RABE, ROBERT L.
Priority to DE3837800A priority patent/DE3837800A1/de
Priority to NL8802760A priority patent/NL193349C/nl
Priority to JP63285578A priority patent/JP2628359B2/ja
Priority to KR1019880014896A priority patent/KR960001304B1/ko
Application granted granted Critical
Publication of US4837520A publication Critical patent/US4837520A/en
Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HONEYWELL INC. (HONEYWELL) A DE CORP.
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Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/74—Testing of fuses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/02—Details
    • H02H3/04—Details with warning or supervision in addition to disconnection, e.g. for indicating that protective apparatus has functioned
    • H02H3/046—Signalling the blowing of a fuse

Definitions

  • the present invention relates to the field of programmable fuse circuitry. More particularly, it relates to a circuit for detection of the status of a fuse.
  • fuse status detection circuitry is as an input to a logic function circuit. Based on the state of a programmed fuse, the logic circuit will perform a selected logic function.
  • Common integrated circuit fuses are of either the laser blown type, laser annealed type, or of the electrically blown type. Regardless of the type of fuse used, the circuit to be programmed must be capable of detecting the status of its fuses in order to perform its intended function. Most conventional fuse detection circuitry includes pull-up or pull-down circuits to eliminate internal floating nodes. These circuits tend to be complex, sometimes requiring additional processing steps. Some of these conventional circuits allow a steady-state current to flow depending on the fuse status, and therefore compromise minimal power requirement.
  • the present inventio provides a fuse status detection circuit for use in reconfigurable integrated circuits.
  • the fuse structure is incorporated into the circuit to produce a flip-flop, and CMOS technology is used to achieve low power consumption.
  • the fuse status is inherently detected when the circuit is powered up, and no clocking pulses are necessary.
  • the circuit is functionally stable and independent of the fuse technology used.
  • the circuit is also inherently insensitive to the effects to globally or locally ionizing radiation.
  • FIG. 1 shows a circuit schematic of a preferred embodiment of the present invention
  • FIG. 2 shows a circuit schematic of an alternate embodiment of the present invention.
  • FIG. 3 shows a circuit schematic of a third embodiment of the present invention.
  • FIG. 1 is a detailed schematic diagram of a programmable fuse circuit in accordance with a preferred embodiment of the present invention.
  • a positive voltage supply terminal, V DD is connected to one terminal of fuse 1, to the source S of a p channel transistor QP and to one terminal of an initializing element, shown as a capacitor C C .
  • the other terminal of fuse 1, node A is connected to the drain D of a transistor QN and to the gate of QP.
  • the drain D of QP, node B is connected to the gate of QN and to the other terminal of the initializing element (C C ) and is also V out .
  • the source S of ON is connected to ground, V SS .
  • Fuse 2 is connected in parallel between the gate of QN and ground.
  • the purpose of the initializing element is to turn on the transistors during power up. By providing a current path between the gate of QN and the power supply, or between the gate of QP and ground during power up, the transistors will reach their turn-on threshold voltage. Once the transistors turn on, the circuit will achieve a stable state depending on the fuse status because of a positive feedback loop which will be discussed later.
  • the initializing element can be a capacitor or other device, such as a transistor, which provides a current path during power up of the circuit. As shown in FIG. 2, the initializing element can be placed in parallel with QN instead of in parallel with QP as in FIG. 1. Alternately, two initializing elements can be used as shown in FIG. 3. The three circuit embodiments shown are substantially equivalent.
  • capacitors Cc of the type which offer the most stability under various environments as the initializing element(s).
  • the thin film capacitor offers stability over the junction capacitor in this regard for two resons.
  • the resulting current across the p-n junction of a junction capacitor will reduce or even negate the net capacitance. This is not the case with the thin film capacitor since the thin film metal electrode is separated from the underlying doped semiconductor region by a dielectric layer.
  • the junction capacitor relies on a space charge or depletion region adjacent the junction to provide capacitance. The width of this depletion region is a function of the applied voltage and temperature. In contrast, the capacitance of the thin film capacitor is essentially independent of the applied voltage and the temperature.
  • the thin film capacitors can be trimmed to provide selected values of capacitance.
  • QN and QP are MOS transistors typically implemented in a CMOS technology.
  • the fuses may be strips of conductive polysilicon which can be blown by a laser. When blown, the fuses change from a conductive state to a nonconductive state. For porper operation of the preferred circuit, both fuses must have the same state; that is, either both conductive or both nonconductive.
  • terminal V DD is connected to a positive voltage supply of approximately 5 volts
  • terminal V SS is connected to a ground potential.
  • node A is connected to the power supply through fuse 1 and is thereby charged to a positive voltage, causing transistor QP to become less conductive.
  • the voltage at node B decreases through the discharging action of fuse 2, causing transistor QN to become less conductive.
  • node A increases in voltage causing QP to become still less conductive, and so on.
  • This positive feedback loop results in both QP and QN being turned fully off, reducing the static power supply current to the level of parasitic junction leakage, and producing a node B and node A voltage out equal to the ground potential, and power supply potential, respectively.
  • the fuse conductance is made large in comparison to the conductance of QP and QN, the only stable state for the circuit is node A equal to the power supply voltage, and node B equal to the ground potential.
  • the designer can choose the resistance of the fuse by varying the number of squares such that the fuse conductance is greater than the maximum conductance of the transistors. If the fuse is 5 squares long, the total fuse resistance is 500 ohms. The transistors need to exhibit a resistance roughly 2 to 4 times greater than 500 ohms. The typical transistor would then have a width to length ratio of less than 10. The exact ratio is dependent on process conditions and must be chosen to fit particular fabrication methods.
  • node B voltage increases due to the action of the initializing element (e.g., the capacitive coupling action of capacitor C C to the power supply V DD ).
  • the initializing element e.g., the capacitive coupling action of capacitor C C to the power supply V DD .
  • node A discharges which turns QP on, thereby raising node B to V DD and completing the positive feedback loop.
  • Both QP and QN will remain on with a drain current nearly equal to zero and node A and node B equal to the power supply potential and ground potential, respectively.
  • this same initialization could be performed by discharging node A, such that QP turns on. QP then charges node B, turning on QN and thereby completing the positive feedback loop.
  • the output signal is taken from the drain connection of either transistor.
  • Either V out or V out or both can be used to control redundant circuitry.
  • the flip-flop or bistable fuse detection circuits shown in the Figures produce an output level of ether ground or V DD , depending on the state of the fuses, without the need for clocking, refreshing, or d.c. power consumption.
  • the disclosed circuits are stable and have a functionality that is independent of the fuse technology employed.
  • the circuits are also highly insensitive to upset by time dependent radiation phenomena, which produces charge that can be collected by circuit nodes. Due to the high conductivity of the fuses, a very large amount of radiation is required in order to significantly change the node voltages. When the fuses are nonconductive, the inherent circuit state is such that no semiconductor p-n junctions are reverse biased. Because the collection of charge due to radiation tends to reduce the reverse bias on a p-n junction, any charge collection resulting from a radiation phenomena merely reinforces the state of the circuit, and nodes A and B are therefore inherently stable. Thus, the circuits are inherently insensitive to transient ionizing radiation.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
US07/129,891 1985-03-29 1987-11-12 Fuse status detection circuit Expired - Lifetime US4837520A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US07/129,891 US4837520A (en) 1985-03-29 1987-11-12 Fuse status detection circuit
DE3837800A DE3837800A1 (de) 1987-11-12 1988-11-08 Schaltungsanordnung zur zustandsueberwachung von schmelzleitungsverbindungen
NL8802760A NL193349C (nl) 1987-11-12 1988-11-09 Detectieschakeling voor het detecteren van de toestand van twee smeltstukverbindingen.
JP63285578A JP2628359B2 (ja) 1987-11-12 1988-11-11 ヒューズ状態検出回路
KR1019880014896A KR960001304B1 (ko) 1987-11-12 1988-11-12 퓨우즈 상태 검출 회로

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US71793585A 1985-03-29 1985-03-29
US07/129,891 US4837520A (en) 1985-03-29 1987-11-12 Fuse status detection circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US71793585A Continuation-In-Part 1985-03-29 1985-03-29

Publications (1)

Publication Number Publication Date
US4837520A true US4837520A (en) 1989-06-06

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Family Applications (1)

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US07/129,891 Expired - Lifetime US4837520A (en) 1985-03-29 1987-11-12 Fuse status detection circuit

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US (1) US4837520A (ja)
JP (1) JP2628359B2 (ja)
KR (1) KR960001304B1 (ja)
DE (1) DE3837800A1 (ja)
NL (1) NL193349C (ja)

Cited By (59)

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US4908525A (en) * 1989-02-03 1990-03-13 The United States Of America As Represented By The Secretary Of The Air Force Cut-only CMOS switch for discretionary connect and disconnect
US5051691A (en) * 1990-09-13 1991-09-24 Samsung Semiconductor, Inc. Zero power dissipation laser fuse signature circuit for redundancy in vlsi design
US5124587A (en) * 1989-06-30 1992-06-23 Siemens Aktiengesellschaft Integrated circuit with a configuration circuit
US5168379A (en) * 1990-01-30 1992-12-01 Hitachi, Ltd. Solid state imaging device having a defect relief system
US5208775A (en) * 1990-09-07 1993-05-04 Samsung Electronics Co., Ltd. Dual-port memory device
US5300840A (en) * 1991-11-25 1994-04-05 Sgs-Thomson Microelectronics, S.A. Redundancy fuse reading circuit for integrated memory
US5334880A (en) * 1991-04-30 1994-08-02 International Business Machines Corporation Low voltage programmable storage element
US5418406A (en) * 1990-03-30 1995-05-23 Matsushita Electric Industrial Co., Ltd. Pulse signal generator and redundancy selection signal generator
US5440246A (en) * 1994-03-22 1995-08-08 Mosel Vitelic, Incorporated Programmable circuit with fusible latch
US5552757A (en) * 1994-05-27 1996-09-03 Littelfuse, Inc. Surface-mounted fuse device
US5627493A (en) * 1992-08-21 1997-05-06 Kabushiki Kaisha Toshiba Semiconductor device having supply voltage deboosting circuit
US5699032A (en) * 1996-06-07 1997-12-16 Littelfuse, Inc. Surface-mount fuse having a substrate with surfaces and a metal strip attached to the substrate using layer of adhesive material
US5731733A (en) * 1995-09-29 1998-03-24 Intel Corporation Static, low current sensing circuit for sensing the state of a fuse device
US5731734A (en) * 1996-10-07 1998-03-24 Atmel Corporation Zero power fuse circuit
US5789970A (en) * 1995-09-29 1998-08-04 Intel Corporation Static, low current, low voltage sensing circuit for sensing the state of a fuse device
US5790008A (en) * 1994-05-27 1998-08-04 Littlefuse, Inc. Surface-mounted fuse device with conductive terminal pad layers and groove on side surfaces
GB2325527A (en) * 1997-05-23 1998-11-25 Texas Instruments Ltd Detecting the state of an electrical conductor
US5889414A (en) * 1997-04-28 1999-03-30 Mosel Vitelic Corporation Programmable circuits
US5896059A (en) * 1997-05-09 1999-04-20 International Business Machines Corporation Decoupling capacitor fuse system
US5905687A (en) * 1996-08-01 1999-05-18 Siemens Aktiengesellschaft Fuse refresh circuit
US5959445A (en) * 1995-09-29 1999-09-28 Intel Corporation Static, high-sensitivity, fuse-based storage cell
US5977860A (en) * 1996-06-07 1999-11-02 Littelfuse, Inc. Surface-mount fuse and the manufacture thereof
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US5999037A (en) * 1997-07-31 1999-12-07 International Business Machines Corporation Circuit for operating a control transistor from a fusible link
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US6060899A (en) * 1997-05-27 2000-05-09 Nec Corporation Semiconductor device with test circuit
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US6163492A (en) * 1998-10-23 2000-12-19 Mosel Vitelic, Inc. Programmable latches that include non-volatile programmable elements
US6191928B1 (en) 1994-05-27 2001-02-20 Littelfuse, Inc. Surface-mountable device for protection against electrostatic damage to electronic components
US6344763B1 (en) * 2000-04-24 2002-02-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device that can suppress generation of signal skew between data input/output terminals
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US20030166352A1 (en) * 2002-03-04 2003-09-04 Seibang Oh Multi-element fuse array
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US20060232904A1 (en) * 2005-04-13 2006-10-19 Taiwan Semiconductor Manufacturing Co. Supply voltage independent sensing circuit for electrical fuses
US20070194942A1 (en) * 2004-09-10 2007-08-23 Darr Matthew R Circuit protector monitoring assembly, system and method
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US20080231410A1 (en) * 2004-04-20 2008-09-25 Frank Anthony Doljack RFID Open Fuse Indicator, System, and Method
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US20090161470A1 (en) * 2007-12-20 2009-06-25 Micron Technology, Inc. Circuit for dynamic readout of fused data in image sensors
US20090206891A1 (en) * 2007-06-13 2009-08-20 Honeywell International Inc. Power Cycling Power On Reset Circuit for Fuse Initialization Circuitry
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US20130113049A1 (en) * 2011-11-04 2013-05-09 Richtek Technology Corporation, R.O.C. Fuse circuit for final test trimming of integrated circuit chip
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KR100425441B1 (ko) * 1997-06-23 2004-05-24 삼성전자주식회사 비 메모리를 위한 퓨징 장치 및 방법
JP5458236B2 (ja) * 2007-11-02 2014-04-02 ピーエスフォー ルクスコ エスエイアールエル 電気ヒューズ判定回路及び判定方法
KR20190086948A (ko) 2018-01-15 2019-07-24 주식회사 카라신 간이침대 고정형 침낭

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Cited By (114)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908525A (en) * 1989-02-03 1990-03-13 The United States Of America As Represented By The Secretary Of The Air Force Cut-only CMOS switch for discretionary connect and disconnect
US5124587A (en) * 1989-06-30 1992-06-23 Siemens Aktiengesellschaft Integrated circuit with a configuration circuit
US5168379A (en) * 1990-01-30 1992-12-01 Hitachi, Ltd. Solid state imaging device having a defect relief system
US5617049A (en) * 1990-03-30 1997-04-01 Matsushita Electric Industrial Co., Ltd. Pulse signal generator and redundancy selection signal generator
US5418406A (en) * 1990-03-30 1995-05-23 Matsushita Electric Industrial Co., Ltd. Pulse signal generator and redundancy selection signal generator
US5208775A (en) * 1990-09-07 1993-05-04 Samsung Electronics Co., Ltd. Dual-port memory device
US5051691A (en) * 1990-09-13 1991-09-24 Samsung Semiconductor, Inc. Zero power dissipation laser fuse signature circuit for redundancy in vlsi design
WO1992005452A1 (en) * 1990-09-13 1992-04-02 Samsung Semiconductor, Inc. A zero power dissipation laser fuse signature circuit for redundancy in vlsi design
US5334880A (en) * 1991-04-30 1994-08-02 International Business Machines Corporation Low voltage programmable storage element
US5418738A (en) * 1991-04-30 1995-05-23 International Business Machines Corporation Low voltage programmable storage element
US5300840A (en) * 1991-11-25 1994-04-05 Sgs-Thomson Microelectronics, S.A. Redundancy fuse reading circuit for integrated memory
US5627493A (en) * 1992-08-21 1997-05-06 Kabushiki Kaisha Toshiba Semiconductor device having supply voltage deboosting circuit
US5440246A (en) * 1994-03-22 1995-08-08 Mosel Vitelic, Incorporated Programmable circuit with fusible latch
US5552757A (en) * 1994-05-27 1996-09-03 Littelfuse, Inc. Surface-mounted fuse device
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JPH021145A (ja) 1990-01-05
JP2628359B2 (ja) 1997-07-09
NL193349B (nl) 1999-03-01
DE3837800A1 (de) 1989-05-24
KR890008849A (ko) 1989-07-12
NL8802760A (nl) 1989-06-01
NL193349C (nl) 1999-07-02
KR960001304B1 (ko) 1996-01-25

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