US20140290569A1 - Method for manufacturing semiconductor element and deposition apparatus - Google Patents
Method for manufacturing semiconductor element and deposition apparatus Download PDFInfo
- Publication number
- US20140290569A1 US20140290569A1 US14/302,815 US201414302815A US2014290569A1 US 20140290569 A1 US20140290569 A1 US 20140290569A1 US 201414302815 A US201414302815 A US 201414302815A US 2014290569 A1 US2014290569 A1 US 2014290569A1
- Authority
- US
- United States
- Prior art keywords
- chamber
- deposition
- oxide semiconductor
- substrate
- less
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000008021 deposition Effects 0.000 title claims abstract description 243
- 239000004065 semiconductor Substances 0.000 title abstract description 226
- 238000004519 manufacturing process Methods 0.000 title abstract description 36
- 238000000034 method Methods 0.000 title description 39
- 239000000758 substrate Substances 0.000 claims description 127
- 238000010438 heat treatment Methods 0.000 claims description 107
- 239000001301 oxygen Substances 0.000 claims description 39
- 229910052760 oxygen Inorganic materials 0.000 claims description 39
- 239000012535 impurity Substances 0.000 abstract description 42
- 239000001257 hydrogen Substances 0.000 abstract description 23
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 23
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 18
- 238000000151 deposition Methods 0.000 description 225
- 239000010410 layer Substances 0.000 description 158
- 239000010408 film Substances 0.000 description 146
- 238000004544 sputter deposition Methods 0.000 description 51
- 239000007789 gas Substances 0.000 description 35
- 239000013078 crystal Substances 0.000 description 26
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 229910007541 Zn O Inorganic materials 0.000 description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 14
- 239000000463 material Substances 0.000 description 14
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 13
- 229910052786 argon Inorganic materials 0.000 description 12
- 229910044991 metal oxide Inorganic materials 0.000 description 12
- 150000004706 metal oxides Chemical class 0.000 description 12
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- 230000001681 protective effect Effects 0.000 description 11
- 229910052581 Si3N4 Inorganic materials 0.000 description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 9
- 239000002184 metal Substances 0.000 description 8
- 239000010409 thin film Substances 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000011787 zinc oxide Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 239000000956 alloy Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 229910052733 gallium Inorganic materials 0.000 description 5
- 150000002431 hydrogen Chemical class 0.000 description 5
- 229910003437 indium oxide Inorganic materials 0.000 description 5
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000011701 zinc Substances 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000001816 cooling Methods 0.000 description 4
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 238000009832 plasma treatment Methods 0.000 description 4
- 239000002356 single layer Substances 0.000 description 4
- 238000005477 sputtering target Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 229910019092 Mg-O Inorganic materials 0.000 description 3
- 229910019395 Mg—O Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- -1 argon ions Chemical class 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 description 3
- 239000001307 helium Substances 0.000 description 3
- 229910052734 helium Inorganic materials 0.000 description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 229910052754 neon Inorganic materials 0.000 description 3
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000001552 radio frequency sputter deposition Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- 108091006149 Electron carriers Proteins 0.000 description 2
- 108010083687 Ion Pumps Proteins 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910052779 Neodymium Inorganic materials 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910001882 dioxygen Inorganic materials 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 150000004678 hydrides Chemical class 0.000 description 2
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910020923 Sn-O Inorganic materials 0.000 description 1
- AZWHFTKIBIQKCA-UHFFFAOYSA-N [Sn+2]=O.[O-2].[In+3] Chemical compound [Sn+2]=O.[O-2].[In+3] AZWHFTKIBIQKCA-UHFFFAOYSA-N 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000005407 aluminoborosilicate glass Substances 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- OYQCBJZGELKKPM-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[O-2].[In+3] OYQCBJZGELKKPM-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
- C23C16/4408—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber by purging residual gases from the reaction chamber or gas lines
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3457—Sputtering using other particles than noble gas ions
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
- C23C14/564—Means for minimising impurities in the coating chamber such as dust, moisture, residual gases
- C23C14/566—Means for minimising impurities in the coating chamber such as dust, moisture, residual gases using a load-lock chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4412—Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
Definitions
- the present invention relates to a method for manufacturing a semiconductor element including an oxide semiconductor. Further, the present invention relates to an apparatus for successive deposition used for the method for manufacturing a semiconductor element.
- a CPU is an aggregation of semiconductor elements each provided with an electrode which is a connection terminal, which includes a semiconductor integrated circuit (including at least a transistor and a memory) separated from a semiconductor wafer.
- a semiconductor circuit (IC chip) of an LSI, a CPU, or a memory is mounted on a circuit board, for example, a printed wiring board, to be used as one of components of a variety of electronic devices.
- a semiconductor device capable of transmitting and receiving data has been developed.
- a semiconductor device is called a wireless tag, an RFID tag, or the like.
- Those put into practical use include a semiconductor circuit (IC chip) formed using an antenna and a semiconductor substrate in many cases.
- a silicon-based semiconductor material has been known as a semiconductor material that can be used for a transistor; however, an oxide semiconductor has attracted attention as another material.
- an oxide semiconductor has attracted attention as another material.
- As a material of the oxide semiconductor zinc oxide or a substance containing zinc oxide is known.
- a transistor including an oxide semiconductor having an electron carrier concentration of lower than 10 18 /cm 3 is disclosed (Patent Documents 1 to 3).
- the oxide semiconductor is a substantially n-type oxide semiconductor, and the thin film transistors disclosed in the above patent documents does not have a sufficient on/off ratio.
- the reason for the low on/off ratio of such a thin film transistor is high off-state current. In order to obtain a semiconductor device with low power consumption, extremely low off-state current of a semiconductor element such as a thin film transistor is required.
- impurities can not be sufficiently removed from a deposition apparatus used for manufacturing a transistor even when evacuation is performed. Impurities are mixed into a film deposited in such a deposition apparatus.
- An example of a unit for removing impurities mixed during deposition into the film is heat treatment.
- adding heat treatment to a manufacturing process of a semiconductor element leads to problems such as an increase in manufacturing steps, which causes an increase in time required to manufacture an element, and an increase in energy consumption for the heat treatment.
- An object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor element including an oxide semiconductor into which impurities are not mixed. Further, an object of one embodiment of the present invention is to provide an apparatus for successive deposition used for the method for manufacturing the semiconductor element.
- the inside of the deposition apparatus is kept ultraclean in the manufacturing process of the semiconductor element, and the semiconductor element is formed by successive deposition without being exposed to the air.
- the pressure in the deposition chamber is kept at 10 ⁇ 8 Pa or less, whereby impurities in the chamber can be removed sufficiently.
- an oxide semiconductor film and a film being in contact with the oxide semiconductor film are deposited successively, and the semiconductor element is formed.
- a deposition chamber having an evacuation unit using an entrapment pump and a heating unit for heating at least a wall surface of the periphery of a substrate holding portion
- the pressure of less than or equal to 10 ⁇ 8 Pa can be achieved in the chamber, and impurities in the chamber can be removed sufficiently.
- a deposition apparatus including a plurality of such deposition chambers, a semiconductor element is formed.
- One embodiment of the present invention is a deposition apparatus which includes at least a load lock chamber connected to a unit for evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; a plurality of deposition chambers each including a substrate holding portion provided with a first heating unit for heating a substrate, a second heating unit for heating at least a wall surface of a periphery of the substrate holding portion, and a target holding portion for fixing a sputtering target and each being connected to a unit for evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; a heating chamber connected to a unit for evacuating the heating chamber to have a pressure of 10 ⁇ 8 Pa or less; and a transfer chamber connected to the load lock chamber, the heating chamber, and the plurality of deposition chambers through gate valves and connected to a unit for evacuating the transfer chamber to have a pressure of 10 ⁇ 6 Pa or less, in which the units for evacuation connected to the load lock chamber, the heating
- At least one of the deposition chambers be provided with a target holding portion for fixing an insulator target, and at least one of the deposition chambers be provided with a target holding portion for fixing a metal oxide target.
- at least one of the deposition chambers is provided with a target holding portion for fixing a metal oxide target, and at least one of the deposition chambers is provided with a target holding portion for fixing a metal target.
- At least one of the deposition chambers is provided with a target holding portion for fixing an insulator target; at least one of the deposition chambers is provided with a target holding portion for fixing a metal oxide target; and at least one of the deposition chambers is provided with a target holding portion for fixing a metal target.
- the amount of leakage of the air from the deposition chamber is preferably 10 ⁇ 11 Pa ⁇ m 3 /s or less.
- the first heating unit has a unit for depositing a film while heating the substrate at room temperature to 500° C. inclusive.
- the deposition apparatus preferably includes a treatment chamber provided with a unit for generating an oxygen radical and a unit for evacuating the chamber to have a pressure of 10 ⁇ 8 Pa or less.
- the deposition apparatus preferably includes a heating chamber provided with a unit for heating at room temperature to 700° C. inclusive.
- One embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a gate insulating film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; and introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the gate insulating film by a sputtering method.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; and introducing a high-purity sputtering gas into the deposition chamber and forming a conductive film over the oxide semiconductor film by a sputtering method.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a gate insulating film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the gate insulating film by a sputtering method; evacuating the deposition chamber
- the substrate be transferred to the treatment chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less and oxygen radical treatment be performed on the oxide semiconductor film after the oxide semiconductor film is formed and the deposition chamber is evacuated to have a pressure of 10 ⁇ 8 Pa or less.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a first oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10 ⁇ 6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a first oxide semiconductor film over the substrate by a sputtering method while performing heat treatment on the substrate; evacuating the deposition chamber to have a pressure of 10 ⁇ 8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10 ⁇ 8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a second oxide semiconductor film over the substrate by a sputtering method; evacuating
- a method for manufacturing a semiconductor element including an oxide semiconductor into which impurities are not mixed can be provided.
- an apparatus for successive deposition used for the method for manufacturing the semiconductor element can be provided.
- FIG. 1 is a diagram illustrating an apparatus for successive deposition according to one embodiment of the present invention.
- FIG. 2 is a diagram illustrating a deposition chamber according to one embodiment of the present invention.
- FIGS. 3A to 3C are diagrams illustrating a transistor which is manufactured by a manufacturing method according to one embodiment of the present invention.
- FIGS. 4A to 4E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention.
- FIGS. 5A to 5E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention.
- FIGS. 6A to 6E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention.
- FIG. 1 is a schematic top view of an apparatus for successive deposition of this embodiment.
- the apparatus for successive deposition illustrated in FIG. 1 includes a first load lock chamber 111 , a transfer chamber 112 , a plurality of deposition chambers (which correspond to a first deposition chamber 113 , a second deposition chamber 115 , a third deposition chamber 117 , a fourth deposition chamber 121 , and a fifth deposition chamber 127 in FIG. 1 ), heating chambers (which correspond to a first heating chamber 119 and a second heating chamber 123 in FIG. 1 ), a treatment chamber 125 , a substrate standby chamber 129 , a second load lock chamber 131 , and a substrate transfer unit 133 .
- the apparatus for successive deposition of this embodiment includes a unit for heating the inner wall of the apparatus at higher than or equal to 300° C.
- the first load lock chamber 111 , the transfer chamber 112 , the deposition chambers, the heating chambers, the treatment chamber 125 , the substrate standby chamber 129 , and the second load lock chamber 131 are connected to evacuation units 1111 to 1131 , respectively.
- the first load lock chamber 111 , the transfer chamber 112 , and the second load lock chamber 131 are connected to the evacuation units which are units for evacuating the chambers to have a pressure of 10 ⁇ 6 Pa or less, preferably, 10 ⁇ 8 Pa or less as an evacuation unit.
- the evacuation units are selected in accordance with the application of each chamber.
- the evacuation units may be the one provided with an entrapment pump, a turbo pump provided with a cold trap, or the like.
- the evacuation unit is preferably provided with the entrapment pump.
- An example of the entrapment pump is a pump provided with an entrapment unit such as a cryopump, a sputtering ion pump, or a titanium sublimation pump.
- the deposition chambers, the heating chambers, and the treatment chamber are connected to the evacuation units which are units for evacuating the chambers to have a pressure of greater than or equal to 10 ⁇ 12 Pa and less than or equal to 10 ⁇ 8 Pa.
- the evacuation units and the unit for heating the inner wall of the apparatus at higher than or equal to 300° C.
- the pressure of each chamber can be greater than or equal to 10 ⁇ 12 Pa and less than or equal to 10 ⁇ 8 Pa.
- impurities in the chamber can be removed sufficiently.
- the evacuation units the above-described entrapment pumps are used.
- the first load lock chamber 111 is a chamber in which a substrate holder which stores an untreated substrate is placed
- the second load lock chamber 131 is a chamber in which a substrate holder which stores a treated substrate is placed.
- the deposition apparatus according to one embodiment of the present invention is not limited thereto, and carrying out and carrying in of the substrate may be performed with one load lock chamber.
- the transfer chamber 112 serves as a delivery chamber for transferring a substrate from one chamber to another chamber.
- the heating chambers each include a unit for heating a substrate.
- the apparatus for successive deposition of this embodiment has two heating chambers; however, the number of heating chambers may be an arbitrary number which is one or more.
- the treatment chamber 125 is a chamber in which oxygen radical treatment can be performed.
- Oxygen radicals may be supplied by a plasma generating apparatus including oxygen or an ozone generating apparatus. By exposing a thin film to the supplied oxygen radicals or oxygen, the surface of the film can be modified. Further, the treatment performed in the treatment chamber is not limited to the oxygen radical treatment. In the apparatus for successive deposition, the treatment chamber is not necessarily provided, or a plurality of treatment chambers may be provided.
- the substrate standby chamber 129 is a chamber in which a substrate in a process of successive deposition can be in a standby state.
- the substrate standby chamber 129 may have a cooling unit. By providing the cooling unit, a substrate which has been heated for the deposition or the like can be cooled sufficiently.
- the cooling may be performed by introducing helium, neon, argon, or the like into the substrate standby chamber 129 . Note that it is preferable that water, hydrogen, or the like be not contained in nitrogen or a rare gas such as helium, neon, or argon which is used for the cooling.
- the purity of nitrogen or a rare gas such as helium, neon, or argon is preferably 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the concentration of impurities is 1 ppm or less, preferably 0.1 ppm or less).
- the substrate standby chamber is not necessarily provided.
- the apparatus for successive deposition includes a plurality of deposition chambers. Before and after the deposition, the pressure in each of the deposition chambers is kept at 10 ⁇ 8 Pa or less. As evacuation units to achieve this, the above-described entrapment pumps are used. The amount of leakage of the air from the deposition chamber is preferably 10 ⁇ 11 Pa ⁇ m 3 /s or less.
- the apparatus for successive deposition in FIG. 1 includes five deposition chambers (the first deposition chamber 113 , the second deposition chamber 115 , the third deposition chamber 117 , the fourth deposition chamber 121 , and the fifth deposition chamber 127 ); however the number of the deposition chambers is not limited thereto, and can be determined as appropriate depending on the number of films for successive deposition.
- equipment capable of deposition using a method in accordance with a kind of a film to be formed such as a sputtering method, a vacuum evaporation method, or a plasma CVD method may be provided as appropriate.
- the pressure in the deposition chamber during the deposition can be optimized in accordance with a deposition method and a material for the deposition, the pressure of each of the deposition chambers is kept at 10 ⁇ 8 Pa or less before and after the deposition.
- FIG. 2 A specific example of a structure of the deposition chamber is illustrated in FIG. 2 . In this embodiment, a deposition chamber in which deposition is performed using a sputtering method is described as an example.
- the deposition chamber 200 includes a substrate holding portion 201 , a substrate heating unit 203 , a substrate rotating unit 205 , a power source 209 , a gas introduction unit 210 , a sputtering target 211 which is held at a target holding portion, an attachment protection plate 212 , a main valve 213 , an automatic pressure controlling device 215 , a cryopump 217 , and a drypump 219 .
- a substrate 301 is transferred from one chamber included in the apparatus for successive deposition to the substrate holding portion 201 in the deposition chamber 200 through the transfer chamber 112 .
- a substrate holder (not illustrated) in the substrate holding portion 201 is moved vertically by a vertical driving mechanism and can fix the substrate.
- FIG. 2 it is preferable to adopt a face-down manner (a manner in which deposition is performed while a surface to be subjected to deposition of a substrate points downward) because attachment of dust or the like to the substrate 301 can be suppressed.
- the substrate holding portion 201 has the substrate heating unit 203 .
- the substrate heating unit 203 a unit for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater, or a unit for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp may be used.
- the deposition can be performed while the substrate 301 is heated by the substrate heating unit 203 .
- the substrate 301 is preferably rotated using the substrate rotating unit 205 to improve uniformity of films.
- the deposition chamber 200 includes a unit (not shown) for heating at least a wall surface around the substrate holding portion 201 .
- the inner wall of the deposition chamber is heated regularly, and impurities adsorbed onto the inner wall can be detached; accordingly, a high vacuum state can be achieved.
- deposition is performed using a sputtering method.
- a sputtering target 211 for example, a target for forming an oxide insulating layer, a target for forming a nitride insulating layer, a target for forming an oxide semiconductor layer, a target for forming a conductive layer, or the like can be used.
- an insulator target, a metal oxide target, a metal target, or the like can be used.
- a shutter (not shown) is provided between the sputtering target 211 and the substrate 301 .
- a sputtering method may be either a DC (direct current) sputtering method or an RF (radio frequency) sputtering method.
- a DC sputtering method is used in the case where an insulating layer is deposited
- a DC sputtering method is used in the case where a conductive layer of metal is deposited.
- metal such as iron, aluminum, or stainless steel can be used.
- the deposition chamber 200 is connected to evacuation units which are the cryopump 217 , and the drypump 219 .
- evacuation units which are the cryopump 217 , and the drypump 219 .
- a sputtering ion pump may be used together.
- the pressure in the deposition camber 200 can be kept at 10 ⁇ 8 Pa or less before and after the deposition.
- a high-purity gas is used as a gas to be introduced in order to prevent impurities from being introduced into the deposition chamber 200 .
- the gas which is introduced into the deposition chamber 200 is highly purified by a gas refiner before being introduced into the apparatus. Accordingly, a gas refiner needs to be provided so that a gas may be introduced into the deposition apparatus after it is highly purified. Accordingly, impurities such as water in the gas can be removed beforehand to prevent these impurities from being introduced into the apparatus.
- the apparatus for successive deposition of this embodiment includes deposition chambers each of which is connected to an evacuation unit using an entrapment pump and each of which has a heating unit for heating at least a wall surface of the periphery of a substrate holding portion so that the pressure in the chamber can be less than or equal to 10 ⁇ 8 Pa.
- impurities in the chamber can be removed sufficiently.
- an apparatus for successive deposition including such deposition chambers to perform successive deposition without exposure to the air, impurities are not mixed into the oxide semiconductor and a layer being in contact with the oxide semiconductor layer, whereby a semiconductor element including the high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured.
- the off-state current of such a semiconductor element is low, so that a semiconductor device with low power consumption can be realized.
- a method for manufacturing a bottom gate transistor using the apparatus for successive deposition in Embodiment 1 will be described with reference to FIG. 1 , FIG. 3A , and FIGS. 4A to 4E .
- a method for manufacturing a semiconductor element including an oxide semiconductor layer will be described.
- the semiconductor element illustrated in this embodiment includes a highly purified oxide semiconductor layer.
- the oxide semiconductor can be highly purified so as to contain impurities that are not main components of the oxide semiconductor as little as possible, and an i-type (intrinsic) or substantially i-type (intrinsic) oxide semiconductor can be obtained.
- a highly purified i-type (intrinsic) oxide semiconductor, or an oxide semiconductor close thereto, is obtained not by adding an impurity but by preventing an impurity such as hydrogen or water from being contained in the semiconductor as much as possible.
- the transistor manufactured in this embodiment includes an oxide semiconductor layer which is highly purified and made to be electrically i-type (intrinsic).
- the number of carriers in the highly purified oxide semiconductor can be significantly small (close to zero). Specifically, the carrier concentration can be reduced to less than 1 ⁇ 10 12 /cm 3 , preferably less than 1 ⁇ 10 11 /cm 3 . Further, the hydrogen concentration in the highly purified oxide semiconductor is less than 1 ⁇ 10 16 atoms/cm 3 .
- the number of carriers in the oxide semiconductor can be significantly small.
- a transistor in which such a highly purified oxide semiconductor layer is used for a channel formation region can have a reduced off-state current. Note that it is preferable that off-state current be as low as possible because power consumption can be reduced.
- FIG. 3A A cross-sectional view of a bottom gate transistor 300 in this embodiment is illustrated in FIG. 3A .
- the transistor 300 includes a gate electrode layer 303 , a first gate insulating layer 305 , a second gate insulating layer 307 , a highly purified oxide semiconductor layer 312 , a source electrode layer 311 a , a drain electrode layer 311 b , an insulating layer 313 , and a protective insulating layer 315 .
- a method for manufacturing the transistor 300 with the use of the deposition apparatus illustrated in Embodiment 1 will be described with reference to FIGS. 4A to 4E .
- a conductive film is formed over the substrate 301 ; a resist mask is formed using a first photomask; and etching is performed, whereby the gate electrode layer 303 is formed ( FIG. 4A ).
- a substrate used for the substrate 301 a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like can be used.
- the gate electrode layer 303 can be formed in a single layer or a stacked layer using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which includes any of these materials as a main component.
- a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which includes any of these materials as a main component.
- the gate insulating layer, the oxide semiconductor layer, and the conductive layer can be deposited successively without being exposed to the air.
- the substrate 301 over which the gate electrode layer 303 is formed is carried in the first load lock chamber 111 in the apparatus for successive deposition. Then, the pressure in the first load lock chamber 111 is reduced using the evacuation unit 1111 . At that time, the first load lock chamber is evacuated until the pressure becomes 10 ⁇ 6 Pa or less, preferably, 10 ⁇ 8 Pa or less.
- the substrate 301 is transferred from a chamber to another chamber through the transfer chamber 112 .
- the pressure in the transfer chamber 112 is kept at 10 ⁇ 6 Pa or less, preferably, 10 ⁇ 8 Pa or less using the evacuation unit 1112 such as a cryopump.
- the inner wall of the apparatus is heated regularly, and impurities adsorbed onto the inner wall are detached; accordingly, a high vacuum state can be achieved.
- the substrate 301 is transferred to the heating chamber (the first heating chamber 119 or the second heating chamber 123 ) using the substrate transfer unit 133 , and a gate valve which is used as a partition between the heating chamber and the transfer chamber 112 is closed.
- the heating chamber is kept at 10 ⁇ 8 Pa or less using the evacuation unit such as a cryopump.
- preheating is performed.
- impurities adsorbed onto the substrate 301 can be detached and removed from the heating chamber.
- the impurities are a hydrogen atom, a compound containing a hydrogen atom such as H 2 O, a compound containing a carbon atom, and the like.
- the temperature for the preheating is from room temperature to 600° C. inclusive, preferably from 100° C. to 400° C. inclusive.
- the substrate 301 is transferred to the first deposition chamber 113 using the substrate transfer unit 133 .
- a high-purity sputtering gas is introduced while the pressure in the first deposition chamber 113 is controlled using the evacuation unit 1113 such as cryopump, and a silicon nitride film which is to be as the first gate insulating layer 305 is deposited over the gate electrode layer 303 by a sputtering method.
- the pressure in the first deposition chamber 113 is evacuated again to have a pressure of 10 ⁇ 8 Pa or less using the evacuation unit 1113 , and the inside of the first deposition chamber 113 is kept clean. Impurities contained in the first gate insulating layer 305 is effectively reduced because the first gate insulating layer 305 is deposited in the deposition chamber which is kept clean by being evacuated to have a pressure of 10 ⁇ 8 Pa or less before and after the deposition.
- the substrate 301 is transferred from the first deposition chamber 113 to the second deposition chamber 115 .
- a silicon oxide film is deposited over the first gate insulating layer 305 by a sputtering method in a manner similar to the first gate insulating layer 305 , thereby forming the second gate insulating layer 307 .
- the pressure in the second deposition chamber 115 is kept at 10 ⁇ 8 Pa or less by using the evacuation unit 1115 such as a cryopump.
- the oxide semiconductor layer used in this embodiment which is made to be intrinsic (i-type) or substantially intrinsic is highly sensitive to an interface state and interface charge; thus, an interface between the oxide semiconductor layer and the gate insulating layer is important. Therefore, the second gate insulating layer 307 that is in contact with the highly-purified oxide semiconductor needs to have higher quality.
- the first deposition chamber 113 and the second deposition chamber 115 are evacuated by a cryopump and the like, and the impurity concentration in the deposition chambers is extremely low.
- the silicon nitride film and the silicon oxide film stacked in the deposition chambers in which impurities are reduced serve as gate insulating layers with reduced impurity concentration.
- the gate insulating layer is formed to have a stacked structure of a silicon nitride film and a silicon oxide film; however, the gate insulating layer is not limited thereto.
- the gate insulating layer can have a single-layer or stacked structure including a silicon nitride film, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, or the like.
- An oxide insulating film is preferably used as a layer in contact with the oxide semiconductor layer to be formed later.
- the insulating layer can be formed by a plasma CVD method, a sputtering method, or the like.
- the insulating layer is preferably deposited by a sputtering method.
- the thickness of the gate insulating layer can be greater than or equal to 10 nm and less than or equal to 500 nm, for example.
- the substrate 301 is transferred from the second deposition chamber 115 to the third deposition chamber 117 , and an oxide semiconductor film 309 is deposited over the second gate insulating layer 307 by a sputtering method.
- the pressure in the third deposition chamber 117 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1117 such as a cryopump, and the inside of the third deposition chamber 117 is kept extremely clean. Impurities contained in the oxide semiconductor film 309 are effectively reduced because the oxide semiconductor film 309 is deposited in the deposition chamber which is kept clean before and after the deposition.
- an In—Sn—Ga—Zn—O-based oxide semiconductor which is a four-component metal oxide
- the above oxide semiconductor film may contain SiO 2 .
- the In—Ga—Zn—O-based oxide semiconductor means an oxide containing at least In, Ga, and Zn, and the composition ratio of the elements is not particularly limited.
- the In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.
- a thin film represented by InMO 3 (ZnO) m (m>0 and m is not a natural number) can be used.
- M represents one or more metal elements selected from Ga, Al, Mn, and Co.
- M can be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
- the oxide semiconductor film 309 is deposited with a sputtering method with the use of an In—Ga—Zn—O-based oxide target. A cross-sectional view of this stage is illustrated in FIG. 4B .
- the oxide semiconductor film 309 can be formed in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- the filling rate of the oxide target is 90.0% to 100% inclusive, preferably, 95.0% to 99.9% inclusive.
- a high-purity gas in which impurities such as hydrogen, water, a hydroxyl group, and hydride are removed is used as the sputtering gas for the deposition of the oxide semiconductor film 309 .
- the distance between the substrate and the target is 100 mm
- the pressure is 0.6 Pa
- the direct-current (DC) power source is 0.5 kW
- the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%).
- a pulsed direct-current power source is preferably used, in which case powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness can be uniform.
- an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm can be deposited in 10 minutes in the third deposition chamber 117 .
- oxygen radical treatment is preferably performed on the oxide semiconductor film 309 .
- oxygen radical treatment is performed in the treatment chamber 125 .
- the pressure in the treatment chamber 125 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1125 such as a cryopump.
- Oxygen radicals may be supplied by a plasma generating apparatus including oxygen or an ozone generating apparatus. By exposing a thin film to the produced oxygen radicals or oxygen, the surface of the film can be modified. Instead of the oxygen radical treatment, radical treatment may be performed using argon and oxygen radicals. The treatment using argon and oxygen radicals is treatment in which argon gas and oxygen gas are introduced to generate plasma, thereby modifying the surface of a thin film.
- Argon atoms (Ar) in a reaction space where an electric field is applied to generate discharge plasma are excited or ionized by electrons in the discharge plasma, thereby being converted into argon radicals (Ar*), argon ions (Ar + ), or electrons.
- Argon radicals (Ar*) which are in a high-energy metastable state, react with the peripheral atoms of the same kind or of different kinds to be returned to a stable state by exciting or ionizing the atoms, whereby a reaction occurs like an avalanche.
- oxygen radicals (O*) react with a material on the surface of a thin film that is to be processed, so that the surface is modified, and the oxygen radicals also react with an organic substance on the surface, so that plasma treatment to remove the organic substance is performed.
- radicals of an inert gas have the properties of being kept in a metastable state for a longer time than radicals of reactive gas (oxygen gas); accordingly, an inert gas is generally used to generate plasma.
- the substrate 301 is transferred to the fifth deposition chamber 127 , and a conductive film 310 is deposited over the oxide semiconductor film 309 by a sputtering method ( FIG. 4C ).
- the pressure in the fifth deposition chamber 127 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1127 such as a cryopump.
- a material for the conductive film an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy including the above element, an alloy including any of these elements in combination, or the like can be used, for example.
- a structure may be employed in which a high-melting-point metal film of Ti film, Mo film, W film, or the like is stacked on one or both of a top surface and a bottom surface of a metal film of Al film, Cu film, or the like.
- heat resistance can be improved by using an Al material to which an element (such as Si, Nd, or Sc) which prevents generation of a hillock or a whisker in an Al film is added.
- the conductive film may be formed using a conductive metal oxide.
- indium oxide (In 2 O 3 ), tin oxide (SnO 2 ), zinc oxide (ZnO), indium oxide-tin oxide alloy (In 2 O 3 —SnO 2 , which is abbreviated to ITO), indium oxide-zinc oxide alloy (In 2 O 3 —ZnO), or any of these metal oxide materials in which silicon oxide is contained can be used.
- the substrate 301 which has been subjected to successive deposition is transferred to the second load lock chamber 131 .
- the substrate in the case where a substrate transferred from one chamber is required to be in standby mode before being transferred into another chamber where next deposition and treatment is performed, the substrate can be transferred in the substrate standby chamber 129 .
- the pressure in the substrate standby chamber 129 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1129 such as a cryopump.
- a resist mask is formed using a second photomask over the conductive film 310 , and unnecessary portions of the conductive film 310 and the oxide semiconductor film 309 are removed by etching. Then, using a third photomask, the conductive film overlapping with the channel formation region of the oxide semiconductor layer is etched so that the source electrode layer 311 a and the drain electrode layer 311 b are formed ( FIG. 4D ).
- the substrate may be transferred into the deposition apparatus again, and plasma treatment may be performed using a gas such as N 2 O, N 2 , or Ar so that water or the like adsorbed to a surface of an exposed portion of the oxide semiconductor layer is removed.
- the insulating layer 313 is formed as a protective insulating film in contact with part of the oxide semiconductor layer without being exposed to the air.
- the insulating layer 313 can be formed to a thickness of at least 1 nm by a method by which impurities such as water or hydrogen are not mixed into the insulating layer 313 , such as a sputtering method as appropriate.
- a method by which impurities such as water or hydrogen are not mixed into the insulating layer 313 such as a sputtering method as appropriate.
- the entry of the hydrogen into the oxide semiconductor layer or the extraction of oxygen in the oxide semiconductor layer by hydrogen is caused, thereby making the resistance of the backchannel of the oxide semiconductor layer low (to have an n-type conductivity), so that a parasitic channel might be formed. Therefore, it is important that a deposition method in which hydrogen is not used be employed in order that the insulating layer 313 contains as little hydrogen as possible.
- the pressure in the deposition chamber for depositing the insulating layer 313 is kept at 10 ⁇ 8 Pa or less using an evacuation unit such as a cryopump before and after the deposition.
- the insulating layer 313 which is formed in contact with the oxide semiconductor layer is formed using an inorganic insulating film that does not contain impurities such as moisture, hydrogen, and a hydroxyl group and blocks the entry of such impurities from the outside; in particular, an oxide insulating film is preferably used.
- the insulating layer 313 is typically formed using a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film or the like.
- a 200-nm-thick silicon oxide film is deposited as the insulating layer 313 by a sputtering method.
- the substrate temperature at the time of deposition is from room temperature to 500° C. inclusive.
- the silicon oxide film can be formed with a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere containing a rare gas and oxygen. It is preferable that a high-purity gas from which impurities such as hydrogen, water, a hydroxyl group, and hydride are removed be used as the sputtering gas for the deposition of the insulating layer 313 .
- a silicon oxide target or a silicon target can be used as a target for sputtering.
- a silicon oxide film can be formed by a sputtering method using a silicon target in an atmosphere containing oxygen.
- a protective insulating layer 315 may be formed over the insulating layer 313 .
- a silicon nitride film is formed by an RF sputtering method. Since an RF sputtering method has high productivity, it is preferably used as a deposition method of the protective insulating layer.
- an inorganic insulating film which does not include an impurity such as moisture and prevents entry of these from the outside such as a silicon nitride film or an aluminum nitride film is used.
- the protective insulating layer 315 is formed using a silicon nitride film ( FIG. 4E ).
- the pressure in the deposition chamber for depositing the protective insulating layer 315 is kept at 10 ⁇ 8 Pa or less using an evacuation unit such as a cryopump before and after the deposition.
- the transistor 300 is formed.
- a method for manufacturing a transistor having a different structure from the transistor described in Embodiment 2 by using an apparatus for successive deposition described in Embodiment 1 will be described with reference to FIG. 1 , FIG. 3B , and FIGS. 5A to 5E .
- a method for manufacturing a semiconductor element using an oxide semiconductor layer will be described.
- a cross-sectional view of a bottom gate transistor in this embodiment is illustrated in FIG. 3B .
- a transistor 400 includes the gate electrode layer 303 , the first gate insulating layer 305 , the second gate insulating layer 307 , a highly purified oxide semiconductor layer 308 , a source electrode layer 314 a , a drain electrode layer 314 b , the insulating layer 313 , and the protective insulating layer 315 .
- FIGS. 5A to 5E A method for manufacturing the transistor 400 using the deposition apparatus in Embodiment 1 will be described with reference to FIGS. 5A to 5E .
- the gate electrode layer 303 is formed over the substrate 301 ( FIG. 5(A) ).
- the gate insulating layer (the first gate insulating layer 305 and the second gate insulating layer 307 ) and the oxide semiconductor film 306 are deposited successively without being exposed to the air ( FIG. 5(B) ).
- the gate insulating layer and the oxide semiconductor film 306 are deposited in a manner similar to that in Embodiment 2.
- the oxide semiconductor film 306 is processed into an island-shaped oxide semiconductor layer 308 in a photolithography step ( FIG. 5C ).
- the resist mask for forming the oxide semiconductor layer 308 may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.
- etching of the oxide semiconductor film 309 wet etching, dry etching, or both of them may be employed.
- an etchant used for wet etching of the oxide semiconductor film 309 for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used.
- ITO07N produced by KANTO CHEMICAL CO., INC.
- KANTO CHEMICAL CO., INC. may also be used.
- a conductive film is deposited over the second gate insulating layer 307 and the oxide semiconductor layer 308 by a sputtering method.
- the pressure in the deposition chamber for depositing the conductive film is kept at 10 ⁇ 8 Pa or less using an evacuation unit such as a cryopump before and after the deposition.
- a resist mask is formed over the conductive film through a photolithography step and selective etching is performed, so that the source electrode layer 311 a and the drain electrode layer 311 b are formed.
- a silicon oxide film is formed as the insulating layer 313 and a silicon nitride film is formed as the protective insulating layer 315 .
- the transistor 400 is formed ( FIG. 5E ).
- a method for manufacturing a transistor having a different structure from the semiconductor element described in Embodiments 2 and 3 by using an apparatus for successive deposition described in Embodiment 1 will be described with reference to FIG. 1 , FIG. 3C , and FIGS. 6A to 6E .
- a method for manufacturing a transistor using an oxide semiconductor layer having a crystal region will be particularly described.
- a transistor 500 includes the gate electrode layer 303 , the first gate insulating layer 305 , the second gate insulating layer 307 , a first oxide semiconductor layer 406 , a second oxide semiconductor layer 408 , a source electrode layer 411 a , a drain electrode layer 411 b , the insulating layer 313 , and the protective insulating layer 315 . Note that the first oxide semiconductor layer 406 and the second oxide semiconductor layer 408 are crystallized.
- a method for manufacturing the transistor 500 using the deposition apparatus in Embodiment 1 will be described with reference to FIGS. 6A to 6E .
- a conductive film is formed over the substrate 301 , and then, the gate electrode layer 303 is formed by a first photolithography step.
- the first gate insulating layer 305 and the second gate insulating layer 307 are formed ( FIG. 6A ).
- the substrate 301 is transferred from the second deposition chamber 115 to the third deposition chamber 117 , and an oxide semiconductor layer having a crystal region is formed over the second gate insulating layer 307 .
- the oxide semiconductor layer having a crystal region with a large film thickness that is, a c-axis-aligned crystal region (a crystal region aligned in a direction perpendicular to a surface of the film) may be formed by performing deposition twice and heat treatment twice.
- a crystal region can be formed in the oxide semiconductor regardless of the material for a base component such as an oxide, a nitride, a metal, or the like.
- the first oxide semiconductor film is deposited by a sputtering method.
- the pressure in the third deposition chamber 117 is kept at 10 ⁇ 8 Pa or less using the evacuation unit 1117 such as a cryopump before and after the deposition.
- the oxide semiconductor used for the first oxide semiconductor film the oxide semiconductor described in Embodiment 2 can be used.
- the first oxide semiconductor film is used as a seed crystal for crystal growth of the second oxide semiconductor film which is formed later. Therefore, the first oxide semiconductor film may have a thickness with which crystal growth is possible, typically greater than or equal to a thickness of one atomic layer and less than or equal to 30 nm, preferably greater than or equal to 2 nm to 5 nm.
- the first oxide semiconductor film 405 is thin, throughput in deposition treatment and heat treatment can be improved.
- the substrate 301 is transferred from the third deposition chamber 117 to the first heating chamber 119 , and subjected to the first heat treatment; accordingly, a crystal region (including a plate-like crystal) is formed in a region including a surface of the first oxide semiconductor film.
- the first oxide semiconductor film 405 including the crystal region (including a plate-like crystal) can be formed in the region including the surface of the first oxide semiconductor film ( FIG. 6B ).
- the first heat treatment is performed in an atmosphere of nitrogen, oxygen, a rare gas, or dry air.
- a temperature from 450° C. to 850° C. inclusive, preferably from 550° C. to 750° C. inclusive is employed.
- heating time is longer than or equal to 1 minute and shorter than or equal to 24 hours.
- the pressure in the first heating chamber 119 is kept at 10 ⁇ 8 Pa or less using the evacuation unit 1119 such as a cryopump before and after the heat treatment.
- the first heating chamber 119 have a heating unit which can heat a substrate at room temperature to 850° C. inclusive.
- the third deposition chamber 117 has a substrate heating unit
- the substrate 301 may be heated at room temperature to 500° C. inclusive.
- the substrate is transferred from the first heating chamber 119 to the fourth deposition chamber 121 , and the second oxide semiconductor film that is thicker than the first oxide semiconductor film is formed by a sputtering method.
- the pressure in the fourth deposition chamber 121 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1121 such as a cryopump before and after the deposition.
- the oxide semiconductor described in Embodiment 2 can be used.
- an appropriate thickness of the second oxide semiconductor film may be determined by a practitioner depending on a device to be manufactured.
- the second oxide semiconductor film may be formed while heating the substrate.
- the first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 30 nm can be deposited in 10 minutes while being heated in the deposition chamber 117 , and then, the second oxide semiconductor film with a thickness of greater than or equal to 20 nm and less than or equal to 200 nm can be successively deposited in 10 minutes in the fourth deposition chamber 121 .
- the substrate 301 is transferred from the fourth deposition chamber 121 to the second heating chamber 123 , and the second heat treatment is performed.
- the pressure in the second heating chamber 123 is kept at 10 ⁇ 8 Pa or less using an evacuation unit 1123 such as a cryopump before and after the heat treatment.
- the second heat treatment is performed at 450° C. to 850° C. inclusive, preferably at 600° C. to 700° C. inclusive.
- Crystal growth proceeds upward with the use of the first oxide semiconductor film 405 as a seed crystal for the crystal growth and the whole second oxide semiconductor film is crystallized.
- the second oxide semiconductor film 407 having a crystal region with a large film thickness is formed ( FIG. 6B ).
- the boundary between the first oxide semiconductor film 405 and the second oxide semiconductor film 407 having a crystal region is shown by a dashed line in FIGS. 6A to 6E ; however, the boundary between the first oxide semiconductor layer 405 and the second oxide semiconductor layer 407 having a crystal region cannot be determined and the first oxide semiconductor layer 405 and the second oxide semiconductor layer 407 can be regarded to as one layer in some cases.
- oxygen radical treatment is preferably performed on the surface of the second oxide semiconductor film.
- oxygen radical treatment is performed in the treatment chamber 125 .
- the pressure in the second heating chamber 125 is kept at 10 ⁇ 8 Pa or less using the evacuation unit 1125 such as a cryopump.
- the oxygen radical treatment can be performed in a manner similar to that in Embodiment 2.
- the substrate 301 is transferred to the fifth deposition chamber 127 , and a conductive film 409 is deposited over the second oxide semiconductor film 407 by a sputtering method ( FIG. 6C ).
- the conductive film 409 can be formed using a material and a method similar to those of the conductive film 310 in Embodiment 2.
- Embodiment 2 can be referred to for the details.
- the pressure in the fifth deposition chamber 127 is kept at 10 ⁇ 8 Pa or less using the evacuation unit 1127 such as a cryopump, and the inside of the fifth deposition chamber 127 is kept extremely clean.
- the substrate 301 that has been subjected to successive deposition is transferred to the second load lock chamber 131 .
- the first oxide semiconductor layer 406 , the second oxide semiconductor layer 408 , the source electrode layer 411 a , and the drain electrode layer 411 b are formed by a photolithography step using the second photomask and by etching ( FIG. 6D ).
- a silicon oxide film is formed as the insulating layer 313 and a silicon nitride film is forms as the protective insulating layer 315 .
- the transistor 500 using an oxide semiconductor layer having a crystal region can be manufactured ( FIG. 6E ).
- the oxide semiconductor film having a crystal region may have a single layer or three or more layers.
- an oxide semiconductor film may be formed in the third deposition chamber 117 , and heat treatment may be performed in the first heating chamber 119 . Further, the substrate 301 may be subjected to deposition while being heated so that crystal growth can be promoted; alternatively, oxygen radical treatment may be performed on the deposited oxide semiconductor film in the treatment chamber 125 .
- Embodiment 3 can be referred to for the details.
- the deposition apparatus capable of successive deposition in Embodiment 1 which keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mechanical Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Thin Film Transistor (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Physical Vapour Deposition (AREA)
- Recrystallisation Techniques (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
An object of the present invention is to provide an apparatus for successive deposition used for manufacturing a semiconductor element including an oxide semiconductor in which impurities are not included. By using the deposition apparatus capable of successive deposition of the present invention that keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
Description
- The present invention relates to a method for manufacturing a semiconductor element including an oxide semiconductor. Further, the present invention relates to an apparatus for successive deposition used for the method for manufacturing a semiconductor element.
- In recent years, semiconductor devices have been developed to be used as an LSI, a CPU, or a memory. A CPU is an aggregation of semiconductor elements each provided with an electrode which is a connection terminal, which includes a semiconductor integrated circuit (including at least a transistor and a memory) separated from a semiconductor wafer.
- A semiconductor circuit (IC chip) of an LSI, a CPU, or a memory is mounted on a circuit board, for example, a printed wiring board, to be used as one of components of a variety of electronic devices.
- In addition, a semiconductor device capable of transmitting and receiving data has been developed. Such a semiconductor device is called a wireless tag, an RFID tag, or the like. Those put into practical use include a semiconductor circuit (IC chip) formed using an antenna and a semiconductor substrate in many cases.
- A silicon-based semiconductor material has been known as a semiconductor material that can be used for a transistor; however, an oxide semiconductor has attracted attention as another material. As a material of the oxide semiconductor, zinc oxide or a substance containing zinc oxide is known. In addition, a transistor including an oxide semiconductor having an electron carrier concentration of lower than 1018/cm3 is disclosed (Patent Documents 1 to 3).
-
- [Patent Document 1] Japanese Published Patent Application No. 2006-165527
- [Patent Document 2] Japanese Published Patent Application No. 2006-165528
- [Patent Document 3] Japanese Published Patent Application No. 2006-165529
- Even when the electron carrier concentration is lower than 1018/cm3, the oxide semiconductor is a substantially n-type oxide semiconductor, and the thin film transistors disclosed in the above patent documents does not have a sufficient on/off ratio. The reason for the low on/off ratio of such a thin film transistor is high off-state current. In order to obtain a semiconductor device with low power consumption, extremely low off-state current of a semiconductor element such as a thin film transistor is required.
- To reduce off-state current of a transistor to an extremely low level, it is necessary to prevent mixing of impurities such as water, hydrogen or a hydroxyl group into the oxide semiconductor layer and a layer being in contact with the oxide semiconductor layer and to sufficiently reduce hydrogen concentration.
- However, in some cases, impurities can not be sufficiently removed from a deposition apparatus used for manufacturing a transistor even when evacuation is performed. Impurities are mixed into a film deposited in such a deposition apparatus.
- An example of a unit for removing impurities mixed during deposition into the film is heat treatment. However, adding heat treatment to a manufacturing process of a semiconductor element leads to problems such as an increase in manufacturing steps, which causes an increase in time required to manufacture an element, and an increase in energy consumption for the heat treatment.
- Further, it is difficult to completely remove impurities including hydrogen which is mixed during deposition from the film.
- An object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor element including an oxide semiconductor into which impurities are not mixed. Further, an object of one embodiment of the present invention is to provide an apparatus for successive deposition used for the method for manufacturing the semiconductor element.
- The above problems are caused by impurities being mixed into the film during the deposition. Therefore, the inside of the deposition apparatus is kept ultraclean in the manufacturing process of the semiconductor element, and the semiconductor element is formed by successive deposition without being exposed to the air. Specifically, before and after the deposition, the pressure in the deposition chamber is kept at 10−8 Pa or less, whereby impurities in the chamber can be removed sufficiently. In such a deposition chamber, an oxide semiconductor film and a film being in contact with the oxide semiconductor film are deposited successively, and the semiconductor element is formed.
- Further, in a deposition chamber having an evacuation unit using an entrapment pump and a heating unit for heating at least a wall surface of the periphery of a substrate holding portion, the pressure of less than or equal to 10−8 Pa can be achieved in the chamber, and impurities in the chamber can be removed sufficiently. Using a deposition apparatus including a plurality of such deposition chambers, a semiconductor element is formed.
- One embodiment of the present invention is a deposition apparatus which includes at least a load lock chamber connected to a unit for evacuating the load lock chamber to have a pressure of 10−6 Pa or less; a plurality of deposition chambers each including a substrate holding portion provided with a first heating unit for heating a substrate, a second heating unit for heating at least a wall surface of a periphery of the substrate holding portion, and a target holding portion for fixing a sputtering target and each being connected to a unit for evacuating the deposition chamber to have a pressure of 10−8 Pa or less; a heating chamber connected to a unit for evacuating the heating chamber to have a pressure of 10−8 Pa or less; and a transfer chamber connected to the load lock chamber, the heating chamber, and the plurality of deposition chambers through gate valves and connected to a unit for evacuating the transfer chamber to have a pressure of 10−6 Pa or less, in which the units for evacuation connected to the load lock chamber, the heating chamber, the plurality of deposition chambers, and the transfer chamber are entrapment pumps.
- In the deposition apparatus according to one embodiment of the present invention, it is preferable that at least one of the deposition chambers be provided with a target holding portion for fixing an insulator target, and at least one of the deposition chambers be provided with a target holding portion for fixing a metal oxide target. Alternatively, at least one of the deposition chambers is provided with a target holding portion for fixing a metal oxide target, and at least one of the deposition chambers is provided with a target holding portion for fixing a metal target. Further alternatively, at least one of the deposition chambers is provided with a target holding portion for fixing an insulator target; at least one of the deposition chambers is provided with a target holding portion for fixing a metal oxide target; and at least one of the deposition chambers is provided with a target holding portion for fixing a metal target.
- Further, in the deposition apparatus according to one embodiment of the present invention, the amount of leakage of the air from the deposition chamber is preferably 10−11 Pa·m3/s or less.
- In the deposition apparatus according to one embodiment of the present invention, the first heating unit has a unit for depositing a film while heating the substrate at room temperature to 500° C. inclusive.
- The deposition apparatus according to one embodiment of the present invention preferably includes a treatment chamber provided with a unit for generating an oxygen radical and a unit for evacuating the chamber to have a pressure of 10−8 Pa or less.
- The deposition apparatus according to one embodiment of the present invention preferably includes a heating chamber provided with a unit for heating at room temperature to 700° C. inclusive.
- One embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10−6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a gate insulating film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; and introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the gate insulating film by a sputtering method.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10−6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; and introducing a high-purity sputtering gas into the deposition chamber and forming a conductive film over the oxide semiconductor film by a sputtering method.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10−6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a gate insulating film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming an oxide semiconductor film over the gate insulating film by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; and introducing a high-purity sputtering gas into the deposition chamber and forming a conductive film over the oxide semiconductor film by a sputtering method.
- In the above method for manufacturing a semiconductor element, it is preferable that the substrate be transferred to the treatment chamber evacuated to have a pressure of 10−8 Pa or less and oxygen radical treatment be performed on the oxide semiconductor film after the oxide semiconductor film is formed and the deposition chamber is evacuated to have a pressure of 10−8 Pa or less.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10−6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a first oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a second oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a treatment chamber evacuated to have a pressure of 10−8 Pa or less; and performing oxygen radical treatment on the second oxide semiconductor film.
- Another embodiment of the present invention is a method for manufacturing a semiconductor element comprising the steps of transferring a substrate into a load lock chamber; evacuating the load lock chamber to have a pressure of 10−6 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; performing heat treatment on the substrate; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a first oxide semiconductor film over the substrate by a sputtering method while performing heat treatment on the substrate; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a deposition chamber evacuated to have a pressure of 10−8 Pa or less; introducing a high-purity sputtering gas into the deposition chamber and forming a second oxide semiconductor film over the substrate by a sputtering method; evacuating the deposition chamber to have a pressure of 10−8 Pa or less; transferring the substrate into a heating chamber evacuated to have a pressure of 10−8 Pa or less; and performing heat treatment on the substrate.
- According to one embodiment of the present invention, a method for manufacturing a semiconductor element including an oxide semiconductor into which impurities are not mixed can be provided. In addition, according to one embodiment of the present invention, an apparatus for successive deposition used for the method for manufacturing the semiconductor element can be provided.
-
FIG. 1 is a diagram illustrating an apparatus for successive deposition according to one embodiment of the present invention. -
FIG. 2 is a diagram illustrating a deposition chamber according to one embodiment of the present invention. -
FIGS. 3A to 3C are diagrams illustrating a transistor which is manufactured by a manufacturing method according to one embodiment of the present invention. -
FIGS. 4A to 4E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention. -
FIGS. 5A to 5E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention. -
FIGS. 6A to 6E are diagrams illustrating a method for manufacturing a transistor according to one embodiment of the present invention. - Hereinafter, embodiments of the present invention are described with reference to the accompanying drawings. Note that the invention disclosed in this specification is not limited to the following description because it will be easily understood by those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the present invention. Therefore, the present invention disclosed should not be construed as being limited to the description below of embodiments and examples. In the drawings for explaining the embodiments, the same parts or parts having a similar function are denoted by the same reference numerals, and description of such parts is not repeated.
- In this embodiment, a deposition apparatus according to one embodiment of the present invention will be described with reference to the drawings.
-
FIG. 1 is a schematic top view of an apparatus for successive deposition of this embodiment. - The apparatus for successive deposition illustrated in
FIG. 1 includes a firstload lock chamber 111, atransfer chamber 112, a plurality of deposition chambers (which correspond to afirst deposition chamber 113, asecond deposition chamber 115, athird deposition chamber 117, afourth deposition chamber 121, and afifth deposition chamber 127 inFIG. 1 ), heating chambers (which correspond to afirst heating chamber 119 and asecond heating chamber 123 inFIG. 1 ), atreatment chamber 125, asubstrate standby chamber 129, a secondload lock chamber 131, and asubstrate transfer unit 133. Although not illustrated, the apparatus for successive deposition of this embodiment includes a unit for heating the inner wall of the apparatus at higher than or equal to 300° C. - The first
load lock chamber 111, thetransfer chamber 112, the deposition chambers, the heating chambers, thetreatment chamber 125, thesubstrate standby chamber 129, and the secondload lock chamber 131 are connected toevacuation units 1111 to 1131, respectively. - The first
load lock chamber 111, thetransfer chamber 112, and the secondload lock chamber 131 are connected to the evacuation units which are units for evacuating the chambers to have a pressure of 10−6 Pa or less, preferably, 10−8 Pa or less as an evacuation unit. The evacuation units are selected in accordance with the application of each chamber. The evacuation units may be the one provided with an entrapment pump, a turbo pump provided with a cold trap, or the like. In particular, the evacuation unit is preferably provided with the entrapment pump. An example of the entrapment pump is a pump provided with an entrapment unit such as a cryopump, a sputtering ion pump, or a titanium sublimation pump. - The deposition chambers, the heating chambers, and the treatment chamber are connected to the evacuation units which are units for evacuating the chambers to have a pressure of greater than or equal to 10−12 Pa and less than or equal to 10−8 Pa. By using the evacuation units and the unit for heating the inner wall of the apparatus at higher than or equal to 300° C., the pressure of each chamber can be greater than or equal to 10−12 Pa and less than or equal to 10−8 Pa. By setting the pressure of each chamber at greater than or equal to 10−12 Pa and less than or equal to 10−8 Pa, impurities in the chamber can be removed sufficiently. As the evacuation units, the above-described entrapment pumps are used.
- In this embodiment, the first
load lock chamber 111 is a chamber in which a substrate holder which stores an untreated substrate is placed, and the secondload lock chamber 131 is a chamber in which a substrate holder which stores a treated substrate is placed. However, the deposition apparatus according to one embodiment of the present invention is not limited thereto, and carrying out and carrying in of the substrate may be performed with one load lock chamber. - The
transfer chamber 112 serves as a delivery chamber for transferring a substrate from one chamber to another chamber. - The heating chambers (the
first heating chamber 119 and the second heating chamber 123) each include a unit for heating a substrate. The apparatus for successive deposition of this embodiment has two heating chambers; however, the number of heating chambers may be an arbitrary number which is one or more. - The
treatment chamber 125 is a chamber in which oxygen radical treatment can be performed. Oxygen radicals may be supplied by a plasma generating apparatus including oxygen or an ozone generating apparatus. By exposing a thin film to the supplied oxygen radicals or oxygen, the surface of the film can be modified. Further, the treatment performed in the treatment chamber is not limited to the oxygen radical treatment. In the apparatus for successive deposition, the treatment chamber is not necessarily provided, or a plurality of treatment chambers may be provided. - The
substrate standby chamber 129 is a chamber in which a substrate in a process of successive deposition can be in a standby state. Thesubstrate standby chamber 129 may have a cooling unit. By providing the cooling unit, a substrate which has been heated for the deposition or the like can be cooled sufficiently. The cooling may be performed by introducing helium, neon, argon, or the like into thesubstrate standby chamber 129. Note that it is preferable that water, hydrogen, or the like be not contained in nitrogen or a rare gas such as helium, neon, or argon which is used for the cooling. The purity of nitrogen or a rare gas such as helium, neon, or argon is preferably 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the concentration of impurities is 1 ppm or less, preferably 0.1 ppm or less). In the apparatus for successive deposition, the substrate standby chamber is not necessarily provided. - The apparatus for successive deposition according to one embodiment of the present invention includes a plurality of deposition chambers. Before and after the deposition, the pressure in each of the deposition chambers is kept at 10−8 Pa or less. As evacuation units to achieve this, the above-described entrapment pumps are used. The amount of leakage of the air from the deposition chamber is preferably 10−11 Pa·m3/s or less.
- The apparatus for successive deposition in
FIG. 1 includes five deposition chambers (thefirst deposition chamber 113, thesecond deposition chamber 115, thethird deposition chamber 117, thefourth deposition chamber 121, and the fifth deposition chamber 127); however the number of the deposition chambers is not limited thereto, and can be determined as appropriate depending on the number of films for successive deposition. - In the deposition chambers, equipment capable of deposition using a method in accordance with a kind of a film to be formed, such as a sputtering method, a vacuum evaporation method, or a plasma CVD method may be provided as appropriate. Although the pressure in the deposition chamber during the deposition can be optimized in accordance with a deposition method and a material for the deposition, the pressure of each of the deposition chambers is kept at 10−8 Pa or less before and after the deposition. A specific example of a structure of the deposition chamber is illustrated in
FIG. 2 . In this embodiment, a deposition chamber in which deposition is performed using a sputtering method is described as an example. - In
FIG. 2 , thedeposition chamber 200 includes asubstrate holding portion 201, asubstrate heating unit 203, asubstrate rotating unit 205, apower source 209, agas introduction unit 210, asputtering target 211 which is held at a target holding portion, anattachment protection plate 212, amain valve 213, an automaticpressure controlling device 215, acryopump 217, and adrypump 219. - By the substrate transfer unit 133 (see
FIG. 1 ), asubstrate 301 is transferred from one chamber included in the apparatus for successive deposition to thesubstrate holding portion 201 in thedeposition chamber 200 through thetransfer chamber 112. A substrate holder (not illustrated) in thesubstrate holding portion 201 is moved vertically by a vertical driving mechanism and can fix the substrate. As illustrated inFIG. 2 , it is preferable to adopt a face-down manner (a manner in which deposition is performed while a surface to be subjected to deposition of a substrate points downward) because attachment of dust or the like to thesubstrate 301 can be suppressed. - The
substrate holding portion 201 has thesubstrate heating unit 203. As thesubstrate heating unit 203, a unit for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater, or a unit for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp may be used. The deposition can be performed while thesubstrate 301 is heated by thesubstrate heating unit 203. - During the deposition, the
substrate 301 is preferably rotated using thesubstrate rotating unit 205 to improve uniformity of films. - The
deposition chamber 200 includes a unit (not shown) for heating at least a wall surface around thesubstrate holding portion 201. The inner wall of the deposition chamber is heated regularly, and impurities adsorbed onto the inner wall can be detached; accordingly, a high vacuum state can be achieved. - In the
deposition chamber 200 of this embodiment, deposition is performed using a sputtering method. As thesputtering target 211, for example, a target for forming an oxide insulating layer, a target for forming a nitride insulating layer, a target for forming an oxide semiconductor layer, a target for forming a conductive layer, or the like can be used. Specifically, an insulator target, a metal oxide target, a metal target, or the like can be used. A shutter (not shown) is provided between the sputteringtarget 211 and thesubstrate 301. - A sputtering method may be either a DC (direct current) sputtering method or an RF (radio frequency) sputtering method. For example, in the
deposition chamber 200, an RF sputtering method is used in the case where an insulating layer is deposited, and a DC sputtering method is used in the case where a conductive layer of metal is deposited. - As the material of the
attachment protection plate 212, metal such as iron, aluminum, or stainless steel can be used. - The
deposition chamber 200 is connected to evacuation units which are thecryopump 217, and thedrypump 219. In addition, a sputtering ion pump may be used together. Using the evacuation units, the pressure in thedeposition camber 200 can be kept at 10−8 Pa or less before and after the deposition. A high-purity gas is used as a gas to be introduced in order to prevent impurities from being introduced into thedeposition chamber 200. The gas which is introduced into thedeposition chamber 200 is highly purified by a gas refiner before being introduced into the apparatus. Accordingly, a gas refiner needs to be provided so that a gas may be introduced into the deposition apparatus after it is highly purified. Accordingly, impurities such as water in the gas can be removed beforehand to prevent these impurities from being introduced into the apparatus. - As described above, the apparatus for successive deposition of this embodiment includes deposition chambers each of which is connected to an evacuation unit using an entrapment pump and each of which has a heating unit for heating at least a wall surface of the periphery of a substrate holding portion so that the pressure in the chamber can be less than or equal to 10−8 Pa. By setting the pressure in the chamber less than or equal to 10−8 Pa before and after the deposition, impurities in the chamber can be removed sufficiently. By using an apparatus for successive deposition including such deposition chambers to perform successive deposition without exposure to the air, impurities are not mixed into the oxide semiconductor and a layer being in contact with the oxide semiconductor layer, whereby a semiconductor element including the high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. The off-state current of such a semiconductor element is low, so that a semiconductor device with low power consumption can be realized.
- In this embodiment, a method for manufacturing a bottom gate transistor using the apparatus for successive deposition in Embodiment 1 will be described with reference to
FIG. 1 ,FIG. 3A , andFIGS. 4A to 4E . In this embodiment, a method for manufacturing a semiconductor element including an oxide semiconductor layer will be described. - The semiconductor element illustrated in this embodiment includes a highly purified oxide semiconductor layer. With the use of the deposition apparatus illustrated in Embodiment 1, the oxide semiconductor can be highly purified so as to contain impurities that are not main components of the oxide semiconductor as little as possible, and an i-type (intrinsic) or substantially i-type (intrinsic) oxide semiconductor can be obtained. In other words, a highly purified i-type (intrinsic) oxide semiconductor, or an oxide semiconductor close thereto, is obtained not by adding an impurity but by preventing an impurity such as hydrogen or water from being contained in the semiconductor as much as possible. Thus, the transistor manufactured in this embodiment includes an oxide semiconductor layer which is highly purified and made to be electrically i-type (intrinsic).
- The number of carriers in the highly purified oxide semiconductor can be significantly small (close to zero). Specifically, the carrier concentration can be reduced to less than 1×1012/cm3, preferably less than 1×1011/cm3. Further, the hydrogen concentration in the highly purified oxide semiconductor is less than 1×1016 atoms/cm3.
- With the use of the deposition apparatus illustrated in Embodiment 1, the number of carriers in the oxide semiconductor can be significantly small. A transistor in which such a highly purified oxide semiconductor layer is used for a channel formation region can have a reduced off-state current. Note that it is preferable that off-state current be as low as possible because power consumption can be reduced.
- A cross-sectional view of a
bottom gate transistor 300 in this embodiment is illustrated inFIG. 3A . Thetransistor 300 includes agate electrode layer 303, a firstgate insulating layer 305, a secondgate insulating layer 307, a highly purifiedoxide semiconductor layer 312, asource electrode layer 311 a, adrain electrode layer 311 b, an insulatinglayer 313, and a protectiveinsulating layer 315. - A method for manufacturing the
transistor 300 with the use of the deposition apparatus illustrated in Embodiment 1 will be described with reference toFIGS. 4A to 4E . - First, a conductive film is formed over the
substrate 301; a resist mask is formed using a first photomask; and etching is performed, whereby thegate electrode layer 303 is formed (FIG. 4A ). - Although there is no particular limitation on a substrate used for the
substrate 301, a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like can be used. - The
gate electrode layer 303 can be formed in a single layer or a stacked layer using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which includes any of these materials as a main component. - With the use of the apparatus for successive deposition (see
FIG. 1 ) in Embodiment 1, the gate insulating layer, the oxide semiconductor layer, and the conductive layer can be deposited successively without being exposed to the air. - First, the
substrate 301 over which thegate electrode layer 303 is formed is carried in the firstload lock chamber 111 in the apparatus for successive deposition. Then, the pressure in the firstload lock chamber 111 is reduced using theevacuation unit 1111. At that time, the first load lock chamber is evacuated until the pressure becomes 10−6 Pa or less, preferably, 10−8 Pa or less. - In the apparatus for successive deposition, the
substrate 301 is transferred from a chamber to another chamber through thetransfer chamber 112. The pressure in thetransfer chamber 112 is kept at 10−6 Pa or less, preferably, 10−8 Pa or less using theevacuation unit 1112 such as a cryopump. Further, the inner wall of the apparatus is heated regularly, and impurities adsorbed onto the inner wall are detached; accordingly, a high vacuum state can be achieved. - The
substrate 301 is transferred to the heating chamber (thefirst heating chamber 119 or the second heating chamber 123) using thesubstrate transfer unit 133, and a gate valve which is used as a partition between the heating chamber and thetransfer chamber 112 is closed. The heating chamber is kept at 10−8 Pa or less using the evacuation unit such as a cryopump. Next, preheating is performed. By performing the preheating, impurities adsorbed onto thesubstrate 301 can be detached and removed from the heating chamber. Examples of the impurities are a hydrogen atom, a compound containing a hydrogen atom such as H2O, a compound containing a carbon atom, and the like. The temperature for the preheating is from room temperature to 600° C. inclusive, preferably from 100° C. to 400° C. inclusive. - Next, the
substrate 301 is transferred to thefirst deposition chamber 113 using thesubstrate transfer unit 133. Then, a high-purity sputtering gas is introduced while the pressure in thefirst deposition chamber 113 is controlled using theevacuation unit 1113 such as cryopump, and a silicon nitride film which is to be as the firstgate insulating layer 305 is deposited over thegate electrode layer 303 by a sputtering method. After the deposition, the pressure in thefirst deposition chamber 113 is evacuated again to have a pressure of 10−8 Pa or less using theevacuation unit 1113, and the inside of thefirst deposition chamber 113 is kept clean. Impurities contained in the firstgate insulating layer 305 is effectively reduced because the firstgate insulating layer 305 is deposited in the deposition chamber which is kept clean by being evacuated to have a pressure of 10−8 Pa or less before and after the deposition. - Next, the
substrate 301 is transferred from thefirst deposition chamber 113 to thesecond deposition chamber 115. Then, a silicon oxide film is deposited over the firstgate insulating layer 305 by a sputtering method in a manner similar to the firstgate insulating layer 305, thereby forming the secondgate insulating layer 307. Before and after the deposition, the pressure in thesecond deposition chamber 115 is kept at 10−8 Pa or less by using theevacuation unit 1115 such as a cryopump. - The oxide semiconductor layer used in this embodiment, which is made to be intrinsic (i-type) or substantially intrinsic is highly sensitive to an interface state and interface charge; thus, an interface between the oxide semiconductor layer and the gate insulating layer is important. Therefore, the second
gate insulating layer 307 that is in contact with the highly-purified oxide semiconductor needs to have higher quality. Thefirst deposition chamber 113 and thesecond deposition chamber 115 are evacuated by a cryopump and the like, and the impurity concentration in the deposition chambers is extremely low. The silicon nitride film and the silicon oxide film stacked in the deposition chambers in which impurities are reduced serve as gate insulating layers with reduced impurity concentration. - In this embodiment, the gate insulating layer is formed to have a stacked structure of a silicon nitride film and a silicon oxide film; however, the gate insulating layer is not limited thereto. The gate insulating layer can have a single-layer or stacked structure including a silicon nitride film, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, or the like. An oxide insulating film is preferably used as a layer in contact with the oxide semiconductor layer to be formed later. The insulating layer can be formed by a plasma CVD method, a sputtering method, or the like. In order to prevent the insulating layer from containing a large amount of hydrogen, the insulating layer is preferably deposited by a sputtering method. There is no particular limitation on the thickness of the gate insulating layer; the thickness can be greater than or equal to 10 nm and less than or equal to 500 nm, for example.
- Next, the
substrate 301 is transferred from thesecond deposition chamber 115 to thethird deposition chamber 117, and anoxide semiconductor film 309 is deposited over the secondgate insulating layer 307 by a sputtering method. Before and after the deposition, the pressure in thethird deposition chamber 117 is kept at 10−8 Pa or less using anevacuation unit 1117 such as a cryopump, and the inside of thethird deposition chamber 117 is kept extremely clean. Impurities contained in theoxide semiconductor film 309 are effectively reduced because theoxide semiconductor film 309 is deposited in the deposition chamber which is kept clean before and after the deposition. - As an oxide semiconductor used for the
oxide semiconductor layer 309, an In—Sn—Ga—Zn—O-based oxide semiconductor which is a four-component metal oxide; an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor which are three-component metal oxides; an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, or an In—Mg—O-based oxide semiconductor which are two-component metal oxides; or an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor which are single-component metal oxides can be used. In addition, the above oxide semiconductor film may contain SiO2. Here, for example, the In—Ga—Zn—O-based oxide semiconductor means an oxide containing at least In, Ga, and Zn, and the composition ratio of the elements is not particularly limited. The In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn. - As the above
oxide semiconductor film 309, a thin film represented by InMO3(ZnO)m (m>0 and m is not a natural number) can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M can be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like. - In this embodiment, the
oxide semiconductor film 309 is deposited with a sputtering method with the use of an In—Ga—Zn—O-based oxide target. A cross-sectional view of this stage is illustrated inFIG. 4B . Theoxide semiconductor film 309 can be formed in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. - As a target for forming the
oxide semiconductor film 309 by a sputtering method, for example, a target with the following composition ratio can be used: the composition ratio of In2O3:Ga2O3:ZnO is 1:1:1 [molar ratio] (i.e., In:Ga:Zn=1:1:0.5 [atomic ratio]). Alternatively, a target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] (that is, In:Ga:Zn=1:1:1 [atomic ratio]) or In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] (that is, In:Ga:Zn=1:1:2 [atomic ratio]) can also be used. The filling rate of the oxide target is 90.0% to 100% inclusive, preferably, 95.0% to 99.9% inclusive. With the use of a metal oxide target with high filling rate, the deposited oxide semiconductor film has high density. - A high-purity gas in which impurities such as hydrogen, water, a hydroxyl group, and hydride are removed is used as the sputtering gas for the deposition of the
oxide semiconductor film 309. - As one example of the deposition conditions, the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power source is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). Note that a pulsed direct-current power source is preferably used, in which case powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness can be uniform.
- For example, with the use of the apparatus for successive deposition in Embodiment 1, an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm can be deposited in 10 minutes in the
third deposition chamber 117. - After the
oxide semiconductor film 309 is formed, oxygen radical treatment is preferably performed on theoxide semiconductor film 309. In this embodiment, oxygen radical treatment is performed in thetreatment chamber 125. Before and after the treatment, the pressure in thetreatment chamber 125 is kept at 10−8 Pa or less using anevacuation unit 1125 such as a cryopump. - Oxygen radicals may be supplied by a plasma generating apparatus including oxygen or an ozone generating apparatus. By exposing a thin film to the produced oxygen radicals or oxygen, the surface of the film can be modified. Instead of the oxygen radical treatment, radical treatment may be performed using argon and oxygen radicals. The treatment using argon and oxygen radicals is treatment in which argon gas and oxygen gas are introduced to generate plasma, thereby modifying the surface of a thin film.
- An example of the treatment using argon and oxygen radicals is described. Argon atoms (Ar) in a reaction space where an electric field is applied to generate discharge plasma are excited or ionized by electrons in the discharge plasma, thereby being converted into argon radicals (Ar*), argon ions (Ar+), or electrons. Argon radicals (Ar*), which are in a high-energy metastable state, react with the peripheral atoms of the same kind or of different kinds to be returned to a stable state by exciting or ionizing the atoms, whereby a reaction occurs like an avalanche. If oxygen exists in the periphery at that time, oxygen atoms (O) are excited or ionized to be converted into oxygen radicals (O*), oxygen ions (O+), or the like. The oxygen radicals (O*) react with a material on the surface of a thin film that is to be processed, so that the surface is modified, and the oxygen radicals also react with an organic substance on the surface, so that plasma treatment to remove the organic substance is performed. Note that radicals of an inert gas have the properties of being kept in a metastable state for a longer time than radicals of reactive gas (oxygen gas); accordingly, an inert gas is generally used to generate plasma.
- Next, the
substrate 301 is transferred to thefifth deposition chamber 127, and aconductive film 310 is deposited over theoxide semiconductor film 309 by a sputtering method (FIG. 4C ). Before and after the deposition, the pressure in thefifth deposition chamber 127 is kept at 10−8 Pa or less using anevacuation unit 1127 such as a cryopump. - Further, as a material for the conductive film, an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy including the above element, an alloy including any of these elements in combination, or the like can be used, for example. Further, a structure may be employed in which a high-melting-point metal film of Ti film, Mo film, W film, or the like is stacked on one or both of a top surface and a bottom surface of a metal film of Al film, Cu film, or the like. In addition, heat resistance can be improved by using an Al material to which an element (such as Si, Nd, or Sc) which prevents generation of a hillock or a whisker in an Al film is added. The conductive film may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium oxide-tin oxide alloy (In2O3—SnO2, which is abbreviated to ITO), indium oxide-zinc oxide alloy (In2O3—ZnO), or any of these metal oxide materials in which silicon oxide is contained can be used.
- Then, the
substrate 301 which has been subjected to successive deposition is transferred to the secondload lock chamber 131. - In the process of successive deposition, in the case where a substrate transferred from one chamber is required to be in standby mode before being transferred into another chamber where next deposition and treatment is performed, the substrate can be transferred in the
substrate standby chamber 129. The pressure in thesubstrate standby chamber 129 is kept at 10−8 Pa or less using anevacuation unit 1129 such as a cryopump. - Next, a resist mask is formed using a second photomask over the
conductive film 310, and unnecessary portions of theconductive film 310 and theoxide semiconductor film 309 are removed by etching. Then, using a third photomask, the conductive film overlapping with the channel formation region of the oxide semiconductor layer is etched so that thesource electrode layer 311 a and thedrain electrode layer 311 b are formed (FIG. 4D ). - Next, the substrate may be transferred into the deposition apparatus again, and plasma treatment may be performed using a gas such as N2O, N2, or Ar so that water or the like adsorbed to a surface of an exposed portion of the oxide semiconductor layer is removed. In the case where the plasma treatment is performed, the insulating
layer 313 is formed as a protective insulating film in contact with part of the oxide semiconductor layer without being exposed to the air. - The insulating
layer 313 can be formed to a thickness of at least 1 nm by a method by which impurities such as water or hydrogen are not mixed into the insulatinglayer 313, such as a sputtering method as appropriate. When hydrogen is contained in the insulatinglayer 313, the entry of the hydrogen into the oxide semiconductor layer or the extraction of oxygen in the oxide semiconductor layer by hydrogen is caused, thereby making the resistance of the backchannel of the oxide semiconductor layer low (to have an n-type conductivity), so that a parasitic channel might be formed. Therefore, it is important that a deposition method in which hydrogen is not used be employed in order that the insulatinglayer 313 contains as little hydrogen as possible. - As in the case of depositing the oxide semiconductor film, the pressure in the deposition chamber for depositing the insulating
layer 313 is kept at 10−8 Pa or less using an evacuation unit such as a cryopump before and after the deposition. - The insulating
layer 313 which is formed in contact with the oxide semiconductor layer is formed using an inorganic insulating film that does not contain impurities such as moisture, hydrogen, and a hydroxyl group and blocks the entry of such impurities from the outside; in particular, an oxide insulating film is preferably used. The insulatinglayer 313 is typically formed using a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film or the like. - In this embodiment, a 200-nm-thick silicon oxide film is deposited as the insulating
layer 313 by a sputtering method. The substrate temperature at the time of deposition is from room temperature to 500° C. inclusive. The silicon oxide film can be formed with a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere containing a rare gas and oxygen. It is preferable that a high-purity gas from which impurities such as hydrogen, water, a hydroxyl group, and hydride are removed be used as the sputtering gas for the deposition of the insulatinglayer 313. As a target for sputtering, a silicon oxide target or a silicon target can be used. For example, a silicon oxide film can be formed by a sputtering method using a silicon target in an atmosphere containing oxygen. - A protective insulating
layer 315 may be formed over the insulatinglayer 313. For example, a silicon nitride film is formed by an RF sputtering method. Since an RF sputtering method has high productivity, it is preferably used as a deposition method of the protective insulating layer. As the protective insulating layer, an inorganic insulating film which does not include an impurity such as moisture and prevents entry of these from the outside, such as a silicon nitride film or an aluminum nitride film is used. In this embodiment, the protective insulatinglayer 315 is formed using a silicon nitride film (FIG. 4E ). - As in the case where the insulating
layer 313 is formed, the pressure in the deposition chamber for depositing the protective insulatinglayer 315 is kept at 10−8 Pa or less using an evacuation unit such as a cryopump before and after the deposition. - Through the above-described steps, the
transistor 300 is formed. - As described above, by manufacturing a transistor using an apparatus for successive deposition in Embodiment 1, impurities are not mixed into the oxide semiconductor layer and a layer being in contact with the oxide semiconductor layer, whereby a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. Further, impurities in the layer being in contact with the oxide semiconductor layer are reduced; thus the oxide semiconductor layer can be kept highly purified. In such a semiconductor element using the highly purified oxide semiconductor layer, off-state current is reduced, and a semiconductor device with low power consumption can be realized.
- In this embodiment, a method for manufacturing a transistor having a different structure from the transistor described in Embodiment 2 by using an apparatus for successive deposition described in Embodiment 1 will be described with reference to
FIG. 1 ,FIG. 3B , andFIGS. 5A to 5E . In this embodiment, a method for manufacturing a semiconductor element using an oxide semiconductor layer will be described. - A cross-sectional view of a bottom gate transistor in this embodiment is illustrated in
FIG. 3B . Atransistor 400 includes thegate electrode layer 303, the firstgate insulating layer 305, the secondgate insulating layer 307, a highly purifiedoxide semiconductor layer 308, asource electrode layer 314 a, adrain electrode layer 314 b, the insulatinglayer 313, and the protective insulatinglayer 315. - A method for manufacturing the
transistor 400 using the deposition apparatus in Embodiment 1 will be described with reference toFIGS. 5A to 5E . First, in a manner similar to that in Embodiment 2, thegate electrode layer 303 is formed over the substrate 301 (FIG. 5(A) ). - Next, using the apparatus for successive deposition in Embodiment 1 (see
FIG. 1 ), the gate insulating layer (the firstgate insulating layer 305 and the second gate insulating layer 307) and theoxide semiconductor film 306 are deposited successively without being exposed to the air (FIG. 5(B) ). The gate insulating layer and theoxide semiconductor film 306 are deposited in a manner similar to that in Embodiment 2. - Next, the
oxide semiconductor film 306 is processed into an island-shapedoxide semiconductor layer 308 in a photolithography step (FIG. 5C ). The resist mask for forming theoxide semiconductor layer 308 may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced. - For this etching of the
oxide semiconductor film 309, wet etching, dry etching, or both of them may be employed. As an etchant used for wet etching of theoxide semiconductor film 309, for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used. In addition, ITO07N (produced by KANTO CHEMICAL CO., INC.) may also be used. - Next, as illustrated in
FIG. 5D , a conductive film is deposited over the secondgate insulating layer 307 and theoxide semiconductor layer 308 by a sputtering method. As in the case where theoxide semiconductor film 306 is formed, the pressure in the deposition chamber for depositing the conductive film is kept at 10−8 Pa or less using an evacuation unit such as a cryopump before and after the deposition. Next, a resist mask is formed over the conductive film through a photolithography step and selective etching is performed, so that thesource electrode layer 311 a and thedrain electrode layer 311 b are formed. - After that, by plasma treatment using a gas such as N2O, N2, or Ar, water or the like adsorbed to a surface of an exposed portion of the oxide semiconductor layer may be removed.
- Then, in a manner similar to that in Embodiment 2, a silicon oxide film is formed as the insulating
layer 313 and a silicon nitride film is formed as the protective insulatinglayer 315. - Through the above process, the
transistor 400 is formed (FIG. 5E ). - As described above, by manufacturing a transistor using an apparatus for successive deposition in Embodiment 1, impurities are not mixed into the oxide semiconductor layer and a layer being in contact with the oxide semiconductor layer, whereby a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. Further, impurities in the gate insulating film and the conductive film which are in contact with the oxide semiconductor layer are reduced; thus the oxide semiconductor layer can be kept highly purified. In such a semiconductor element using the highly purified oxide semiconductor layer, off-state current is reduced, and a semiconductor device with low power consumption can be realized.
- In this embodiment, a method for manufacturing a transistor having a different structure from the semiconductor element described in Embodiments 2 and 3 by using an apparatus for successive deposition described in Embodiment 1 will be described with reference to
FIG. 1 ,FIG. 3C , andFIGS. 6A to 6E . In this embodiment, a method for manufacturing a transistor using an oxide semiconductor layer having a crystal region will be particularly described. - A cross-sectional view of a transistor whose manufacturing method is described in this embodiment will be illustrated in
FIG. 3C . Atransistor 500 includes thegate electrode layer 303, the firstgate insulating layer 305, the secondgate insulating layer 307, a firstoxide semiconductor layer 406, a secondoxide semiconductor layer 408, asource electrode layer 411 a, adrain electrode layer 411 b, the insulatinglayer 313, and the protective insulatinglayer 315. Note that the firstoxide semiconductor layer 406 and the secondoxide semiconductor layer 408 are crystallized. - A method for manufacturing the
transistor 500 using the deposition apparatus in Embodiment 1 will be described with reference toFIGS. 6A to 6E . First, a conductive film is formed over thesubstrate 301, and then, thegate electrode layer 303 is formed by a first photolithography step. - Next, using the apparatus for successive deposition (see
FIG. 1 ) in Embodiment 1, the firstgate insulating layer 305 and the secondgate insulating layer 307 are formed (FIG. 6A ). - Next, the
substrate 301 is transferred from thesecond deposition chamber 115 to thethird deposition chamber 117, and an oxide semiconductor layer having a crystal region is formed over the secondgate insulating layer 307. The oxide semiconductor layer having a crystal region with a large film thickness, that is, a c-axis-aligned crystal region (a crystal region aligned in a direction perpendicular to a surface of the film) may be formed by performing deposition twice and heat treatment twice. By using such a method, a crystal region can be formed in the oxide semiconductor regardless of the material for a base component such as an oxide, a nitride, a metal, or the like. - The first oxide semiconductor film is deposited by a sputtering method. The pressure in the
third deposition chamber 117 is kept at 10−8 Pa or less using theevacuation unit 1117 such as a cryopump before and after the deposition. - As the oxide semiconductor used for the first oxide semiconductor film, the oxide semiconductor described in Embodiment 2 can be used.
- The first oxide semiconductor film is used as a seed crystal for crystal growth of the second oxide semiconductor film which is formed later. Therefore, the first oxide semiconductor film may have a thickness with which crystal growth is possible, typically greater than or equal to a thickness of one atomic layer and less than or equal to 30 nm, preferably greater than or equal to 2 nm to 5 nm. When the first
oxide semiconductor film 405 is thin, throughput in deposition treatment and heat treatment can be improved. - Next, the
substrate 301 is transferred from thethird deposition chamber 117 to thefirst heating chamber 119, and subjected to the first heat treatment; accordingly, a crystal region (including a plate-like crystal) is formed in a region including a surface of the first oxide semiconductor film. By the first heat treatment, the firstoxide semiconductor film 405 including the crystal region (including a plate-like crystal) can be formed in the region including the surface of the first oxide semiconductor film (FIG. 6B ). - The first heat treatment is performed in an atmosphere of nitrogen, oxygen, a rare gas, or dry air. In the first heat treatment, a temperature from 450° C. to 850° C. inclusive, preferably from 550° C. to 750° C. inclusive is employed. In addition, heating time is longer than or equal to 1 minute and shorter than or equal to 24 hours. The pressure in the
first heating chamber 119 is kept at 10−8 Pa or less using theevacuation unit 1119 such as a cryopump before and after the heat treatment. - It is preferable that the
first heating chamber 119 have a heating unit which can heat a substrate at room temperature to 850° C. inclusive. - Note that in the case where the
third deposition chamber 117 has a substrate heating unit, by depositing the first oxide semiconductor film while heating the substrate, crystal growth can be promoted. Crystals in the first oxide semiconductor layer are grown during the deposition, whereby the first heat treatment can be omitted. For a substrate heating condition, thesubstrate 301 may be heated at room temperature to 500° C. inclusive. - Next, the substrate is transferred from the
first heating chamber 119 to thefourth deposition chamber 121, and the second oxide semiconductor film that is thicker than the first oxide semiconductor film is formed by a sputtering method. Note that the pressure in thefourth deposition chamber 121 is kept at 10−8 Pa or less using anevacuation unit 1121 such as a cryopump before and after the deposition. - As an oxide semiconductor used for the second oxide semiconductor film, the oxide semiconductor described in Embodiment 2 can be used.
- Note that an appropriate thickness of the second oxide semiconductor film may be determined by a practitioner depending on a device to be manufactured.
- In the case where the
fourth deposition chamber 121 has a substrate heating unit, the second oxide semiconductor film may be formed while heating the substrate. - By using the apparatus for successive deposition in Embodiment 1, for example, the first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 30 nm can be deposited in 10 minutes while being heated in the
deposition chamber 117, and then, the second oxide semiconductor film with a thickness of greater than or equal to 20 nm and less than or equal to 200 nm can be successively deposited in 10 minutes in thefourth deposition chamber 121. - Next, the
substrate 301 is transferred from thefourth deposition chamber 121 to thesecond heating chamber 123, and the second heat treatment is performed. The pressure in thesecond heating chamber 123 is kept at 10−8 Pa or less using anevacuation unit 1123 such as a cryopump before and after the heat treatment. - Next, the second heat treatment is performed at 450° C. to 850° C. inclusive, preferably at 600° C. to 700° C. inclusive. Crystal growth proceeds upward with the use of the first
oxide semiconductor film 405 as a seed crystal for the crystal growth and the whole second oxide semiconductor film is crystallized. In such a manner, the secondoxide semiconductor film 407 having a crystal region with a large film thickness is formed (FIG. 6B ). - Note that the boundary between the first
oxide semiconductor film 405 and the secondoxide semiconductor film 407 having a crystal region is shown by a dashed line inFIGS. 6A to 6E ; however, the boundary between the firstoxide semiconductor layer 405 and the secondoxide semiconductor layer 407 having a crystal region cannot be determined and the firstoxide semiconductor layer 405 and the secondoxide semiconductor layer 407 can be regarded to as one layer in some cases. - Further, after the first
oxide semiconductor film 405 and the secondoxide semiconductor film 407 are formed, oxygen radical treatment is preferably performed on the surface of the second oxide semiconductor film. In this embodiment, oxygen radical treatment is performed in thetreatment chamber 125. Before and after the treatment, the pressure in thesecond heating chamber 125 is kept at 10−8 Pa or less using theevacuation unit 1125 such as a cryopump. The oxygen radical treatment can be performed in a manner similar to that in Embodiment 2. - Next, the
substrate 301 is transferred to thefifth deposition chamber 127, and aconductive film 409 is deposited over the secondoxide semiconductor film 407 by a sputtering method (FIG. 6C ). Theconductive film 409 can be formed using a material and a method similar to those of theconductive film 310 in Embodiment 2. Thus, Embodiment 2 can be referred to for the details. In addition, before and after the deposition, the pressure in thefifth deposition chamber 127 is kept at 10−8 Pa or less using theevacuation unit 1127 such as a cryopump, and the inside of thefifth deposition chamber 127 is kept extremely clean. - The
substrate 301 that has been subjected to successive deposition is transferred to the secondload lock chamber 131. - In a manner similar to that in Embodiment 2, the first
oxide semiconductor layer 406, the secondoxide semiconductor layer 408, thesource electrode layer 411 a, and thedrain electrode layer 411 b are formed by a photolithography step using the second photomask and by etching (FIG. 6D ). - Next, using a material and a method similar to those described in Embodiment 2, a silicon oxide film is formed as the insulating
layer 313 and a silicon nitride film is forms as the protective insulatinglayer 315. - Through the above-described steps, the
transistor 500 using an oxide semiconductor layer having a crystal region can be manufactured (FIG. 6E ). - Note that in this embodiment, the case where the oxide semiconductor film has two layers is described; however, the oxide semiconductor layer having a crystal region may have a single layer or three or more layers.
- In the case where a single layer oxide semiconductor film is deposited, for example, an oxide semiconductor film may be formed in the
third deposition chamber 117, and heat treatment may be performed in thefirst heating chamber 119. Further, thesubstrate 301 may be subjected to deposition while being heated so that crystal growth can be promoted; alternatively, oxygen radical treatment may be performed on the deposited oxide semiconductor film in thetreatment chamber 125. - Note that in the case where a transistor is formed by the steps of processing an oxide semiconductor film having a crystal region into an island-shaped oxide semiconductor layer having a crystal region and forming a conductive film thereover, the method described in Embodiment 3 can be applied except for the formation of the oxide semiconductor film. Therefore, Embodiment 3 can be referred to for the details.
- Accordingly, by using the deposition apparatus capable of successive deposition in Embodiment 1, which keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
- This application is based on Japanese Patent Application serial no. 2010-043575 filed with Japan Patent Office on Feb. 26, 2010, the entire contents of which are hereby incorporated by reference.
Claims (12)
1. A deposition apparatus comprising:
a load lock chamber connected to a unit capable of evacuating the load lock chamber to have a pressure of 10−6 Pa or less;
a plurality of deposition chambers each being connected to a unit capable of evacuating the deposition chamber to have a pressure of 10−8 Pa or less;
a heating chamber connected to a unit capable of evacuating the heating chamber to have a pressure of 10−8 Pa or less; and
a transfer chamber connected to the load lock chamber, the heating chamber, and the plurality of deposition chambers through gate valves and connected to a unit capable of evacuating the transfer chamber to have a pressure of 10−6 Pa or less.
2. The deposition apparatus according to claim 1 , wherein the units capable of evacuating the load lock chamber, the heating chamber, the plurality of deposition chambers, and the transfer chamber are entrapment pumps.
3. The deposition apparatus according to claim 1 , wherein the amount of leakage of the air from the deposition chamber is 10−11 Pa·m3/s or less.
4. The deposition apparatus according to claim 1 , further comprising a treatment chamber provided with a unit capable of generating oxygen radical and a unit capable of evacuating the treatment chamber to have a pressure of 10−8 Pa or less.
5. The deposition apparatus according to claim 1 , wherein the heating chamber has a unit capable of heating at room temperature to 700° C. inclusive.
6. A deposition apparatus comprising:
a load lock chamber connected to a unit capable of evacuating the load lock chamber to have a pressure of 10−6 Pa or less;
a plurality of deposition chambers each including a substrate holding portion provided with a first heating unit for heating a substrate and a second heating unit for heating a wall surface of a periphery of the substrate holding portion, and each being connected to a unit capable of evacuating the deposition chamber to have a pressure of 10−8 Pa or less;
a heating chamber connected to a unit capable of evacuating the heating chamber to have a pressure of 10−8 Pa or less; and
a transfer chamber connected to the load lock chamber, the heating chamber, and the plurality of deposition chambers through gate valves and connected to a unit capable of evacuating the transfer chamber to have a pressure of 10−6 Pa or less.
7. The deposition apparatus according to claim 6 , wherein the units capable of evacuating the load lock chamber, the heating chamber, the plurality of deposition chambers, and the transfer chamber are entrapment pumps.
8. The deposition apparatus according to claim 6 , wherein at least one of the plurality of deposition chambers is provided with a target holding portion for fixing a target.
9. The deposition apparatus according to claim 6 , wherein the amount of leakage of the air from the deposition chamber is 10−11 Pa·m3/s or less.
10. The deposition apparatus according to claim 6 , wherein the first heating unit is a unit capable of heating the substrate at room temperature to 500° C. inclusive.
11. The deposition apparatus according to claim 6 , further comprising a treatment chamber provided with a unit capable of generating oxygen radical and a unit capable of evacuating the treatment chamber to have a pressure of 10−8 Pa or less.
12. The deposition apparatus according to claim 6 , wherein the heating chamber has a unit capable of heating at room temperature to 700° C. inclusive.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/302,815 US20140290569A1 (en) | 2010-02-26 | 2014-06-12 | Method for manufacturing semiconductor element and deposition apparatus |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010043575 | 2010-02-26 | ||
JP2010-043575 | 2010-02-26 | ||
US13/029,169 US8772160B2 (en) | 2010-02-26 | 2011-02-17 | Method for manufacturing semiconductor element and deposition apparatus |
US14/302,815 US20140290569A1 (en) | 2010-02-26 | 2014-06-12 | Method for manufacturing semiconductor element and deposition apparatus |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/029,169 Division US8772160B2 (en) | 2010-02-26 | 2011-02-17 | Method for manufacturing semiconductor element and deposition apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
US20140290569A1 true US20140290569A1 (en) | 2014-10-02 |
Family
ID=44505516
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/029,169 Expired - Fee Related US8772160B2 (en) | 2010-02-26 | 2011-02-17 | Method for manufacturing semiconductor element and deposition apparatus |
US14/302,815 Abandoned US20140290569A1 (en) | 2010-02-26 | 2014-06-12 | Method for manufacturing semiconductor element and deposition apparatus |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/029,169 Expired - Fee Related US8772160B2 (en) | 2010-02-26 | 2011-02-17 | Method for manufacturing semiconductor element and deposition apparatus |
Country Status (5)
Country | Link |
---|---|
US (2) | US8772160B2 (en) |
JP (2) | JP2011199271A (en) |
KR (1) | KR20130009978A (en) |
TW (2) | TWI590330B (en) |
WO (1) | WO2011105183A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10007133B2 (en) | 2012-10-12 | 2018-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and touch panel |
US11309181B2 (en) | 2016-06-06 | 2022-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Sputtering apparatus, sputtering target, and method for forming semiconductor film with the sputtering apparatus |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011001881A1 (en) | 2009-06-30 | 2011-01-06 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US8952377B2 (en) * | 2011-07-08 | 2015-02-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP6059968B2 (en) * | 2011-11-25 | 2017-01-11 | 株式会社半導体エネルギー研究所 | Semiconductor device and liquid crystal display device |
WO2013161031A1 (en) | 2012-04-26 | 2013-10-31 | 不二精工 株式会社 | Bead ring winding device |
KR20230104756A (en) | 2012-05-10 | 2023-07-10 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
US10043659B2 (en) | 2016-05-20 | 2018-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or display device including the same |
DE112017002579T5 (en) | 2016-05-20 | 2019-03-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or display device containing the same |
US9990460B2 (en) * | 2016-09-30 | 2018-06-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Source beam optimization method for improving lithography printability |
IT201700066256A1 (en) * | 2017-06-15 | 2018-12-15 | Gianluca Battiloro | Process and plant for the chrome plating of parts or products. |
Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5286296A (en) * | 1991-01-10 | 1994-02-15 | Sony Corporation | Multi-chamber wafer process equipment having plural, physically communicating transfer means |
US5310410A (en) * | 1990-04-06 | 1994-05-10 | Sputtered Films, Inc. | Method for processing semi-conductor wafers in a multiple vacuum and non-vacuum chamber apparatus |
US6066558A (en) * | 1996-03-05 | 2000-05-23 | Tokyo Electron Limited | Multilevel interconnection forming method for forming a semiconductor device |
US20020134506A1 (en) * | 2001-03-21 | 2002-09-26 | Applied Materials, Inc. | Transfer chamber with side wall port |
US6482684B1 (en) * | 1998-03-27 | 2002-11-19 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a TFT with Ge seeded amorphous Si layer |
US6554972B1 (en) * | 1998-06-26 | 2003-04-29 | Kabushiki Kaisha Toshiba | Information recording medium and its manufacturing method |
US20050006230A1 (en) * | 2001-08-31 | 2005-01-13 | Masaki Narushima | Semiconductor processing system |
US20060272936A1 (en) * | 2005-01-28 | 2006-12-07 | Hideki Yamashita | Deposition method by physical vapor deposition and target for deposition processing by physical vapor deposition |
US20070167030A1 (en) * | 2005-12-16 | 2007-07-19 | Jung-Geun Jee | Method of forming an insulation structure and method of manufacturing a semiconductor device using the same |
US20080020528A1 (en) * | 2006-07-21 | 2008-01-24 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device and method of manufacturing nonvolatile semiconductor storage device |
US20080260938A1 (en) * | 2006-12-05 | 2008-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Film Formation Apparatus, Film Formation Method, Manufacturing Apparatus, and Method for Manufacturing Light-Emitting Device |
US20090137103A1 (en) * | 2007-11-27 | 2009-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US20100024732A1 (en) * | 2006-06-02 | 2010-02-04 | Nima Mokhlesi | Systems for Flash Heating in Atomic Layer Deposition |
US20100092747A1 (en) * | 2008-10-14 | 2010-04-15 | Northwestern University | Infrared-reflecting films and method for making the same |
US20100126406A1 (en) * | 2008-11-25 | 2010-05-27 | Yan Chih-Shiue | Production of Single Crystal CVD Diamond at Rapid Growth Rate |
US20100330738A1 (en) * | 2009-04-13 | 2010-12-30 | Hitachi Metals, Ltd. | Oxide semiconductor target and manufacturing method of oxide semiconductor device by using the same |
US20110200749A1 (en) * | 2010-02-17 | 2011-08-18 | Kunihiko Suzuki | Film deposition apparatus and method |
US8500963B2 (en) * | 2006-10-26 | 2013-08-06 | Applied Materials, Inc. | Sputtering of thermally resistive materials including metal chalcogenides |
Family Cites Families (136)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2607239B2 (en) * | 1985-03-29 | 1997-05-07 | シャープ株式会社 | Molecular beam epitaxy equipment |
JPH0693427A (en) * | 1992-09-14 | 1994-04-05 | Fuji Electric Co Ltd | Formation of film in vacuum |
JPH0883768A (en) * | 1994-09-09 | 1996-03-26 | Toshiba Corp | Method and device for forming thin film |
JPH08288219A (en) * | 1995-04-13 | 1996-11-01 | Sony Corp | Apparatus and method for treatment of semiconductor |
EP0820644B1 (en) | 1995-08-03 | 2005-08-24 | Koninklijke Philips Electronics N.V. | Semiconductor device provided with transparent switching element |
JP3625598B2 (en) | 1995-12-30 | 2005-03-02 | 三星電子株式会社 | Manufacturing method of liquid crystal display device |
US6057234A (en) | 1996-04-29 | 2000-05-02 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating semiconductor device |
JP3804881B2 (en) * | 1996-04-29 | 2006-08-02 | 株式会社半導体エネルギー研究所 | Semiconductor device manufacturing apparatus and semiconductor device manufacturing method |
JPH1032167A (en) * | 1996-07-17 | 1998-02-03 | Sony Corp | Treatment of semiconductor substrate and semiconductor treatment equipment |
JPH10183347A (en) * | 1996-12-25 | 1998-07-14 | Ulvac Japan Ltd | Film forming apparatus for magneto-resistive head |
JPH10196788A (en) * | 1997-01-07 | 1998-07-31 | Matsushita Electric Ind Co Ltd | Vacuum part, and vacuum leaking amount reducing method |
JP3361986B2 (en) * | 1998-01-07 | 2003-01-07 | 株式会社日立国際電気 | Substrate processing apparatus and substrate processing method |
JP4170454B2 (en) | 1998-07-24 | 2008-10-22 | Hoya株式会社 | Article having transparent conductive oxide thin film and method for producing the same |
JP2000150861A (en) | 1998-11-16 | 2000-05-30 | Tdk Corp | Oxide thin film |
JP3276930B2 (en) | 1998-11-17 | 2002-04-22 | 科学技術振興事業団 | Transistor and semiconductor device |
JP4425438B2 (en) * | 1999-07-23 | 2010-03-03 | 株式会社半導体エネルギー研究所 | Method for manufacturing EL display device |
TW460731B (en) | 1999-09-03 | 2001-10-21 | Ind Tech Res Inst | Electrode structure and production method of wide viewing angle LCD |
JP2002008994A (en) * | 2000-06-22 | 2002-01-11 | Ulvac Japan Ltd | Manufacturing method for thin film |
JP4620846B2 (en) * | 2000-08-28 | 2011-01-26 | 新日本製鐵株式会社 | Metal plate with photocatalytic activity |
JP4089858B2 (en) | 2000-09-01 | 2008-05-28 | 国立大学法人東北大学 | Semiconductor device |
JP3596757B2 (en) * | 2000-11-06 | 2004-12-02 | シャープ株式会社 | Decompression method of vacuum chamber |
KR20020038482A (en) | 2000-11-15 | 2002-05-23 | 모리시타 요이찌 | Thin film transistor array, method for producing the same, and display panel using the same |
JP3997731B2 (en) | 2001-03-19 | 2007-10-24 | 富士ゼロックス株式会社 | Method for forming a crystalline semiconductor thin film on a substrate |
JP2002289859A (en) | 2001-03-23 | 2002-10-04 | Minolta Co Ltd | Thin-film transistor |
JP4090716B2 (en) | 2001-09-10 | 2008-05-28 | 雅司 川崎 | Thin film transistor and matrix display device |
JP3925839B2 (en) | 2001-09-10 | 2007-06-06 | シャープ株式会社 | Semiconductor memory device and test method thereof |
US7061014B2 (en) | 2001-11-05 | 2006-06-13 | Japan Science And Technology Agency | Natural-superlattice homologous single crystal thin film, method for preparation thereof, and device using said single crystal thin film |
JP4164562B2 (en) | 2002-09-11 | 2008-10-15 | 独立行政法人科学技術振興機構 | Transparent thin film field effect transistor using homologous thin film as active layer |
JP2003193243A (en) * | 2001-12-27 | 2003-07-09 | National Institute Of Advanced Industrial & Technology | Method of forming high dielectric constant oxide film and apparatus for manufacturing semiconductor used for the method |
JP4083486B2 (en) | 2002-02-21 | 2008-04-30 | 独立行政法人科学技術振興機構 | Method for producing LnCuO (S, Se, Te) single crystal thin film |
US7049190B2 (en) | 2002-03-15 | 2006-05-23 | Sanyo Electric Co., Ltd. | Method for forming ZnO film, method for forming ZnO semiconductor layer, method for fabricating semiconductor device, and semiconductor device |
JP3933591B2 (en) | 2002-03-26 | 2007-06-20 | 淳二 城戸 | Organic electroluminescent device |
US7339187B2 (en) | 2002-05-21 | 2008-03-04 | State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of Oregon State University | Transistor structures |
JP2004022625A (en) | 2002-06-13 | 2004-01-22 | Murata Mfg Co Ltd | Manufacturing method of semiconductor device and its manufacturing method |
US7105868B2 (en) | 2002-06-24 | 2006-09-12 | Cermet, Inc. | High-electron mobility transistor with zinc oxide |
JP2004128390A (en) * | 2002-10-07 | 2004-04-22 | Hitachi Kokusai Electric Inc | Substrate processing device |
US7067843B2 (en) | 2002-10-11 | 2006-06-27 | E. I. Du Pont De Nemours And Company | Transparent oxide semiconductor thin film transistors |
JP4166105B2 (en) | 2003-03-06 | 2008-10-15 | シャープ株式会社 | Semiconductor device and manufacturing method thereof |
JP2004273732A (en) | 2003-03-07 | 2004-09-30 | Sharp Corp | Active matrix substrate and its producing process |
JP4463492B2 (en) * | 2003-04-10 | 2010-05-19 | 株式会社半導体エネルギー研究所 | Manufacturing equipment |
JP4108633B2 (en) | 2003-06-20 | 2008-06-25 | シャープ株式会社 | THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE |
DE602004025057D1 (en) * | 2003-07-02 | 2010-02-25 | Johnson & Son Inc S C | Lamp and bulb for illumination and ambient illumination |
US7262463B2 (en) | 2003-07-25 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | Transistor including a deposited channel region having a doped portion |
AR045134A1 (en) * | 2003-07-29 | 2005-10-19 | Smithkline Beecham Plc | COMPOSITE OF 1H - IMIDAZO [4,5-C] PIRIDIN-ILO, PHARMACEUTICAL COMPOSITION THAT INCLUDES IT, PROCESS TO PREPARE IT, ITS USE TO PREPARE SUCH PHARMACEUTICAL COMPOSITION, PHARMACEUTICAL COMBINATION, USE OF PHARMACEUTICAL COMBINATION FOR THE PREPARATION OF A MEDIA PROCEDURE, TO PREPARE DIC |
US7297977B2 (en) | 2004-03-12 | 2007-11-20 | Hewlett-Packard Development Company, L.P. | Semiconductor device |
CN1998087B (en) | 2004-03-12 | 2014-12-31 | 独立行政法人科学技术振兴机构 | Amorphous oxide and thin film transistor |
US7282782B2 (en) | 2004-03-12 | 2007-10-16 | Hewlett-Packard Development Company, L.P. | Combined binary oxide semiconductor device |
US7145174B2 (en) | 2004-03-12 | 2006-12-05 | Hewlett-Packard Development Company, Lp. | Semiconductor device |
US7211825B2 (en) | 2004-06-14 | 2007-05-01 | Yi-Chi Shih | Indium oxide-based thin film transistors and circuits |
JP2006100760A (en) | 2004-09-02 | 2006-04-13 | Casio Comput Co Ltd | Thin-film transistor and its manufacturing method |
US7285501B2 (en) | 2004-09-17 | 2007-10-23 | Hewlett-Packard Development Company, L.P. | Method of forming a solution processed device |
US7298084B2 (en) | 2004-11-02 | 2007-11-20 | 3M Innovative Properties Company | Methods and displays utilizing integrated zinc oxide row and column drivers in conjunction with organic light emitting diodes |
US7829444B2 (en) | 2004-11-10 | 2010-11-09 | Canon Kabushiki Kaisha | Field effect transistor manufacturing method |
JP5138163B2 (en) | 2004-11-10 | 2013-02-06 | キヤノン株式会社 | Field effect transistor |
US7453065B2 (en) | 2004-11-10 | 2008-11-18 | Canon Kabushiki Kaisha | Sensor and image pickup device |
EP2453480A2 (en) | 2004-11-10 | 2012-05-16 | Canon Kabushiki Kaisha | Amorphous oxide and field effect transistor |
KR100911698B1 (en) | 2004-11-10 | 2009-08-10 | 캐논 가부시끼가이샤 | Field effect transistor employing an amorphous oxide |
RU2358354C2 (en) | 2004-11-10 | 2009-06-10 | Кэнон Кабусики Кайся | Light-emitting device |
US7863611B2 (en) | 2004-11-10 | 2011-01-04 | Canon Kabushiki Kaisha | Integrated circuits utilizing amorphous oxides |
JP5118810B2 (en) | 2004-11-10 | 2013-01-16 | キヤノン株式会社 | Field effect transistor |
JP5126729B2 (en) | 2004-11-10 | 2013-01-23 | キヤノン株式会社 | Image display device |
US7791072B2 (en) | 2004-11-10 | 2010-09-07 | Canon Kabushiki Kaisha | Display |
US7579224B2 (en) | 2005-01-21 | 2009-08-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a thin film semiconductor device |
TWI472037B (en) | 2005-01-28 | 2015-02-01 | Semiconductor Energy Lab | Semiconductor device, electronic device, and method of manufacturing semiconductor device |
TWI481024B (en) | 2005-01-28 | 2015-04-11 | Semiconductor Energy Lab | Semiconductor device, electronic device, and method of manufacturing semiconductor device |
US7858451B2 (en) | 2005-02-03 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device, semiconductor device and manufacturing method thereof |
US7948171B2 (en) | 2005-02-18 | 2011-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device |
US20060197092A1 (en) | 2005-03-03 | 2006-09-07 | Randy Hoffman | System and method for forming conductive material on a substrate |
US8681077B2 (en) | 2005-03-18 | 2014-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and display device, driving method and electronic apparatus thereof |
WO2006105077A2 (en) | 2005-03-28 | 2006-10-05 | Massachusetts Institute Of Technology | Low voltage thin film transistor with high-k dielectric material |
US7645478B2 (en) | 2005-03-31 | 2010-01-12 | 3M Innovative Properties Company | Methods of making displays |
US8300031B2 (en) | 2005-04-20 | 2012-10-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising transistor having gate and drain connected through a current-voltage conversion element |
US7465674B2 (en) | 2005-05-31 | 2008-12-16 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
JP2006344849A (en) | 2005-06-10 | 2006-12-21 | Casio Comput Co Ltd | Thin film transistor |
US7691666B2 (en) | 2005-06-16 | 2010-04-06 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
US7402506B2 (en) | 2005-06-16 | 2008-07-22 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
US7507618B2 (en) | 2005-06-27 | 2009-03-24 | 3M Innovative Properties Company | Method for making electronic devices using metal oxide nanoparticles |
KR100711890B1 (en) | 2005-07-28 | 2007-04-25 | 삼성에스디아이 주식회사 | Organic Light Emitting Display and Fabrication Method for the same |
JP2007059128A (en) | 2005-08-23 | 2007-03-08 | Canon Inc | Organic electroluminescent display device and manufacturing method thereof |
JP2007073705A (en) | 2005-09-06 | 2007-03-22 | Canon Inc | Oxide-semiconductor channel film transistor and its method of manufacturing same |
JP5116225B2 (en) | 2005-09-06 | 2013-01-09 | キヤノン株式会社 | Manufacturing method of oxide semiconductor device |
JP4280736B2 (en) | 2005-09-06 | 2009-06-17 | キヤノン株式会社 | Semiconductor element |
JP4850457B2 (en) | 2005-09-06 | 2012-01-11 | キヤノン株式会社 | Thin film transistor and thin film diode |
EP1998374A3 (en) | 2005-09-29 | 2012-01-18 | Semiconductor Energy Laboratory Co, Ltd. | Semiconductor device having oxide semiconductor layer and manufacturing method thereof |
JP5037808B2 (en) | 2005-10-20 | 2012-10-03 | キヤノン株式会社 | Field effect transistor using amorphous oxide, and display device using the transistor |
JP5128767B2 (en) * | 2005-11-14 | 2013-01-23 | 株式会社ジャパンディスプレイイースト | Display device and manufacturing method thereof |
CN101667544B (en) | 2005-11-15 | 2012-09-05 | 株式会社半导体能源研究所 | Semiconductor device and method of manufacturing a semiconductor device |
TWI292281B (en) | 2005-12-29 | 2008-01-01 | Ind Tech Res Inst | Pixel structure of active organic light emitting diode and method of fabricating the same |
US7867636B2 (en) | 2006-01-11 | 2011-01-11 | Murata Manufacturing Co., Ltd. | Transparent conductive film and method for manufacturing the same |
JP4977478B2 (en) | 2006-01-21 | 2012-07-18 | 三星電子株式会社 | ZnO film and method of manufacturing TFT using the same |
US7576394B2 (en) | 2006-02-02 | 2009-08-18 | Kochi Industrial Promotion Center | Thin film transistor including low resistance conductive thin films and manufacturing method thereof |
US7977169B2 (en) | 2006-02-15 | 2011-07-12 | Kochi Industrial Promotion Center | Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof |
KR20070101595A (en) | 2006-04-11 | 2007-10-17 | 삼성전자주식회사 | Zno thin film transistor |
US20070252928A1 (en) | 2006-04-28 | 2007-11-01 | Toppan Printing Co., Ltd. | Structure, transmission type liquid crystal display, reflection type display and manufacturing method thereof |
JP5028033B2 (en) | 2006-06-13 | 2012-09-19 | キヤノン株式会社 | Oxide semiconductor film dry etching method |
JP4609797B2 (en) | 2006-08-09 | 2011-01-12 | Nec液晶テクノロジー株式会社 | Thin film device and manufacturing method thereof |
JP4999400B2 (en) | 2006-08-09 | 2012-08-15 | キヤノン株式会社 | Oxide semiconductor film dry etching method |
JP5127183B2 (en) * | 2006-08-23 | 2013-01-23 | キヤノン株式会社 | Thin film transistor manufacturing method using amorphous oxide semiconductor film |
JP4332545B2 (en) | 2006-09-15 | 2009-09-16 | キヤノン株式会社 | Field effect transistor and manufacturing method thereof |
JP4274219B2 (en) | 2006-09-27 | 2009-06-03 | セイコーエプソン株式会社 | Electronic devices, organic electroluminescence devices, organic thin film semiconductor devices |
JP5164357B2 (en) | 2006-09-27 | 2013-03-21 | キヤノン株式会社 | Semiconductor device and manufacturing method of semiconductor device |
JP4630856B2 (en) * | 2006-09-29 | 2011-02-09 | 株式会社東芝 | Method for manufacturing magnetoresistive element |
JP2009054767A (en) * | 2006-10-10 | 2009-03-12 | Showa Denko Kk | Laminate structure of group iii nitride semiconductor, manufacturing method thereof, semiconductor light-emitting element, and lamp |
US7622371B2 (en) | 2006-10-10 | 2009-11-24 | Hewlett-Packard Development Company, L.P. | Fused nanocrystal thin film semiconductor and method |
US7772021B2 (en) | 2006-11-29 | 2010-08-10 | Samsung Electronics Co., Ltd. | Flat panel displays comprising a thin-film transistor having a semiconductive oxide in its channel and methods of fabricating the same for use in flat panel displays |
JP2008140684A (en) | 2006-12-04 | 2008-06-19 | Toppan Printing Co Ltd | Color el display, and its manufacturing method |
KR101303578B1 (en) | 2007-01-05 | 2013-09-09 | 삼성전자주식회사 | Etching method of thin film |
US8207063B2 (en) | 2007-01-26 | 2012-06-26 | Eastman Kodak Company | Process for atomic layer deposition |
KR100851215B1 (en) | 2007-03-14 | 2008-08-07 | 삼성에스디아이 주식회사 | Thin film transistor and organic light-emitting dislplay device having the thin film transistor |
JP2008235726A (en) * | 2007-03-23 | 2008-10-02 | Hitachi Ltd | Manufacturing method of semiconductor multilayer film |
JP4727684B2 (en) | 2007-03-27 | 2011-07-20 | 富士フイルム株式会社 | Thin film field effect transistor and display device using the same |
US7795613B2 (en) | 2007-04-17 | 2010-09-14 | Toppan Printing Co., Ltd. | Structure with transistor |
KR101325053B1 (en) | 2007-04-18 | 2013-11-05 | 삼성디스플레이 주식회사 | Thin film transistor substrate and manufacturing method thereof |
KR20080094300A (en) | 2007-04-19 | 2008-10-23 | 삼성전자주식회사 | Thin film transistor and method of manufacturing the same and flat panel display comprising the same |
KR101334181B1 (en) | 2007-04-20 | 2013-11-28 | 삼성전자주식회사 | Thin Film Transistor having selectively crystallized channel layer and method of manufacturing the same |
WO2008133345A1 (en) | 2007-04-25 | 2008-11-06 | Canon Kabushiki Kaisha | Oxynitride semiconductor |
KR101345376B1 (en) | 2007-05-29 | 2013-12-24 | 삼성전자주식회사 | Fabrication method of ZnO family Thin film transistor |
EP2158608A4 (en) * | 2007-06-19 | 2010-07-14 | Samsung Electronics Co Ltd | Oxide semiconductors and thin film transistors comprising the same |
JP4537434B2 (en) * | 2007-08-31 | 2010-09-01 | 株式会社日立製作所 | Zinc oxide thin film, transparent conductive film using the same, and display element |
KR101484297B1 (en) | 2007-08-31 | 2015-01-19 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device and manufacturing method of the same |
US8202365B2 (en) | 2007-12-17 | 2012-06-19 | Fujifilm Corporation | Process for producing oriented inorganic crystalline film, and semiconductor device using the oriented inorganic crystalline film |
US8247315B2 (en) * | 2008-03-17 | 2012-08-21 | Semiconductor Energy Laboratory Co., Ltd. | Plasma processing apparatus and method for manufacturing semiconductor device |
WO2009153870A1 (en) * | 2008-06-18 | 2009-12-23 | キヤノンアネルバ株式会社 | Phase-change memory element, phase-change memory cell, vacuum treatment device, and method for manufacturing phase-change memory element |
US9666719B2 (en) | 2008-07-31 | 2017-05-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US8945981B2 (en) | 2008-07-31 | 2015-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
TWI500159B (en) | 2008-07-31 | 2015-09-11 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing the same |
TWI495108B (en) | 2008-07-31 | 2015-08-01 | Semiconductor Energy Lab | Method for manufacturing semiconductor devices |
JP5480554B2 (en) | 2008-08-08 | 2014-04-23 | 株式会社半導体エネルギー研究所 | Semiconductor device |
TWI500160B (en) | 2008-08-08 | 2015-09-11 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing the same |
TWI642113B (en) | 2008-08-08 | 2018-11-21 | 半導體能源研究所股份有限公司 | Method for manufacturing semiconductor device |
US9082857B2 (en) * | 2008-09-01 | 2015-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising an oxide semiconductor layer |
JP5627071B2 (en) | 2008-09-01 | 2014-11-19 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
TWI511299B (en) | 2008-09-01 | 2015-12-01 | Semiconductor Energy Lab | Method for manufacturing semiconductor device |
JP4623179B2 (en) | 2008-09-18 | 2011-02-02 | ソニー株式会社 | Thin film transistor and manufacturing method thereof |
JP5451280B2 (en) | 2008-10-09 | 2014-03-26 | キヤノン株式会社 | Wurtzite crystal growth substrate, manufacturing method thereof, and semiconductor device |
EP2256814B1 (en) | 2009-05-29 | 2019-01-16 | Semiconductor Energy Laboratory Co, Ltd. | Oxide semiconductor device and method for manufacturing the same |
-
2011
- 2011-01-27 WO PCT/JP2011/052196 patent/WO2011105183A1/en active Application Filing
- 2011-01-27 KR KR1020127024854A patent/KR20130009978A/en not_active Application Discontinuation
- 2011-02-17 US US13/029,169 patent/US8772160B2/en not_active Expired - Fee Related
- 2011-02-23 JP JP2011037059A patent/JP2011199271A/en not_active Withdrawn
- 2011-02-24 TW TW100106193A patent/TWI590330B/en not_active IP Right Cessation
- 2011-02-24 TW TW105115977A patent/TWI605520B/en not_active IP Right Cessation
-
2014
- 2014-06-12 US US14/302,815 patent/US20140290569A1/en not_active Abandoned
-
2015
- 2015-08-04 JP JP2015154218A patent/JP6220829B2/en not_active Expired - Fee Related
Patent Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5310410A (en) * | 1990-04-06 | 1994-05-10 | Sputtered Films, Inc. | Method for processing semi-conductor wafers in a multiple vacuum and non-vacuum chamber apparatus |
US5286296A (en) * | 1991-01-10 | 1994-02-15 | Sony Corporation | Multi-chamber wafer process equipment having plural, physically communicating transfer means |
US6066558A (en) * | 1996-03-05 | 2000-05-23 | Tokyo Electron Limited | Multilevel interconnection forming method for forming a semiconductor device |
US6482684B1 (en) * | 1998-03-27 | 2002-11-19 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a TFT with Ge seeded amorphous Si layer |
US6554972B1 (en) * | 1998-06-26 | 2003-04-29 | Kabushiki Kaisha Toshiba | Information recording medium and its manufacturing method |
US20020134506A1 (en) * | 2001-03-21 | 2002-09-26 | Applied Materials, Inc. | Transfer chamber with side wall port |
US20050006230A1 (en) * | 2001-08-31 | 2005-01-13 | Masaki Narushima | Semiconductor processing system |
US20060272936A1 (en) * | 2005-01-28 | 2006-12-07 | Hideki Yamashita | Deposition method by physical vapor deposition and target for deposition processing by physical vapor deposition |
US20070167030A1 (en) * | 2005-12-16 | 2007-07-19 | Jung-Geun Jee | Method of forming an insulation structure and method of manufacturing a semiconductor device using the same |
US20100024732A1 (en) * | 2006-06-02 | 2010-02-04 | Nima Mokhlesi | Systems for Flash Heating in Atomic Layer Deposition |
US20080020528A1 (en) * | 2006-07-21 | 2008-01-24 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device and method of manufacturing nonvolatile semiconductor storage device |
US8500963B2 (en) * | 2006-10-26 | 2013-08-06 | Applied Materials, Inc. | Sputtering of thermally resistive materials including metal chalcogenides |
US20080260938A1 (en) * | 2006-12-05 | 2008-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Film Formation Apparatus, Film Formation Method, Manufacturing Apparatus, and Method for Manufacturing Light-Emitting Device |
US20090137103A1 (en) * | 2007-11-27 | 2009-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US20100092747A1 (en) * | 2008-10-14 | 2010-04-15 | Northwestern University | Infrared-reflecting films and method for making the same |
US20100126406A1 (en) * | 2008-11-25 | 2010-05-27 | Yan Chih-Shiue | Production of Single Crystal CVD Diamond at Rapid Growth Rate |
US20100330738A1 (en) * | 2009-04-13 | 2010-12-30 | Hitachi Metals, Ltd. | Oxide semiconductor target and manufacturing method of oxide semiconductor device by using the same |
US20110200749A1 (en) * | 2010-02-17 | 2011-08-18 | Kunihiko Suzuki | Film deposition apparatus and method |
Non-Patent Citations (4)
Title |
---|
Furuno, English Machine translated of JP Publication Number 2009-260297, November 05, 2009; (Machine translated November 16, 2014) * |
Hiyama, English Machine translated of JP Publication Number 11-204616, July 30, 1999; (Machine translated November 16, 2014) * |
Ikeda et al., English Machine translated of JP Publication Number 2009-212476, September 17, 2009; (Machine translated November 16, 2014) * |
Yamazaki, English Machine translated of JP Publication Number 10-70089, March 10, 1998; (Machine translated November 16, 2014) * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10007133B2 (en) | 2012-10-12 | 2018-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and touch panel |
US10401662B2 (en) | 2012-10-12 | 2019-09-03 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and touch panel |
US11309181B2 (en) | 2016-06-06 | 2022-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Sputtering apparatus, sputtering target, and method for forming semiconductor film with the sputtering apparatus |
Also Published As
Publication number | Publication date |
---|---|
JP2011199271A (en) | 2011-10-06 |
US20110212605A1 (en) | 2011-09-01 |
TWI605520B (en) | 2017-11-11 |
JP6220829B2 (en) | 2017-10-25 |
TW201203364A (en) | 2012-01-16 |
US8772160B2 (en) | 2014-07-08 |
JP2016026382A (en) | 2016-02-12 |
TWI590330B (en) | 2017-07-01 |
WO2011105183A1 (en) | 2011-09-01 |
TW201630074A (en) | 2016-08-16 |
KR20130009978A (en) | 2013-01-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8772160B2 (en) | Method for manufacturing semiconductor element and deposition apparatus | |
US9331207B2 (en) | Oxide semiconductor device and manufacturing method therof | |
US9779937B2 (en) | Manufacturing method of semiconductor device | |
JP6211643B2 (en) | Method for manufacturing transistor | |
US9640668B2 (en) | Electronic device, manufacturing method of electronic device, and sputtering target | |
US20110240462A1 (en) | Deposition apparatus and method for manufacturing semiconductor device | |
US8890555B2 (en) | Method for measuring transistor | |
US9196743B2 (en) | Field effect device with oxide semiconductor layer | |
US20160276489A1 (en) | Semiconductor device and manufacturing method thereof | |
US8785926B2 (en) | Semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |