US20030071312A1 - Thin film semiconductor device having a gate electrode insulator formed through high-heat oxidization - Google Patents

Thin film semiconductor device having a gate electrode insulator formed through high-heat oxidization Download PDF

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US20030071312A1
US20030071312A1 US10/236,537 US23653702A US2003071312A1 US 20030071312 A1 US20030071312 A1 US 20030071312A1 US 23653702 A US23653702 A US 23653702A US 2003071312 A1 US2003071312 A1 US 2003071312A1
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layer
thin film
film semiconductor
semiconductor
crystalline
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Yasuhisa Oana
Masakiyo Matsumura
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Advanced LCD Technologies Development Center Co Ltd
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Advanced LCD Technologies Development Center Co Ltd
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Definitions

  • the present invention relates to a thin film semiconductor device and a semiconductor substrate sheet to be used in the semiconductor device as well as a method for producing them.
  • a thin film semiconductor device also known as a thin film transistor (TFT) device
  • a semiconductor substrate typically consist of a thin film layer of semiconductor material, such as silicon, over a base layer of insulation material, such as non-alkaline glass, or quarts glass.
  • TFT thin film transistor
  • a plurality of channels consisting of a source area and a drain area are formed, and each of channels is equipped with a gate electrode separated by an insulating film from the above areas.
  • a gate electrode insulator is interposed between the gate electrode and the channel area.
  • This insulator is usually formed with a film of silicon oxide, and this film is typically required to be formed at a low temperature.
  • high temperature silicon oxide film formation techniques such as those used in large scale integration (LSI) semiconductor processes (which may require temperatures of more than 900° C.) typically cannot be used.
  • LSI large scale integration
  • a relatively low temperature deposition process e.g., a temperatures less than 600° C.
  • a plasma CVD method is used.
  • an oxidized film deposited by the plasma CVD method can be used to form an insulator film for a TFT, it may have disadvantages in insulation property and/or stability compared with a film oxidized at a high temperature. This occurs because, when using the plasma CVD method, some impurities remain between the channel area and the gate insulator film, and further, the resultant silicon oxide film has a tendency to be composed of compounds as which do not have a stoichiometrically regulated composition of “SiO 2 ” but, instead, have an irregular composition such as “SiO 1.9 ”.
  • the TFT circuit tends not only to have greater variance of threshold voltage values, but also have reduced long-term stability of TFT properties.
  • variation of TFT threshold voltage values may be in the ⁇ 0.4V range and the magnitude of this variation may increase over time.
  • TFT devices in which polycrystalline semiconductor film are used may need to be designed so that each circuit extends across several boundaries of crystal grains in order to reduce the variation of mobility. This is illustrated further in FIG. 7. In such devices, the average mobility is usually below 150 cm 2 /V ⁇ sec.
  • implementations of the invention can provide a thin film semiconductor device (i.e., a TFT), and a substrate sheet to be used in forming the TFT device, wherein the chemical connection between the semiconductor film and the gate electrode insulator film are successive through border faces, and the gate electrode insulator film has a stoichiochemical composition of SiO 2 .
  • a thin film semiconductor device i.e., a TFT
  • the gate electrode insulator film has a stoichiochemical composition of SiO 2 .
  • disadvantages of conventional TFT produced by CVD methods can be avoided.
  • the disclosed method of device formation can reduce greatly the variety of threshold value and maintain stable operating characteristics.
  • implementations of the invention can provide a thin film semiconductor device and its substrate sheet in which an electric circuit module can be fashioned so as to avoid the need for arrangement of the device over many crystal grains of various sizes and of disordered configuration, but rather, the device can be arranged to have a configuration corresponding to the arrangement of crystal grains.
  • Implementations can include features such as a thin film semiconductor device that can work stably for a long time with desirable operating properties and with reduced fluctuation in operational threshold values. This can be provided when a partial region in the thickness direction of the thin film of semiconductor, after being converted to an oxidized film through irradiation of energy beam, is used as the gate electrode insulator of the device.
  • a thin film semiconductor device can have a structure in which unit circuits are arranged to correspond to the arrangement of crystal grains. This may be implemented when the above-described substrate sheet is produced such that single-crystalline semiconductor grains are arranged in a substantially geometric and regular arrangement.
  • Implementations can include a substrate sheet that comprises a thin film semiconductor having a layer of semiconductor crystal grains formed by crystallization (and/or recrystallization) of a non-single-crystalline semiconductor layer and of a layer of oxidized film formed by oxidization of a non-single-crystalline semiconductor layer.
  • the layer of semiconductor crystal grains may have a configuration in which single crystalline semiconductor grains are arranged in a regular arrangement.
  • Implementations of the thin film semiconductor device can include a layer of semiconductor crystal grains and a layer of oxidized film formed by oxidization of non-single-crystalline semiconductor layer, and the oxidized film layer can be used as the insulator for the gate electrode.
  • the layer of semiconductor crystal grains has a composition in which single-crystalline semiconductor grains are arranged in a regular arrangement (i.e., an arrangement having a predictable crystalline structure).
  • the method for producing a substrate sheet for thin film semiconductor devices includes the steps of: (a) depositing a layer of non-single-crystalline semiconductor on a base layer of insulation materials, (b) forming oxygen implanted areas in the non-single-crystalline semiconductor layer by implanting oxygen ions into the layer and (c) irradiating the layer with an energy beam.
  • the energy bean changes the layer of non-single-crystalline semiconductor such that the oxygen implanted areas are converted to insulating oxidized films, and other areas are converted to films of semiconductor crystal grains.
  • the irradiation by the energy beam be carried out so that areas in which the irradiation intensity are maximum, and areas in which the irradiation intensity are minimum are arranged such that the transition of irradiation intensity between the above two areas is successive.
  • Another method for producing a thin film semiconductor device can include steps of: (a) depositing a layer of non-single-crystalline semiconductor on a base layer of insulation materials, (b) forming oxygen implanted areas in the layer of the non-single-crystalline semiconductor by implanting oxygen ion into the layer, (c) irradiating the layer with an energy beam, thereby changing the layer of non-single-crystalline semiconductor such that the oxygen implanted areas are converted to insulating oxidized films and other areas are converted to films of semiconductor crystal grains, (d) forming a gate electrode by using the insulating oxidized films as a gate insulator and, (e) completing an electric circuit unit by forming a source electrode and a drain electrode in the layer of semiconductor crystal grains.
  • the irradiation of energy beam is carried out so that areas at which the irradiation intensity are maximum and areas at which the irradiation intensity are minimum are arranged in a regulated mode and transition of irradiation intensity between the above two areas is successive.
  • FIG. 1 is pattern diagrams showing steps of one embodiment of the process according to the present invention for manufacturing a thin film semiconductor device.
  • FIG. 2 is pattern diagrams showing steps of another embodiment of the process according to the invention for manufacturing a thin film semiconductor device.
  • FIG. 3 is a pattern diagram for illustrating one embodiment of distribution of energy beam intensity in two-dimensional directions in the irradiation step according to the process of the present invention.
  • FIG. 4 is a pattern diagram illustrating a profile of transition of energy beam intensity between a maximum value and minimum value in the process according to the present invention, being shown as a sectional view along the arrow-mark in FIG. 3.
  • FIG. 5 is a pattern diagram illustrating an alignment state and growth direction of single crystalline grains during and after the irradiation of energy beam in the process according to the present invention.
  • FIG. 6 is the pattern diagrams illustrating one embodiment of the positional relationship of electrodes with crystal grains in the thin film semiconductor device of the present invention.
  • FIG. 7 is a pattern diagram illustrating the pattern of configuration of maximum intensity irradiation points and minimum intensity irradiation points such as mentioned in FIGS. 3 and 4, with a three-dimensional model pattern.
  • the thin film semiconductor device of the present invention it is preferred to use a glass sheet having a strain point not exceeding 700° C. as the material forming the base layer of a substrate sheet. But, it is possible to use various kinds insulation materials other than glass, for example, ceramics or plastic films having appropriate heat resistance.
  • the single crystalline semiconductor film in which an oxidized insulation film located on top of a single-crystalline film, or in an intermediate portion of the film in the thickness direction of the single crystalline film, is formed.
  • This semiconductor thin film can be produced by implanting oxygen ions into a non-single-crystalline semiconductor film deposited on a base layer, and then irradiating the layer with an energy beam (such as that produced by an excimer laser). This irradiation procedure can be used to change the non-single-crystalline semiconductor film to a semiconductor film composed of an oxidized film and a layer of single-crystalline grains having a relatively large size.
  • an amorphous semiconductor or poly-crystalline semiconductor in which small size crystal grains are already formed, can be used.
  • the poly-crystalline semiconductor is changed to a semiconductor film by implantation of oxygen ions and recrystallization.
  • the thickness of the amorphous semiconductor film is preferred to be 30 through 300 nm, especially 30 through 200 nm.
  • a thin control layer for adjusting heat conduction and crystallization is formed between the base layer and the semiconductor layer.
  • the first control layer may be formed from materials such as silicon oxide or silicon nitride (SiNx).
  • the first control layer functions to block the diffusion of impurities (such as glass components) from the base layer into the semiconductor layer, and also functions to increase uniformity of heat distribution in the semiconductor layer. This uniformity is effected by controlling the orientation of crystallization.
  • the thickness of the first control layer can be between 20 nm and 1000 nm, with a preferred range of 200 nm to 300 nm.
  • a second control layer may then be formed on top of the first control layer.
  • This second control layer has a function similar to that of the first control layer, namely, to effect uniformity of heat distribution and to control the orientation of crystals in the semiconductor layer in the process of crystallization by irradiation.
  • Materials such as silicon-oxide, silicon-nitride, silicon-ox-nitride or silicon-carbonate (SiC) can be used for the second control layer.
  • the thickness of the second control layer can be between 50 nm and 500 nm, with a preferred range of 100 nm to 300 nm.
  • a thin film semiconductor layer may be formed between the two control layers.
  • the material of the first control layer is first deposited as a thin film on the base layer of insulation material.
  • the thin film of non-single-crystalline semiconductor is deposited on the first control layer, and then the second control layer is deposited on the thin film semiconductor layer. Thereafter, the irradiation of energy beam from the upper direction is carried out to crystallize (or recrystallize) the layer of non-single crystalline material.
  • FIGS. 1 ( a ) through 1 ( e ) show semiconductor layers formed at various process stages from deposition on a base layer to completion of a thin film semiconductor device.
  • oxygen ions are implanted into the top surface of non-single-crystalline semiconductor layer.
  • the first control layer 20 for heat conduction and crystallization is deposited on the glass base layer 10 , and a non-single-crystalline semiconductor layer 30 is deposited thereon.
  • oxygen ions are implanted into a predetermined area to form an oxygen implanted area 33 (see FIG. 1( b )).
  • the predetermined area 33 is then irradiated with an energy beam to form an oxidized layer 40 (see FIG. 1( c )).
  • the layer 40 can be formed through high-heat oxidization of the oxygen implanted area 33 by an energy beam. This process also results in a single-crystalline semiconductor grain layer 50 which is formed through single-crystallization of non-single-crystalline layer 30 .
  • FIGS. 1 ( c ) and 1 ( d ) show the sectional view of a single area of single-crystalline grains layer; an actual substrate sheet has a plurality of such oxidized area and single-crystalline grains area.
  • the gate electrode 60 is formed on the oxidized layer 40 ) (which has been formed by irradiation of energy beam) using the layer 40 as the gate electrode insulator (see FIG. 1( d ).
  • source area 70 and drain area 71 are formed by implanting a material to form an electrode (such as phosphorous ion), into single-crystalline semiconductor layer 50 using gate electrode 60 as a mask.
  • a film 80 of insulation material such as silicon oxide
  • source electrode 81 and drain electrode 82 are formed by depositing material such as aluminum to form an electrode; thus completing the thin film semiconductor device.
  • FIG. 2 ( a ) through FIG. 2( e ) are pattern diagrams showing an embodiment in which oxygen ions are implanted into an intermediate layer portion of a non-single semiconductor layer.
  • the deposition of the first control layer for heat-conduction and the non-single semiconductor layer in the step (a) can be carried out in substantially the same way as for the embodiment of FIG. 1.
  • the implantation of oxygen ions is made into the intermediate layer portion of the non-single-crystalline semiconductor layer 30 , and therefore, the oxygen implanted area 33 is formed in a intermediate region in the thickness direction of the non-single semiconductor layer.
  • the layer 33 is converted to oxidized film layer, and non-single-crystalline semiconductor areas located at the upper-side and under-side of the oxygen implanted area are converted to single-crystalline semiconductor layers.
  • the predetermined areas of the upper-side single-crystalline layer is formed as the gate electrode 60 by the patterning process.
  • the process used in step 2 ( e ) is substantially identical to that of step 1 ( e ) in FIG. 1.
  • the volume of oxygen ion (dose) and its implanting depth (Rap) may be determined according to the thickness or position of the oxidized insulation layer 30 . It is noted that irradiation by an energy beam is not be limited to the use of excimer laser. For example, an argon laser radiated continuously can be used by pulsating or scanning it.
  • the irradiation should be carried out such that irradiation energy intensity changes in two-dimensional directions between the maximum value and the minimum value at predetermined intervals, and maximum points and minimum points appear one after another in a regular order.
  • the irradiation should be carried out so that irradiated points to which maximum irradiation intensity is given and irradiated points to which minimum irradiation intensity is given are arranged in a regulated configuration such as a matrix-arrayed configuration.
  • the irradiation is carried out in a repeating energy level pattern such as the pattern “maximum value(Emax) followed by minimum value(Emin) followed by maximum value(Emax).”
  • This changing pattern occurs two-dimensionally(i.e., along both the ‘x’ and ‘y’ axes). For example, this may be repeated across a rectangle region of 5 ⁇ 5 mm, at every intervals of 10 ⁇ m.
  • the irradiated area (for example, the above square area of 5 mm ⁇ 5 mm) may be shifted periodically in either ‘x’ direction or ‘y’ direction at a predetermined pitch.
  • This change of irradiation energy intensity can be realized by bringing the variation to the irradiation energy intensity distribution using a phase shift mask. Furthermore, it is desirable that the change between the maximum value and the minimum value be a successive change substantially as shown in FIG. 4.
  • Determination of the magnitude of the maximum value and the minimum value energy levels may be based on the film thickness of the non-singular-crystalline semiconductor layer and the thermal conductivity of the first and the second control layers.
  • the minimum energy intensity may be determined to be an intensity at which the thin film semiconductor doesn't melt during the irradiation
  • the maximum value may be an intensity sufficient to melt the thin film semiconductor during the irradiation.
  • a melting threshold level (Emth) should be positioned between the maximum value (Emax) and the minimum value (Emin), as shown in the FIG. 4.
  • the face shape of the irradiation beam is not limited to a square shape of 5 ⁇ 5 mm as mentioned above, and may be various polygon shapes. Further, the arrangement mode of maximum value points and minimum value points is not limited to the rectangular lattice. Other shapes, such as delta shaped lattice, also can be used.
  • the semiconductor layer does not completely melt in the minimum irradiation energy areas (namely, areas to which irradiation energy less than threshold value are given), and fine crystals of semiconductor are produced in the areas near the threshold value areas.
  • Some of these fine crystals functions as cores for crystallization and the crystallization progresses dimensionally from the points of these cores towards the areas to which maximum irradiation energy are given (i.e., in the direction of arrow marks in FIG. 5).
  • electrode materials such as Molybdenum-Tungsten alloy (MoW)
  • MoW Molybdenum-Tungsten alloy
  • the electrode layer forms a gate electrode and has a thickness of, e.g., 300 nm.
  • a source area and a drain area are formed using the gate electrode as the implantation mask, followed by formation of an isolating interlayer with insulation materials such as silicon oxide (which covers the gate electrode).
  • contact holes are formed by perforating through the second control layer at the position above the source area and the drain area, and electrode materials, such as Aluminum/Molybdenum, is deposited and patterned in the contact hole.
  • a thin film semiconductor device in which one unit electric circuit is arranged in each of a single crystal can be obtained.
  • a thin film semiconductor device of this type can have a high mobility (for example, over 300 cm 2 /V ⁇ sec) exceeding the mobility of conventional devices in which a substrate sheet comprising polycrystalline semiconductor film is used.
  • Vth threshold voltage value of thin film semiconductor device
  • the stability of threshold value related to contamination of gate insulator or channel boundaries is greatly improved to such degree that the shift amount of Vth after 10,000 hours operation is reduced to less than 0.05 V.
  • the oxidized insulation film has a solid and minute character similar to that of a heat-oxidized silicon film, due to its high-heat formation process including a melting step.
  • the disclosed oxidized film has properties similar to that of high-temperature heat-oxidized silicon film in the value of flat band voltage obtain by leak current measurement or C-V measurement, or in the shift amount of threshold value in bias temperature stress estimation(BTS).
  • the disclosed oxidized film layer not withstanding its thin character, can fully protect the single-crystalline silicon layer and does not contribute to breakdown.
  • the process described above corresponds to a process for the formation of N-channel thin film transistors. This process also can be used for the formation of P channel transistors by successive implantation of impurities for the formation of P channel transistors using partial masking means. Furthermore, it is possible to use the second control layer as an accumulated gate insulator directly, or to use only the insulating oxidized film as the gate insulating layer after making etching-treatment. To reduce leakage current that may occur among adjacent transistors, island separations can be made by etching after or before the crystallization.
  • a layer of silicon oxide (SiO2) with thickness of 200 nm was deposited by the method of plasma CVD, as the first control layer for heat-conduction and crystallization. Then, a layer of amorphous silicon (a-Si:H) with thickness of 60 nm was deposited without being exposed to the atmosphere. Next, this layer of amorphous semiconductor was annealed, and after dehydrogenating it, the surface area of the layer is formed as an oxygen-implanted area by implantation of oxygen ion.
  • the implantation of oxygen ion was carried out with the accelerated voltage of 3 keV, and the dose amount of 1.5E17/cm 2 . Under these conditions, the position of the maximum oxygen density was at the depth of about 10 nm corresponding to ion projection range (Rp), and the maximum density of oxygen was 1E23/cm 3 .
  • the implanting amount of oxygen (dose amount) or the implanting depth of oxygen (Rp) is determined by the thickness of insulating oxidized layer and its position to be formed.
  • dose amount dose amount
  • Rp implanting depth of oxygen
  • the above implantation conditions were determined from the viewpoint for forming an insulation oxidized layer of about 30 nm thicknesses on the surface of a layer of single-crystalline semiconductor.
  • pulsated laser beam were irradiated to the substrate sheet from its upper-side, whereby the amorphous silicon layer was crystallized and the oxygen implanted layer was converted to an oxidized layer.
  • the irradiation was carried out in a mode that one unit of laser has a square size irradiation face of 5 mm ⁇ 5 mm in which 250,000 maximum intensity points and minimum intensity points are arranged with intervals of 10 ⁇ m in a square lattice form, by using a phase shift mark for distributing the irradiation strength.
  • the melting threshold value (Emth) was about 0.6 J/cm 2 , the maximum energy strength of laser beam (Emax) being 1.9 J/cm 2 and minimum strength value (Emin) being 0.1 J/cm 2 .
  • the layer of amorphous silicon of 60 nm thickness was converted to a layer comprising a crystalline silicon layer of about 50 nm thickness and an oxidized layer of about 30 nm thickness.
  • Implanted oxygen ion of dose amount of 1.5 E17/cm 2 is reacted with silicon atoms equivalent to silicon layer of 20 nm thickness, and formed a silicon oxide layer of about 30 nm thickness.
  • a molybdenum/tungsten alloy layer is deposited by a sputtering process, and gate electrodes were formed by patterning the layer to predetermined shapes while adjusting its position so as to corresponding to the position of single-crystalline grains. Then, by implanting phosphorous ions using the gate electrodes as the mask, source electrodes and drain electrodes were formed. Then, layers of silicon oxide were deposited by a plasma CVD process for forming an insulator. After perforating contact holes in insulator positions corresponding to source areas and drain areas, aluminum layers are deposited and patterned thereon, thereby completed a thin film transistor (TFT).
  • TFT thin film transistor
  • This device acted with N-channel operation, showing the threshold voltage (Vth) of 1.2 V and the mobility of 496 cm2/V ⁇ sec.
  • Vth threshold voltage
  • the mobility 496 cm2/V ⁇ sec.
  • threshold values thereof were 1.2 V ⁇ 0.08V and the mobility were 496 ⁇ 56 cm2/V ⁇ sec.
  • shifting values were only 0.05V.
  • an oxidized silicon (SiO 2 ) film of 200 nm thickness is formed by plasma CVD method as the first control layer for heat conduction and crystallization. Then, a layer of amorphous silicon (a-Si:H) of 110 nm thickness is formed without exposing to the atmosphere.
  • the layer of amorphous silicon oxide was annealed and dehydrogenated. Then, oxygen ions were implanted into the intermediate region in the thickness direction in order to form an oxygen implanted area.
  • the implantation of oxygen ions was carried out with the accelerated voltage of 20 keV and the dose amount of 1.5E17/cm 2 . Under these conditions, the maximum oxygen density point of 3E22/cm 3 was positioned in the depth of about 50 nm corresponding to the projection range of oxygen ions.
  • the above conditions for formation of the implantation area were determined for the purpose of forming an insulating oxidized layer of about 30 nm thickness in the depth of about 60 nm (central depth) from the surface of the single-crystalline grains layer.
  • the pulsated excimer laser beam was used to irradiate the layer from the upper direction, whereby the amorphous silicon layer was crystallized and the oxygen implanted areas were converted to oxidized areas.
  • the irradiation by laser was carried out with the irradiation intensity distribution by using a phase shifting mask so that a total of 250,000 maximum intensity points and minimum intensity points were formed arranged within a square lattice formed at intervals of 10 ⁇ m in one unit of irradiated face of 5 mm ⁇ 5 mm.
  • melting threshold value (Eth) was about 0.8 J/cm 2
  • maximum value of energy intensity (Emax) was 2.3 J/cm 2
  • the minimum intensity value was 0.1 J/cm 2 .
  • the second single crystalline silicon layer 55 was formed as a gate electrode by patterning, and a source area and drain area were formed by implanting phosphorous ions using the gate electrode as a mask.
  • a silicon oxide layer was deposited as an insulator using a plasma CVD deposition method, and contact holes were formed in the insulator at the position above the source and drain areas.
  • the thin film transistor (TFT) is then completed by depositing aluminum and patterning it. This process results in a N channel device with a threshold voltage value (Vth) of 1.0V and an electron mobility of 475 cm 2 /V ⁇ sec.
  • oxidize layer is formed by implanting oxygen ion
  • the layer can be formed by further introducing other ions such as nitrogen ion. Accordingly, other embodiments are within the scope of the following claims.

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