TWI717690B - 用於半導體元件封裝製造製程的平坦化 - Google Patents

用於半導體元件封裝製造製程的平坦化 Download PDF

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Publication number
TWI717690B
TWI717690B TW108105230A TW108105230A TWI717690B TW I717690 B TWI717690 B TW I717690B TW 108105230 A TW108105230 A TW 108105230A TW 108105230 A TW108105230 A TW 108105230A TW I717690 B TWI717690 B TW I717690B
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Taiwan
Prior art keywords
liquid
substrate
planarization
adjacent features
area
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TW108105230A
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English (en)
Chinese (zh)
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TW201946162A (zh
Inventor
翰文 陳
史帝文 維哈佛貝可
羅門 寇克
圭日 曹
傅博詣
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美商應用材料股份有限公司
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Publication of TW201946162A publication Critical patent/TW201946162A/zh
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Publication of TWI717690B publication Critical patent/TWI717690B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Formation Of Insulating Films (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW108105230A 2018-03-15 2019-02-18 用於半導體元件封裝製造製程的平坦化 TWI717690B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201862643222P 2018-03-15 2018-03-15
US62/643,222 2018-03-15

Publications (2)

Publication Number Publication Date
TW201946162A TW201946162A (zh) 2019-12-01
TWI717690B true TWI717690B (zh) 2021-02-01

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ID=67908338

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108105230A TWI717690B (zh) 2018-03-15 2019-02-18 用於半導體元件封裝製造製程的平坦化

Country Status (6)

Country Link
EP (1) EP3766097A4 (fr)
JP (1) JP7258906B2 (fr)
KR (1) KR102521991B1 (fr)
CN (1) CN111868920A (fr)
TW (1) TWI717690B (fr)
WO (1) WO2019177742A1 (fr)

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US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
IT201900006740A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US20210305082A1 (en) * 2020-03-30 2021-09-30 Canon Kabushiki Kaisha Superstrate and method of making it
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11752519B2 (en) 2020-06-19 2023-09-12 Canon Kabushiki Kaisha Planarization method and photocurable composition
TWI751600B (zh) * 2020-07-03 2022-01-01 財團法人工業技術研究院 封裝結構
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging

Citations (2)

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US20060003600A1 (en) * 2004-06-30 2006-01-05 Barns Chris E Contact planarization for integrated circuit processing
JP2008114195A (ja) * 2006-11-08 2008-05-22 Tokyo Ohka Kogyo Co Ltd 平坦化塗布方法

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EP0951057B1 (fr) * 1996-11-11 2004-05-06 Catalysts & Chemicals Industries Co., Ltd. Procede d'aplanissement d'un substrat
JP3456462B2 (ja) * 2000-02-28 2003-10-14 日本電気株式会社 半導体装置及びその製造方法
US20070032083A1 (en) * 2005-08-05 2007-02-08 Hynix Semiconductor, Inc. Planarization method for manufacturing semiconductor device
FR2905198B1 (fr) * 2006-08-22 2008-10-17 3D Plus Sa Sa Procede de fabrication collective de modules electroniques 3d
WO2009050891A1 (fr) 2007-10-17 2009-04-23 Panasonic Corporation Structure de montage
JP4543089B2 (ja) 2008-01-11 2010-09-15 株式会社東芝 半導体装置
JP5543738B2 (ja) * 2009-08-05 2014-07-09 日東電工株式会社 電子部品封止用のシート状エポキシ樹脂組成物およびそれを用いた電子部品装置
US8062424B2 (en) * 2009-11-13 2011-11-22 Freescale Semiconductor, Inc. Method and apparatus for molding substrate
US20120064720A1 (en) * 2010-09-10 2012-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Planarization control for semiconductor devices
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US9349622B2 (en) * 2013-03-12 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for planarization of substrate coatings
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JP2008114195A (ja) * 2006-11-08 2008-05-22 Tokyo Ohka Kogyo Co Ltd 平坦化塗布方法

Also Published As

Publication number Publication date
JP2021517360A (ja) 2021-07-15
JP7258906B2 (ja) 2023-04-17
TW201946162A (zh) 2019-12-01
EP3766097A4 (fr) 2022-04-13
WO2019177742A1 (fr) 2019-09-19
KR102521991B1 (ko) 2023-04-13
EP3766097A1 (fr) 2021-01-20
CN111868920A (zh) 2020-10-30
KR20200120766A (ko) 2020-10-21

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