TWI715154B - 扇出型半導體封裝結構及其封裝方法 - Google Patents

扇出型半導體封裝結構及其封裝方法 Download PDF

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TWI715154B
TWI715154B TW108129135A TW108129135A TWI715154B TW I715154 B TWI715154 B TW I715154B TW 108129135 A TW108129135 A TW 108129135A TW 108129135 A TW108129135 A TW 108129135A TW I715154 B TWI715154 B TW I715154B
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fan
chip
out semiconductor
photosensitive
redistribution layer
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張簡上煜
徐宏欣
林南君
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力成科技股份有限公司
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Abstract

本發明係一種扇出型半導體封裝結構及其封裝方法，其中封裝方法係主要使用感光封膠材將該些晶片及該些被動元件包覆於其中，並以黃光微影製程即可讓該晶片的金屬接墊與被動元件的金屬端子自感光封膠體中外露出來，直接與接下來成形之重佈線層電性連接；因此，本發明扇出型半導體封裝方法可讓該被動元件可與該晶片位在該重佈線層的同一表面，並一同包覆於該感光封膠體內，而其中的晶片不必經過晶圓凸塊製程，被動元件也不必選擇薄型被動元件；是以，本發明扇出型半導體封裝方法以減少整體封裝結構的高度，也相對減少製程成本。

Description

扇出型半導體封裝結構及其封裝方法
本發明係關於一種扇出型半導體封裝結構及其封裝方法，尤指一種整合晶片及被動元件的扇出型半導體封裝結構及其封裝方法。
目前扇出型半導體封裝製程用的晶片可先經過晶圓凸塊製程或不經晶圓凸塊製程後才進行封裝。在此以不經晶圓凸塊製程的扇出型半導體封裝結構來說明，若此一扇出型半導體封裝結構要進一步整合被動元件，較常見的封裝方法會將該晶片與被動元件會分別設置在一重佈線層的二相對表面上；換言之，該被動元件會設置在與該重佈線層之錫球同一表面，但不會與晶片在該重佈線層的相同表面上；也因此該扇出型半導體封裝結構之封膠體無法一同包覆晶片及被動元件。
再者，當該扇出型半導體封裝結構銲接至電路板時，為避免該被動元件與電路板產生干涉，必須再將錫球高度加高，造成扇出型半導體封裝結構高度增加，也相對提高製造成本，故而有必要進一步改良之。
有鑑於上述目前扇出型半導體封裝結構整合被動元件的技術缺陷，本發明主要目的係提供另一種扇出型半導體封裝結構及其封裝方法。
欲達上述目的所使用的主要技術手段係令該扇出型半導體封裝結構包含： 一重佈線層，係包含有二相對的一第一表面及一第二表面，該第一表面上包含有多個第一內接墊及多個第二內接墊，該第二表面上則包含有多個外連接件； 一晶片，係包含有二相對的一主動面及一背面，該主動面上包含有多個金屬接墊，該些金屬接墊係直接與該重佈線層的對應第一內接墊電性連接； 一被動元件，係包含有二相對的一第三表面及一第四表面，該第三表面上包含有其多個金屬端子，該些金屬端子係電性連接該重佈線層的對應第二內接墊；以及 一感光封膠體，係形成於該重佈線層之第一表面上，並包覆該晶片及該被動元件於其中。
由上述說明可知，本發明扇出型半導體封裝結構係主要使用感光封膠體包覆該晶片及被動元件，配合使用黃光微影製程將該晶片的金屬接墊與被動元件的金屬端子自感光封膠體中外露出來，以直接與該重佈線層電性連接；因此，該被動元件可與該晶片位在該重佈線層的同一表面，並一同包覆於該感光封膠體內，而本發明的晶片不必經過晶圓凸塊製程，也不必使用成本較高的薄型被動元件；是以，本發明扇出型半導體封裝結構不但可減少整體封裝結構的高度，更相對減少製程成本。
欲達上述目的所使用的主要技術手段係令該扇出型半導體封裝方法包含以下步驟： (a) 提供一載板； (b) 將多個晶片及多個被動元件黏著於該載板上；其中各該晶片的一背面係黏著於該載板上，其一主動面係遠離該載板，各該被動元件之一第一表面係黏著於該載板上，其相對該第一表面之一第二表面係遠離該載板； (c) 將一感光封膠材覆蓋於該載板上的該些晶片及該些被動元件； (d) 以黃光微影製程在該感光封膠材的第一側上形成多個第一開孔及多個第二開孔；其中各該第一開孔係對應該晶片之主動面的其中一金屬接墊，而各該第二開孔係對應該被動元件之第二表面的其中一金屬端子； (e) 以重佈線層製程於該感光封膠材上形成一重佈線層； (f) 移除該載板； (g) 於該重佈線層上形成多個外連接件；以及 (h) 進行切割步驟，以形成多個獨立的扇出型半導體封裝結構，且各該扇出型半導體封裝結構包含有至少一晶片及至少一被動元件。
由上述說明可知，本發明的扇出型半導體封裝方法係主要使用感光封膠材將該些晶片及該些被動元件包覆於其中，並配合黃光微影製程即可讓該晶片的金屬接墊與被動元件的金屬端子自感光封膠體中外露出來，直接與接下來成形之重佈線層電性連接；因此，本發明扇出型半導體封裝方法可讓該被動元件可與該晶片位在該重佈線層的同一表面，並一同包覆於該感光封膠體內，而其中的晶片不必經過晶圓凸塊製程，被動元件也不必選擇薄型被動元件；是以，本發明扇出型半導體封裝方法可減少整體封裝結構的高度，也相對減少製程成本。
本發明主要針對未經過晶圓凸塊製程之扇出型半導體封裝結構及其封裝方法提出改良，以下配合多個實施例及圖式詳細說明本發明技術。
首先請參閱圖1A所示，係為本發明扇出型半導體封裝結構的剖圖面，其包含有一重佈線層10、至少一晶片20、至少一被動元件30及一感光封膠體40；其中於本實施例，該扇出型半導體封裝結構係包含一晶片20及一被動元件30，此僅為例示而非以此為限。
上述重佈線層10係包含有一介電絕緣本體11、多條內連接線12、多個第一內接墊13、多個第二內接墊14及多個外連接件15；其中該介電絕緣本體11係包含有二相對的一第一表面111及一第二表面112，該第一表面111上形成有該些第一內接墊13及該些第二內接墊14，而該第二表面112則形成有該些外連接件15；又該些第一內接墊13、該些第二內接墊14及該些外連接件15均與位在該介電絕緣本體11內之該些內連接線12對應電性連接。於本實施例，該介電絕緣本體11可為PI、PBO、BCB等介電絕緣材，但也可採與該感光封膠體40相同的膠材，如此提高該重佈線層10與該感光膠體40的材料相容性，即其間存在最小的材料本質差異，也不因熱膨脹係數不匹配而產生翹曲問題。於本實施例，該外連接件15為錫球。
上述晶片20係包含有二相對的一主動面21及一背面23，該主動面21上包含有多個金屬接墊22；其中該主動面21係朝向該重佈線層10之第一表面111，且該些金屬接墊22係直接與該重佈線層10的對應第一內接墊13電性連接，而該背面23則遠離該重佈線層10。
上述被動元件30係包含有二相對的一第三表面31及一第四表面32；其中該第三表面31上包含有其多個金屬端子33，並朝向該重佈線層10的第一表面111，該些金屬端子33係電性連接該重佈線層10的對應第二內接墊14，而該第四表面32則遠離該重佈線層10；於本實施例中，該被動元件30的金屬端子33可選用高於錫熔點的金屬，例如銅或其他類似金屬。
上述感光封膠40係形成於該重佈線層10之第一表面111上，並包覆該晶片20及該被動元件30於其中。該感光封膠體40的第一側41對應該晶片20之各該金屬接墊22形成有一第一開孔411，而對應該被動元件30的各該金屬端子33則形成有一第二開孔412；其中各該第一開孔411及各該第二開孔412係於同一黃光微影製程步驟中成形，且第一開孔411及第二開孔412的孔徑、深度可相同或不相同；於本實施例，該晶片20的背面23係與該被動元件30的第四表面32係外露於該感光封膠體40的第二側42，並與該感光封膠體40的第二側42共平面，該晶片20的主動面21與該被動元件30的第三表面31之間有一高度差，即該晶片20的主動面21係高於該被動元件30的第三表面31，故而該感光封膠體40的各該第一開孔411較各該第二開孔412淺。又於本實施例中，該感光封膠體40係為一種包含矽基底材之感光封膠材，例如矽氧烷聚合物（SINR)。
再請參閱圖1B所示，係為本發明扇出型半導體封裝結構的第二實施例，其大多結構與圖1A所示的扇出型半導體封裝結構相同，惟進一步於外露的的該晶片20的背面23、該被動元件30的第四表面32與該感光封膠體40的第二側42形成一保護層50；較佳地該保護層可為黑色，作為成品的打印用；又該保護層50也可以為一高導熱係數的散熱膠層，以提高成品的散熱效果。
由以上說明可知，如圖1A所示，本發明扇出型半導體封裝結構中的晶片20與被動元件30均位在該重佈線層10的同一表面，加上使用感光封膠體40包覆該晶片20及被動元件30，故其第一側41可直接以黃光微影製程將該晶片20的金屬接墊22與被動元件30的金屬端子33自感光封膠體40中外露出來，以直接與該重佈線層10電性連接。
以下進一步說明本發明扇出型半導體封裝方法，如圖2至圖9所示，係包含有以下數道步驟。
首先請參閱圖2所示，先準備一載板60，該載板60上形成有一黏膠層61，也可進一步形成有一樹脂層；於本實施例，該載板60可為玻璃陶瓷金屬或玻璃纖維板，但不以此為限。
請參閱圖3所示，將多個晶片20及被動元件30透過黏膠層61黏著在該載板60上；其中各該晶片20的背面23及各該被動元件30的第四表面32係朝向並黏著在載板60上，故各該晶片20的背面23及各該被動元件30的第四表面32係共平面，而各該晶片20的主動面21及各該被動元件30的第三表面31均遠離該載板60；於本實施例，各該晶片20未經晶圓凸塊製程，故其各該金屬接墊22上未形成有凸塊。於本實施例，各該被動元件30之厚度較各該晶片薄，故該晶片20的主動面21高於該被動元件30之第三表面31，此僅為一例示，非以此為限，即該被動元件與晶片厚度可相同，或被動元件厚度略厚於晶片厚度。於本實施例中，該被動元件30的金屬端子33可選用高於錫熔點的金屬，例如銅或其他類似金屬。
請參閱圖4所示，將一感光封膠材40a覆蓋於該載板60上，以包覆該些晶片20及該些被動元件30於其中，此時該感光封膠材40a的第一側41係對應各該晶片20的主動面21及各該被動元件30的第三表面31。其中，該感光封膠材40a可為液態膠，塗佈於該載板60上，固化後即包覆該些晶片20及該些被動元件30。又該感光封膠材40a可為固態膠膜，以壓合方式包覆該些晶片20及該些被動元件30。於本實施例中，該感光封膠體40係為一種包含矽基底材之感光封膠材，例如矽氧烷聚合物（SINR)。
請參閱圖5所示，以黃光微影製程在該感光封膠材40a的第一側41形成多個第一開孔411及多個第二開孔412；其中該些第一開孔411係分別對應該些晶片20之主動面21的金屬接墊22，而該些第二開孔412係分別對應該被動元件30之第三表面31的金屬端子33；於本實施例中，由於各該金屬接墊22的尺寸小於各該金屬端子33，故該第一開孔411的孔徑小於第二開口孔徑412。於本實施例中，由於該主動面21高於該第三表面31，故該第一開孔411的深度會較該第二開孔412的深度淺；反之，若使用被動元件厚度與晶片厚度實質相同，則第一開口及第二開口的深度也實質相同，又若使用被動元件厚度較晶片厚度厚，則第一開口的深度會較第二開口的深度深，端視各項產品應用選擇。
請配合參閱圖6所示，以重佈線層製程於該感光封膠材40a的第一側41上形成一重佈線層10，由於該感光封膠材40a的第一側41已形成有第一及第二開孔411、412，故各該晶片20的金屬接墊22與各該被動元件30的金屬端子33已外露，可與該重佈線層10直接電性連接；依據封裝結構的需求決定重佈線層10的介電絕緣層11層數及內連接線的層數，本發明不予限制。於本實施例，該介電絕緣本體11可為PI、PBO、BCB等介電絕緣材，但也可採與該感光封膠體40相同的膠材，如此提高該重佈線層10與該感光膠體40的材料相容性，即其間存在最小的材料本質差異，也不因熱膨脹係數不匹配而產生翹曲問題。
請參閱圖7所示，移除該載板60，使共平面之各該晶片20的背面23、各該被動元件30的第四表面32與該感光封膠材40a的第二側42外露；於本實施例中，如圖8所示，可進一步於外露的各該晶片20的背面23、各該被動元件30的第四表面32與該感光封膠材40a的第二側42形成一保護層50，較佳地該保護層50為黑色，作為成品的打印用，又該保護層可以為高導熱係數的散熱膠層，以提高成品的散熱效果。
請參閱圖9所示，於該重佈線層10之外表面上形成有外連接件15；於本實施例，該外連接件15為錫球。
再請參閱圖9所示，進行切割步驟，以形成多個獨立的扇出型半導體封裝結構，且各該扇出型半導體封裝結構包含有至少一晶片20及至少一被動元件30。
綜上所述，本發明本發明的扇出型半導體封裝方法係主要使用感光封膠材將該些晶片及該些被動元件包覆於其中，配合黃光微影製程即可讓該晶片的金屬接墊與被動元件的金屬端子自感光封膠體中外露出來，直接與接下來成形之重佈線層電性連接；因此，本發明扇出型半導體封裝方法可讓該被動元件可與該晶片位在該重佈線層的同一表面，並一同包覆於該感光封膠體內，而其中的晶片不必經過晶圓凸塊製程，被動元件也不必選擇薄型被動元件；是以，本發明扇出型半導體封裝方法以減少整體封裝結構的高度，也相對減少製程成本。
以上所述僅是本發明的實施例而已，並非對本發明做任何形式上的限制，雖然本發明已以實施例揭露如上，然而並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明技術方案的範圍內，當可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例，但凡是未脫離本發明技術方案的內容，依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾，均仍屬於本發明技術方案的範圍內。
10:重佈線層
11:介電絕緣本體
111:第一表面
112:第二表面
12:內連接線
13:第一內接墊
14:第二內接墊
15:外連接件
20:晶片
21:主動面
22:金屬接墊
23:背面
30:被動元件
31:第三表面
32:第四表面
33:金屬端子
40:感光封膠體
40a:感光封膠材
41:第一側
411:第一開孔
412:第二開孔
42:第二側
50:保護層
60:載板
61:黏膠層
圖1A：本發明扇出型半導體封裝結構的第一實施例的剖面圖。 圖1B：本發明扇出型半導體封裝結構的第二實施例的剖面圖。 圖2至圖9：本發明扇出型半導體封裝方法之不同步驟的剖面圖。
10:重佈線層
11:介電絕緣本體
111:第一表面
112:第二表面
12:內連接線
13:第一內接墊
14:第二內接墊
15:外連接件
20:晶片
21:主動面
22:金屬接墊
23:背面
30:被動元件
31:第三表面
32:第四表面
33:金屬端子
40:感光封膠體
41:第一側
411:第一開孔
412:第二開孔
42:第二側

Claims (10)

  1. 一種扇出型半導體封裝結構，包括：一重佈線層，係包含有二相對的一第一表面及一第二表面，該第一表面上包含有多個第一內接墊及多個第二內接墊，該第二表面上則包含有多個外連接件；一晶片，係包含有二相對的一主動面及一背面，該主動面上包含有多個金屬接墊，該些金屬接墊係直接與該重佈線層的對應第一內接墊電性連接；一被動元件，係包含有二相對的一第三表面及一第四表面，該第三表面上包含有其多個金屬端子，該些金屬端子係電性連接該重佈線層的對應第二內接墊；以及一感光封膠體，係形成於該重佈線層之第一表面上，並包覆該晶片及該被動元件於其中；其中該晶片的背面、該被動元件的第四表面及該感光封膠體的第二側係共平面。
  2. 如請求項1所述之扇出型半導體封裝結構，其中：該感光封膠體相對該第二側的第一側係對應該晶片之各該金屬接墊形成有一第一開孔，而對應該被動元件的各該金屬端形成有一第二開孔；其中各該第一開孔及各該第二開孔係於同一黃光微影製程步驟中成形。
  3. 如請求項2所述之扇出型半導體封裝結構，其中該晶片的主動面與該被動元件的第三表面之間有一高度差，該感光封膠體的各該第一開孔的深度與各該第二開孔深度不同。
  4. 如請求項1至3中任一項所述之扇出型半導體封裝結構，其中共平面之該晶片的背面、該被動元件的第四表面與該感光封膠體的第二側係進一步形成一保護層或一高導熱係數的散熱膠層。
  5. 如請求項4所述之扇出型半導體封裝結構，其中：該被動元件之金屬端子係為銅材質；該感光封膠體係為一種包含矽基底材之感光封膠材；以及各該外連接件為一錫球。
  6. 如請求項5所述之扇出型半導體封裝結構，其中該重佈線層的一介電絕緣本體係與感光膠體為相同材質。
  7. 一種扇出型半導體封裝方法，包括：(a)提供一載板；(b)將多個晶片及多個被動元件黏著於該載板上；其中各該晶片的一背面係黏著於該載板上，其一主動面係遠離該載板，各該被動元件之一第一表面係黏著於該載板上，其相對該第一表面之一第二表面係遠離該載板；(c)將一感光封膠材覆蓋於該載板上的該些晶片及該些被動元件；(d)以黃光微影製程在該感光封膠材的第一側上形成多個第一開孔及多個第二開孔；其中各該第一開孔係對應該晶片之主動面的其中一金屬接墊，而各該第二開孔係對應該被動元件之第二表面的其中一金屬端子；(e)以重佈線層製程於該感光封膠材上形成一重佈線層；(f)移除該載板；(g)於該重佈線層上形成多個外連接件；以及(h)進行切割步驟，以形成多個獨立的扇出型半導體封裝結構，且各該扇出型半導體封裝結構包含有至少一晶片及至少一被動元件。
  8. 如請求項7所述之扇出型半導體封裝方法，其中步驟(f)於移除載板後，各該晶片的背面、各該被動元件的第二表面及該感光封膠材的第二側係共平面，再進一步於外露的各該晶片的背面、各該被動元件的第二表面及該感光封膠材的第二側上係進一步形成一保護層或一高導熱係數的散熱膠層。
  9. 如請求項7或8所述之扇出型半導體封裝方法，其中：於步驟(b)中的各該被動元件之金屬端子係為銅材質；於步驟(c)中的該感光封膠材係為一種包含矽基底材之感光封膠材；以及於步驟(g)中的各該外連接件係為一錫球。
  10. 如請求項9所述之扇出型半導體封裝方法，其中於步驟(e)的重佈線層製程中，使用與該感光封膠材相同材質形成該重佈線層之一介電絕緣本體。
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