TWI700834B - 用於p-通道溝槽mosfet的源極鎮流 - Google Patents

用於p-通道溝槽mosfet的源極鎮流 Download PDF

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TWI700834B
TWI700834B TW108102869A TW108102869A TWI700834B TW I700834 B TWI700834 B TW I700834B TW 108102869 A TW108102869 A TW 108102869A TW 108102869 A TW108102869 A TW 108102869A TW I700834 B TWI700834 B TW I700834B
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trench
conductivity type
source region
contact
doped source
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TW201935697A (zh
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燮光 雷
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澳門商萬民半導體 (澳門) 有限公司
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Abstract

一種溝槽金屬-氧化物-半導體場效應電晶體（MOSFET）元件，包括一個第一導電類型的基板、一個第二導電類型的本體區、一個形成在閘極溝槽中的閘極電極，在本體區和基板中延伸，形成在本體區中的一個輕摻雜源極區和一個重摻雜源極區，以及一個溝槽接頭，延伸到形成在接觸溝槽中的本體區。製備一個第二導電類型的接觸注入物，包圍著接觸溝槽的底部以及接觸溝槽的側壁部分，在接觸溝槽的側壁部分，它與輕摻雜源極區相接觸，形成一個PN二極體。

Description

用於P-通道溝槽MOSFET的源極鎮流
本發明主要涉及金屬-氧化物-半導體場效應電晶體（MOSFET），更確切地說是一種帶有源極鎮流電阻器的改良型溝槽MOSFET結構及其製備方法。
微處理器和元件記憶裝置等積體電路含有多個金屬-氧化物-半導體場效應電晶體（MOSFET），提供基本的開關功能，以配置邏輯閘、數據儲存、電源開關等類似原件。爲了處理慢速開關應用中的大電流，當圖1A所示的MOSFET並聯時，MOSFET之間的參數失配（例如導通電阻、閾值電壓、通道長度）導致動態電流失衡，從而引起電流混亂。當絕大部分的電流流經多個並聯MOSFET中的其中一個時，由於較低的閾值電壓或通道長度，就會發生電流混亂。由於特定的MOSFET會消耗元件絕大部分的功率，從而限制了熱點的發生。高溫會進一步降低MOSFET的閾值電壓，消耗更多的功率。最終，會導致熱失控。
衆所周知，源極鎮流可以提供負回饋，以對抗電流擾亂。因此，爲了避免電流擾亂，通常增加一個源極鎮流電阻器與每個MOSFET串聯，如圖1B所示，以平衡並聯MOSFET上的負載電流分布。正是在這樣的背景下，提出了本發明的實施例。
本發明公開了一種溝槽金屬-氧化物-半導體場效應電晶體（MOSFET）元件，包括：a）一個第一導電類型的基板，基板包括第一導電類型的半導體外延層位於相同導電類型的重摻雜半導體晶圓上方；b）一個第二導電類型的本體區，第二導電類型與第一導電類型相反，本體區形成在基板上方；c）一個閘極溝槽，形成在本體區和基板中，其中閘極溝槽內襯電介質層，閘極電極形成在閘極溝槽中；d）一個輕摻雜源極區和一個重摻雜源極區，形成在本體區中，其中輕摻雜源極區延伸到本體區中比重摻雜源極區更深的地方；以及e）一個溝槽接頭，形成在接觸溝槽中，在本體區中延伸，其中第二導電類型的接觸注入物形成在接觸溝槽底部和接觸溝槽的側壁與輕摻雜源極區相接觸的部分。
其中第一導電類型爲p-型導電類型，第二導電類型爲n-型導電類型。
其中鎮流電阻器形成在重摻雜源極區和本體區之間的輕摻雜源極區處。
其中PN二極體形成在接觸注入物和輕摻雜源極區之間的交接處。
其中接觸溝槽位於兩個相鄰的閘極溝槽之間。
其中溝槽接頭在接觸溝槽的側壁連接到本體區以及重摻雜源極區。
其中接觸溝槽的寬度在0.2微米至1.5微米範圍內。
其中，還包括一個表面接頭，形成在重摻雜源極區上方的表面接觸開口中。
其中接觸溝槽的長度在0.5微米至5.0微米範圍內，其中表面接觸開口的寬度在0.2微米至1.5微米範圍內。
本發明還一種溝槽MOSFET元件的製備方法，該方法包括：a）在基板中製備一個本體區，其中基板包括一個第一導電類型的外延半導體層，在相同導電類型的重摻雜半導體晶圓上方，其中本體區是第二導電類型，第二導電類型與第一導電類型相反；b）在閘極溝槽中製備一個閘極電極，其中閘極溝槽形成在本體區和基板中，並且內襯一個電介質層；c）在本體區中製備一個輕摻雜的源極區和一個重摻雜的源極區，其中輕摻雜的源極區延伸到比重摻雜的源極區更深的本體區中；d）在接觸溝槽中製備一個溝槽接頭，延伸到本體區，並且製備一個第二導電類型的接觸注入物，包圍著接觸溝槽的底部以及接觸溝槽接觸輕摻雜源極區的側壁部分。
其中第一導電類型爲p-型導電類型，第二導電類型爲n-型導電類型。
其中由源極注入物形成的輕摻雜源極區和重摻雜源極區包括一個深源極注入物和一個淺源極注入物，其中用於深源極注入物和淺源極注入物的摻雜離子的導電類型，與基板的導電類型相同。
其中接觸注入物是利用很大的傾斜角4面旋轉注入而形成的。
其中所形成的接觸溝槽延伸到兩個相鄰的閘極溝槽之間的本體區，並且其中溝槽接頭在接觸溝槽的側壁接觸到本體區以及重摻雜源極區。
其中，還包括利用第一遮罩製備一個表面接頭，在重摻雜源極區上方的表面接觸開口中，其中表面接頭接觸重摻雜源極區。
在以下說明中，參照附圖，該附圖形成了本發明的一部分，並且在其中表示出了可以實施本發明的圖示特定實施例的方式。爲方便起見，在特定的導電或淨雜質載子類型（p或n）之後使用+或-，通常指的是半導體材料中指定類型的淨雜質載子的相對濃度。一般而言，n+材料具有比n材料更高的n型淨摻雜物（例如，電子）濃度，並且n材料具有比n材料更高的載子濃度。與之類似，p+材料具有比p材料更高的p型淨摻雜物（例如電洞）濃度，並且p材料具有比p材料更高的濃度。要注意的是，相關的是載子的淨濃度，而不一定是摻雜物。例如，材料可以重摻雜n-型摻雜物，但是如果材料也充分反向摻雜p-型摻雜物，那麽仍然具有相對低的淨載子濃度。此處所用的摻雜物濃度小於1016 /cm3 可以認爲是「輕摻雜」，摻雜物濃度大於1017 /cm3 可以認爲是「重摻雜」。
在以下詳細說明中，閘極溝槽的深度方向是指y方向，因此閘極溝槽的深度方向的平面是x-y平面；並且元件的通道寬度方向是指z方向，因此通道寬度方向的平面是指y-z平面。
引言
Worley提出的美國專利號6,927,458的專利中，提出了鎮流電阻器與MOSFET串聯的設計，特此引用其全文以作參考，說明利用鎮流結構用於CMOS設計中的源極和汲極區。Hsieh提出的美國專利號7,816,720和Hebert等人提出的美國專利號8,703,563特此引用其全文以作參考，都提到了利用源極鎮流電阻器控制電路的增益，當溝槽MOSFET並聯時，能給出更好的一致性。由於這些設計具有源極鎮流電阻器與重摻雜的源極區水平串聯在MOSFET中，因此這些設計中的源極鎮流電阻器會占據很大的面積。另外，當需要改變電阻時，必須有一種新的布局/設計。
2017年4月26日申請的Lui等人提出的美國專利申請號15/498,289，提出了一種帶有接觸源極鎮流結構的溝槽MOSFET元件的改良結構，特此引用其全文以作參考。圖2再製的是美國專利申請號15/498,289中的圖2A。確切地說，溝槽MOSFET元件200包括一個輕摻雜的源極區240，構成鎮流結構，在重摻雜的源極區250和本體區230之間。通過改變重摻雜源極區的深度以及改變輕摻雜源極區的摻雜濃度，可以輕鬆調節溝槽MOSFET 200中的鎮流電阻。電阻器寬度也可以通過改變接觸寬度來調節，例如從上面看接觸溝槽的寬度。當溝槽MOSFET元件200是一個n-通道元件時，肖特基二極體形成在輕摻雜源極區240和源極接頭272之間的接頭處。由於肖特基接頭形成在輕摻雜源極區和源極本體短路之間，所以通道電子電流流經輕摻雜源極區，在流至源極接頭272之前，流至重摻雜源極區，平行於溝槽的方向。
然而，當溝槽MOSFET元件200是一個p-通道元件時，沒有肖特基二極體形成在輕摻雜源極區240和短路本體源極的源極接頭272之間的接頭處。與之相反，輕摻雜源極區240構成一個到源極接頭272的歐姆接觸。因此，通道電洞電流水平流至輕摻雜源極區240中的源極接頭272，使得鎮流效果不穩定。這個問題可以透過在z方向上（也就是元件的通道寬度方向上）製備一個表面本體接頭290來解决，如圖3所示。然而，這會減小元件的通道寬度，從而影響元件的尺寸。
本發明的各個方面提出了一種帶有源極鎮流結構的溝槽MOSFET元件的改良結構。確切地說，依據本發明的各個方面，該溝槽MOSFET元件包括一個第一導電類型的輕摻雜的源極區，在第一導電類型的重摻雜源極區和第二導電類型的本體區之間構成一個鎮流結構。該元件還包括一個到本體區的側壁溝槽接頭，以及一個形成在溝槽接頭側壁上的PN二極體，在溝槽接頭側壁上，與輕摻雜的源極區相接觸。
在本發明的一個方面中，溝槽MOSFET元件具有一個到本體區的側壁溝槽接頭，以及一個在x-y平面內的重摻雜源極區。在本發明的另一方面中，溝槽MOSFET元件具有一個到重摻雜源極區的表面接頭，在x-y平面內，以及一個到本體區的側壁溝槽接頭，在z方向上（即y-z平面內），也就是與閘極溝槽的深度方向正交。與圖3所示的源極-鎮流元件不同，依據本發明的各個方面，所提出的元件具有通道寬度的最小損耗，從而對元件的尺寸產生最小的影響。
在以下示例中，MOSFET元件是指一個p-通道溝槽MOSFET元件，其中元件晶胞的源極區和汲極區都具有p型導電類型，本體區具有n型導電類型。要注意的是，這些導電類型可以互換，以獲得一種n-通道溝槽MOSFET。
實施例 1
圖4表示依據本發明的各個方面，一部分溝槽MOSFET元件的剖面示意圖。如同所示的其他附圖一樣，元件的相對維度和尺寸不會影響實際的維度，僅用於解釋說明。
溝槽MOSFET元件400從基板410開始。基板410包括一個第一導電類型的外延層，在相同導電類型的重摻雜的矽晶圓上方。作爲示例，但不作爲局限，外延層和矽晶圓可以用任意合適的p-型摻雜物（離子或原子）摻雜。與用於外延層的摻雜相比，矽晶圓可以是重摻雜的。基板410用作溝槽MOSFET元件400的汲極。
第二導電類型的本體區430形成在基板410上方。第二導電類型與第一導電類型相反。對於p-通道元件類似，第一導電類型爲p-型，第二導電類型爲n-型。本體區430可以用任意合適的n-型摻雜物摻雜，例如磷或砷。
閘極溝槽420形成在本體區430中，並且延伸到基板410的頂部。閘極溝槽內襯電介質材料422，例如氧化矽。閘極電極424形成在閘極溝槽420中，並通過電介質材料與本體區430和基板410絕緣，電介質材料422內襯閘極溝槽420。作爲示例，但不作爲局限，閘極電極424可以由多晶矽或其他任意導電材料製成。
輕摻雜的源極區440形成在本體區430的頂部，如圖4所示。源極區440可以輕摻雜與基板410相同導電類型的摻雜物。作爲示例，但不作爲局限，輕摻雜源極區440的摻雜濃度可以從5×1015 /cm3 至1×1018 /cm3 範圍內變化。
重摻雜源極區450形成在輕摻雜的源極區440上方。源極區450可以重摻雜與基板410相同導電類型的摻雜物。作爲示例，但不作爲局限，對於p型基板410來說，這些源極區450可以用p+型摻雜。作爲示例，但不作爲局限，重摻雜源極區450的摻雜濃度可以從8×1019 /cm3 至1×1020 /cm3 範圍內變化。在圖4所示的配置中，重摻雜源極區450擴展到閘極溝槽420和接觸溝槽470之間的區域寬度上。
電介質層460形成在重摻雜源極區450上方。具有源極接頭472的接觸溝槽470位於兩個相鄰的閘極溝槽420之間。源極金屬墊480位於電介質層460和源極接頭472上方。源極接頭472將源極金屬墊480連接到本體區430。源極金屬墊480和源極接頭472用作源極墊，提供到溝槽MOSFET元件400的源極區450的外部接頭。
第二導電類型的重摻雜源極注入物445，形成在接觸溝槽470及其側壁的底部，在側壁上，它與輕摻雜源極區440相接觸。作爲示例，但不作爲局限，重摻雜的接觸注入物可以通過反向摻雜輕摻雜源極區440構成。源極注入物445可以用任意合適的n-型摻雜物摻雜，例如磷或砷。作爲示例，但不作爲局限，重摻雜接觸注入物445的摻雜濃度從5×1018 /cm3 至5×1019 /cm3 範圍內變化，這對於反向摻雜重摻雜的源極區450來說並不足够。因此，在接觸構成470的側壁上形成一個PN二極體，在側壁上，它與輕摻雜的源極區440相接觸。隨著PN二極體形成在輕摻雜源極區440和接觸注入物445之間的交界面處，通道電洞電流被阻止水平流入輕摻雜源極區440中的源極接頭472。換言之，通道電洞電流流經輕摻雜源極區440，在流至源極接頭472之前，流至重摻雜源極區450，平行於溝槽方向。
如圖4所示，溝槽MOSFET元件400具有一個側壁溝槽，接觸到本體區430上，以及 一個側壁溝槽，在x-y平面內接觸到重摻雜源極區450上。依據上述結構，鎮流結構形成在重摻雜的源極區450和本體區430之間的輕摻雜源極區440上。另外，PN二極體形成在輕摻雜源極區440和源極接頭472之間的接頭處，一個歐姆接頭形成在重摻雜源極區450和源極接頭472之間的接頭處。隨著PN二極體形成在輕摻雜源極區440和接觸注入物445之間的交界面處，通道電洞電流被阻止水平流至輕摻雜源極區440中的源極接頭472。換言之，通道電洞電流流經輕摻雜源極區440，在流至源極接頭472之前，流至重摻雜源極區450，平行於溝槽的方向。依據本發明的各個方面，可以輕鬆調節溝槽MOSFET中的鎮流電阻。確切地說，電阻器長度可以通過重摻雜源極區的深度來調節。電阻器寬度可以通過改變接頭寬度來調節。另外，電阻可以通過改變輕摻雜源極區的摻雜濃度來調節。
當元件具有較小的間距時，相鄰的閘極溝槽420和接觸溝槽470之間的距離可以忽略。利用接觸注入物445，通道和接觸注入物之間的距離變得非常窄，從而影響元件的閾值電壓。本發明的另一方面如圖5A和5B所示，提供了一個溝槽MOSFET元件，具有到重摻雜源極區的表面接頭，在x-y平面內，到本體區的側壁溝槽接頭在z方向上（即圖5A中切線A-A’所示的y-z平面），也就是說與閘極溝槽的深度方向正交。
實施例 2
圖5A表示依據本發明的各個方面，一種溝槽MOSFET元件的三維圖。圖5B表示圖5A所示的一部分溝槽MOSFET元件的剖面示意圖，包括x-y平面內的剖面圖，以及沿圖5A的A-A’線在y-z平面內的剖面圖。圖5A或5B所示的溝槽MOSFET元件在x-y平面內具有一個到重摻雜源極區550的表面接頭，以及一個在y-z平面內到本體區530的側壁溝槽接頭。通道寬度方向與閘極溝槽的深度方向正交。
確切地說，一個第二導電類型的重摻雜接觸注入物545形成在本體接觸溝槽570b的底部，在其側壁上與y-z平面內第一導電類型的輕摻雜源極區540相接觸。作爲示例，但不作爲局限，重摻雜接觸注入物可以通過反向摻雜輕摻雜源極區540構成。接觸注入物545可以用任意合適的n-型摻雜物類型摻雜，例如磷或砷。作爲示例，但不作爲局限，重摻雜接觸注入物545的摻雜濃度在5×1018 /cm3 至1×1019 /cm3 範圍內變化，這對於反向摻雜重摻雜源極區550並不足夠。另外，源極接觸開口570a形成在重摻雜源極區550上方，穿過電介質層560，並用導電材料填充，以便形成從上方的金屬層580到x-y平面內的重摻雜源極區550的表面接頭。也就是說，每個重摻雜源極區550和輕摻雜源極區540都在兩個相鄰的閘極溝槽520之間的區域寬度上延伸。除了源極接觸開口570a、本體接觸溝槽570b和形成在y-z平面內的接觸注入物545之外，圖5A和5B所示的MOSFET元件具有基板510，包括一個第一導電類型的外延層在相同導電類型的重摻雜矽晶圓上方、一個第二導電類型的本體區530形成在基板510上方、一個在閘極溝槽520中的閘極電極524形成在本體區530中、一個第一導電類型的輕摻雜源極區540形成在本體區530頂部以及一個第一導電類型的重摻雜源極區540形成在輕摻雜源極區540上方。由於圖5A和5B所示的MOSFET元件500的結構與圖4所示的MOSFET元件400的結構類似，因此，爲了簡便，這兩種結構的共同特點在此不再贅述。
實施例 1 的製備工藝
圖6A-6H表示用於製備圖4所示的溝槽MOSFET 400的製備工藝剖面圖，溝槽MOSFET元件400具有一個到本體區430的溝槽接頭，以及一個到x-y平面內重摻雜源極區450的側壁接頭。
圖6A表示進行本體擴散工藝之後元件的剖面圖。確切地說，該工藝使用第一導電類型的半導體基板610作爲起始材料。對於p-通道元件來說，基板610包括一個p-型外延層在重摻雜的p型（p+）矽晶圓上方。在基板610上使用遮罩（圖中沒有表示出），包括限定閘極溝槽多個位置的開口，用於MOSFET元件400的溝槽電晶體。進行刻蝕工藝，刻蝕掉相應的下方基板610的那部分，以製備多個閘極溝槽620。一旦溝槽620形成並且除去遮罩之後，就可以生長一個犧牲氧化層（圖中沒有表示出）然後除去，以改善溝槽中的矽表面。沿閘極溝槽620的內表面製備一個絕緣層（例如閘極氧化物）622。然後在閘極氧化層622上方沉積導電材料。在某些實施例中，導電材料可以是原位摻雜的或未摻雜的多晶矽。在基板610上方的導電材料上進行回蝕工藝之後，如圖6A所示，就可以爲每個溝槽電晶體製備一個閘極電極624。進行本體注入，形成本體區630。摻雜離子的導電類型與基板610的摻雜相反。對於p-通道元件來說，摻雜離子可以是磷或砷離子。對於n-通道元件來說，可以使用硼離子。此後，進行熱擴散，活化摻雜原子，擴散摻雜物，製備本體區630，如圖6A所示。
參見圖6B，利用源極遮罩（圖中沒有表示出）進行源極注入。確切地說，源極注入可以是深硼（p-）注入和淺硼（p-）注入。然後通過源極區擴散，在本體區630中製備一個輕摻雜的源極區640，比重摻雜源極區650更深，如圖6C所示。作爲示例，但不作爲局限，輕摻雜源極區640的摻雜濃度在5×1015 /cm3 至1×1018 /cm3 範圍內變化。作爲示例，但不作爲局限，輕摻雜源極區640可以在本體區630和重摻雜源極區650之間延伸。本體區630的深度D可以在0.5T至0.8T之間，其中T爲閘極溝槽620的深度。輕摻雜區640的深度可以在0.4D至0.5D之間。重摻雜源極區650的深度可以在0.1D至0.25D之間。不同區域的深度可以通過控制注入能量來控制，注入能量通常在10 keV至500 keV範圍內。
然後，在基板610上方沉積一個平整的電介質層660，如圖6D所示。在某些實施例中，電介質層660的製備是通過低溫氧化物沉積，然後沉積含有硼酸的矽玻璃（BPSG）來製成的。
然後，在電介質層660上使用抗光蝕劑605，其圖案在接觸溝槽的位置上有開口。利用刻蝕工藝，除去未被覆蓋的那部分電介質層660，形成接觸溝槽670，穿過源極區（640和650）到本體區630中，如圖6E所示。作爲示例，但不作爲局限，接觸溝槽670的寬度在0.2微米至1.5微米範圍內。
除去抗光蝕劑605之後，利用注入工藝，製備接觸注入物645，如圖6F所示。作爲示例，但不作爲局限，接觸注入物645可以在40-80 keV的能級下，利用很大的傾斜角4面旋轉注入形成。對於p-通道元件來說，摻雜離子可以是磷或砷離子。對於n-通道元件來說，可以使用硼離子。作爲示例，但不作爲局限，接觸注入物645的摻雜濃度在5×1018 /cm3 至5×1019 /cm3 範圍內變化，這對於反向摻雜重摻雜源極區650來說並不足夠。因此，形成在接觸溝槽670側壁上的PN二極體，與輕摻雜源極區640相接觸。
障壁金屬可以沉積在接觸溝槽670的表面上方。作爲示例，但不作爲局限，障壁金屬可以是鈦（Ti），通過物理氣相沉積（PVD）沉積Ti/TiN，或者也可以是一種合金，例如通過CVD或PVD沉積的TiN。沉積障壁金屬之後，導電材料（鎢）可以通過CVD或PVD沉積在接觸溝槽670中，以形成源極接頭672，如圖6G所示。
然後，在電介質層660上方沉積一個金屬層680，如圖6H所示。金屬層680可以由鋁等導電材料製成。金屬層680和源極接頭672互聯所有的源極區，形成溝槽MOSFET元件400。
用於實施例 2 的製備工藝
圖7A-7H表示圖5A-5B所示的溝槽MOSFET元件500的製備工藝的剖面圖，溝槽MOSFET元件500具有一個源極接頭到x-y平面內的重摻雜源極區，以及側壁溝槽接頭到y-z平面內的本體區。
圖7A表示進行本體擴散工藝後，沿圖5所示的A-A’剖面，x-y平面內元件的剖面圖以及y-z平面內元件的剖面圖。確切地說，該工藝使用第一導電類型的半導體基板710作爲初始材料。對於p-通道元件來說，基板710可以包括一個p-型外延層，在重摻雜p型（p+）矽晶圓上方。在基板710上使用一個遮罩(圖中沒有表示出)包括限定多個閘極溝槽位置的開口，用於MOSFET元件700的溝槽電晶體。利用蝕刻工藝，蝕刻掉下方基板710的相應部分，以形成多個閘極溝槽720。一旦形成溝槽720並且除去遮罩之後，可以生長一個犧牲氧化層（圖中沒有表示出）並除去，以改良溝槽中的矽表面。然後，沿閘極溝槽720的內表面形成一個絕緣層（例如閘極氧化物）722。在閘極氧化層722上方沉積導電材料。在某些實施例中，導電材料可以是原位摻雜的或者未摻雜的多晶矽。因此，在基板710上方進行導電材料的回蝕工藝之後，如圖7A所示，就爲每個溝槽電晶體形成一個閘極電極724。進行本體注入，形成本體區730。摻雜離子的導電類型與基板710的摻雜導電類型相反。對於p-通道元件來說，摻雜離子可以是磷或砷離子。對於n-通道元件來說，可以使用硼離子。此後，進行熱擴散，活化摻雜原子，擴散摻雜物，形成本體區730，如圖7A所示。
參見圖7B，利用源極遮罩（圖中沒有表示出）進行源極注入。確切地說，源極注入是深硼（p-）注入和淺硼（p+）注入的組合。隨後通過源極區擴散，在本體區730中比重摻雜源極區750更深的地方形成一個輕摻雜的源極區740，如圖7C所示。作爲示例，但不作爲局限，輕摻雜源極區740的摻雜濃度在5×1018 /cm3 至1×1018 /cm3 範圍內變化，而重摻雜源極區750的摻雜濃度在8×1019 /cm3 至1×1020 /cm3 範圍內變化。作爲示例，但不作爲局限，輕摻雜源極區740可以在本體區730和重摻雜源極區750之間延伸。本體區730的深度D可以在0.5T至0.8T之間，其中T是閘極溝槽720的深度。輕摻雜區740的深度在0.4D至0.5D之間。重摻雜源極區750的深度可以在0.1D至0.25D之間。各個區域的深度可以通過注入能量來擴展，注入能量的範圍在10 keV至500 keV之間。
此後，在基板710上方沉積一個平整的電介質層760，如圖7D所示。在某些實施例中，電介質層760可以通過低溫氧化物沉積來形成，然後沉積含有硼酸的矽玻璃（BPSG）。
然後在電介質層760上使用抗光蝕劑705，其圖案在源極接觸開口的位置上有一個開口。利用蝕刻工藝，除去電介質層760未被覆蓋的部分，並在重摻雜源極區750上方形成源極接觸開口770a，如圖7E所示。圖7E’表示除去剩餘的抗光蝕劑705之後，圖7E的三維圖。作爲示例，但不作爲局限，源極接觸開口770a的寬度在0.2微米至1.5微米之間。
在電介質層760上使用另一個抗光蝕劑715，裸露的重摻雜源極區750的圖案在y-z平面內本體接觸溝槽的位置上有一個開口。利用蝕刻工藝，除去裸露的矽，並形成本體接觸溝槽770b，穿過源極區（740和750），進入本體區730，如圖7F所示。圖7F’表示通過源極區（740和750）到本體區730中蝕刻之前，圖7F的三維圖。作爲示例，但不作爲局限，本體接觸溝槽770b的長度在0.5微米至5.0微米範圍內。如圖7E、7E’、7F和7F’所示，源極表面接觸開口770a與本體接觸溝槽770b正交。
除去抗光蝕劑715之後，利用注入工藝，製備接觸注入物745，如圖7G所示。作爲示例，但不作爲局限，接觸注入物745可以利用很大的傾斜角4，在40-80 keV的能級下旋轉注入。在某些實施例中，對於p-通道元件來說，摻雜離子可以是磷或砷離子。在某些實施例中，對於n-通道元件來說，可以使用硼離子。作爲示例，但不作爲局限，接觸注入物745的摻雜濃度在5×1018 /cm3 至5×1019 /cm3 範圍內變化，這對於反向摻雜重摻雜源極區750來說並不足夠。因此，要在本體接觸溝槽770b的側壁上製備一個PN二極體，在側壁上，PN二極體在通道寬度方向的平面內與輕摻雜源極區740相接觸。
如圖7H所示，製備一個源極接頭、一個本體接頭和一個金屬層。確切地說，源極接頭772a形成在每個源極接觸開口770a中，用導電材料填充接觸開口。本體接頭772b形成在每個本體接觸溝槽770b中，用導電材料填充接觸開口。金屬層780沉積在電介質層760上方。金屬層780可以由鋁等導電材料製成。金屬層780、源極接頭772a和本體接頭772b互聯所有的源極區，以形成溝槽MOSFET元件700。
儘管本發明關於某些較佳的實施例已經做了詳細的敘述，但是仍可能存在各種不同的修正、變化和等效情况。因此，本發明的範圍不應由上述說明決定，與之相反，本發明的範圍應參照所附的申請專利範圍及其全部等效內容。任何特徵（無論首選與否），都可與其他任何特徵（無論首選與否）組合。在以下申請專利範圍中，除非特別聲明，否則不定冠詞「一個」或「一種」都指下文內容中的一個或多個項目的數量。除非用「意思是」明確指出限定功能，否則所附的申請專利範圍並不應認爲是意義-加-功能的局限。
200‧‧‧溝槽MOSFET元件 230‧‧‧本體區 240‧‧‧輕摻雜源極區 250‧‧‧重摻雜源極區 272‧‧‧源極接頭 290‧‧‧本體接頭 410‧‧‧基板 420‧‧‧閘極溝槽 422‧‧‧電介質材料 424‧‧‧閘極電極 430‧‧‧本體區 440‧‧‧源極區 445‧‧‧重摻雜接觸注入物 450‧‧‧重摻雜源極區 460‧‧‧電介質層 470‧‧‧接觸溝槽 472‧‧‧源極接頭 480‧‧‧源極金屬墊 510‧‧‧基板 520‧‧‧閘極溝槽 530‧‧‧本體區 524‧‧‧閘極電極 530‧‧‧本體區 540‧‧‧輕摻雜源極區 545‧‧‧重摻雜接觸注入物 550‧‧‧重摻雜源極區 560‧‧‧電介質層 570a‧‧‧源極接觸開口 570b‧‧‧本體接觸溝槽 580‧‧‧金屬層 605‧‧‧抗光蝕劑 610‧‧‧基板 620‧‧‧閘極溝槽 622‧‧‧閘極氧化層 624‧‧‧閘極電極 630‧‧‧本體區 640‧‧‧輕摻雜源極區 645‧‧‧接觸注入物 650‧‧‧重摻雜源極區 660‧‧‧電介質層 670‧‧‧接觸溝槽 672‧‧‧源極接頭 680‧‧‧金屬層 705‧‧‧抗光蝕劑 710‧‧‧基板 715‧‧‧抗光蝕劑 720‧‧‧閘極溝槽 722‧‧‧閘極氧化層 724‧‧‧閘極電極 730‧‧‧本體區 740‧‧‧輕摻雜源極區 745‧‧‧接觸注入物 750‧‧‧重摻雜源極區 760‧‧‧電介質層 770a‧‧‧源極接觸開口 770b‧‧‧本體接觸溝槽 772a‧‧‧源極接頭 772b‧‧‧本體接頭 780‧‧‧金屬層
閱讀以下詳細說明並參照附圖之後，本發明的各個方面及優勢將顯而易見： 圖1A表示並聯的MOSFET的示意圖。 圖1B表示具有源極鎮流電阻器與每個MOSFET串聯的並聯MOSFET的示意圖。 圖2表示帶有源極鎮流的一部分n-通道溝槽MOSFET元件的剖面示意圖。 圖3表示在z方向上，帶有表面本體接頭的源極鎮流溝槽MOSFET元件的三維圖。 圖4表示依據本發明的各個方面，一部分溝槽MOSFET元件的剖面示意圖。 圖5A表示依據本發明的各個方面，一種溝槽MOSFET元件的三維圖。 圖5B表示圖5A所示的一部分溝槽MOSFET元件的剖面示意圖。 圖6A-6H表示依據本發明的各個方面，用於圖4所示的溝槽MOSFET元件製備方法的剖面示意圖。 圖7A-7H表示依據本發明的各個方面，用於圖5A-5B所示的溝槽MOSFET元件的製備方法的剖面示意圖。 圖7E’和7F’表示對應圖7E和7F所示的剖面示意圖的三維圖。
410‧‧‧基板
420‧‧‧閘極溝槽
422‧‧‧電介質材料
424‧‧‧閘極電極
430‧‧‧本體區
440‧‧‧源極區
445‧‧‧注入物
450‧‧‧重摻雜源極區
460‧‧‧電介質層
470‧‧‧接觸溝槽
472‧‧‧源極接頭
480‧‧‧源極金屬墊

Claims (12)

  1. 一種溝槽金屬-氧化物-半導體場效應電晶體(MOSFET)元件，包括：a)一個第一導電類型的基板，基板包括第一導電類型的半導體外延層位於相同導電類型的重摻雜半導體晶圓上方；b)一個第二導電類型的本體區，第二導電類型與第一導電類型相反，本體區形成在基板上方；c)一個閘極溝槽，形成在本體區和基板中，其中閘極溝槽內襯電介質層，閘極電極形成在閘極溝槽中；d)一個輕摻雜源極區和一個重摻雜源極區，形成在本體區中，其中輕摻雜源極區延伸到本體區中比重摻雜源極區更深的地方；以及e)一個溝槽接頭，形成在接觸溝槽中，在本體區中延伸，其中第二導電類型的接觸注入物形成在接觸溝槽底部和接觸溝槽的側壁與輕摻雜源極區相接觸的部分，其中接觸溝槽位於兩個相鄰的閘極溝槽之間，溝槽接頭在接觸溝槽的側壁連接到本體區以及重摻雜源極區。
  2. 如請求項1所述之元件，其中第一導電類型為p-型導電類型，第二導電類型為n-型導電類型。
  3. 如請求項1所述之元件，其中鎮流電阻器形成在重摻雜源極區和本體區之間的輕摻雜源極區處。
  4. 如請求項1所述之元件，其中PN二極體形成在接觸注入物和輕摻雜源極區之間的交接處。
  5. 如請求項1所述之元件，其中接觸溝槽的寬度在0.2微米至1.5微米 範圍內。
  6. 如請求項5所述之元件，還包括一個表面接頭，形成在重摻雜源極區上方的表面接觸開口中。
  7. 如請求項6所述之元件，其中接觸溝槽的長度在0.5微米至5.0微米範圍內，其中表面接觸開口的寬度在0.2微米至1.5微米範圍內。
  8. 一種溝槽MOSFET元件的製備方法，該方法包括：a)在基板中製備一個本體區，其中基板包括一個第一導電類型的外延半導體層，在相同導電類型的重摻雜半導體晶圓上方，其中本體區是第二導電類型，第二導電類型與第一導電類型相反；b)在閘極溝槽中製備一個閘極電極，其中閘極溝槽形成在本體區和基板中，並且內襯一個電介質層；c)在本體區中製備一個輕摻雜的源極區和一個重摻雜的源極區，其中輕摻雜的源極區延伸到比重摻雜的源極區更深的本體區中；d)在接觸溝槽中製備一個溝槽接頭，延伸到本體區，並且製備一個第二導電類型的接觸注入物，包圍著接觸溝槽的底部以及接觸溝槽接觸輕摻雜源極區的側壁部分；所形成的接觸溝槽延伸到兩個相鄰的閘極溝槽之間的本體區，並且其中溝槽接頭在接觸溝槽的側壁接觸到本體區以及重摻雜源極區。
  9. 如請求項8所述之元件的製備方法，其中第一導電類型為p-型導電類型，第二導電類型為n-型導電類型。
  10. 如請求項8所述之元件的製備方法，其中由源極注入物形成的輕摻雜源極區和重摻雜源極區包括一個深源極注入物和一個淺源極注入物，其中 用於深源極注入物和淺源極注入物的摻雜離子的導電類型，與基板的導電類型相同。
  11. 如請求項8所述之元件的製備方法，其中接觸注入物是利用很大的傾斜角4面旋轉注入而形成的。
  12. 如請求項8所述之元件的製備方法，還包括利用第一遮罩製備一個表面接頭，在重摻雜源極區上方的表面接觸開口中，其中表面接頭接觸重摻雜源極區。
TW108102869A 2018-02-07 2019-01-25 用於p-通道溝槽mosfet的源極鎮流 TWI700834B (zh)

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