TWI695412B - 蝕刻及平滑化基板表面的方法 - Google Patents
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- TWI695412B TWI695412B TW105128324A TW105128324A TWI695412B TW I695412 B TWI695412 B TW I695412B TW 105128324 A TW105128324 A TW 105128324A TW 105128324 A TW105128324 A TW 105128324A TW I695412 B TWI695412 B TW I695412B
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Abstract
本說明書提供藉由在偏壓容許度內循環地暴露於含鹵素之電漿及惰性電漿來蝕刻及平滑化膜的方法。方法適用於在半導體工業中蝕刻及平滑化各種材料的膜,且亦可應用於光學元件及其他工業中的應用。
Description
本揭露內容係關於蝕刻及平滑化基板表面的方法。
半導體製造通常涉及蝕刻薄膜,但通常平滑的膜表現較佳且在製造過程中係更為理想的。許多習知的蝕刻方法會造成粗糙的膜。用於平滑化的習知方法被限定於某些應用中。
本說明書中所提供的係為用於處理基板的方法及設備。一態樣涉及蝕刻及平滑化基板表面的方法,該方法包含:使基板表面暴露於反應物,並引燃第一電漿,以改質該表面的層;及使所改質的層暴露於惰性氣體,並在偏壓功率下引燃第二電漿,且達一段足以移除所改質之層但無濺射情形的持續時間,藉此移除所改質的層之後的該基板表面,較使該基板表面暴露於該反應物之前的該基板表面更為平滑。
在若干實施例中,該基板表面包含選自由氮化鋁鎵、矽、氮化鎵、鎢、及鈷所構成之群組的材料。在若干實施例中,該基板表面包含鍺,而該偏
壓功率係介於約20Vb至約35Vb之間。在各種實施例中,該基板表面包含矽,而該偏壓功率係介於約35Vb至約65Vb之間。在若干實施例中,該基板表面包含氮化鎵,而該偏壓功率係介於約50Vb至約100Vb之間。在各種實施例中,該基板表面包含鎢,而該偏壓功率係介於約70Vb至約80Vb之間。
在若干實施例中,該基板表面包含非晶碳,而該反應物為氧。
在各種實施例中,該反應物為含鹵素的反應物。在各種實施例中,該反應物為含硼的鹵化物。在若干實施例中,該反應物為氯及三氯化硼的組合。
在若干實施例中,該惰性氣體係選自由氮、氬、氖、氦、及其組合所構成的群組。在若干實施例中,該偏壓功率小於約100Vb。在若干實施例中,該方法更包含重複步驟(a)及(b)。在若干實施例中,可在步驟(a)之後及步驟(b)之前吹淨容置包含該基板表面之基板的製程腔室。在各種實施例中,使該基板暴露於該反應物之後的基板表面之粗糙度為約100nm。
所揭露之實施例可用於半導體工業內部及外部的各種應用。在若干實施例中,該基板表面係位於包含作為用於紫外線微影的遮罩來使用之反射性多層膜的基板上。
在各種實施例中,該第二電漿中所產生的離子以一角度被導向該基板表面。在若干實施例中,該離子係由轉動的元件所產生。
在各種實施例中,在醫療應用中,平滑化該基板表面以減少該基板表面的表面面積並及降低反應性。
在若干實施例中,針對太空或軍事應用的精密光學元件中之使用,平滑化該基板表面以形成平滑化之表面。
以下參考圖式進一步說明此等與其他態樣。
111:範例
113:範例
101:範例
101a:材料表面
101b:經蝕刻表面
103:範例
171a-171e:步驟
172a-172e:步驟
202:操作
204:操作
206:操作
208:操作
210:操作
212:操作
302:鍺的偏壓容許度
304:矽的偏壓容許度
306:氮化鎵的偏壓容許度
308:鎢的偏壓容許度
400:設備
401:腔室壁
402:子腔室
403:子腔室
411:窗
417:卡盤
419:晶圓
421:匹配電路
422:埠口
423:RF電源
424:製程腔室
425:連接件
427:連接件
430:系統控制器
433:線圈
439:匹配電路
440:泵浦
441:RF電源
443:連接件
445:連接件
449:法拉第屏蔽
449a:法拉第屏蔽
449b:法拉第屏蔽
450:柵
460:氣流入口
470:氣流入口
520a-520d/520:處理模組
522:機械臂
524:末端效應器
526:晶圓
528:模組中心
530:氣鎖室/氣鎖室模組
532:前端機械臂
534:前開式晶圓傳送盒
536:面
538:真空傳送模組
540:大氣傳送模組
542:負載埠模組
544:對準器
圖1A係為濕式蝕刻製程前後之具有材料晶粒的基板之範例的示意圖。
圖1B係為執行特定實施例前後之具有以材料填充之特徵部的基板之範例的示意圖。
圖1C係為基板上之膜的原子層蝕刻之範例的示意圖。
圖2係為依據所揭露實施例而執行之操作的製程流程圖。
圖3係為描繪各種材料的例示性偏壓容許度之實驗結果的圖。
圖4係為用於執行特定所揭露實施例之例示性製程腔室的示意圖。
圖5係為用於執行特定所揭露實施例之例示性製程設備的示意圖。
圖6A、7A、8A、及9A係為實驗中所使用之基板的影像。
圖6B、7B、8B、及9B係為實驗中執行特定所揭露實施例之後的基板之影像。
在以下敘述中,為提供對於所呈現實施例之完整瞭解,將提出許多具體細節。在不具有這些具體細節之若干或全部的情況下,仍可實施本揭露實施例。在其他情況下,為避免不必要地混淆本揭露實施例,因此不詳細描述
眾所周知的程序操作。雖然本揭露實施例將結合具體實施例而描述,但應瞭解其並非意欲限制本揭露實施例。
半導體製造過程通常涉及蝕刻薄膜及製造平滑膜。在許多應用中,平滑的膜為理想的,因為其可改善半導體裝置的性能及可靠性。許多習知蝕刻及沉積製程會造成粗糙的膜。例如,濕式蝕刻製程通常會造成不平整的蝕刻表面。圖1A顯示經歷濕式蝕刻之基板材料晶粒的範例。在111中,在蝕刻製程之前,晶粒在材料之場區處的厚度係稍微不均勻,而在濕式蝕刻之後,如113所示,儘管晶粒已被蝕刻,材料之場區顯示遍及材料各處之顯著的粗糙度及變異性。
儘管在習知情況下會使用使粗糙膜平滑的若干方法,但此等方法對於其應用在許多製造過程中存有限制。在許多習知方法中,特徵部中之材料表面的平滑化亦具挑戰性。例如,使膜平滑的一方法係為執行化學機械研磨(CMP,chemical mechanical polishing)。通常執行CMP以使基板平坦化,且使基板的整個表面平滑,但其對特定材料不具選擇性。若基板上存在特徵部,則CMP會移除該基板之表面上的任何圖案。此外,CMP不是可控制的製程,因為基板上平坦化的表面可能不會在整個基板各處都是均勻的。
在另一範例中,用於離子束蝕刻中的氬在習知情況下已用於使膜平滑化,例如用於線寬粗糙度之應用。然而,如此的製程通常不會同時造成蝕刻及平滑化兩者,且不為自限制性的。氬離子束蝕刻通常涉及在高偏壓功率下濺射以移除所蝕刻的膜,但由於用於蝕刻的射束之尺寸所致,如此的方法無法縮放,且因此無法大規模地使膜平滑,例如遍及整個基板的表面。原子層蝕刻的習知方法藉由在自限制反應中蝕刻而維持相同的表面平滑度,但其應用限於使膜平滑。
本說明書中所提供的是同時蝕刻及平滑化膜的方法,該方法係使用能夠在可縮放的製程中使各種類型的材料及水平與垂直表面(例如在特徵部之上、在場區上、及在側壁上)平滑之蝕刻製程。如本說明書中所使用的用語「平滑化」可指涉使材料表面較蝕刻該材料前更平滑,如藉由原子力顯微鏡(AFM,atomic force microscopy)量測法來量測,或如藉由檢視高解析度穿透式電子顯微鏡(HR-TEM,high resolution transmission electron microscopy)影像而視覺上地量測。在各種實施例中,蝕刻製程實質上為自限制性的。
圖1B顯示蝕刻前後之具有以材料填充的特徵部之基板的範例。在101中,材料表面101a係粗糙的,而在蝕刻製程(例如本說明書中所述者)後,在103中,在特徵部之表面會顯示平滑的經蝕刻表面101b。
所揭露的實施例涉及使用原子層蝕刻(ALE,atomic layer etching)來進行蝕刻及平滑化。ALE係為使用相繼的自限制反應來移除材料之薄層的技術。原子層蝕刻技術之範例係描述於美國專利第8883028號,公告日為2014年11月11日;以及美國專利第8808561號,公告日為2014年8月19日,該等案係因描述例示性原子層蝕刻及蝕刻技術之目的而併入本說明書中以供參照。在所揭露之實施例中,ALE係利用電漿來執行。
ALE可循環地執行。「ALE循環」的概念與本說明書中許多實施例的討論有關。一般而言,ALE循環為用以執行一次蝕刻處理(例如蝕刻單層)的最小操作組。在所揭露之實施例中,各循環中可能不只一個單層被蝕刻。例如,各循環中可能有約1至約3個單層被蝕刻。一循環的結果為將基板表面上至少若干的表面或膜層蝕刻掉。通常,一ALE循環包含改質操作,以形成反應性層;接著為移除操作,以僅將此經改質的層移除或蝕刻掉。反應性層比未經改質層更容易移除。該循環可包含某些輔助操作,例如掃除或移除副產物或反應物其中之一者。一般而言,一循環含有一專有操作順序範例。舉例而言,一ALE
循環可包含下列操作:(i)傳送反應物氣體及/或電漿、(ii)將該反應物氣體自腔室中吹淨、(iii)傳送移除氣體及電漿或偏壓、以及(iv)吹淨腔室。
圖1C顯示ALE循環的兩個例示性示意圖解。圖171a-171e顯示一般性的ALE循環。在171a中,提供基板。在171b中,將基板的表面改質。在171c中,準備下個步驟。在171d中,蝕刻經改質的層。在171e中,移除經改質的層。類似地,圖172a-172e顯示蝕刻金屬膜的ALE循環之範例。在172a中,提供矽基板,其包含許多金屬原子。在172b中,將反應物氣體氯引至基板,而將基板的表面改質。舉例而言,172b中的示意圖顯示,若干氯吸附於基板的表面上。雖然圖1B中描繪氯,但可使用任何含氯化合物或合適的反應物。在172c中,將反應物氣體氯自腔室中吹淨。在172d中,使用方向性電漿來引入移除氣體氬(如Ar+電漿物種及箭頭所指示),並執行離子轟擊以將基板之經改質表面移除。在此操作期間,對基板施加偏壓以將離子吸引向基板。在172e中,吹淨腔室並移除副產物。在若干實施例中,執行ALE以對一材料相對於另一材料進行選擇性的蝕刻。
所揭露之實施例能夠同時蝕刻及平滑化各種材料。例如,在若干實施例中,ALE的蝕刻循環可平滑化金屬及介電質兩者。所揭露之實施例亦能夠平滑化基板上之特徵部及結構的水平及垂直表面兩者。例如,所揭露之實施例可適用於平滑化毯覆式基板之場區,但亦可適用於蝕刻及平滑化特徵部之側壁。例如,此可適用於針對FinFET製造而平滑化及蝕刻側壁。所揭露之實施例亦為可縮放的,藉此能夠蝕刻及平滑化遍及整個晶圓的膜。所揭露之實施例可與其他製程整合,例如沉積、CMP,及/或用於增加整個基板之均勻性的其他製程。例如,在若干實施例中,所揭露之實施例可利用在執行所揭露實施例與沉積金屬之間交替的方式,用以在沉積金屬材料時蝕刻及平滑化金屬材料。在若干實施例中,可於在基板上執行CMP、調整整個晶圓的溫度之後,使用所揭露
實施例來改善均勻性,以使所沉積的膜平滑。所揭露之實施例可有益於半導體工業內部及外部的工業。應用的範例可包含凹部蝕刻(例如用於金屬)、EUV遮罩、光學元件、機械部件、航太產業、塗層。
用於執行所揭露之實施例的製程操作係參照圖2進一步描述。圖2描繪操作202,藉此將基板提供至腔室,例如適用於處理基板(例如半導體基板)之工具內的製程腔室。腔室可為多腔室設備或單腔室設備中的腔室。
基板可為矽晶圓,例如,200-mm晶圓、300-mm晶圓、或450-mm晶圓,包含具有沉積於其上之一或更多材料(例如:介電的、導電的、或半導電的材料)層的晶圓。在若干實施例中,基板包含矽(例如非晶矽)的毯覆層,或鍺的毯覆層。基板可包含先前沉積且圖案化於基板上的圖案化遮罩層。例如,遮罩層可沉積且圖案化於包含毯覆非晶矽層的基板上。
在若干實施例中,可使基板上的層圖案化。圖案化的基板可具有「特徵部」(例如:穿孔或接觸孔),其特徵可為狹窄及/或內凹的開口、特徵部內之頸縮、及高縱橫比其中一或更多者。該等特徵部可形成於上述該等層其中一或更多者中。特徵部的一範例為在半導體基板或該基板上之層中的孔洞或穿孔。另一範例為基板或層中的凹槽。在各種實施例中,特徵部可具有下層,例如阻障層或黏附層。下層之非限定的範例包含介電層及導電層,例如矽氧化物、矽氮化物、矽碳化物、金屬氧化物、金屬氮化物、金屬碳化物、及金屬層。在若干實施例中,基板之表面可包含不只一種類型的材料,例如基板經圖案化的情況。基板包含待使用所揭露之實施例進行蝕刻及平滑化的至少一材料。此材料可為上述該等材料(金屬、介電質、半導體材料、及其他)的任一者。在各種實施例中,此等材料可準備用來製造接點、穿孔、閘極等。在若干實施例中,待蝕刻的材料為硬遮罩材料,例如非晶碳。進一步的例示性材料包含氮化鋁鎵、矽、氮化鎵、鎢、及鈷。
在若干實施例中,特徵部可具有至少約2:1、至少約4:1、至少約6:1、至少約10:1、至少約30:1、或更高的縱橫比。若為高的縱橫比則可能需要保護特徵部的側壁。所揭露之方法可在具有開口小於約150nm之特徵部的基板上執行。可將特徵部穿孔或凹槽稱為未填充之特徵部或特徵部。特徵部可具有從特徵部之底部、封閉端、或內部,向特徵部之開口變窄的內凹角輪廓。在若干實施例中,本說明書中所述之方法可用於形成具有此等特性之特徵部。
在若干實施例中,在執行所揭露實施例之前,基板可經歷預處理,以移除基板材料表面上的任何殘餘氧化物。例如,在若干實施例中,可藉由於執行所揭露實施例之前將基板浸至氟化氫(HF)中來準備基板。
在操作204中,在具有電漿的情況下將基板暴露反應物,以改質基板表面。該改質操作會形成薄的反應性表面層,其具有在後續移除操作中較未改質之材料更易移除的厚度。反應物可為含鹵素反應物,或氧。在若干實施例中,可使用含硼的鹵化物反應物。可在操作204期間使用此等反應物的任何組合。例如,在若干實施例中,操作204涉及使基板暴露於氯(Cl2)。在若干實施例中,操作204涉及使基板暴露於氯及三氯化硼(Cl2/BCl3的組合)。在各種實施例中,在操作204期間使用含硼鹵化物反應物可產生較暴露於非含硼鹵化物反應物之膜更平滑的膜。例如,BCl3可藉由消除原本可能會在蝕刻期間引起微遮罩作用(micromasking)的氧化作用而改善平滑度。
在若干實施例中,操作204涉及使基板暴露於氧。例如,在基板包含待蝕刻及平滑化之非晶碳的情況下,可使該非晶碳暴露於氧。用於操作204中的電漿可取決於待蝕刻及平滑化的材料。
在若干實施例中,在操作204期間可流動載氣。例示性載氣包含惰性氣體,例如N2、Ar、Ne、He,及其組合。
在若干實施例中,可藉由將氯引至腔室中而使基板氯化。在所揭露之實施例中,氯係作為例示性蝕刻劑物種來使用,但應暸解,在若干實施例中,會將不同的蝕刻氣體引至腔室中。可依據待蝕刻之基板的類型及化學物來選擇蝕刻氣體。引燃電漿,而氯電漿會與基板反應,以在基板表面上形成經改質的層。例如,在基板為鎢的情況下,氯電漿會與鎢反應以改質鎢膜的表面。在若干實施例中,氯可與基板反應或可吸附至基板表面上。在各種實施例中,將氯以氣體形式引至腔室中,且可選擇地伴隨著載氣,該載氣可為上述該等氣體的任一者。自氯電漿所產生的物種可藉由在容置基板的製程腔室中形成電漿而直接產生,或者其可在未容置基板的製程腔室中遠端產生,然後可將其供應至容置基板的製程腔室中。
在各種實施例中,電漿可為感應耦合電漿或電容耦合電漿。執行操作204之電漿條件及持續時間取決於將改質之材料的類型以及用以產生電漿的反應物。例如,用於改質基板上之金屬材料的電漿條件及持續時間可與用於改質介電質材料的電漿條件及持續時間不同。該持續時間可足以改質基板上之材料的至少大部分表面,或該表面的至少一單層。
在若干實施例中,感應耦合電漿可設定為約50W至約2000W之間的電漿。在若干實施例中,可施加約0V至約500V之間的偏壓。
在不受特定理論所限制的情況下,據信改質可能會使基板表面變得比未改質層更加不平整。例如,使用氯電漿進行表面的吸附或改質可能會引起基板表面上的立體阻礙(steric hindrance),藉此鍵結至基板上之材料的一或更多原子的一或更多氯原子會引起不平整的表面。在不受特定理論所限制的情況下,據信所揭露之實施例可使基板平滑,此係由於ALE藉由逐層的機制來蝕刻材料,藉此在各循環期間蝕刻及平滑化基板表面上的突起物。例如,待平滑化
之材料表面上的突起物可在該突起物之表面上被改質且蝕刻,如此隨著該突起物被蝕刻,該突起物之尺寸會隨各蝕刻循環而縮小,藉此平滑化材料之表面。
在各種實施例中,所揭露之實施例可用以蝕刻及平滑化金屬或半導體或介電材料。材料可成長而具有晶界。若干材料可為磊晶的或非晶的。所揭露之實施例能夠平滑化特定頻率的粗糙度。例如,在各種實施例中,所揭露之實施例可能無法改善大尺度的粗糙度,例如大於100nm,但可適用於平滑化「微粗糙度」,其可定義為具有小於約100nm之粗糙度。在若干實施例中,所揭露之實施例可用以平滑化具有約100nm之粗糙度的膜。
回到圖2,在操作206中,可選擇地吹淨腔室。吹淨可於改質操作之後執行。在吹淨操作中,可將未表面鍵結之活性反應物物種自製程腔室移除。此可藉由吹淨及/或排空製程腔室而完成,以移除反應物物種,而不移除已吸附的或已改質的層。在反應物電漿中所產生的物種可藉由簡易地停止電漿,並使剩餘的物種衰變,可選擇地結合吹淨及/或排空腔室而移除。可藉由流動任何惰性氣體(例如N2、Ar、Ne、He,及其組合)來完成吹淨。
在操作208中,將基板暴露於惰性電漿,以蝕刻經改質的表面,並使基板平滑。可使用的例示性惰性氣體包含氬、氙、氖。在若干實施例中,可使用氦。引燃惰性氣體以形成電漿,並形成活性化的氣體,例如Ar+。在各種實施例中,活性化的氣體可包含帶電物種。電漿可為原位或遠端電漿。可使用約100W至約1500W間的功率來產生電漿。
在此操作期間,施加低偏壓。在此操作期間,偏壓功率取決於惰性氣體的化學性質、用於產生活性化氣體的電漿條件、以及將被蝕刻及平滑化的材料。在各種實施例中,取決於此等因素,可將適用於執行所揭露實施例的偏壓位準範圍稱為「容許度」(window)。適用於所揭露實施例的偏壓容許度可依據實驗經驗來測定,且為了不使活性化氣體物理性地濺射至待蝕刻及平滑化的
材料上而選擇該偏壓容許度。執行此操作以維持ALE製程的自限制性質。就此而言,使用該偏壓功率以使材料上的經改質層可被移除,而不會使在其之下的材料物理性地濺射。在各種實施例中,此操作可蝕刻一些單層的材料,並使材料之表面平滑。
圖3顯示在移除操作期間所使用之用於以氬為基礎的電漿之各種偏壓容許度的範例。此等範例涉及使用以氯為基礎的電漿來改質基板之表面,以及在移除期間使用以氬為基礎的電漿。容許度係由針對不同材料的實驗而依據實驗經驗來測定。容許度的寬度係為在操作204中所執行的表面改質作用之強度的指示。即,若用於操作204中之反應物電漿充分地鍵結至待蝕刻及平滑化的材料,則容許度為寬的。若用於操作204中之反應物電漿具有較低的吸附速率,或較無法鍵結至待蝕刻及平滑化的材料,則容許度為窄的。容許度的高度因與各循環之蝕刻速率相互關聯(如圖3中所示),其係取決於偏壓條件(電漿功率、電漿頻率等)及待蝕刻及平滑化的材料。
圖3顯示鍺之約20-35Vb的Ge偏壓容許度302。如上所述,此指示,約20Vb至35Vb間的偏壓功率可適用於在移除期間使用以氬為基礎的電漿來蝕刻及平滑化鍺。圖3亦顯示其他偏壓容許度:用於蝕刻及平滑化矽之約35Vb至約65Vb間的Si偏壓容許度304、用於蝕刻及平滑化氮化鎵之約50Vb至約100Vb間的GaN偏壓容許度306、及用於蝕刻及平滑化鎢之約70Vb至約80Vb間的W偏壓容許度308。在各種實施例中,偏壓功率係小於約100Vb。
回到圖2,執行操作208達一段足以移除至少大部分或全部之經改質層的時間。在若干實施例中,在執行操作208達一段足以自基板移除整個經改質層之時間的情況下,可觀察到較佳的平滑化效果。
在不受特定理論所限制的情況下,據信在移除操作期間,將經改質層自基板表面移除可重新配置材料表面上的鍵結(例如,將經改質層自基板表
面移除可允許表面擴散),以使材料表面較使用所揭露之實施例來蝕刻前的材料表面更平滑。
在操作210中,可選擇地吹淨腔室以移除所蝕刻的副產物。吹淨製程可為在改質操作後用於吹淨的該等操作之任一者。
在操作212中,可選擇地重複操作204-210。在各種實施例中,可循環地重複改質及移除操作,例如約1至約30循環,或約1至約20循環。可包含任何合適數量的ALE循環,以蝕刻所需的膜量。在若干實施例中,循環地執行ALE以將基板上之層的表面蝕刻約1Å至約50Å。在若干實施例中,ALE的循環將基板上之層的表面蝕刻約2Å至約50Å之間。
所揭露之實施例可適用於各種半導體製過程或甚至半導體工業外部之製程的應用。例如,若干半導體應用包含製造用於紫外線微影的遮罩,以形成反射性的多層膜。由於電子散粒雜訊所致,遮罩的線邊緣粗糙度(LER,line edge roughness)可能會增加,但次要地,可能會受到多層(例如約40層)的粗糙度所影響。由於容許平滑化的掠射角離子能量所致,在若干實施例中可使側壁平滑。例如,在若干實施例中,可產生離子,以使離子在本說明書中所述之移除操作期間以一角度被導向基板,以蝕刻及平滑化垂直的側壁。在若干實施例中,離子可從轉動的元件產生。和離子化叢集束不同,所揭露之實施例可能不使用將會相對於小的射束而移動的晶圓-因此,可同時將整個300mm至450mm晶圓平滑化。
半導體製造外部的應用包含固態結合、絕緣層上矽元件的製造、醫療應用(例如減少表面面積以降低病原體的侵襲或反應性)、以及用於太空或軍事應用的精密光學元件。
由於存在與沉積極平滑之金屬相關的各種挑戰,且金屬晶粒通常具有晶界,因此所揭露之實施例可特別適用於蝕刻及平滑化金屬。一應用可用於降低側壁的LER。另一應用可用於使穿孔之頂端平滑。
現描述感應耦合電漿(ICP,inductively coupled電漿)反應器,其在某些實施例中可適用於循環沉積及活化製程,包含原子層蝕刻(ALE,atomic layer etching)操作。此類ICP反應器亦描述於申請於2013年12月10日,發明名稱為「IMAGE REVERSAL WITH AHM GAP FILL FOR MULTIPLE PATTERNING」的美國專利申請案公開號第2014/0170853號中,該案係因所有目的而整體併入本說明書中以供參照。儘管本文中描述ICP反應器,但應瞭解,在若干實施例中,亦可使用電容耦合電漿反應器。
圖4示意地呈現感應耦合電漿之整合蝕刻與沉積設備400的橫剖面圖,其適合用於實施本說明書文的某些實施例,該設備之一範例係為由加州佛蒙特(Fremont,CA.)的蘭姆研究公司(Lam Research Corp.)所生產的Kiyo®反應器。感應耦合電漿設備400包含整體的製程腔室424,其結構上由腔室壁401與窗411界定。腔室壁401可由不鏽鋼或鋁製成。窗411可由石英或其他介電材料製成。可選擇的內部電漿柵450將整體的製程腔室424分成上部子腔室402與下部子腔室403。在大部分的實施例中,可移除電漿柵450,藉此使用由子腔室402與403所形成的腔室空間。卡盤417係設置在下部子腔室403中,並靠近底部的內表面。卡盤417係配置以接收並固持半導體晶圓419,蝕刻與平滑化製程係在其上方執行。卡盤417可為用於支撐晶圓419(當存在時)的靜電卡盤。在若干實施例中,邊緣環(未顯示)圍繞卡盤417,且具有幾乎與晶圓419(當存在於卡盤417上時)之頂部表面齊平的上表面。卡盤417亦可包含靜電電極,用以夾持及去夾持晶圓419。為此目的可設置濾波器與DC卡盤電源(未顯示)。亦可設置用以將晶圓419舉升離
開卡盤417的其他控制系統。可使用射頻(RF)電源423對卡盤417充電。RF電源423係透過連接件427而連接至匹配電路421。匹配電路421係透過連接件425而連接至卡盤417。以此方式,RF電源423係連接至卡盤417。在各種實施例中,靜電卡盤的偏壓功率可設定於小於約100Vb,或可取決於根據所揭露實施例而執行的製程而設定於不同的偏壓功率。例如,偏壓功率可介於約20Vb與約100Vb之間,或為用以減少電漿物種在晶圓上之物理性濺射的偏壓功率。
用於電漿產生的元件包含設置於窗411的上方的線圈433。在若干實施例中,所揭露之實施例中未使用線圈。線圈433係由導電材料所製成,且至少包含完整的一匝。圖4中所示之線圈433的範例包含三匝。線圈433的截面以符號呈現,具有符號「X」的線圈旋轉延伸進入頁面,而具有符號「●」的線圈旋轉延伸出頁面。用於電漿產生的元件亦包含RF電源441,其配置以將RF功率供應至線圈433。通常,RF電源441係透過連接件445而連接至匹配電路439。匹配電路439係透過連接件443而連接到線圈433。以此方式,RF電源441係連接至線圈433。可選擇的法拉第屏蔽(Faraday shield)449a係設置於線圈433與窗411之間。可維持法拉第屏蔽449a與線圈433之間有一間隔距離。在若干實施例中,法拉第屏蔽449a係設置於窗411的正上方。在若干實施例中,法拉第屏蔽449b係介於窗411與卡盤417之間。在若干實施例中,未維持法拉第屏蔽449b與線圈433之間有一間隔距離。例如,法拉第屏蔽449b可在無間隙之情況下位於窗411的正下方。線圈433、法拉第屏蔽449a、及窗411各配置成彼此實質上互相平行。
製程氣體及惰性氣體(例如:含鹵素氣體、含硼之鹵化物氣體、BCl3、Cl2、Ar、Xe、Ne、He等)可透過設置於上部子腔室402中的一或更多主要氣流入口460、及/或透過一或更多側氣流入口470而流至製程腔室中。相似地,儘管未明確顯示,但可使用類似的氣流入口將製程氣體供應至電容耦合電漿處理腔室。可使用真空泵浦440(例如一或二階式機械乾式泵浦、及/或渦輪分子泵
浦)以將製程氣體自製程腔室424中抽離,並用以維持製程腔室424內的壓力。例如,真空泵浦可用於在ALE之吹淨操作期間將下部子腔室403抽空。可使用閥控式導管將真空泵浦流體地連接至製程腔室424,以便選擇性地控制由真空泵浦所提供之真空環境的運用。此可透過在操作性電漿處理期間運用封閉迴路控制流量限制裝置(例如節流閥(未顯示)或鐘擺閥(未顯示))而達成。相似地,對電容耦合電漿處理腔室亦可運用真空泵浦與閥控式流體連接。
在設備400的操作期間,可透過氣流入口460及/或470供應一或更多的製程氣體(例如氯及氬)。在某些實施例中,亦可僅透過主要氣流入口460或僅透過側氣流入口470來供應製程氣體。在若干情況下,如圖所示之該等氣流入口可被更複雜的氣流入口所取代,例如一或更多的噴淋頭。法拉第屏蔽449a及/或可選擇的柵450可包含容許製程氣體傳送至製程腔室424的內部通道與孔洞。法拉第屏蔽449a與可選擇的柵450其中一者或兩者,可作為用於傳送製程氣體的噴淋頭。在若干實施例中,液體汽化與傳送系統可設置於製程腔室424之上游,以使液態反應物或前驅物一旦被汽化,汽化的反應物或前驅物即經由氣流入口460及/或470而被引至製程腔室424中。
射頻功率自RF電源441供應至線圈433,以使RF電流流經線圈433。流經線圈433的RF電流在線圈433的周圍產生電磁場。電磁場在上部子腔室402中產生感應電流。各種所產生的離子及自由基與晶圓419間的物理及化學交互作用會蝕刻晶圓419的特徵部並在晶圓419上選擇性地沉積層。
若使用電漿柵450而使得具有上部子腔室402及下部子腔室403兩者,則感應電流對存在於上部子腔室402中的氣體起作用,而在上部子腔室402中產生電子-離子電漿。可選的內部電漿柵450限制了下部子腔室403中之熱電子的量。在若干實施例中,設計並操作設備400而使得存在於下部子腔室403中的電漿為離子-離子電漿。
上部的電子-離子電漿及下部的離子-離子電漿兩者皆可包含正離子及負離子,但離子-離子電漿之負離子比正離子之比例較大。揮發性蝕刻及/或沉積副產物可透過埠口422自下部子腔室403移除。本說明書中所揭露的卡盤417可在範圍介於約10℃與約250℃之間的升高溫度下操作。該溫度將取決於製程操作與特定配方。
當設備400安裝於無塵室或製造設施中時,設備400可耦接至設施(未顯示)。設施包含管路系統,其可提供處理氣體、真空、溫度控制、及環境微粒控制。當此等設施安裝在目標製造設施中時,此等設施係耦接至設備400。此外,設備400可耦接至傳送腔室,其容許機械臂使用一般自動化技術將半導體晶圓傳送進出設備400。
在若干實施例中,系統控制器430(其可包含一或更多實體或邏輯的控制器)控制製程腔室424的若干或全部的操作。系統控制器430可包含一或更多記憶體裝置及一或更多處理器。在若干實施例中,設備400包含轉換系統,其用於在執行所揭露實施例時控制流率及持續期間。在若干實施例中,設備400可具有上達約500ms、或上達約750ms的轉換時間。轉換時間可取決於流動化學、所選擇的配方、反應器的架構、及其他因素。
在若干實施例中,系統控制器430係為系統的部分,該系統可為上述範例的部分。此類系統可包含半導體處理設備,含一或複數處理工具、一或複數腔室、用於處理的一或複數工作台、及/或特定處理元件(晶圓基座、氣流系統等)。該等系統可與電子裝置整合,以於半導體晶圓或基板之處理前、處理期間、及處理後控制其操作。可將該等電子裝置整合至系統控制器430中,其可控制一或複數系統的各種元件或子部件。依據處理參數及/或系統之類型,可將系統控制器430程式化以控制本說明書中所揭露之製程的任一者,包含製程氣體及偏壓功率之傳送、溫度設定(如:加熱及/或冷卻)、壓力設定、真空設定、功
率設定、射頻(RF,radio frequency)產生器設定、RF匹配電路設定、頻率設定、流率設定、流體傳送設定、位置及操作設定、進出工具及連接至特定系統或與特定系統介面接合的其他傳送工具及/或負載鎖室之晶圓傳送。
廣泛而言,可將系統控制器430定義為具有接收指令、發送指令、控制操作、允許清潔操作、允許端點量測等之各種積體電路、邏輯、記憶體、及/或軟體的電子設備。該積體電路可包含儲存程式指令的韌體形式之晶片、數位信號處理器(DSPs,digital signal processors)、定義為特殊應用積體電路(ASICs,application specific integrated circuits)之晶片、及/或執行程式指令(如:軟體)之一或更多的微處理器或微控制器。程式指令可為以各種個別設定(或程式檔案)之形式傳送到控制器的指令,其定義用以在半導體晶圓上、或針對半導體晶圓、或對系統執行特定製程的操作參數。在若干實施例中,該操作參數可為由製程工程師所定義之配方的部分,該配方係用以在晶圓之一或更多的層、材料、金屬、氧化物、矽、二氧化矽、表面、電路、及/或晶粒的製造或移除期間,完成一或更多的處理步驟。
在若干實施中,系統控制器430可為電腦的部分或耦接至電腦,該電腦係與系統整合、耦接至系統、或透過網路連接至系統、或上述之組合。例如,控制器係可位於「雲端」、或為晶圓廠主機電腦系統的全部或部分,其可允許晶圓處理之遠端存取。該電腦能達成對該系統之遠端存取,以監視製造操作之目前製程、查看過去製造操作之歷史、查看來自許多製造操作之趨勢或性能指標,來改變目前處理之參數,以設定處理步驟來接續目前的處理、或開始新的製程。在若干範例中,遠端電腦(如:伺服器)可透過網路將製程配方提供給系統,該網路可包含區域網路或網際網路。該遠端電腦可包含可達成參數及/或設定之輸入或編程的使用者介面,該等參數或設定接著自該遠端電腦傳送至該系統。在若干範例中,系統控制器430接收資料形式之指令,在一或更多的操
作期間,其針對該待執行的處理步驟之各者而指定參數。應瞭解,該等參數可特定於待執行之製程的類型、及工具(控制器係配置成與該工具介面接合或控制該工具)的類型。因此,如上所述,系統控制器430可分散,例如藉由包含一或更多的分離的控制器,其透過網路連接在一起並朝共同的目標而作業,例如本說明書中所敘述之製程及控制。用於此類目的之分開的控制器之範例可為腔室上之一或更多的積體電路,其與位於遠端(例如為平台等級、或為遠端電腦的部分)之一或更多的積體電路連通,其結合以控制該腔室上的製程。
範例系統可包含(但不限於)電漿蝕刻腔室或模組、沉積腔室或模組、旋轉沖洗腔室或模組、金屬電鍍腔室或模組、潔淨腔室或模組、斜邊蝕刻腔室或模組、物理氣相沉積(PVD,physical vapor deposition)腔室或模組、化學氣相沉積(CVD,chemical vapor deposition)腔室或模組、ALD腔室或模組、ALE腔室或模組、離子植入腔室或模組、徑跡腔室或模組、及可與半導體晶圓之製造及/或生產有關或用於其中的任何其他半導體處理系統。
如上所述,依據待由工具執行之製程步驟(或複數製程步驟),控制器可與下列一或多者通訊:其他工具電路或模組、其他工具元件、群集工具、其他工具介面、鄰接工具、附近工具、位於整個工廠的工具、主要電腦、另一控制器、或將晶圓之容器帶往或帶離半導體製造廠中的工具位置及/或載入埠的用於材料傳送之工具。
圖5描繪半導體製程群集架構,其具有與真空傳送模組(VTM,vacuum transfer module)538接合的各種模組。用以在複數儲存設備與處理模組之間「傳送」晶圓的各種模組的配置,可稱為「群集工具架構」系統。氣鎖室530(亦稱為負載鎖室或傳送模組)與VTM 538介面接合,而VTM 538與四個處理模組520a-520d介面接合,處理模組520a-520d可被個別最佳化以執行各種製程。舉例而言,可實施處理模組520a-520d,以執行基板蝕刻、沉積、離子植入、晶圓清
洗、濺射、及/或其他半導體製程。在若干實施例中,所揭露的操作可在相同模組中執行。在若干實施例中,所揭露的操作可在相同工具的不同模組中執行。可實施基板蝕刻處理模組其中一或更多者(520a-520d之任一者),如本說明書中所揭露般,亦即,用於蝕刻及平滑化各種材料的膜、蝕刻圖案、蝕刻金屬、以及根據所揭露實施例的其他合適的功能。可將氣鎖室530與處理模組520a-520d稱為「站」。各個站具有面(facet)536,面536將站與VTM 538介面接合。在各個面內,感測器1-18係用以在晶圓526於個別的站之間移動時偵測通過的晶圓526。
機械臂522在站之間傳送晶圓526。在一實施例中,機械臂522具有一個臂部,而在另一實施例中,機械臂522具有兩個臂部,其中各臂部具有用以拾取進行傳送之晶圓(例如晶圓526)的末端效應器524。位於大氣傳送模組(ATM,atmospheric transfer module)540中的前端機械臂532係用以將晶圓526自負載埠模組(LPM,Load Port Module)542中的卡匣或前開式晶圓傳送盒(FOUP)534傳送到氣鎖室530。處理模組520a-520d中的模組中心528為用於放置晶圓526的位置。ATM540中的對準器544係用以對準晶圓。
在例示性處理方法中,晶圓係放置在LPM 542中的FOUPs 534其中一者中。前端機械臂532將該晶圓自FOUP 534傳送至對準器544,對準器544使晶圓526能夠在蝕刻或處理之前適當地置於中心。在對準之後,晶圓526係藉由前端機械臂532而移至氣鎖室530中。因氣鎖室530具有使ATM 540與VTM 538間之環境一致的能力,所以晶圓526能夠在兩壓力環境間移動而不受損害。晶圓526係藉由機械臂522自氣鎖室模組530、經過VTM 538、而移至處理模組520a-520d其中一者中。為達成此晶圓移動,機械臂522使用位於其各臂部上的末端效應器524。一旦晶圓526經處理後,其藉由機械臂522自處理模組520a-520d移至氣鎖室530。晶圓526可藉由前端機械臂532自氣鎖室530移至FOUPs 534其中一者,或移至對準器544。
應注意,控制基板移動的電腦可位於群集架構的局部中、或可位於生產樓層中之群集架構的外部、或位於遠端位置且透過網路而連接至群集架構。參考圖4描述於前文的控制器可與圖5中的工具一起實施。
實驗1
使數個基板在各種偏壓功率下暴露於氯電漿及氬電漿之循環。此等基板材料包含矽、鍺、氮化鎵、鎢、鈷、及非晶碳。結果概述於圖6A、6B、7A、7B、8A、8B、及9A、及9B中、以及以下表1中。表1概述矽及鍺之粗糙度的結果與觀察。
如所顯示,顯示於圖6A中的矽基板在執行所揭露實施例之前具有0.28nm均方根(RMS)的粗糙度,而如顯示於圖6B中,執行所揭露實施例在蝕刻了50nm後造成0.4nm RMS的ALE後粗糙度。儘管該數值較高,但如所顯示,基板係明顯地更平滑。
顯示於圖7A中的鍺基板在執行所揭露實施例之前具有0.8nm RMS的粗糙度,而如顯示於圖7B中,執行所揭露實施例在蝕刻了65nm後造成0.9nm RMS的ALE後粗糙度。應注意,在此實驗中結果顯示平滑度受到維持。
顯示於圖8A中的鎢基板經受了所揭露之實施例,其在蝕刻了6nm鎢後造成了如顯示於圖8B中之ALE後的基板。氯電漿及氬電漿的循環加上偏壓使膜平滑。
如顯示於圖9A中具有非晶碳的基板具有0.39nm RMS的初始粗糙度。圖9B顯示蝕刻及平滑化後之基板的穿透式電子顯微鏡(TEM)影像。使基板暴露於60Vb之偏壓下的氧電漿及氬電漿循環。總共有50nm的材料被蝕刻,且所造成的膜粗糙度為0.28nm RMS。
氮化鎵基板(未顯示)在執行所揭露實施例之前具有0.75nm RMS的粗糙度,而執行所揭露實施例造成了0.55nm RMS的ALE後粗糙度。氯電漿及氬電漿的循環加上偏壓蝕刻了22nm的材料,並使膜平滑。
鈷基板(未顯示)在執行所揭露實施例之前具有每TEM影像6-8nm粗糙度的粗糙度,而執行所揭露實施例造成了每TEM影像2nm粗糙度的ALE後粗糙度。氯電漿及氬電漿的循環加上偏壓使膜平滑。
儘管已為了清楚理解之目的而詳加敘述前述實施例,但顯而易見的,在所附請求項之範圍內,可實施某些變更及修改。應注意,實施本實施例之製程、系統、及設備有許多替代方式。因此,應將本發明實施例視為說明性的,而非限制性的,且不將該等實施例限於本說明書中所提出的細節。
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Claims (22)
- 一種蝕刻及平滑化基板表面的方法,該方法包含:(a)使基板表面暴露於反應物,並引燃反應物電漿,以改質該基板表面的層;及(b)使所改質的層暴露於惰性氣體,並在偏壓下引燃惰性電漿,且達一段足以移除所改質之層但無濺射情形的持續時間,其中移除所改質的層之後的該基板表面,較使該基板表面暴露於該反應物之前的該基板表面更為平滑。
- 如申請專利範圍第1項之蝕刻及平滑化基板表面的方法,其中該基板表面包含選自由氮化鋁鎵、氮化鎵、鎢、及鈷所構成之群組的材料。
- 如申請專利範圍第2項之蝕刻及平滑化基板表面的方法,其中該基板表面包含鍺,而該偏壓係介於約20Vb至約35Vb之間。
- 如申請專利範圍第2項之蝕刻及平滑化基板表面的方法,其中該基板表面包含矽,而該偏壓係介於約35Vb至約65Vb之間。
- 如申請專利範圍第2項之蝕刻及平滑化基板表面的方法,其中該基板表面包含氮化鎵,而該偏壓係介於約50Vb至約100Vb之間。
- 如申請專利範圍第2項之蝕刻及平滑化基板表面的方法,其中該基板表面包含鎢,而該偏壓係介於約70Vb至約80Vb之間。
- 如申請專利範圍第1項之蝕刻及平滑化基板表面的方法,其中該基板表面包含非晶碳,而該反應物為氧。
- 如申請專利範圍第1-6項其中任一項之蝕刻及平滑化基板表面的方法,其中該反應物為含鹵素的反應物。
- 如申請專利範圍第1-6項其中任一項之蝕刻及平滑化基板表面的方法,其中該反應物為含硼的鹵化物。
- 如申請專利範圍第1-6項其中任一項之蝕刻及平滑化基板表面的方法,其中該反應物為氯及三氯化硼的組合。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中該惰性氣體係選自由氮、氬、氖、氦、及其組合所構成的群組。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中該偏壓功率小於約100Vb。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,更包含重複使該基板表面暴露於該反應物以及使所改質的層暴露。
- 如申請專利範圍第13項之蝕刻及平滑化基板表面的方法,其中在使該基板表面暴露於該反應物之後及在使所改質的層暴露之前吹淨容置包含該基板表面之基板的製程腔室。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中在使該基板表面暴露於該反應物之前的該基板表面之粗糙度為約100nm。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中該基板表面係位於包含反射性多層膜的基板上,該反射性多層膜使用作為用於紫外線微影的遮罩。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中該惰性電漿中所產生的離子以一角度被導向該基板表面。
- 如申請專利範圍第17項之蝕刻及平滑化基板表面的方法,其中該離子係由轉動的元件所產生。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中在醫療應用中,平滑化該基板表面以減少該基板表面的表面面積並降低反應性。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中平滑化該基板表面以形成平滑化之表面,以使用於太空或軍事應用的精密光學元件中。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中平滑化該基板表面以減少該基板表面的表面面積並降低病原反應性。
- 如申請專利範圍第1-7項其中任一項之蝕刻及平滑化基板表面的方法,其中平滑化該基板表面以形成平滑化之表面,以使用於精密光學元件中。
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2016
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2018
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TW201719712A (zh) | 2017-06-01 |
KR20170031041A (ko) | 2017-03-20 |
US10304659B2 (en) | 2019-05-28 |
US20180233325A1 (en) | 2018-08-16 |
US20170069462A1 (en) | 2017-03-09 |
US9984858B2 (en) | 2018-05-29 |
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