TWI684260B - 電子封裝件及其製法 - Google Patents

電子封裝件及其製法 Download PDF

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Publication number
TWI684260B
TWI684260B TW106115597A TW106115597A TWI684260B TW I684260 B TWI684260 B TW I684260B TW 106115597 A TW106115597 A TW 106115597A TW 106115597 A TW106115597 A TW 106115597A TW I684260 B TWI684260 B TW I684260B
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Taiwan
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supporting structure
supporting
electronic
electronic package
manufacturing
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TW106115597A
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English (en)
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TW201901914A (zh
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陳睿豐
張正楷
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矽品精密工業股份有限公司
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Priority to TW106115597A priority Critical patent/TWI684260B/zh
Priority to CN201710382542.3A priority patent/CN108878395A/zh
Priority to US15/663,963 priority patent/US20180331027A1/en
Publication of TW201901914A publication Critical patent/TW201901914A/zh
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Publication of TWI684260B publication Critical patent/TWI684260B/zh

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Abstract

一種電子封裝件及其製法，係於一承載結構堆疊組合上堆疊天線基板，因而無需於該承載結構堆疊組合中增加佈設面積，即可依需求規劃天線長度，藉此達到天線運作之需求。

Description

電子封裝件及其製法
本發明係有關一種電子封裝件，尤指一種具天線結構之電子封裝件。
隨著電子產業的蓬勃發展，電子產品也逐漸邁向多功能、高性能的趨勢。目前無線通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號。為了滿足消費性電子產品的外觀設計需求，無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發，其中，平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用於手機(cell phone)、個人數位助理(Personal Digital Assistant，簡稱PDA)等電子產品之無線通訊模組中。
第1圖係習知無線通訊模組之立體示意圖。如第1圖所示，該無線通訊模組1係包括：一基板10、設於該基板10上之複數電子元件11、一天線結構12以及封裝材13。該基板10係為電路板並呈矩形體。該電子元件11係設於該基板10上且電性連接該基板10。該天線結構12係為平 面型且具有一天線本體120與一導線121，該天線本體120藉由該導線121電性連接該電子元件11。該封裝材13覆蓋該電子元件11與該部分導線121。
惟，習知無線通訊模組1中，該天線結構12係為平面型，故基於該天線結構12與該電子元件11之間的電磁輻射特性及該天線結構12之體積限制，而於製程中，該天線本體120難以與該電子元件11整合製作，亦即該封裝材13僅覆蓋該電子元件11，並未覆蓋該天線本體120，致使封裝製程之模具需對應該些電子元件11之佈設區域，而非對應該基板10之尺寸，因而不利於封裝製程。
再者，因該天線結構12係為平面型，故當需增加該天線結構12之長度時，需於該基板10之表面上增加佈設區域(未形成封裝材13之區域)以形成該天線本體120，但該基板10之長寬尺寸均為固定，因而難以增加佈設區域的面積，致使無法增加該天線結構12之長度，因而無法達到天線運作之需求。
因此，如何克服上述習知技術之種種問題，實已成目前亟欲解決的課題。
鑑於上述習知技術之種種缺失，本發明係揭露一種電子封裝件，係包括：承載結構堆疊組合，係包含藉由複數支撐件相互堆疊之第一承載結構與第二承載結構，並於該第一承載結構與第二承載結構之間結合有電子元件；以及天線基板，係設於該第二承載結構上。
本發明復揭露一種電子封裝件之製法，係包括：提供一承載結構堆疊組合，其包含藉由複數支撐件相互堆疊之第一承載結構與第二承載結構，並於該第一承載結構與第二承載結構之間結合有電子元件；以及設置天線基板於該第二承載結構上。
前述之製法中，該承載結構堆疊組合之製程係包括：設置該支撐件與該電子元件於該第一承載結構上；形成包覆層於該第一承載結構上以包覆該電子元件與支撐件；以及形成該第二承載結構於該包覆層上，使該支撐件電性連接該第一承載結構與第二承載結構。
前述之製法中，該承載結構堆疊組合之製程係包括：設置該電子元件於該第二承載結構上；以及將該第一承載結構藉由該支撐件堆疊於該第二承載結構上。
前述之電子封裝件及其製法中，該支撐件電性連接該第一承載結構與第二承載結構。
前述之電子封裝件及其製法中，該電子元件電性連接該第二承載結構。
前述之電子封裝件及其製法中，該電子元件係為主動元件。
前述之電子封裝件及其製法中，該天線基板係形成有至少一天線佈設層。
前述之電子封裝件及其製法中，該天線基板以導電元件設於該第二承載結構上。
前述之電子封裝件及其製法中，該天線基板以結合層 設於該第二承載結構上。
前述之電子封裝件及其製法中，復包括形成包覆層於該第一承載結構與第二承載結構之間以包覆該電子元件與支撐件。
前述之電子封裝件及其製法中，復包括設置電子裝置於該第一承載結構上。
由上可知，本發明之電子封裝件及其製法中，係藉由先製作完該承載結構堆疊組合，再將該天線基板堆疊於該承載結構堆疊組合之第二承載結構上，以於製程中，包覆層無需配合該天線基板，使封裝製程之模具能對應該第一承載結構或第二承載結構之尺寸，而有利於封裝製程。
再者，利用該天線基板之設計，以依需求於該天線基板上規劃天線佈設區域，因而無需於該第一承載結構或第二承載結構之表面上增加佈設區域，故相較於習知技術，本發明能於預定的第一承載結構或第二承載結構尺寸下於該天線基板上規劃該天線佈設層之長度，因而得以達到天線運作之需求，且能使該電子封裝件符合微小化之需求。
1‧‧‧無線通訊模組
10‧‧‧基板
11,21,31‧‧‧電子元件
12‧‧‧天線結構
120‧‧‧天線本體
121‧‧‧導線
13‧‧‧封裝材
2,3‧‧‧電子封裝件
2a,3a‧‧‧承載結構堆疊組合
2b‧‧‧連接器
2c,3c‧‧‧封裝結構
20,30‧‧‧第一承載結構
20a,30a‧‧‧第一側
20b,30b‧‧‧第二側
200‧‧‧第一絕緣層
201‧‧‧第一線路層
21a‧‧‧作用面
21b‧‧‧非作用面
210,310‧‧‧電極墊
211,212‧‧‧保護膜
22,32‧‧‧導電凸塊
23,33‧‧‧支撐件
24‧‧‧固晶層
25,35‧‧‧包覆層
26,36‧‧‧第二承載結構
260,260’‧‧‧第二絕緣層
261,261’‧‧‧第二線路層
27a,27b‧‧‧導電元件
270‧‧‧塊底下金屬層
28‧‧‧天線基板
280‧‧‧天線佈設層
29,39‧‧‧絕緣保護層
330‧‧‧核心塊
331‧‧‧導電材
34‧‧‧底膠
37‧‧‧結合層
9‧‧‧承載板
90‧‧‧離型層
91‧‧‧黏著層
S‧‧‧切割路徑
第1圖係為習知無線通訊模組之立體示意圖；以及第2A至2F圖係為本發明之電子封裝件之製法之第一實施例的剖面示意圖；以及第3A至3F圖係為本發明之電子封裝件之製法之第二實施例的剖面示意圖；其中，第3C’圖係為對應第3C圖之另一實施例之剖面示意圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如“上”、“第一”、“第二”及“一”等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2F圖係為本發明之電子封裝件2之製法之第一實施例的剖面示意圖。
如第2A圖所示，於一承載板9上設有第一承載結構20，該第一承載結構20具有相對之第一側20a與第二側20b，且該第一承載結構20以其第二側20b結合至該承載板9上。接著，於該第一側20a上形成複數電性連接該第一承載結構20之支撐件23，且設置至少一電子元件21於該第一承載結構20之第一側20a上。
於本實施例中，該第一承載結構20係為無核心層 (coreless)之線路構造，其包括至少一第一絕緣層200與設於該第一絕緣層200上之一第一線路層201，如線路重佈層(redistribution layer，簡稱RDL)。例如，形成該第一線路層201之材質係為銅，且形成該第一絕緣層200之材質係為如聚對二唑苯(Polybenzoxazole，簡稱PBO)、聚醯亞胺(Polyimide，簡稱PI)、預浸材(Prepreg，簡稱PP)等之介電材。
再者，該承載板9例如為半導體材質(如矽或玻璃)之圓形板體，其上以塗佈方式依序形成有一離型層90與一黏著層91，以供該第一承載結構20設於該黏著層91上。
又，該支撐件23係例如為柱狀體、線狀體或球狀體，其設於該第一線路層201上並電性連接該第一線路層201，且形成該支撐件23之材質係為如銅、金之金屬材或銲錫材。應可理解地，該支撐件23之種類繁多，例如亦可為被動元件，並不限於上述。
另外，該電子元件21係為主動元件、被動元件或其二者組合，且該主動元件係例如半導體晶片，而該被動元件係例如電阻、電容及電感。於本實施例中，該電子元件21係為半導體晶片，其具有相對之作用面21a與非作用面21b，該電子元件21係以其非作用面21b藉由一固晶層24黏固於該第一承載結構20之第一側20a上，且該作用面21a具有複數電極墊210，並於該電極墊210上形成有導電凸塊22與兩層覆蓋該些電極墊210與導電凸塊22之保護膜211,212，其中，該保護膜211,212係例如為聚對二唑苯 (PBO)，且該導電凸塊22係為如導電線路、銲球之圓球狀、或如銅柱、銲錫凸塊等金屬材之柱狀、或銲線機製作之釘狀(stud)，但不限於此。
如第2B圖所示，形成一包覆層25於該第一承載結構20之第一側20a上，以令該包覆層25包覆該電子元件21與該些支撐件23，再藉由整平製程，令上層之保護膜212、該支撐件23之端面與該導電凸塊22之端面外露於該包覆層25，使該包覆層25之上表面齊平上層之保護膜212、該支撐件23之端面與該導電凸塊22之端面。
於本實施例中，該包覆層25係為絕緣材，如聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)，其可用壓合(lamination)或模壓(molding)之方式形成於該第一承載結構20之第一側20a上。
再者，該整平製程係藉由研磨方式，移除該支撐件23、保護膜212、導電凸塊22與包覆層25之部分材質，而使該包覆層25之上表面齊平保護膜212、該支撐件23之端面與該導電凸塊22之端面。
如第2C圖所示，形成一第二承載結構26於該包覆層25上，使該第二承載結構26堆疊於該第一承載結構20上以形成一承載結構堆疊組合2a，且令該第二承載結構26電性連接該些支撐件23與該導電凸塊22。
於本實施例中，該第二承載結構26係為無核心層之線路構造，其包括複數第二絕緣層260,260’、及設於該第二 絕緣層260,260’上之複數如RDL之第二線路層261,261’，且最外層之第二絕緣層260’可作為防銲層，以令最外層之第二線路層261’外露於該防銲層。或者，該第二承載結構26亦可僅包括單一第二絕緣層260及單一第二線路層261。
再者，形成該第二線路層261,261’之材質係為銅，且形成該第二絕緣層260,260’之材質係為如聚對二唑苯(PBO)、聚醯亞胺(PI)、預浸材(PP)之介電材。
又，形成複數如銲球之導電元件27a於最外層之第二線路層261’上。例如，可形成一凸塊底下金屬層(Under Bump Metallurgy，簡稱UBM)270於最外層之第二線路層261’上，以利於結合該導電元件27a。
如第2D圖所示，接置一天線基板28於該些導電元件27a上。
於本實施例中，該天線基板28係為封裝基板型式，其可利用RDL製程形成有至少一天線佈設層280。
如第2E圖所示，移除該承載板9及其上之離型層90與黏著層91。之後，先翻轉整體結構，再形成複數如銲球之導電元件27b於該第一承載結構20之第二側20b上，以接置電子裝置，例如至少一連接器2b或如系統級封裝(System in package，簡稱SiP)之封裝結構2c。
於本實施例中，可形成一如防銲層之絕緣保護層29於該第一承載結構20之第二側20b上，且於該絕緣保護層29中形成複數開孔，以令該第一線路層201外露於該些開 孔，俾供結合該些導電元件27b。
如第2F圖所示，沿如第2E圖所示之切割路徑S進行切單製程，以完成該電子封裝件2之製法。
本實施例之製法中，係先製作完該承載結構堆疊組合2a，再將該天線基板28堆疊於該承載結構堆疊組合2a之第二承載結構26上，以於製程中，該包覆層25無需配合該天線基板28，使封裝製程之模具能對應該第一承載結構20之尺寸，因而有利於封裝製程。
再者，利用該天線基板28之設計，以依需求於該天線基板28上規劃天線佈設區域，因而無需於該第一或第二承載結構20,26之表面上增加佈設區域，故相較於習知技術，本發明之製法能於預定的第一或第二承載結構20,26尺寸下於該天線基板28上規畫該天線佈設層280之長度，因而得以達到天線運作之需求，且能使該電子封裝件2符合微小化之需求。
第3A至3F圖係為本發明之電子封裝件3之第二實施例之製法之剖視示意圖。本實施例與第一實施例之差異在於製程之不同，其組成構件大致相同，故以下僅說明相異處，而不再贅述相同處。
如第3A圖所示，提供一設有複數支撐件33之第一承載結構30、及一設有電子元件31之第二承載結構36。
所述之第一承載結構30係具有相對之第一側30a及第二側30b，且該第一側30a及第二側30b上形成有例如防銲層之絕緣保護層39。於本實施例中，該第一承載結構30 係為封裝基板，其包含具有核心層之線路構造或無核心層之線路構造，該線路構造係包含介電層及形成於該介電層上形成線路層，如扇出(fan out)型RDL。具體地，形成該介電層之材質係例如預浸材(PP)、聚醯亞胺(PI)、環氧樹脂或玻纖(glass fiber)，且形成該線路層之材質係為金屬，如銅。應可理解地，該第一承載結構30亦可為其它承載晶片之載體，如有機板材、晶圓(wafer)、或其它具有金屬佈線(routing)之載板，並不限於上述，且該第一承載結構30因屬於板材而可免用如第2A圖所示之承載件9。
再者，該第二承載結構36係為封裝基板，其包含具有核心層之線路構造或無核心層之線路構造，該線路構造係包含介電層及形成於該介電層上形成線路層，如扇出型RDL。具體地，形成該介電層之材質係例如預浸材(PP)、聚醯亞胺(PI)、環氧樹脂或玻纖(glass fiber)，且形成該線路層之材質係為金屬，如銅。應可理解地，該第二承載結構36亦可為其它承載晶片之載體，如有機板材、晶圓(wafer)、或其它具有金屬佈線(routing)之載板，並不限於上述。
所述之電子元件31以其電極墊310藉由複數導電凸塊32以覆晶方式電性連接該第二承載結構36。
所述之支撐件33係形成於該第一承載結構30之第一側30a上。於本實施例中，該支撐件33係為多種材質形式，其具有核心塊330與包覆該核心塊330之導電材331，其中，該核心塊330係為如塑料球之絕緣材或如銅球之金屬 材，且該導電材331係為銲錫材，如鎳錫、錫鉛或錫銀，但不限於此。應可理解地，該支撐件33亦可為被動元件或如第2A圖所示之單一材質形式。
如第3B圖所示，對應結合該些支撐件33於該第二承載結構36上，並回銲該導電材331，使該第一承載結構30堆疊於該第二承載結構36上以形成一承載結構堆疊組合3a，且該電子元件31位於該第一承載結構30與該第二承載結構36之間。
於本實施例中，該第一承載結構30藉由該些支撐件33電性連接該第二承載結構36。
如第3C圖所示，形成一包覆層35於該第一承載結構30與該第二承載結構36之間，以包覆該些支撐件33、導電凸塊32與該電子元件31。
於本實施例中，如第3C’圖所示，亦可先形成底膠34於該第二承載結構36與該電子元件31之間以包覆該些導電凸塊32，再形成該包覆層35，以包覆該些支撐件33、底膠34與該電子元件31。
如第3D圖所示，於該第二承載結構36上藉由一結合層37黏固結合一天線基板28。
如第3E圖所示，形成複數如銲球之導電元件27b於該第一承載結構30之第二側30b上，以接置電子裝置，例如至少一連接器2b或如系統級封裝(SiP)之封裝結構3c。
如第3F圖所示，沿如第3E圖所示之切割路徑S進行切單製程，以完成該電子封裝件3之製法。
本實施例之製法中，係先製作完該承載結構堆疊組合3a，再將該天線基板28堆疊於該承載結構堆疊組合3a之第二承載結構36上，以於製程中，該包覆層35無需配合該天線基板28，使封裝製程之模具能對應該第一或第二承載結構30,36之尺寸，因而有利於封裝製程。
再者，利用該天線基板28之設計，以依需求於該天線基板28上規劃天線佈設區域，因而無需於該第一或第二承載結構30,36之表面上增加佈設區域，故相較於習知技術，本發明之製法能於預定的第一或第二承載結構30,36尺寸下於該天線基板28上規畫該天線佈設層280之長度，因而得以達到天線運作之需求，且能使該電子封裝件3符合微小化之需求。
本發明復提供一種電子封裝件2,3，其包括：一承載結構堆疊組合2a,3a以及一天線基板28。
所述之承載結構堆疊組合2a,3a係包含藉由複數支撐件23,33相互堆疊之第一承載結構20,30與第二承載結構26,36，並於該第一承載結構20,30與第二承載結構26,36之間設有至少一電子元件21,31。
所述之天線基板28係疊設於該第二承載結構26,36上。
於一實施例中，該支撐件23,33電性連接該第一承載結構20,30與第二承載結構26,36。
於一實施例中，該電子元件21,31電性連接該第二承載結構26,36。
於一實施例中，該電子元件21,31係為主動元件。
於一實施例中，該天線基板28係形成有至少一天線佈設層280。
於一實施例中，該天線基板28以複數導電元件27a設於該第二承載結構26上。
於一實施例中，該天線基板28以結合層37設於該第二承載結構36上。
於一實施例中，所述之電子封裝件2,3復包括一包覆層25,35，係形成於該第一承載結構20,30與第二承載結構26,36之間以包覆該電子元件21,31與支撐件23,33。
於一實施例中，所述之電子封裝件2,3復包括設於該第一承載結構20,30上之電子裝置。
綜上所述，本發明之電子封裝件及其製法中，主要藉由將天線基板設於整合有電子元件之承載結構堆疊組合上之設計，以於製程中，包覆層無需配合天線基板，使封裝製程之模具能對應該承載結構堆疊組合之第一或第二承載結構之尺寸，因而有利於封裝製程。
再者，利用該天線基板之設計，而無需於該第一或第二承載結構之表面上增加佈設區域，故本發明能於預定的第一或第二承載結構尺寸下於該天線基板上規畫該天線佈設層之長度，因而得以達到天線運作之需求，且能使該電子封裝件符合微小化之需求。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可 在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
2‧‧‧電子封裝件
2a‧‧‧承載結構堆疊組合
2b‧‧‧連接器
2c‧‧‧封裝結構
20‧‧‧第一承載結構
20a‧‧‧第一側
20b‧‧‧第二側
21‧‧‧電子元件
23‧‧‧支撐件
25‧‧‧包覆層
26‧‧‧第二承載結構
27a‧‧‧導電元件
28‧‧‧天線基板
280‧‧‧天線佈設層

Claims (14)

  1. 一種電子封裝件，係包括：承載結構堆疊組合，係包含藉由複數支撐件相互堆疊之第一承載結構與第二承載結構，並於該第一承載結構與第二承載結構之間結合有電子元件；天線基板，係以結合層設於該第二承載結構上；以及電子裝置，係藉由複數導電元件設於該第一承載結構上遠離該第二承載結構之一側。
  2. 如申請專利範圍第1項所述之電子封裝件，其中，該支撐件電性連接該第一承載結構與第二承載結構。
  3. 如申請專利範圍第1項所述之電子封裝件，其中，該電子元件電性連接該第二承載結構。
  4. 如申請專利範圍第1項所述之電子封裝件，其中，該電子元件係為主動元件。
  5. 如申請專利範圍第1項所述之電子封裝件，其中，該天線基板係形成有至少一天線佈設層。
  6. 如申請專利範圍第1項所述之電子封裝件，復包括形成於該第一承載結構與第二承載結構之間以包覆該電子元件與支撐件之包覆層。
  7. 一種電子封裝件之製法，係包括：提供一承載結構堆疊組合，其包含藉由複數支撐件相互堆疊之第一承載結構與第二承載結構，並於該第一承載結構與第二承載結構之間結合有電子元件； 以結合層設置天線基板於該第二承載結構上；以及藉由複數導電元件設置電子裝置於該第一承載結構上遠離該第二承載結構之一側。
  8. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該承載結構堆疊組合之製程係包括：設置該支撐件與該電子元件於該第一承載結構上；形成包覆層於該第一承載結構上以包覆該電子元件與支撐件；以及形成該第二承載結構於該包覆層上，使該支撐件電性連接該第一承載結構與第二承載結構。
  9. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該承載結構堆疊組合之製程係包括；設置該電子元件於該第二承載結構上；以及將該第一承載結構藉由該支撐件堆疊於該第二承載結構上。
  10. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該支撐件電性連接該第一承載結構與第二承載結構。
  11. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該電子元件電性連接該第二承載結構。
  12. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該電子元件係為主動元件。
  13. 如申請專利範圍第7項所述之電子封裝件之製法，其中，該天線基板係形成有至少一天線佈設層。
  14. 如申請專利範圍第7項所述之電子封裝件之製法，復包括形成包覆層於該第一承載結構與第二承載結構之間以包覆該電子元件與支撐件。
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