TWI682459B - Plasma activated conformal dielectric film deposition - Google Patents

Abstract

Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.

Description

Plasma activated conformal dielectric film deposition

The present invention relates to conformal dielectric thin film deposition, and in particular to plasma activated conformal dielectric thin film deposition.

Various thin film layers used in semiconductors can be deposited by an atomic layer deposition (ALD) process. However, the existing ALD process may not be suitable for the deposition of highly conformal dielectric films.

The various implementation aspects disclosed herein relate to methods and apparatuses for depositing thin films on the substrate surface. In some embodiments, the method includes depositing a thin film by a surface-mediated reaction of the thin film growing during one or more cycles of reactant adsorption and reaction. In one embodiment, the method has the feature of intermittent delivery of doped species to the film between cycles of adsorption and reaction. In some cases, the dopant species can be driven across the surface of the substrate to the doped region of the substrate.

In one embodiment, the disclosed method deposits a thin film on the substrate surface in the reaction chamber. The method may have the following operational characteristics: (a) the first reactant is introduced into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface; (b) the first reactant is adsorbed on the substrate surface When it is on, introduce the second reactant into the reaction chamber; (c) expose the substrate surface to the plasma to drive the reaction between the first and second reactants on the substrate surface, thereby forming a part of the film; ( d) Repeat at least one of (a)-(c) (E) Introduce dopant-containing materials not introduced during (a)-(d) into the reaction chamber under conditions that allow dopant-containing materials to contact the exposed surface of the film; and (f) The dopant-containing material introduces the dopant into the thin film. Introducing the dopant into the film may involve exposing the dopant-containing material to the plasma.

In various embodiments, the method additionally includes driving dopants from the thin film into features on the surface of the substrate on which the thin film remains. The doping of the dopant from the thin film can be accomplished by tempering the thin film. In some applications, the thin film remains on the three-dimensional features on the surface of the substrate and thereby drives the dopant from the thin film to provide conformal diffusion of the dopant into the feature. In a particular application, the features have a width no greater than about 40 nanometers.

In some embodiments, the film is a dielectric film. In some cases, the total film thickness is between about 10-100 Angstroms. In various embodiments, the concentration of dopants in the thin film is between about 0.01 and 10 weight percent.

In some embodiments, the method of this embodiment additionally includes repeating (a)-(c) after (e) or (f). In some embodiments, the method of this implementation aspect additionally includes repeating (a)-(e). In some embodiments, the number of thin films deposited during (a)-(c) is between about 0.5 and 1 angstrom.

In some embodiments, the method additionally includes purging the second reactant from the reaction chamber before exposing the substrate surface to the plasma. This removal can be accomplished by flowing a gas containing oxidant into the reaction chamber. In some embodiments, the first and second reactants coexist in the gas phase in the reaction chamber, and the first and second reactants do not significantly react with each other in the reaction chamber until exposed to electricity in (c) Pulp.

In some embodiments, the first reactant is an oxidant such as nitrous oxide. In some embodiments, the second reactant is a dielectric precursor, such as (i) alkylamino silanes (SiHx(NR2)4-x), where x=1-3 and R comprises an alkyl Group; or (ii) halosilanes (SiHxY4-x), where x=1-3, and Y contains Cl, Br, and I. In a specific embodiment, the second reactant is BTBAS. In some embodiments, the dopant-containing material is phosphine, arsenide Hydrogen, alkyl boron, alkyl gallium, alkyl phosphorus, phosphorus halide, arsenic halide, gallium halide, boron halide, alkyl boron, or diborane.

In another embodiment, the disclosed method deposits a dielectric film on the substrate surface in the reaction chamber. This method may have the following operational characteristics: (a) Under the conditions that allow the first reactant to be adsorbed onto the substrate surface, the oxidant flows into the reaction chamber; (b) As the oxidant continues to flow into the reaction chamber, the dielectric The precursor is introduced into the reaction chamber; (c) The substrate surface is exposed to the plasma to drive the reaction between the dielectric precursor and the oxidant on the substrate surface to form a part of the film; (d) Introducing the dopant-containing material not introduced during (a)-(c) into the reaction chamber under the condition that the dopant material contacts the exposed surface of the film; and (e) allowing the dopant to contain the dopant The material is incorporated into the dielectric film. In one embodiment, the dielectric precursor is BTBAS or another precursor as identified in the previous implementation.

In addition, the method may need to repeat operations (a)-(c) one or more times. In a specific example, when (a) is executed first, the oxidant contains the first ratio of oxygen to nitrogen; however, when (a) is executed later, the oxidizer contains the second ratio of oxygen to nitrogen. The second ratio is smaller than the first ratio. For example, when (a) is performed first, the oxidizing agent may contain elemental oxygen; however, when (a) is repeated, the oxidizing agent includes nitrous oxide. In some embodiments, when (c) is performed first, the substrate is at the first temperature; and when (c) is repeated, the substrate is at the second temperature, which is higher than the first temperature.

In some cases, the method further includes driving the dopant from the dielectric film into the substrate. In some embodiments, the method further includes contacting the substrate surface with the dopant-containing material before (a).

In another embodiment, the disclosed method deposits a thin film on the substrate surface in the reaction chamber according to the following operations: (a) The dielectric precursor is introduced under conditions that allow the precursor to be adsorbed on the substrate surface In the reaction chamber; (b) after the precursor remains adsorbed on the substrate surface, remove the dielectric precursor from the reaction chamber; (c) expose the substrate surface to the plasma to drive the dielectric precursor on the substrate surface Reaction to form a part of the dielectric film; and (d) under the condition that the dopant precursor is allowed to contact part of the dielectric film, the dopant not introduced during (a)-(c) The precursor is introduced into the reaction chamber. in In some embodiments, the method additionally involves flowing the oxidant into the reaction chamber before and during (a)-(c). In some cases, the method additionally involves reacting the dopant precursor to incorporate the dopant into the thin film.

Yet another embodiment aspect relates to an apparatus for depositing a thin film on the surface of a substrate. The apparatus may have the following characteristics: a reaction chamber includes a device for holding the substrate during the deposition of the doped dielectric film; one or more process gas inlets coupled to the reaction chamber; and a Controller. The controller is designed or configured to cause the device to perform the following operations: (a) introduce the first reactant into the reaction chamber under conditions that allow the first reactant to be adsorbed onto the substrate surface; (b) at the first When the reactant is adsorbed on the substrate surface, the second reactant is introduced into the reaction chamber; (c) The substrate surface is exposed to the plasma to drive the reaction between the first and second reactants on the substrate surface, thereby forming a thin film (D) Repeat (a)-(c) at least once; (e) Under the conditions that allow the dopant-containing material to contact the exposed surface of the film, it will not be introduced during (a)-(d) Introducing the dopant-containing material into the reaction chamber; and (f) introducing the dopant from the dopant-containing material into the thin film. The controller may be designed or configured to indicate implementation of other methods such as those discussed in accordance with other implementation aspects.

In some embodiments, the controller is more designed or configured to cause the device to flow the oxidant into the reaction chamber before and during (a)-(d). In some embodiments, the controller is more designed or configured to cause (a)-(c) to be repeated after (e) or (f). In some embodiments, the controller is more designed or configured to cause dopants to be driven from the thin film into features on the surface of the substrate on which the thin film remains. The doping of the dopant from the thin film can be accomplished by tempering the thin film. In some embodiments, the controller is more designed or configured to cause the interval between one or more repetitions of (a)-(d) to execute (e), and wherein the interval changes during the deposition of the thin film.

In various embodiments, the controller is more designed or configured to cause the second reactant to be purged from the reaction chamber before the substrate surface is exposed to the plasma. In one example, purging is accomplished by flowing a gas containing oxidant into the reaction chamber under the direction of the controller.

These and other features will be described in more detail below with reference to related drawings.

100‧‧‧Timing chart

110A, 110B‧‧‧deposition cycle

120A, 120B‧‧‧A exposure stage

130‧‧‧saturated exposure time after reactant A

140A, 140B‧‧‧B exposure stage

150‧‧‧saturated exposure time after reactant B

160A‧‧‧Clear stage

160B‧‧‧Clear stage

180A, 180B ‧‧‧ plasma activation stage

190‧‧‧saturated exposure time after plasma

200‧‧‧Timing chart

210‧‧‧Deposition cycle

240A, 240B‧‧‧B exposure stage

260A‧‧‧Clear stage

300‧‧‧Timing chart

310‧‧‧Deposition

380‧‧‧Plasma activation stage

390‧‧‧Plasma treatment cycle

390A‧‧‧Plasma treatment and removal phase

390B‧‧‧Plasma treatment activation stage

400‧‧‧Timing chart

500‧‧‧Comparison

502,504‧‧‧Process

600‧‧‧Correlation

700‧‧‧Correlation

702、704‧‧‧CFD silicon dioxide film

800‧‧‧non-planar substrate

802, 802A, 802B, 802C

804‧‧‧Conformal film

900‧‧‧Timing chart

902‧‧‧CFD process stage

904‧‧‧Transitional stage

904A‧‧‧B exposure stage

904B‧‧‧Plasma activation stage

906‧‧‧PECVD process stage

1000‧‧‧Structure

1002‧‧‧ substrate

1006‧‧‧thick film

1008‧‧‧hole

1100‧‧‧Timing chart

1102‧‧‧Deposition

1104‧‧‧Etching stage

1106‧‧‧Deposition

1200‧‧‧non-planar substrate

1202‧‧‧Gap

1204‧‧‧film

1204A‧‧‧Upper area

1204B‧‧‧Lower area

1206‧‧‧recessed part

1300‧‧‧ processing station

1301‧‧‧Reagent Delivery System

1302‧‧‧Process chamber body

1303‧‧‧Evaporation point

1304‧‧‧Mixed container

1306‧‧‧Sprinkler

1308‧‧‧Dock

1310‧‧‧ Heater

1314‧‧‧RF power supply

1316‧‧‧ matching network

1318‧‧‧Butterfly valve

1320‧‧‧Inlet valve of mixed container

2400‧‧‧Processing tool

2402‧‧‧Inbound loading lock

2404‧‧‧Outbound loading lock

2406‧‧‧Robot

2408‧‧‧Box

2410‧‧‧Atmosphere

2412‧‧‧Dock

2414‧‧‧Process chamber

2416‧‧‧Chamber delivery port

2418‧‧‧Heating base

2450‧‧‧ system controller

2452‧‧‧ processor

2454‧‧‧ Mass storage device

2456‧‧‧Memory device

2458‧‧‧System control software

2490‧‧‧ Wafer handling system

2502‧‧‧Dielectric isolation layer

FIG. 1 schematically shows a timing diagram of an exemplary conformal thin film deposition (CFD) process according to an embodiment of the invention.

FIG. 2 schematically shows a timing diagram of another exemplary CFD process according to an embodiment of the invention.

FIG. 3 schematically shows a timing diagram of another exemplary CFD process according to an embodiment of the invention.

FIG. 4 schematically shows a timing diagram of an exemplary CFD process including a plasma processing cycle according to an embodiment of the present invention.

FIG. 5 shows an exemplary correlation between the wet etch rate ratio of the deposited film and the deposition temperature according to an embodiment of the present invention.

FIG. 6 shows an example correlation between the wet etch rate ratio of the deposited film and the film stress according to an embodiment of the present invention.

FIG. 7 shows an exemplary correlation between the film contaminant concentration of the deposited film and the deposition temperature according to an embodiment of the present invention.

FIG. 8 schematically shows an example cross-section of a non-planar substrate including a plurality of gaps.

FIG. 9 schematically shows a timing diagram of an exemplary CFD process including a transition to a PECVD process according to an embodiment of the present invention.

FIG. 10 schematically shows an example cross-section of gap filling including keyhole holes.

FIG. 11 schematically shows a timing diagram of an exemplary CFD process including in-situ etching according to an embodiment of the present invention.

FIG. 12A schematically shows an example cross section of a concave gap filling profile.

FIG. 12B schematically shows an example cross-section of the concave gap filling profile of FIG. 12A during an in-situ etching process according to an embodiment of the invention.

12C schematically shows an example cross-section of the gap-fill profile of FIG. 12B during the deposition process after in-situ etching according to an embodiment of the invention.

FIG. 13 schematically shows an example processing station according to an embodiment of the present invention.

FIG. 14 schematically shows an example processing tool including a plurality of processing stations and a controller according to an embodiment of the present invention.

FIG. 15 schematically shows an exemplary cross-sectional view of through silicon via during a CFD process including in-situ etching according to an embodiment of the present invention.

FIG. 16 illustrates a transistor having a three-dimensional gate structure in which the source and drain are formed as thin vertical structures that are difficult to dope by conventional ion implantation techniques.

Figure 17 presents the sequence of baseline CFD operations from left to right along the x-axis advancing time.

Figures 18 and 19 illustrate a CFD cycle in which dopants are deposited at the interface with the underlying substrate, followed by dopant delivery interspersed therein, and optionally protected with undoped CFD oxide films An example of completion of the "overlay" layer.

Figure 20 shows typical deposition blocks used to synthesize CFD BSG/PSG thin films.

Figure 21 shows that the step coverage of the CFD film on dense and separated structures is estimated to be ~100%.

The SIMS data presented in FIG. 22 shows that the average boron concentration in the CFD film can be adjusted in the range of about 0.5-3.5 wt% boron.

The manufacture of semiconductor devices usually involves depositing one or more thin films on a non-planar substrate in an integrated process. In some implementation aspects of the integrated process, the deposition is consistent with the substrate surface state The film is helpful. For example, a silicon nitride film can be deposited on top of the raised gate stack as a spacer layer to protect a small amount of doped source and drain regions from subsequent ion implantation processes.

In the spacer layer deposition process, a chemical vapor deposition (CVD) process can be used to form a silicon nitride film on a non-planar substrate, and then the silicon nitride film is anisotropically etched to form a spacer layer. However, as the distance between the gate stacks decreases, the mass transfer limitation of the CVD gas phase reaction may result in "bread-loafing" deposition effects. Such an effect usually exhibits a thicker deposit at the top surface of the gate stack and a thinner deposit at the bottom corner of the gate stack. In addition, because some dies can have regions with different device densities, the mass transfer effect on the wafer surface area can cause differences in film thickness within the die and within the wafer. These thickness differences can lead to over-etching in some areas and under-etching in other areas. This may reduce device performance and/or die yield.

Some methods corresponding to these problems involve atomic layer deposition (ALD). In contrast to CVD processes in which thermally activated gas phase reactions are used to deposit thin films, ALD processes use surface-mediated deposition reactions to deposit thin films on a layer-by-layer basis. In an example of an ALD process, the substrate surface including the group of surface active sites is exposed to the gas phase distribution of the first thin film precursor (P1). Some molecules of P1 can form a condensed phase on top of the substrate surface containing chemically adsorbed species and physically adsorbed molecules of P1. The reactor is then evacuated to remove the gas phase and physically adsorb P1 so that only chemisorbed species remain. The second thin film precursor (P2) is then introduced into the reactor to allow some P2 molecules to adsorb to the substrate surface. The reactor can be emptied again, this time to remove unbound P2. Subsequently, the thermal energy supplied to the substrate activates the surface reaction between the adsorbed molecules of P1 and P2, thereby forming a thin film layer. Finally, the reactor is evacuated to remove reaction by-products and possibly unreacted P1 and P2, and the ALD cycle is ended. Additional ALD cycles can be included to increase the film thickness.

Depending on the exposure time of the precursor application step and the adhesion coefficient of the precursor, in one example each ALD cycle can deposit a thin film layer between one-half and three Angstroms thick. Therefore, when the deposition is greater than For nanometers thick films, the ALD process can be time-consuming. Also, some precursors can have long exposure times to deposit conformal thin films, and they can also reduce wafer throughput time.

The conformal thin film can also be deposited on the flat substrate. For example, an anti-reflective layer for lithographic patterning applications can be formed from a planar stack containing alternating film types. Such an anti-reflection layer can be about 100 to 1000 Angstroms thick, which makes the ALD process less attractive than the CVD process. However, such an anti-reflective layer can also have a lower tolerance for the thickness difference within the wafer than many CVD processes. For example, a 600 Angstrom thick antireflection layer can tolerate a thickness range of less than 3 Angstroms.

Therefore, the various embodiments provided herein provide processes and equipment for plasma activated conformal thin film deposition (CFD) on non-planar and planar substrates. These embodiments include some, but not all, features used in the CFD process. Among these features are: (1) eliminating or reducing the time required to "clear" one or both of the reactants from the reaction chamber; (2) providing continuous flow of at least one reactant while intermitting a different reactant Flow into the reaction chamber; (3) when one of the reactants is present in the gas phase, instead of exciting the plasma when all the reactants are removed from the reaction chamber; (4) the deposited CFD is treated with plasma Thin film to modify thin film properties; (5) After depositing the first part of the thin film by CFD, usually a part of the thin film is deposited by PECVD in the same reaction chamber; (6) Etching between CFD stages Partially deposited film; and (7) In the case of only the film deposition cycle, the CFD film is doped by spreading the dopant delivery cycle. Of course, this list is not exhaustive. When considering the rest of the specification, various other CFD features will be apparent.

The concept of CFD "loop" is relevant to the discussion of various embodiments herein. Usually a cycle is the smallest set of operations required to perform a surface deposition reaction. The result of one cycle is to produce at least a portion of the thin film layer on the substrate surface. Generally, the CFD cycle will include only those steps necessary to deliver and adsorb each reactant to the substrate surface, and then react those adsorbed reactants to form a portion of the thin film layer. Of course, the cycle may include some auxiliary steps, such as removing one of the reactants or by-products and/or processing part of the deposited film. Generally speaking, a cycle contains only instances of a unique sequence of operations. As an example, a cycle may include the following operations: (i) delivery/adsorption of reactant A; (ii) delivery/adsorption of reactant B; (iii) purging B outside the reaction chamber; and (iv) applying electricity The slurry drives the surface reactions of A and B to form a part of the thin film layer on the surface.

The seven features mentioned above will be discussed further at this moment. In the following description, consider the CFD reaction in which one or more reactants are adsorbed to the substrate surface and then react by interacting with the plasma to form a thin film on the surface.

Feature 1 (continuous flow of reactants)-allows reactant A to continuously flow into the reaction chamber during one or more parts of the CFD cycle, however, the reactants usually do not flow into conventional ALD. In the conventional ALD, the reactant A flows in only for the purpose of adsorbing the reactant on the substrate surface. In other phases of the ALD cycle, no reactant A flows. However, according to some CFD embodiments described herein, reactant A flows in not only during the phase associated with its adsorption, but also during the phase of the CFD cycle where other non-adsorption A operations are performed. For example, in many embodiments, while the device is applying a second reactant (reactant B herein), reactant A is flowed into the reactor. Therefore, during at least a portion of the CFD cycle, reactants A and B coexist in the gas phase. In addition, when the plasma is applied to drive the reaction at the substrate surface, the reactant A may flow. Note that the continuously flowing reactants can be delivered to the reaction chamber together with a gas carrier such as argon.

The advantage of the continuous flow embodiment is that the established flow avoids delays and flow differences caused by the transient initialization and stabilization of the flow associated with flow opening and closing.

As a specific example, the oxide thin film may be deposited by a conformal thin film deposition process using a main reactant (sometimes referred to as a "solid component" precursor, or simply "reactant B" in this example). Bis(tert-butylamino)silane (BTBAS) is one such main reactant. In this example, the oxide deposition process involves the delivery of an oxidizing agent such as oxygen or nitrous oxide, which initially and continuously flows during the delivery of the main reactants at different stages of exposure. The oxidant also continued to flow in during the different plasma exposure stages. See, for example, the sequence described in FIG. 1. For comparison In contrast, in the conventional ALD process, when the solid component precursor is delivered to the reactor, the flow rate of the oxidant will stop. For example, when reactant B is delivered, then the flow of reactant A will stop.

In some specific examples, the continuously flowing reactants are "auxiliary" reactants. As used herein, the "auxiliary" reactant is not any reactant other than the main reactant. As suggested above, the main reactants contain elements that are solid at room temperature, which is helpful for thin films formed by CFD. Examples of such elements are metals (such as aluminum and titanium), semiconductors (such as silicon and germanium), and nonmetals or metalloids (such as boron). Examples of auxiliary reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkylamines, and the like.

The continuously flowing reactants can be provided at a fixed flow rate, or at a variable but controlled flow rate. In the latter case, as an example, when the main reactant is delivered during the exposure phase, the flow rate of the auxiliary reactant may be reduced. For example, in oxide deposition, an oxidant (such as oxygen or nitrous oxide) can continuously flow in during the entire deposition sequence, but when the main reactant (such as BTBAS) is delivered, its flow rate can be reduced. This increases the partial pressure of BTBAS during its application, thereby reducing the exposure time required to saturate the substrate surface. Just before the plasma is excited, the flow rate of the oxidant can be increased to reduce the possibility of the presence of BTBAS during the plasma exposure phase. In still other embodiments, the continuously flowing reactants flow at varying flow rates during two or more deposition cycles. For example, the reactants may flow at a first flow rate during the first CFD cycle and at a second flow rate during the second CFD cycle.

When most reactants are used and the flow rate of one of them is continuous, at least two of them will coexist in the gas phase during part of the CFD cycle. Likewise, after delivery of the first reactant without performing a purge step, the two reactants will coexist. Therefore, it may be important to use reactants that do not significantly react with each other in the gas phase where no activation energy is applied. In general, the reactants should not react until they are present on the surface of the substrate and exposed to plasma or another suitable non-thermal activation condition. Selecting such a reactant involves at least (1) the thermodynamic suitability of the desired reaction (Gibb's free energy <0), to And (2) the activation energy of the reaction (which should be large enough so that the reaction at the desired deposition temperature is negligible).

Feature 2 (reduction or elimination of removal steps)-In some embodiments, the process eliminates or reduces the time associated with the removal steps that would normally be performed in conventional ALD. In conventional ALD, each cleaning step is performed after each reactant is delivered and adsorbed onto the substrate surface. In the conventional ALD removal step, little or no adsorption or reaction occurs. In the CFD cycle, the clearance step is reduced or eliminated after at least one of the reactants is delivered. FIG. 1 presents an example of the manufacturing process in which the removal step is removed. The step of removing reactant A from the reaction chamber is not performed. In some cases, the purge step is not performed after the first reactant is delivered in the CFD cycle, but the purge step is selectively performed after the second or last delivered reactant is delivered.

The concept of CFD "clear" steps or stages appears in the various embodiments discussed herein. In general, the purge phase removes or purges one of the gas-phase reactants from the reaction chamber, and usually only occurs after the delivery of such reactants is complete. In other words, the reactants are no longer delivered to the reaction chamber during the purge phase. However, the reactants are still adsorbed on the substrate surface during the cleaning phase. Generally, the scavenging is used to remove any remaining gas-phase reactants in the chamber after the reactants are adsorbed on the substrate surface to a desired degree. The cleaning stage can also remove weakly adsorbed species (such as some precursor gametes or reaction byproducts) from the substrate surface. In ALD, the removal phase has been considered necessary to prevent the gas phase interaction of two reactants, or the interaction of a reactant with heat, plasma, or other driving forces for surface reactions. In general, and unless otherwise indicated herein, the purge phase can be achieved by (i) evacuating the reaction chamber, and/or (ii) flowing gas that does not contain the species to be purged through the reaction chamber. In the case of (ii), such a gas may be, for example, an inert gas or an auxiliary reactant (such as a continuously flowing auxiliary reactant).

The elimination in the purge phase can be achieved with or without continuous flow of other reactants. In the embodiment shown in FIG. 1, instead of removing the reactant A, it continues to flow in after it is adsorbed onto the substrate surface (illustrated by reference numeral 130 in the figure).

In various embodiments in which two or more reactants are used, the reactants whose removal steps are eliminated or reduced are auxiliary reactants. As an example, the auxiliary reactant is an oxidant or a nitrogen source, and the main reactant is a precursor containing silicon, boron, or germanium. Of course, the removal of the main reactants can also be reduced or eliminated. In some examples, the purge step is not performed after delivery of the auxiliary reactant, but the purge step is selectively performed after delivery of the primary reactant.

As mentioned, the clean-up phase does not have to be completely eliminated, but only reduces the duration compared to the clean-up phase in the conventional ALD process. For example, the purge phase of reactants (such as auxiliary reactants) during the CFD cycle may be performed for about 0.2 seconds or less, for example, for about 0.001 to 0.1 seconds.

Feature 3 (excitation of the plasma when one of the reactants is present in the gas phase)-with this feature, the plasma is excited before all reactants have been purged from the reaction chamber. This is in contrast to conventional ALD, where plasma activation or other reaction-driven operations are provided only after gas-phase reactants no longer exist in the reaction chamber. Note that when reactant A continues to flow during the plasma portion of the CFD cycle shown in Figure 1, this feature will necessarily exist. However, the disclosed embodiments are not limited to this approach. One or more reactants can flow in during the plasma portion of the CFD cycle without having to continue to flow in during the CFD cycle. In addition, the reactants present in the gas phase during plasma activation may be the main reactants or auxiliary reactants (when more than two reactants are used in the CFD cycle).

For example, a sequence may be (i) introducing reactant A, (ii) purging A, (iii) introducing reactant B while impacting the plasma while B flows, and (iv) purging. In such an embodiment, the process uses plasma-activated reactant species from the gas phase. This is a general example where CFD is not limited to a sequence of consecutive steps.

If the activation plasma is supplied during the time when the solid component precursor (main reactant) is supplied to the reactor, the step coverage may become less conformal, but the deposition rate will generally increase. However, if plasma activation occurs only during the delivery of an auxiliary reactant, this may not be the case. Plasma can activate gas-phase auxiliary components to make them more reactive, and thereby increase their reactivity in conformal thin film deposition reactions. In some embodiments, this feature is used when depositing silicon-containing films such as oxides, nitrides, or carbides.

Feature 4 (Plasma treatment for depositing CFD film)-In these embodiments, the plasma can serve two or more roles in the conformal film deposition process. One of its functions is to activate or drive the film formation reaction during each CFD cycle. Another function is to process the CFD film after one or more CFD cycles have been partially or completely deposited. Plasma processing is intended to modify one or more film properties. Usually (though not necessarily) the plasma treatment stage is carried out under conditions different from those used to activate the film formation reaction (ie drive the film formation reaction). As an example, the plasma treatment may be performed in the presence of a reducing or oxidizing environment (eg, in the presence of hydrogen or oxygen), but this may not be the case during the active part of the CFD cycle.

Plasma processing operations can be performed during each cycle of the CFD process, during every other cycle, or on some less frequent basis. This process can be performed at regular intervals in conjunction with a fixed number of CFD cycles, or it can be performed variably (eg, at varying CFD cycle intervals) or even randomly. In a typical example, several CFD cycles of film deposition are performed to achieve an appropriate film thickness, and then plasma treatment is used. After that, before performing the process again, several CFD cycles of thin film deposition are performed again without plasma treatment. This super sequence of x number of CFD cycles followed by plasma treatment (film modification) can be repeated until the film is completely formed by CFD.

In some embodiments, plasma processing may be performed prior to initialization of the CFD cycle to modify one or more characteristics of the surface on which the CFD film is deposited. In various embodiments, the surface is made of silicon (doped or undoped) or silicon-containing material. The modified surface is more capable of producing a high-quality interface with the CFD film deposited subsequently. The interface can provide good adhesion, reliable electrical characteristics, for example, by reducing defects and the like.

The pretreatment of the substrate before CFD is not limited to any specific plasma treatment. In some embodiments, the pretreatment involves exposure to hydrogen plasma, nitrogen plasma, nitrogen/hydrogen plasma, ammonia plasma in the presence of helium, hydrogen, argon, nitrogen, hydrogen/nitrogen forming gas, and/or ammonia , Argon plasma, helium plasma, helium tempering, hydrogen tempering, ammonia tempering, and UV hardening. Plasma processing can be achieved by including (but not limited to) microwave, ICP remote, direct, and other plasma generators known in the art to those skilled in the art.

Overall, this process can occur before, during, and after the CFD cycle. When occurring during the CFD cycle, the frequency of the treatment can be selected for the appropriate deposition conditions. Generally, this process will not occur more frequently than once per cycle.

As an example, consider the process used to form silicon nitride from a precursor with some carbon present. Examples of such precursors include BTBAS. The result of the presence of carbon in the precursor is that the nitride film so deposited contains some carbon impurities, which can reduce the electrical properties of the nitride. To counteract this problem, after several CFD cycles in the case of a carbon-containing precursor, some deposited films are exposed to hydrogen in the presence of plasma to reduce and eventually remove carbon impurities.

The plasma conditions used to modify the film surface can be selected to achieve the desired changes in film characteristics and/or composition. Among the selectable and/or modified plasma conditions for the desired modification are oxidation conditions, reduction conditions, etching conditions, power for generating plasma, frequency for generating plasma, use of two or more Multi-frequency to generate plasma, plasma density, distance between plasma and substrate, etc. Examples of CFD film properties that can be modified by plasma treatment include internal film stress, etch resistance, density, hardness, optical properties (refractive index, reflectivity, optical density, etc.), dielectric constant, carbon content, electrical Characteristics (Vfb spread, etc.), and the like.

In some embodiments, treatments other than plasma treatment are used to modify the characteristics of the deposited film. Such treatments include electromagnetic radiation treatment, heat treatment (such as tempering or high-temperature pulse), and the like. Any of these processes can be performed alone or in combination with another process (including plasma processing). Any of these treatments can be used as an alternative to any of the plasma treatments described above. In some specific embodiments, the place Management involves exposing the film to ultraviolet radiation. As described below, in a specific embodiment, the method involves depositing UV radiation to the oxide CFD film or oxide in situ (ie, during the formation of the film). Such processing is used to reduce or eliminate defective structures and provide improved electrical performance.

In some embodiments, UV treatment can be combined with plasma treatment. These two operations can be performed simultaneously or sequentially. In successive options, UV operation occurs selectively first. In the simultaneous option, the two treatments can be provided by separate sources (for example, RF power for plasma and lamps for UV), or by a single source (for example, helium plasma generated as a by-product of UV radiation).

Feature 5 (deposited by CFD and then transitioned to PECVD)-In such an embodiment, the completed film is produced partly by CFD and partly by a CVD process such as PECVD. Usually, although not necessary, if the CFD part of the deposition process is performed first, then the PECVD part is performed second. The mixed CFD/CVD process can improve the step coverage seen with CVD alone, and additionally improve the deposition rate seen with CFD alone. In some cases, plasma or other activation is applied when a CFD reactant flows in to produce a parasitic CVD operation, and thereby achieve higher deposition rates, different grades of thin films, and so on.

In some embodiments, two or more CFD stages may be employed and/or two or more CVD stages may be employed. For example, the initial part of the film can be deposited by CFD, then the middle part of the film by CVD, and the last part of the film by CFD. In such an embodiment, before depositing a later portion of the film by CFD, it may be necessary to modify the CVD portion of the film, such as by plasma processing or etching.

A transition phase can be used between the CFD and CVD phases. The conditions used in such a transition phase are different from those used in the CFD or CVD phase. Usually (though not necessarily) this condition allows simultaneous CFD surface reactions with CVD-type gas phase reactions. The transition phase usually involves exposure to plasma, which may be pulsed, for example. Also, the transition phase may involve delivery of one or more reactants at a low flow rate (ie, a rate significantly lower than the rate used in the corresponding CFD stage of the process).

Feature 6 (by CFD deposition, etching, and then by CFD deposition)-In such an embodiment, CFD deposition is performed for one or more cycles (usually several cycles), and then the resulting film is etched to Remove, for example, some excess film located at or near the entrance (tip) of the recess, followed by more cycles of CFD deposition. Other examples of structural features in the deposited film can be etched in a similar manner. The etchant selected for this process will depend on the material to be etched. In some cases, the etching operation may be performed with a fluorine-containing etchant (for example, NF3) or hydrogen.

In some embodiments, remote plasma is used to generate the etchant. In general, the distal plasma is etched in a more isotropic manner than the direct plasma. The distal plasma usually provides a relatively high free radical fraction to the substrate. The reactivity of these free radicals can vary with the vertical position within the recess. At the top of the feature, free radicals are more concentrated and will therefore etch at a higher rate, while further down the recess and at the bottom, some free radicals will be lost and thus they will etch at a lower rate. This is, of course, the desired reactivity curve to deal with the problem of excessive deposits appearing in the recess opening. An additional benefit of using the remote plasma in etching is that the plasma is relatively gentle and therefore less likely to damage the substrate layer. This is particularly advantageous when the underlying substrate layer is susceptible to oxidation or other damage.

Feature 7 (modification of film composition with additional reactants)-Many of the examples presented here involve CFD processes using one or two reactants. In addition, many examples use the same reactants for each CFD cycle. However, this is not necessarily the case. First, many CFD processes can use three or more reactants. Examples include (i) tungsten CFD using diborane, tungsten hexafluoride, and hydrogen as reactants, and (ii) silicon oxide CFD using diborane, BTBAS, and oxygen as reactants. Diborane can be removed from the growing film, or it can be incorporated into the film if appropriate.

In addition, some examples may employ additional reactants in only some CFD cycles. In such an example, the basic CFD process cycle uses only the reactants to generate the basic thin film components (such as silicon oxide or silicon carbide). This basic process is performed in all or almost all CFD cycles. However, part of the CFD cycle is performed as a variant cycle, and it deviates from the conditions of the normal deposition cycle. For example, it can take one or More extra reactants. These variant cycles can also use the same reactants used in the basic CFD process, although this is not necessarily the case.

Such a CFD process is particularly useful for preparing doped oxides or other doped materials as CFD thin films. In some embodiments, dopant precursors are included as "extra" reactants in only a small portion of the CFD cycle. The frequency of dopant addition depends on the desired dopant concentration. For example, a dopant precursor may be included in every 10th cycle of base material deposition.

Unlike many other deposition processes (especially those that require thermal activation), CFD processes can be implemented at relatively low temperatures. In general, the CFD temperature will be between about 20 and 400°C. Such a temperature may be selected to allow deposition in the case of temperature-sensitive processes such as deposition on photoresist cores. In a specific embodiment, a temperature between about 20 and 100°C is used for double patterning applications (using, for example, photoresist cores). In another embodiment, a temperature between about 200 and 350°C is used in the memory manufacturing process.

As suggested above, CFD is quite suitable for depositing thin films in advanced technology nodes. Therefore, for example, CFD processing can be integrated into the 32nm node, 22nm node, 16nm node, 11nm node, and any of the processes in the future. These nodes are described in the International Semiconductor Technology Blueprint (ITRS), which has been the industry consensus on the needs of microelectronics technology for many years. Usually it refers to half of the pitch of the memory cell. In a specific example, CFD processing is applied to "2X" devices (with device features in the 20-29 nm range) and above.

Although most of the examples of CFD films proposed in this article involve silicon-based microelectronic devices, the films can also find applications in other fields. Microelectronic engineering or optoelectronic engineering using non-silicon semiconductors (such as GaAs and other III-V semiconductors, and II-VI materials such as HgCdTe) can benefit from using the CFD process disclosed in this article. As for the application of conformal dielectric films in the field of solar energy (such as photovoltaic devices), electrochromism, and other fields, it is feasible.

FIG. 1 schematically shows a timing diagram 100 of an exemplary embodiment of a plasma activated CFD process. The figure shows two complete CFD cycles. As shown, each cycle includes exposure to reactant A stage 120A or 120B, immediately followed by exposure to reactant B stage 140A or 140B, reactant B removal stage 160A or 160B, and final plasma activation stage 180A or 180B . The plasma energy provided during the plasma activation stages 180A and 180B activates the reaction between the surface adsorption reactive species A and B. In the described embodiment, no clearing phase is performed after delivery of a reactant (reactant A). In fact, this reactant continues to flow in during the thin film deposition process. Therefore, the plasma is excited when the reactant A is in the gas phase. The above features 1-3 are embodied in the example of FIG.

In the described embodiment, the reactant gases A and B can coexist in the gas phase without reacting with each other. Therefore, in this exemplary CFD process, one or more of the process steps described in the ALD process can be shortened or eliminated. For example, the cleaning step after the A exposure stages 120A and 120B can be excluded.

The CFD process can be used to deposit any of several different types of thin films. Although most of the examples presented in this article involve dielectric materials, the disclosed CFD process can also be used to form thin films of conductive or semiconductor materials. Nitride and oxide are the main dielectric materials, but they can also form carbides, oxynitrides, carbon-doped oxides, borides, etc. Oxide contains a wide range of materials, including undoped silicate glass (USG) and doped silicate glass. Examples of doped glass include boron-doped silicate glass (BSG), phosphorus-doped silicate glass (PSG), and boron-phosphorus-doped silicate glass (BPSG).

In some embodiments, the silicon nitride film may be formed by the reaction of the silicon-containing reactant with one or more nitrogen-containing reactants and/or nitrogen-containing reactant mixture. Exemplary silicon-containing reactants include (but are not limited to) di(third butylamino) silane (SiH ₂ (NHC(CH ₃ ) ₃ ) ₂ or BTBAS), dichlorosilane (SiH ₂ Cl ₂ ), and chlorine Silane (SiH ₃ Cl). Exemplary nitrogen-containing reactants include, but are not limited to, ammonia, nitrogen, and tert-butyl amine ((CH ₃ ) ₃ CNH ₂ or t-butyl amine). Exemplary nitrogen-containing reactant mixtures include, but are not limited to, a mixture of nitrogen and hydrogen.

The choice of one or more reactants can be driven by various film and/or hardware considerations. For example, in some embodiments, the silicon nitride film may be formed by the reaction of dichlorosilane and plasma activated nitrogen. The chemical adsorption of dichlorosilane onto the surface of silicon nitride can produce a terminated surface of silicon hydrogen, thereby releasing hydrogen chloride (HCl). An example of this chemisorption reaction is described schematically in Reaction 1.

The cyclic intermediate shown in reaction 1 can then be converted to the surface of the silamine terminal by reaction with plasma activated nitrogen.

However, some molecules of dichlorosilane can be chemisorbed by alternative mechanisms. For example, the surface morphology can prevent the formation of the cyclic intermediate described in Reaction 1. Another example of a chemisorption mechanism is shown schematically in Reaction 2.

During the subsequent plasma activation of nitrogen, the remaining chlorine atoms of the intermediate species shown in reaction 2 can be released and can become activated by the plasma. This can cause etching of the silicon nitride surface, and potentially cause the silicon nitride film to become rough or fuzzy. In addition, residual chlorine atoms can be re-adsorbed (physical and/or chemical), potentially contaminating the deposited film. This contamination can change the physical and/or physical properties of the silicon nitride film/ Or electrical characteristics. Furthermore, activated chlorine atoms can cause etching damage to parts of the processing station's hardware, potentially reducing the service life of parts of the processing station.

Therefore, in some embodiments, chlorosilane can replace dichlorosilane. This can reduce film contamination, film damage, and/or processing station damage. An example of chemical adsorption of chlorosilane is shown schematically in Reaction 3.

Although the example described in Reaction 3 uses chlorosilane as the silicon-containing reactant, it should be understood that any suitable mono-substituted halogen silane can be used.

As explained above, the described intermediate structure can react with a nitrogen source to form the silicon nitride terminal surface of silicon nitride. For example, ammonia can be activated by plasma to form various ammonia radical species. This free radical species reacts with the intermediate to form the terminal surface of the silamine.

However, ammonia can be strongly physically adsorbed to the surface of the reactant delivery line, processing station, and exhaust pipe, which can result in extended purging and emptying time. In addition, ammonia can have high reactivity with some gas-phase silicon-containing reactants. For example, a gas-phase mixture of dichlorosilane (SiH ₂ Cl ₂ ) and ammonia can generate unstable species such as diaminosilane (SiH ₂ (NH ₂ ) ₂ ). Such species can decompose in the gas phase, thereby nucleating small particles. If ammonia reacts with the hydrogen chloride generated during the chemical adsorption of halogen silane, small particles can also be formed. Such particles can accumulate in the processing station, where they can contaminate the substrate surface, potentially causing defects in integrated devices, and in the processing station, they can contaminate the processing station hardware, potentially causing tool downtime and cleaning. Small particles can also accumulate in the exhaust pipe, which can block pumps and blowers, and can create a demand for exhaust scrubbers and/or condensation traps in special environments.

Therefore, in some embodiments, alternative amines may be used as nitrogen-containing reactants. For example, various free radicals formed by plasma activation of alkyl-substituted amines (such as tertiary butylamine) can be supplied to the processing station. Alternative amines (such as tertiary butylamine) can have a lower adhesion coefficient on process hardware than ammonia, which can result in a relatively low physical adsorption rate and a relatively low process removal time.

In addition, such nitrogen-containing reactants can form halide salts that are more volatile than ammonium chloride. For example, tertiary butyl ammonium chloride can be more volatile than ammonia chloride. This can reduce tool downtime, device defects, and environmental relief costs.

Furthermore, such nitrogen-containing reactants can form other amine precursors through various by-product reactions. For example, the reaction of tertiary butylamine with dichlorosilane can form BTBAS. Therefore, by-products can provide an alternative way to form silicon nitride, potentially increasing film yield. In another example, alternative amines can provide a low-temperature thermal activation pathway for silicon nitride films. For example, tertiary butylamine thermally decomposes at temperatures above 300°C to form isobutylene and ammonia.

Although the illustrative examples provided above describe the formation of silicon nitride films using tertiary butylamine, it should be understood that any suitable alternative amine can be used within the scope of the present invention. In some embodiments, suitable alternative amines may be selected based on the thermal and/or reactive characteristics of the reactants. For example, the relative volatility of the halide salt formed by the reactants can be considered, as can the existence and selectivity of various thermal decomposition pathways at relevant temperatures.

In addition, although the examples provided above describe the deposition of silicon nitride films, it should be understood that the principles discussed above are generally applicable to the deposition of other films. For example, some embodiments may use suitable halogen silanes in combination with suitable oxygen-containing reactant species (such as oxygen plasma) to deposit silicon oxide.

Table 1 provides a non-limiting list of reactants, product films, and the range of film and process characteristics.

FIG. 1 also shows an example of the timing of the exemplary CFD process stages of various CFD process parameters. FIG. 1 illustrates two exemplary deposition cycles 110A and 110B, however, it should be understood that any suitable number of deposition cycles may be included in the CFD process to deposit the desired film thickness. Exemplary CFD process parameters include, but are not limited to, flow rates of inert and reactant species, plasma power and frequency, substrate temperature, and processing station pressure. Table 2 provides non-limiting parameter ranges for exemplary silicon dioxide deposition cycles using BTBAS and oxygen.

The CFD cycle usually includes the exposure phase of the etching reactants. During this "exposure phase", the reactants are delivered to the processing chamber so that the reactants are adsorbed on the substrate surface. Usually, after exposure At the beginning of the phase, the substrate surface does not have any significant amount of adsorbed reactants. In FIG. 1, during the exposure stages 120A and 120B of the reactant A, the reactant A is supplied to the processing station at a controlled flow rate to saturate the surface of the exposed substrate. Reactant A may be any suitable deposition reactant, such as a primary reactant or an auxiliary reactant. In the example where CFD produces a silicon dioxide film, reactant A may be oxygen. In the embodiment shown in FIG. 1, the reactant A continuously flows in throughout the deposition cycles 110A and 110B. Unlike typical ALD processes where the separation film precursor is exposed to prevent gas phase reactions, some embodiments of the CFD process allow reactants A and B to be mixed in the gas phase. As shown above, in some embodiments, reactants A and B are selected so that they can coexist in the gas phase without significantly reacting with each other under the conditions encountered in the reactor before applying plasma energy or activating the surface reaction. In some cases, the reactants are selected so that (1) the reaction between them is suitable for thermodynamics (ie, Gibb's free energy <0), and (2) the reaction has a sufficiently high activation energy so that at the desired deposition temperature The reaction can be ignored. Various reactant combinations that meet these criteria will be confirmed elsewhere in this disclosure. Many such combinations include primary reactants that provide elements that are solid at room temperature, and auxiliary reactants that do not provide elements that are solid at room temperature. Examples of auxiliary reactants used in some combinations include oxygen, nitrogen, alkylamines, and hydrogen.

Compared with the ALD process in which reactant A is first turned on, then stabilized and exposed to the substrate, then turned off, and finally removed from the reactor, continuous supply of reactant A to the processing station can reduce or exclude the flow rate of reactant A And settling time. Although the embodiment shown in FIG. 1 shows that the reactant A exposure stages 120A and 120B have a fixed flow rate, it should be understood that any suitable reactant A flow rate (including variable flow rate) can be used within the scope of the present invention. Furthermore, although FIG. 1 shows that reactant A has a fixed flow rate during the entire CFD cycle (deposition cycle 110A), this is not necessarily the case. For example, the flow rate of reactant A during the B exposure stages 140A and 140B can be reduced. This may increase the partial pressure of B, and thereby increase the driving force of the reactant B to be adsorbed on the substrate surface.

In some embodiments, the reactant A exposure stage 120A may have a duration that exceeds the substrate surface saturation time of the reactant A. For example, the embodiment of FIG. 1 includes the exposure stage 120A of reactant A Saturated exposure time 130 after reactant A in the. Optionally, the reactant A exposure stage 120A contains a controlled flow rate of inert gas. Examples of inert gases include, but are not limited to, nitrogen, argon, and helium. Inert gas can be provided to facilitate pressure and/or temperature control of the processing station, evaporation of liquid precursors, rapid delivery of more precursors and/or as a means to remove processing gas from the processing station and/or processing station piping To remove gas.

In the reactant B exposure stage 140A of the embodiment shown in FIG. 1, the reactant B is supplied to the processing station at a controlled flow rate to saturate the exposed substrate surface. In an exemplary silicon dioxide film, reactant B may be BTBAS. Although the embodiment of FIG. 1 illustrates that the reactant B exposure stage 140A has a fixed flow rate, it should be understood that any suitable reactant B flow rate (including variable flow rate) may be used within the scope of the present invention. In addition, it should be understood that the reactant B exposure phase 140A may have any suitable duration. In some embodiments, the reactant B exposure stage 140A may have a duration that exceeds the substrate surface saturation time of the reactant B. For example, the embodiment shown in FIG. 1 shows that the saturation exposure time 150 after the reactant B is included in the reactant B exposure stage 140A. Optionally, the reactant B exposure stage 140A may contain a controlled flow of suitable inert gas, which as described above may aid in pressure and/or temperature control of the processing station, evaporation of liquid precursors, more precursors Fast delivery, and can prevent the back diffusion of gas at the processing station. In the embodiment shown in FIG. 1, the inert gas is continuously supplied to the processing station throughout the exposure phase 140A of the reactant B.

In some embodiments, the plasma activation of the deposition reaction may result in a lower deposition temperature than the thermal activation reaction, thereby potentially reducing the consumption of the available thermal budget of the integrated process. For example, in some embodiments, the plasma activated CFD process can occur at room temperature.

Although the embodiment of the CFD process shown in FIG. 1 is plasma activation, it should be understood that other non-thermal energy sources can be used within the scope of the present invention. Non-limiting examples of non-thermal energy sources include, but are not limited to, ultraviolet lamps, downstream or remote plasma sources, inductively coupled plasma, and microwave surface wave plasma.

Furthermore, although many of the examples discussed herein include two reactants (A and B), it should be understood that any suitable number of reactants may be employed within the scope of the present invention. In some embodiments, a single reactant and an inert gas used to supply the plasma energy of the surface decomposition reaction of the reactant body. Alternatively, as in the context of feature 7 discussed above, some embodiments may use three or more reactants to deposit the thin film.

In some cases, the B species adsorbed on the surface may exist on the surface of the substrate as discontinuous islands, making it difficult to reach the surface saturation of the reactant B. Various surface conditions can delay the nucleation and saturation of reactant B on the substrate surface. For example, the ligands released during the adsorption of reactants A and/or B can block some surface active sites and prevent the further adsorption of reactant B. Therefore, in some embodiments, a continuous adsorbent layer of reactant B may be provided by modulating the flow rate of reactant B and/or discretely pulsed reactant B into the processing station during reactant B exposure phase 140A. This can provide additional time for the surface adsorption and desorption process, and at the same time save the reactant B compared to a fixed flow rate.

Additionally or alternatively, in some embodiments, one or more cleaning stages may be included between successive exposures of reactant B. For example, the embodiment of FIG. 2 schematically shows an exemplary CFD process timing diagram 200 of the deposition cycle 210. In the exposure stage 240A of the reactant B, the reactant B is exposed to the surface of the substrate. Subsequently, in the purge phase 260A, the reactant B is shut down, and the gas phase species of the reactant B is removed from the processing station. In one case, the gas-phase reactant B may be removed by the continuous flow of reactant A and/or inert gas. In another case, the gas phase reactant B can be removed by emptying the processing station. The removal of gas-phase reactant B can change the adsorption/desorption process balance, thereby desorbing ligands and prompting the rearrangement of the adsorbed B surface to merge the discontinuous islands of adsorbed B. In the exposure stage 240B of the reactant B, the reactant B is exposed to the surface of the substrate again. Although the embodiment shown in FIG. 2 includes an example of reactant B removal and exposure cycles, it should be understood that any suitable number of repetitions of alternate removal and exposure cycles may be used within the scope of the disclosure.

Returning to the embodiment of FIG. 1, before the 180A is activated by plasma, in some embodiments, the gas phase reactant B may be removed from the processing station at the purge stage 160A. In addition to the above-mentioned exposure phases, the CFD cycle may include one or more cleaning phases. Clearing the treatment station can avoid gas phase reactions, where reactant B is susceptible to plasma activation. In addition, the removal treatment station can remove the ligands adsorbed on the surface, otherwise it may remain and contaminate the film. Example purge gases include (but are not limited to) argon, helium, and nitrogen. In the embodiment shown in Figure 1 In, the purge gas system used in purge stage 160A is supplied by an inert gas stream. In some embodiments, the purge stage 160A may include one or more evacuation sub-stages to evacuate the processing station. Alternatively, it should be appreciated that in some embodiments the clear phase 160A may be omitted.

The clearing phase 160A may have any suitable duration. In some embodiments, increasing the flow rate of one or more purge gases may reduce the duration of purge phase 160A. For example, the purge gas flow rate can be adjusted to modify the duration of the purge phase 160A according to various reactant thermal characteristics, and/or processing station geometry, and/or processing station piping. In a non-limiting example, the duration of the purge phase can be optimized by adjusting the purge gas flow rate. This can reduce the deposition cycle time, thereby improving substrate throughput.

The CFD cycle usually includes an "activation stage" in addition to the above-mentioned exposure and selective removal stages. The activation phase is used to drive the reaction of one or more reactants adsorbed on the substrate surface. In the plasma activation stage 180A of the embodiment shown in FIG. 1, plasma energy is provided to activate the surface reaction between the surface adsorption reactants A and B. For example, the plasma may directly or indirectly activate gas phase molecules of reactant A to form reactant A radicals. These free radicals can then interact with the surface-adsorbed reactant B, leading to a surface reaction of film formation. The deposition cycle 110A ends at the plasma activation stage 180A. In the embodiment of FIG. 1, the deposition cycle 110A is followed by the deposition cycle 110B starting with the reactant A exposure stage 120B.

In some embodiments, the plasma excited in the plasma activation stage 180A may be formed directly above the substrate surface. This can provide greater plasma density and increased surface reaction rate between reactants A and B. For example, two capacitive coupling plates can be used to generate plasma for the CFD process by applying a radio frequency (RF) field to a low-pressure gas. In an alternative embodiment, the distal generation plasma may be generated outside the main reaction chamber.

Any suitable gas can be used to form the plasma. In the first example, an inert gas such as argon or helium can be used to form the plasma. In the second example, a reactant gas such as oxygen or ammonia may be used to form the plasma. In the third example, a purge gas such as nitrogen can be used to form the plasma. Of course, combinations of these kinds of gases can also be used. The RF field ionizes the gas between the plates to excite the plasma, from In the plasma discharge area, free electrons are generated. These electrons are accelerated by the RF field and can collide with gaseous reactant molecules. The collision of these electrons and reactant molecules can form free radical species that participate in the deposition process. It should be appreciated that the RF field can be coupled via any suitable electrode. Non-limiting examples of electrodes include process gas distribution showerheads and substrate support pedestals. It should be understood that in addition to capacitively coupling the RF field to the gas, one or more suitable methods may be used to form the plasma for the CFD process.

The plasma activation phase 180A may have any suitable duration. In some embodiments, the plasma activation stage 180A may have a duration that exceeds the time that the plasma activated radical interacts with all exposed substrate surfaces and adsorbates, thereby forming a continuous thin film on top of the substrate surface. For example, the embodiment shown in FIG. 1 includes the post-plasma saturation exposure time 190 in the plasma activation stage 180A.

As explained more fully below, and as suggested in the discussion of Feature 4 above, extending the plasma exposure time and/or providing multiple plasma exposure stages can provide post-reaction of the bulk and/or near-surface portions of the deposited film deal with. In one case, reducing surface contamination by plasma treatment can prepare the surface for adsorption of reactant A. For example, a silicon nitride film formed by the reaction of a silicon-containing reactant and a nitrogen-containing reactant may have a surface that resists the adsorption of subsequent reactants. Plasma treatment of the silicon nitride surface can generate hydrogen bonds to promote subsequent adsorption and reaction events.

In some embodiments, film properties such as film stress, dielectric constant, refractive index, and etch rate can be adjusted by changing plasma parameters that will be discussed in more detail below. Table 3 provides an exemplary list of various film characteristics of three example CFD silicon dioxide films deposited at 400 degrees Celsius. For reference purposes, Table 3 also contains film information about the example PECVD silicon dioxide film deposited at 400 degrees Celsius.

For example, FIG. 3 schematically shows an embodiment of a CFD process timing diagram 300, which includes a deposition stage 310 followed by a plasma processing stage 390. It should be understood that any suitable plasma may be used during the plasma processing phase. In the first case, a first plasma gas may be used during activation in the deposition cycle, and a second, different plasma gas may be used during the plasma processing stage. In the second case, a second, different plasma gas may supplement the first plasma gas during the plasma processing stage. Table 4 provides non-limiting parameter ranges for an exemplary in-situ plasma treatment cycle.

In the plasma activation stage 380 shown in FIG. 3, the substrate surface is exposed to the plasma to activate the thin film deposition reaction. As shown in the embodiment shown in FIG. 3, in the plasma treatment removal stage 390A, the processing station is provided with a continuous flow of reactant A (which may be, for example, an auxiliary reactant (such as oxygen)) and an inert gas. The removal treatment station can remove volatile pollutants from the treatment station. Although FIG. 3 shows a purge gas, it should be understood that any suitable reactant removal method can be used within the scope of the present invention. In the plasma treatment activation stage 390B, the plasma is excited to treat the body and/or near surface area of the newly deposited film.

Although the embodiment of FIG. 3 includes an example of a CFD cycle including a plasma processing stage, it should be understood that any suitable number of repetitions can be used within the scope of the present invention. In addition, it should be understood that one or more plasma treatment cycles may be inserted at intervals (regularly or otherwise) between normal deposition cycles. For example, FIG. 4 shows an embodiment of a CFD process timing diagram 400, which includes a plasma processing stage interposed between two deposition cycles. Although the embodiment of FIG. 4 includes plasma processing cycles interposed between two deposition cycles, it should be understood that any suitable number of deposition cycles may be located before or after one or more plasma processing cycles. For example, in the case where the plasma treatment is used to change the film density, a plasma treatment cycle may be inserted after every tenth deposition cycle. Used in plasma processing to prepare for adsorption and reaction events In the case of the surface, the plasma treatment cycle may be incorporated in each CFD cycle (eg after each CFD deposition stage).

The plasma treatment of the deposited film can change one or more physical properties of the film. In one case, the plasma treatment can densify the newly deposited film. Densified films can be more resistant to etching than non-densified films. For example, FIG. 5 shows an embodiment of a comparison 500 of an etch rate of an exemplary CFD-treated silicon dioxide film relative to a thermally grown silicon dioxide film. The exemplary thin film embodiment of FIG. 5 is deposited by CFD processes 502 and 504 at a temperature ranging from 50 degrees Celsius to 400 degrees Celsius. For reference, FIG. 5 shows the relative etching rate of the undoped silicate glass (USG) and the silicon dioxide spacer layer deposited by the plasma assisted CVD process. The resistance of the film produced by process 502 (which includes a 1 second high-frequency oxygen plasma activation stage in each deposition cycle) to diluted hydrofluoric acid wet etching (100:1 H ₂ O:HF) is process 504 (whose A deposition cycle contains about half of the film produced by the 10 second high-frequency oxygen plasma activation stage). Therefore, it should be understood that changing one or more implementation aspects of the plasma activation stage and/or including one or more plasma processing cycles can change the etch rate of the deposited film.

In another case, the plasma treatment of the film can change the stress characteristics of the film. For example, FIG. 6 shows an example of a correlation 600 between the wet etch rate ratio and film stress of an exemplary CFD silicon dioxide film. In the embodiment shown in FIG. 6, the compression film stress can be increased by, for example, extending the plasma exposure time and reducing the wet etching rate ratio.

In another case, the plasma treatment of the deposited film can provide trace film contaminants (eg, in the example silicon dioxide film) relative to other film components (eg, silicon and/or oxygen in the example silicon dioxide film) Hydrogen, nitrogen, and/or carbon) are removed instantaneously. For example, FIG. 7 shows an example of the correlation 700 between the deposition temperature, the plasma exposure time, and the film pollutant concentration. In the embodiment shown in FIG. 7, the CFD silicon dioxide film 704 deposited at 50 degrees Celsius and having a 10 second oxygen plasma activation stage exhibits a lower temperature than the one deposited at the same temperature but having a 1 second oxygen plasma activation stage The hydrogen and carbon concentration of the CFD silicon dioxide film 702. Changing the concentration of pollutants in the film can change the electrical and/or physical properties of the film. For example, Modulating the carbon and/or hydrogen content can adjust the film dielectric constant and/or film etching rate. Therefore, it should be understood that changing one or more implementation aspects of the plasma activation stage and/or including one or more plasma processing cycles may provide a method for changing the composition of the film.

Although the plasma treatment discussed above is related to oxygen plasma treatment, it should be understood that any suitable plasma treatment may be used without departing from the scope of this embodiment. For example, in some embodiments, alternative amines can be used in place of NH ₃ as nitrogen-containing reactants in a suitable CFD process. Although replacing NH ₃ with a replacement amine (such as an alkyl amine like tertiary butyl amine) may provide some benefits for conformal SiN deposition, in some cases, the deposited film may include Residual carbon (for example, residual carbon from the three methyl groups contained in each tertiary butylamine molecule (NH ₂ -(CH ₃ ) ₃ )). The carbon in the film can cause leakage, and can make the film unusable in some dielectric barrier applications.

Therefore, in some embodiments, exciting the hydrogen plasma during the deposition of the SiN film can reduce the residual carbon in the SiN film, which can relatively improve the insulating properties of the film. In some examples, the reduction of residual carbon can be easily observed in the FTIR spectrum. For example, the SiN:C-H level can be reduced from about 10 atomic% to about 1 atomic %.

Therefore, in some embodiments, a silicon nitride film may be deposited in a CFD process using an alkylamine or an alkylamine mixture included in one or more examples of nitrogen-containing reactant and hydrogen plasma treatment. It should be understood that any suitable hydrogen plasma can be used without departing from the scope of the present invention. Therefore, in some embodiments, a mixture of H ₂ and a gas such as He or Ar, or other H-containing gas, or activated H atoms generated from a remote plasma source can be used to process the deposited film. In addition, in some embodiments, the carbon content of the film can be adjusted to any suitable concentration by changing one or more number of processing pulses and their duration, processing plasma strength, substrate temperature, and processing gas composition.

Although the hydrogen plasma treatment discussed above is related to silicon nitride films, it should be understood that suitable hydrogen plasma treatment applications can be used to adjust other including (but not limited to) SiO _x , GeO _x , and SiO _x N _y The carbon content of CFD deposited films.

Some of the embodiments disclosed herein relate to the ultraviolet treatment of oxide CFD films (with or without plasma treatment). This treatment can reduce defects in the oxide and improve electrical characteristics such as the CV characteristics of the gate dielectric layer. Devices and packaging applications that use CFD oxides that can benefit from such processing include: through-silicon vias, logic technology using gate oxides, shallow trench isolation (STI), and thin thermal oxidation after STI photoresist stripping Materials, sacrificial oxide before implantation in well P (eg ~60A), thermal oxide growth after "well", gate/channel oxide, DRAM PMD PECVD oxide.

In some cases, untreated CFD oxide films have been observed to have relatively poor electrical performance, believed to be due to fixed charges in eg deposited films. For example, some films have been found to have significant intra-wafer Vfb differences. Such problems have been solved by using deposition treatment with UV radiation and/or thermal tempering in the presence of hydrogen. It is believed that the passivation and/or mitigation of this process is related to the fixed charge located in (1) oxide to silicon interface, or (2) deposited dielectric film, or (3) air to oxide surface (surface charge) defect. With such treatment, the Vfb dispersion of the oxide deposited after UV curing has been tightened from 8.3V to about 1.5V.

Although these embodiments are mainly concerned with improving oxide films, the disclosed method can be widely applied to the growth of dielectric layers, metals, and metal-to-dielectric layer interface engineering. Specific dielectric layer materials include, for example, silicon oxide (including doped silicon oxide), silicon carbide, silicon oxycarbide, silicon nitride, silicon oxynitride, and ashable hard mask materials.

Examples of processes that can be used to improve dielectric properties include the following:

(A) Post-deposition treatment of dielectric thin films synthesized by CFD hardened with UV and then hydrogen tempered. In the simplest embodiment, UV treatment can be used alone to reduce the fixed charge.

(B) Before CFD dielectric film deposition, substrate pretreatment using the following treatments: H ₂ plasma in the presence of He, H ₂ , Ar, N ₂ , H ₂ /N ₂ forming gas, NH ₃ , N ₂ plasma, N2/H2 plasma, NH ₃ plasma, AR plasma, He plasma, He tempering, H ₂ tempering, NH ₃ tempering, and UV hardening. Plasma processing can be achieved by various plasma generators including (but not limited to) microwave, ICP remote, direct, and the like.

(C) simultaneously with the process comprising the following process (cured during deposition): in _{He, H 2, Ar, N} 2, H 2 / N 2 formation gas, H ₂ is present under the NH ₃ plasma, N ₂ plasma, N ₂ /H ₂ plasma, NH ₃ plasma, AR plasma, He plasma, He tempering, H ₂ tempering, NH ₃ tempering, and UV hardening. Plasma processing can be achieved by including, but not limited to, microwave, ICP remote, direct, and other plasma generators known in the art to those skilled in the art. Applicable isotropic and directional treatments include (but are not limited to) remote plasma, UV exposure, direct plasma, and microwave plasma. An exemplary method includes intermittent film processing between groups of CFD cycles. A group of CFD cycles can vary from about 1 to 10,000 cycles. Typical scenarios include: (1) 5 CFD oxide growth cycles, followed by (2) one or more thin film treatments using any of the methods described above (eg He plasma, UV treatment), followed by (3) 5 CFD oxide growth cycles. This method can be used to grow thin films of any desired thickness.

(D) UV treatment imparted as a by-product by any of the plasmas listed above (eg helium plasma emits UV radiation).

An example of an in-situ "hardening" procedure used during the CFD cycle involves the following operations:

(1) UV treatment by He plasma

(2) BTBAS administration

(3) Clear

(4) O ₂ /Ar-RF plasma activation

(5) Clear

(6) Repeat steps (1)-(5) to produce a film with the desired thickness.

The range of UV hardening conditions can be used in any listed context. Generally, the pedestal temperature will be maintained between about 250 and 500°C during hardening. For many device manufacturing applications, the upper limit temperature will be limited to 450°C or even 400°C. The environment used during hardening can be inert or reactive Sex. Examples of gases that can be present during hardening include helium, argon, nitrogen, forming gases, and ammonia. The flow rate of such gas may be about 2 to 20000 sccm, preferably about 4000 to 18000 sccm. The power of the UV lamp may be, for example, about 2-10 kW, and preferably between about 3.5 and 7 kW. A suitable duration of exposure to UV from this source is between about 20 and 200 seconds (eg, about 90 seconds). Finally, the pressure can be maintained at a level between 0 Torr and about 40 Torr.

In a specific embodiment, the following conditions are used to obtain an effective treatment of CFD oxides: pedestal temperature = 400°C

Environment=He

Pressure = 40 Torr He

Flow rate=10000sccm

In some embodiments, thermal tempering of the oxide is performed after the UV hardening operation. In an example, the following conditions are used in the tempering: base temperature = 400°C

Environment = H ₂ + N ₂

Pressure=2.5Torr

Flow rate=750sccm H ₂ ; 3000sccm N ₂

The physical and electrical properties of the deposited film can also be changed by adjusting other process parameters such as deposition temperature. For example, the correlation 700 of the embodiment shown in FIG. 7 also shows an exemplary relationship between the CFD film deposition temperature and the film pollutant concentration. As the film deposition temperature increases, the incorporation of film contaminants decreases. In another example, the embodiment shown in FIG. 5 illustrates that the wet etch rate ratio of an exemplary silicon dioxide CFD film decreases as the deposition temperature increases, as described above. Other deposition parameters that can be adjusted to tune the characteristics of the film include RF power, RF frequency, pressure, and flow rate. In addition, in some embodiments, the film properties can be changed by changing the choice of reactants. For example, by The use of tetraisocyanate silane (TICS) as the silicon-containing reactant and oxygen and/or nitrous oxide as the oxygen-containing reactant to reduce the hydrogen content of the silicon dioxide film.

It should be understood that changes in physical and/or electrical thin film characteristics as discussed above may provide opportunities to adjust device performance and yield, as well as opportunities to modify the implementation aspects of device manufacturing process integration. As a non-limiting example, the ability to tune the etch rate characteristics of CFD silicon dioxide films can make the films candidates for etch stop layers, hard masks, and other process integration applications. Therefore, various embodiments of CFD-generated thin films for integration of all aspects of semiconductor device manufacturing processes are provided herein.

In one case, the CFD process can deposit a conformal silicon dioxide film on a non-planar substrate. For example, CFD silicon dioxide films can be used for gap filling of structures, such as trench filling for shallow trench isolation (STI) structures. Although the various embodiments described below are related to gap-filling applications, it should be understood that this is only a non-limiting, exemplary application, and that other suitable applications using other suitable thin-film materials are within the scope of the present invention. Other applications of CFD silicon dioxide films include (but are not limited to) interlayer dielectric (ILD) applications, intermetallic dielectric (IMD) applications, pre-metal dielectric (PMD) applications, and through-silicon via (TSV) dielectrics Electrical pad applications, resistive RAM (ReRAM) applications, and/or stacked capacitor fabrication applications in DRAM.

Doped silicon oxide can be used as a diffusion source for boron, phosphorous, or even arsenic dopants. For example, boron-doped silicate glass (BSG), phosphorus-doped silicate glass (PSG), or even boron-phosphorus-doped silicate glass (BPSG) can be used. The doped CFD layer can be used to provide conformal doping in, for example, three-dimensional transistor structures (such as multi-gate fin field effect transistors (FinFET) and three-dimensional memory devices). Conventional ion implanters cannot easily dope the sidewalls, especially in high aspect ratio structures. CFD doped oxides have various advantages as diffusion sources. First, it provides high shape retention at low temperatures. In contrast, doped TEOS (tetraethyl orthosilicate) produced by low-pressure CVD is well known but needs to be deposited at high temperatures, and sub-atmospheric CVD and PECVD doped oxide films can be implemented at low temperatures but are not sufficient Shape retention. Doped Shape is important, as is the shape retention of the film itself, because the film is usually a sacrificial application and will subsequently have to be removed. Non-conformal films usually face more challenges when they are removed, that is, some areas will be over-etched. In addition, CFD provides excellent control of the doping concentration. As mentioned, the CFD process can be provided by several layers of undoped oxide followed by a single layer of doping. The degree of doping can be strictly controlled by the frequency used to deposit the doped layer and the conditions of the doping cycle. In some embodiments, the doping cycle is controlled by, for example, using a dopant source with significant steric hindrance. In addition to conventional silicon-based microelectronics, other applications of CFD doping include microelectronics and optoelectronics based on III-V semiconductors (such as GaAs) and II-VI semiconductors (such as HgCdTe), photovoltaic cells, and flat panel displays , And electrochromic technology.

Some gap-filling processes involve two thin film deposition steps performed on different deposition tools, requiring vacuum breakage and air exposure between the deposition steps. FIG. 8 schematically shows an exemplary non-planar substrate 800 including a plurality of gaps 802. FIG. As shown in FIG. 8, the gaps 802 may have different aspect ratios, which may be defined as the ratio of the gap depth (H) to the gap width (W) of each gap 802. For example, the logic area of the integrated semiconductor device may have different gap aspect ratios corresponding to different logic device structures.

As shown in FIG. 8, the non-planar substrate 800 is covered by a thin, conformal film 804. Although the conformal film 804 has completely filled the gap 802A, the gaps 802B and 802C still have openings. Closing the gaps 802B and 802C with a conformal film can lead to an increase in process time. Therefore, in some methods, a thicker film can be deposited ex-situ by a higher deposition rate process such as CVD and/or PECVD. However, the ectopic deposition of gap-filled films can reduce wafer throughput in the production line. For example, substrate handling and transport time between deposition tools can reduce some substrate processing activities during production. This can reduce production line throughput, and may require additional processing tools to be installed and maintained in the production line.

In addition, although the gap 802C may have an aspect ratio suitable for a vapor deposition process, 802B may have an aspect ratio that may be incompletely filled by a higher deposition rate process and may form a keyhole void. For example, FIG. 10 shows an exemplary high aspect ratio structure 1000 formed in a substrate 1002. As shown in FIG. 10, the keyhole has been produced by the bread stick effect during the deposition of the thicker film 1006 Hole 1008. The keyhole hole can be reopened and filled with a conductive film in the subsequent process, which can cause the device to short-circuit.

Some methods for dealing with gaps of high aspect ratio such as gap 802B include providing device design rules to avoid such gaps. However, such design rules may require additional masking steps, may make device design difficult, and/or may lead to an increase in the area of integrated semiconductor devices, which may increase manufacturing costs. Therefore, in some embodiments, the CFD process may include an in-situ transition from the CFD process to the CVD and/or PECVD process. For example, FIG. 9 shows an embodiment of a CFD process timing diagram 900 that has been divided into three stages. The CFD process stage 902 describes an exemplary CFD process cycle. For clarity, although the embodiment shown in FIG. 9 only shows a single CFD process cycle, it should be understood that any suitable number of CFD process cycles and plasma processing cycles may be included in the CFD process stage 902. The transition stage 904 follows the CFD process stage 902. As shown in the embodiment of FIG. 9, the transition stage 904 includes implementation aspects of both the CFD process and the PECVD process. Specifically, the reactant B is provided to the processing station after the end of the reactant B exposure stage 904A, so that both the reactants A and B exist in the gas phase during the plasma activation stage 904B. This can provide both PECVD gas phase reaction and CFD surface reaction. Although the transition stage 904 includes only one of the reactant B exposure stage 904A and the plasma activation stage 904B, it should be understood that any suitable number of repetitions may be included in the transition stage.

In some embodiments, the plasma generator may be controlled to provide intermittent pulses of plasma energy during the plasma activation phase 904B. For example, the plasma may be pulsed at frequencies including (but not limited to) between 10 Hz and 150 Hz. Compared with continuous plasma, this can improve the step coverage by reducing the directionality of ion bombardment. In addition, this can reduce the damage to the substrate caused by ion bombardment. For example, the photoresist substrate is eroded by ion bombardment during continuous plasma. Pulsing plasma energy can reduce photoresist corrosion.

In the embodiment shown in FIG. 9, the flow rate of the reactant B during the plasma activation stage 904B is lower than the flow rate of the reactant B during the reactant B exposure stage 904A. Therefore, during the plasma activation phase 904B, the reactant B can be "fine streamed" into the processing station. This provides a gas-phase PECVD reaction to supplement the CFD-type surface reaction. However, it should be appreciated that in some embodiments, the flow rate of reactant B may be changed during a single plasma activation phase or during a transition phase. For example, in two repeated transition phases including exposure of reactant B and plasma activation, the flow rate of reactant B during the first plasma activation phase may be lower than the flow rate of reactant B during the second plasma activation phase. Changing the flow rate of the reactant B during the plasma activation stage 904B can provide a smooth transition from the step coverage characteristics of the CFD process stage 902 to the deposition rate characteristics of the PECVD process stage 906.

In some embodiments, the CFD process may include in-situ etching for selectively removing the recessed portion of the deposited film. Table 5 provides non-limiting parameter ranges including an exemplary silicon dioxide deposition process for in-situ etching of the gap-fill CFD process.

FIG. 11 shows an embodiment of a CFD process timing diagram 1100 including a deposition stage 1102, an etching stage 1104, and a subsequent deposition stage 1106. In the deposition stage 1102 of the embodiment shown in FIG. 11, a thin film is deposited on the exposed surface of the substrate. For example, the deposition stage 1102 may include one or more CFD process deposition cycles.

In the etching stage 1104 of the embodiment of FIG. 11, the reactants A and B are turned off and the etching gas is introduced to the processing station. A non-limiting example of an etching gas is nitrogen trifluoride (NF ₃ ). In the embodiment shown in FIG. 11, the etching gas system is activated by the plasma excited during the etching stage 1104. Various process parameters such as processing station pressure, substrate temperature, and etching gas flow rate can be adjusted during the etching stage 1104 to selectively remove the concave portion of the deposited film on the non-planar substrate. Any suitable etching process can be used within the scope of the present invention. Other exemplary etching processes include (but are not limited to) reactive ion etching, non-plasma vapor etching, solid-phase sublimation, and adsorption and directional activation of etching species (eg, by ion bombardment).

In some embodiments, incompatible gas phase species may be removed from the processing station before and after etching the thin film. For example, the embodiment of FIG. 11 includes a continuous flow of inert gas after the reactants A and B have been turned off during the etching stage 1104 and after the etching gas has been turned off.

At the end of the etch phase 1104, the deposition phase 1106 begins, thereby further filling the gap on the non-planar substrate. The deposition stage 1106 can be any suitable deposition process. For example, the deposition stage 1106 may include one or more CFD processes, CVD processes, PECVD processes, and so on. Although the embodiment of FIG. 11 shows a single etch stage 1104, it should be understood that a plurality of in-situ etching processes may be intermittently inserted among multiple deposition stages of any suitable form during the gap filling process.

12A-C illustrate exemplary cross-sectional views of non-planar substrates at various stages of the in-situ deposition and etching process embodiments described above. 12A shows a cross-sectional view of an exemplary non-planar substrate 1200 including a gap 1202. The gap 1202 is covered with a film 1204. The film 1204 is almost conformal to the gap 1202, but the film 1204 includes a recess 1206 near the top of the gap 1202.

In the embodiment shown in FIG. 12B, the concave portion 1206 of the film 1204 has been selectively removed, and the upper region 1204A of the film 1204 is thinner than the lower region 1204B. The selective removal of the recessed portion and/or the adjustment of the sidewall angle can be achieved by adding a mass transfer limitation and/or a life limitation to the active etching species. In some embodiments, selective etching on the top of the gap 1202 can also adjust the sidewall angle of the gap 1202 so that the gap 1202 is wider at the top than at the bottom. This can further reduce the bread stick effect in the subsequent deposition stage. In the embodiment shown in FIG. 12C, after the subsequent deposition stage, the gap 1202 is almost filled and no holes are exhibited.

FIG. 15 shows another embodiment of the in-situ etching process, which illustrates a through-silicon via (TSV) for copper electrodes. Some exemplary TSVs have a depth of about 105 microns and a diameter of about 6 microns, resulting in an aspect ratio of about 17.5:1, and may have a thermal budget upper limit of about 200 degrees Celsius. As shown in the embodiment of FIG. 15, the through silicon vias are covered by a dielectric isolation layer 2502 to electrically isolate the silicon substrate from the metal filled vias. Exemplary dielectric isolation layer materials include, but are not limited to, silicon oxide, silicon nitride, and low-k dielectric materials. In some embodiments, the above-mentioned exemplary etching process may use a suitable sputtering gas (such as argon) to supplement the concave portion by physical sputtering.

Other exemplary applications for CFD films include (but are not limited to) conformal low-k films for back-end-of-line interconnect isolation applications (e.g. in some non-limiting examples, k is approximately 3.0 or lower), conformal silicon nitride film, conformal anti-reflection layer, and copper adhesion and barrier layers for etch stop and spacer applications. CFD can be used to make many different compositions of low-k dielectric layers for BEOL processing. Examples include silicon oxide, oxygen-doped carbide, carbon-doped oxide, oxynitride, and the like.

In another example, in an integrated process scenario, a silicon dioxide spacer layer can be deposited over the photoresist "core". The use of photoresist cores instead of alternative core materials (such as silicon carbide layers) can eliminate the patterning step in the integration process. This process may involve patterning the photoresist using normal lithography techniques and then depositing a thin CFD oxide layer directly over the core. The directional dry etching process can then be used to remove the patterning The CFD oxide film on the top and bottom of the photoresist, leaving only the material along the side walls of the patterned photoresist (considered as trenches). At this stage, simple ashing can be used to remove the exposed core left by the CFD oxide. Where there was a single photoresist line, there were two CFD oxide lines. This process doubles the pattern density in this way; therefore it is sometimes referred to as "double" patterning. Unfortunately, the use of a photoresist core can limit the deposition temperature of the spacer layer to below 70 degrees Celsius, which can be lower than the deposition temperature of conventional CVD, PECVD, and/or ALD processes. Therefore, in some embodiments, a low-temperature CFD silicon dioxide film may be deposited at a temperature below 70 degrees Celsius. It should be understood that within the scope of the present invention there are other potentially integrated process applications for suitable CFD-generated films. In addition, in various embodiments, the silicon nitride nitride deposited as described above may be used as a conformal diffusion barrier layer and/or an etch stop layer in various stages of semiconductor device manufacturing.

Although the various CFD deposition processes described above have been indicated in terms of deposition, processing, and/or etching of a single thin film, it should be understood that some CFD processes may include in-situ deposition in the form of multiple thin films within the scope of the present invention. For example, an alternative layer in the form of a thin film can be deposited in situ. In the first case, the double spacer layer for the gate device can be fabricated by in-situ deposition of the silicon nitride/silicon oxide spacer layer stack. This can reduce the cycle time and increase the throughput of the processing station, and can avoid the interlayer defects formed by the latent film layer incompatibility. In the second case, an anti-reflective layer for lithography patterning applications can be deposited as a stack of SiON or amorphous silicon with tunable optical properties and SiOC.

In some embodiments, the dopant-containing source layer is formed by a conformal thin film deposition process. This layer is called the "source" layer because it provides a source of dopant species (such as dopant atoms of boron, phosphorous, gallium, and/or arsenic). The doped CFD layer serves as a dopant source for the lower (or upper) structure in the doping device. After the source layer is formed (or during its formation), the dopant species are driven or otherwise incorporated into the adjacent structure of the device under fabrication. In some embodiments, the dopant species are driven in by tempering during or after forming the conformal dopant source film. The high conformal nature of CFD allows doping of non-conventional device structures, including structures that need to be doped in three dimensions. The CFD dopant source layer is usually More processes are formed, but include additional process operations that incorporate dopant species. In some embodiments, the dielectric layer is the base source layer into which the dopant species is incorporated.

For example, doped silicon oxide can be used as a diffusion source for boron, phosphorous, arsenic, etc. For example, boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), or boron phosphorus doped silicate glass (BPSG) can be used.

The doped CFD layer can be used to provide conformal doping in three-dimensional transistor structures such as multi-gate fin transistors (FinFETs) and three-dimensional memory devices. Some examples of three-dimensional structures can be found in the "Tri-gate (Intel)" proposed by J. Kavalieros et al. in Symp. VLSI Tech Pg 50, 2006 and the "FinFET" proposed by Yamashita et al. (IBM Alliance) in VLSI 2011, They are all incorporated herein by reference. Conventional ion implanters cannot easily dope the sidewalls, especially in high aspect ratio structures. In addition, in the dense array of i3D structures, there may be a shadow effect of the directional ion beam in the implanter, thereby causing a serious dose residual problem of tilting the implant angle. In addition to conventional silicon-based microelectronics, other applications of CFD doping include microelectronics and optoelectronics based on III-V semiconductors such as GaAS and II-VI semiconductors such as HgCdTe, photovoltaic cells, flat panel displays, And electrochromic technology.

FIG. 16 shows a transistor with a three-dimensional gate structure, in which the source and drain are formed as thin vertical structures that are difficult to dope by conventional ion implantation techniques. However, when a thin layer of n or p-type doped CFD oxide is formed over the vertical structure, conformal doping is completed. It has been observed that conformal doping in three-dimensional devices increases the current density by 10-25% due to the reduction in series resistance. See the literature proposed by Yamashita et al. at VLSI 2011.

CFD doped oxides have various advantages as diffusion sources. First, it provides high shape retention at low temperatures. Because the doped film may be a sacrificial layer, the non-conformal film usually faces more challenges when it is removed, that is, some areas will be over-etched. As explained, CFD provides highly conformal films. In addition, CFD provides excellent control of the doping concentration. The CFD process can provide one or more undoped oxide layers followed by Single doped layer required. The degree of doping can be strictly controlled by the frequency used to deposit the doped layer and the conditions of the doping cycle. In some embodiments, the doping cycle is controlled by, for example, using a dopant source with significant steric hindrance.

Figure 17 presents the sequence of baseline CFD operations from left to right along the x-axis advancing time. Many changes are supported, and this illustration is presented for illustrative purposes only. At the beginning of the sequence (during operation A), the gas-phase oxidant is introduced into the reaction chamber, which contains the substrate on which the CFD film is to be deposited. Examples of suitable oxidants include elemental oxygen (eg O ₂ or O ₃ ), nitrous oxide (N ₂ O), water, alkyl alcohols such as isopropanol, carbon monoxide, and carbon dioxide. The oxidant is usually supplied with an inert gas such as argon or nitrogen.

Next, in operation B, the dielectric precursor is temporarily introduced into the reaction chamber. The duration of operation B is chosen to allow the amount of driver to be adsorbed onto the substrate surface before one cycle sufficient to support film growth. In some embodiments, the precursor saturates the substrate surface. The precursor will be selected based on its ability to produce the dielectric of the desired composition. Examples of dielectric components include silicon oxide (including silicate glass), silicon nitride, silicon oxynitride, and silicon oxycarbide. Examples of suitable precursors include alkylamino silanes (SiH _x (NR ₂ ) _4-x ) (where x=1-3, and R includes various groups such as methyl, ethyl, propyl, and butyl Isomerically configured alkyl groups), and halosilanes (SiH _x Y _4-x ) (where x=1-3, and Y contains Cl, Br, and I). More specific examples include dialkylaminosilanes and sterically hindered alkylsilanes. In a specific example, BTBAS is used to generate silicon oxide precursors.

During operation B, the oxidant introduced into the chamber during stage A is continuously inflowed. In some embodiments, it continuously flows in at the same rate and the same concentration as during operation A. At the end of operation B, the flow of dielectric precursor into the chamber is stopped, and operation C begins as described. During operation C, the oxidant and inert gas such as during operations A and B are continuously flowed in to clear the remaining dielectric precursors in the reaction chamber.

After the cleaning is completed during operation C, the precursor reacts on the substrate surface to form part of the dielectric film (see operation D). In various embodiments, plasma is applied to drive the reaction of adsorbing the dielectric precursor. In some examples, this reaction is an oxidation reaction. Some of the oxidant that previously flowed into the reaction chamber can be adsorbed onto the surface together with the dielectric precursor, thereby providing a ready-to-use oxidant for plasma-mediated surface reactions.

Operations A to D together provide a single cycle of the dielectric film deposition process. It should be appreciated that other CFD embodiments described herein may be used instead of the basic cycle described herein. In the described embodiment, the deposition cycle (A to D) is performed without introducing any dopant species. In various embodiments, the cycle represented by operations A through D is continuously repeated one or more times before introducing the dopant species. This is illustrated in stage E of FIG. 17. In some examples, the operations A-D are repeated at least once, or at least twice, or at least five times before introducing the dopant.

As an example, the dielectric layer is deposited at a rate of about 0.5 to 1 Angstrom/cycle. Each of the one or more cycles (repeats of A-D) allows the oxidant to flow continuously into the reaction chamber throughout.

At some point in the process, the dielectric layer deposition cycle is interrupted by the introduction of dopant precursor species (eg diborane). This legend illustrates the operation F in the figure. Examples of dopants that can be provided in the dielectric film include III and IV valence elements such as boron, gallium, phosphorus, arsenic, and other dopants. In addition to diborane, examples of dopant precursors include phosphine and other hydride sources. Non-hydride dopants such as alkyl precursors (such as trimethylgallium) and halogen precursors (such as gallium chloride) can also be used.

In some variations, the dopant is deposited at the interface with the underlying substrate, followed by a pulse of dopant interspersed in CFD cycles per x number of cycles (as described), and optionally covered with It is an undoped protective "cover" layer of CFD oxide film. See the example of the resulting stack in Figure 18.

In a specific embodiment, the dopant precursor species and the carrier gas such as an inert gas (eg, argon) are provided to the reaction chamber in the form of a mixture (but not mixed with an oxidant or other reactants). Therefore, in this baseline example, the flow of oxidant is stopped during operation F. In other embodiments, The precursor is introduced together with the reducing agent or oxidizing agent. In some embodiments, the concentration of dopant to carrier gas is between about 1:5 and 1:20. In some embodiments, the dopant deposition temperature is between about 300 and 400°C. The duration of the dopant exposure step varies according to the target dopant concentration. In some embodiments, the exposure step is between about 2.5 seconds and 7.5 seconds. In a specific embodiment, 1000 sccm of diborane is flowed into 10000 sccm of argon at a pressure of 3 Torr and about 400°C.

In some embodiments, dopant precursors are collected on the substrate surface by a non-surface confinement mechanism. For example, the precursor can be deposited by a CVD process rather than an ALD (surface adsorption limitation) process.

Prior to further processing of the dielectric film, the dopant precursor is selectively removed from the reaction chamber. In addition, as shown in FIG. 17, the delivery of the dopant precursor is followed by the selective activation operation G mediated by plasma, elevated temperature, and the like. In the example of diborane as a dopant precursor, the activation operation converts diborane to elemental boron. After operation G is completed, the process is continued with selective clearing (not shown).

In the example involving CVD diborane dopants, the activation operation is only a temperature-based decomposition to produce boron. This is a process susceptible to temperature. At higher temperatures, a relatively short exposure time can be used with the same boron concentration per unit thickness as the target. Alternatively, in some processes (such as those using trimethylborane (TMB)), activation may involve plasma or thermal oxidation steps. As for some other precursors, a "pinning" step can be used as appropriate to keep free boron or other dopants in place. This can be done using "pinned" plasma.

In some embodiments, plasma activation involves RF power at any frequency suitable for incorporating carbon into the film. In some embodiments, the RF power supply may be configured to control high frequency and low frequency RF power independently of each other. Exemplary low-frequency RF power may include, but is not limited to, frequencies between about 200 kHz and 1000 kHz. Exemplary high-frequency RF power may include, but is not limited to, frequencies between about 10 MHz and 80 MHz (eg, 13.56 MHz). Likewise, the RF power supply and matching network can operate at any suitable power to form a plasma. Examples of suitable power include (but are not limited to) about 100W for high frequency plasma and Power between 3000W, and power between about 100W and 10000W for low frequency plasma (on a per wafer basis). The RF power supply can be operated in any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles between about 5% and 90%. The acceptable process pressure is generally between about 0.5-5 Torr, and preferably between about 2-4 Torr. As for some plasma treatments (of the lower substrate) before exposure to dopants, it has been found to work well at pressures up to about 10 Torr (or up to about 9 Torr).

The following table summarizes the range of plasma parameters that can be used in various BSG processes:

In the described baseline process, the cycle of dielectric layer deposition and intermittent dopant delivery (operations A to G) can be performed multiple times as shown in stage H of the equation. The actual number of process sequence repetitions depends on the desired total thickness of the film, the thickness of the dielectric layer deposited per cycle, and the amount of dopant incorporated into the film. In some embodiments, operations A-G are repeated at least twice, or at least three times, or at least five times, or at least about ten times.

After the dielectric film is completely deposited, it can be used as a source of dopant species for nearby semiconductor structures. This can be accomplished by driving the dopant self-deposited thin film into the device structure as shown in operation I of FIG. 17. In various embodiments, drive-in is accomplished by a heat-mediated diffusion process such as tempering. In some cases, especially those with very shallow junctions, laser spike tempering may be used.

Many changes in this baseline process can be achieved. Some of these changes aim to increase the amount of dopants that can be used to diffuse into adjacent semiconductor structures. Other changes This is to control the rate at which the dopant is delivered into the nearby semiconductor structure from the source film. In addition, other changes control the direction of dopant species diffusion. Generally, it is ideal to tend the diffusion of the dopant towards the device structure and away from the opposite side of the film.

In some embodiments, the frequency at which the dopant is introduced into the growing dielectric film is controlled. More frequent dopant precursor delivery cycles result in an overall greater concentration of dopant in the final dielectric film. It also results in a relatively uniform distribution of dopants throughout the film. When fewer dopant precursor delivery cycles are inserted during the deposition process, the regions of high dopant concentration in the film are more separated than when the dopant delivery cycles are more frequent.

In one embodiment, the dopant precursor is delivered to the growing dielectric film once per cycle of dielectric layer deposition. In another embodiment, the dopant precursor is delivered once every other cycle of dielectric layer deposition. In other embodiments, a lower frequency dopant precursor delivery cycle is included in the process. For example, the dopant precursor can be delivered once every third, fourth, or fifth cycle of dielectric layer deposition. In some cases, the dopant precursor is delivered at a frequency of approximately once every 5-20 dielectric layer deposition cycles.

It should be understood that the frequency of introducing dopant precursors into the growing thin film need not be consistent during the deposition of the dielectric thin film. With this in mind, the resulting dielectric film may have graded dopant composition such that the average concentration of the dopant in the thickness of the deposited dielectric film is not uniform. In one embodiment, the concentration of dopant is greater on the side adjacent to the dielectric film of the doped semiconductor device structure. Of course, the dopant concentration gradient in the dielectric thin film can be modified to the desired by carefully changing the frequency of the dopant delivery cycle throughout the dielectric layer deposition process.

Another change in the baseline process involves adjusting the amount of dopant precursor delivered during any dopant precursor delivery cycle. The amount of dopant precursor delivered during any particular dopant delivery cycle will be determined by the concentration of the dopant precursor delivered to the reaction chamber and the duration of exposure of the substrate to the delivered dopant precursor Decide.

As shown above, some dopant precursors can be provided to the growing film through a similar CVD process. In this case, the amount of dopant precursor delivered to the growing thin film in any particular cycle is not limited to adsorption or other surface-mediated phenomena. Therefore, the number of dopant precursors provided in any dopant delivery cycle can be relatively large and controllable. As the dopant precursor delivered during any dopant delivery cycle reaches a greater amount, the overall concentration of dopant in the dielectric film increases. This can compensate for the effect of having relatively infrequent dopant precursor delivery cycles throughout the process. However, it must be understood that increasing the amount of dopant delivered during any particular dopant precursor delivery cycle may result in a relatively high local concentration of dopant in the film. Of course, such spikes in dopant concentration can be softened by tempering or other operations in which the dopant diffuses in the dielectric film to make its concentration more uniform.

In the case of boron as a dopant, the boron flux delivered during a typical boron precursor delivery cycle can vary from about 7.5ML (Mega-Langmuirs) to 30ML (ML is Unit of flux/exposure).

In some embodiments, the number of dopant precursors delivered in each precursor delivery cycle is not fixed throughout the growth of the dielectric film. Therefore, the number of dopant precursors delivered per cycle can be modified to produce the desired dopant concentration gradient in the dielectric film. For example, it may be desirable to provide a larger amount of dopant precursor in those dopant precursor delivery cycles that occur in the dielectric film relatively close to the features of the semiconductor device to be doped. The resulting concentration gradient has a larger dopant concentration in the thin film area adjacent to the doping device structure.

In some embodiments, the dopant precursor system is incorporated onto the substrate surface in an adsorption-restricted manner. In the case of such a precursor, the dopant is introduced into the thin film through a similar ALD process (relative to the similar CVD method as described above). Examples of dopant precursors that adhere to the substrate surface through absorption-mediated processes include trimethylborane and other alkyl precursors such as trimethylgallium. With similar Examples of dopant precursors accumulated on the substrate surface by the CVD process include diborane, phosphine, and arsine.

Generally speaking, the concentration distribution of the dopant in the dielectric film can be modified as appropriate. In one embodiment, the dopant concentration rises to a high level at the edge of the thin film adjacent to the doped structure. In some embodiments, the concentration increases and decreases intermittently throughout the film thickness. In one example, dopants (such as boron) are provided only at the interface between the underlying substrate and the CFD dielectric layer. This dopant layer is sometimes referred to as a "spike layer". In some cases, exposure of the dopant is pulsed (using, for example, CVD exposure to the dopant precursor) instead of using a single step, thereby increasing the consistency of the wafer into which the dopant is incorporated. In another example, CFD oxides or other dielectrics are dispersed with the dopants (eg, boron in doped BSG). See Figures 18 and 19. The dispersed doped dielectric can be provided with or without a peak layer. In yet another example, undoped CFD oxide or other dielectric mask is used as the protective layer. See Figures 18 and 19 again.

The dielectric film in which the dopant species reside can modify itself to affect the diffusion of the dopant species through the film itself. For example, the film density and/or chemical composition can be controlled to produce the desired effect on the diffusion of dopant species. In some methods, the entire thickness of the dielectric layer has the same density or composition so that the modified dopant diffusion characteristics remain constant throughout the film thickness. In other methods, the film properties are modified so that the dopant diffusion varies across the film thickness. For example, the inventors have found that plasma oxidation parameters can be changed to make the CFD oxide less dense, allowing more dopant to diffuse across the CFD oxide during tempering.

In some embodiments, the composition of the dielectric film (or the process gas used to form the film) is modified to affect the diffusion of dopants therein. It has been found, for example, that the nitrogen to oxygen ratio in the oxidant treatment gas delivered to the reaction chamber during the dielectric film deposition cycle affects the ability of the dopant species to diffuse through the dielectric film. For example, the presence of larger amounts of nitrogen in the oxidant gas used during the formation of the dielectric film results in the dielectric film having a significant resistance to the diffusion of dopants. In contrast, a relatively large amount of oxygen In the gas, the film has a much smaller resistance to diffusion of dopants. The nitrogen present in the processing gas can be provided by means of a nitrogen-containing compound (eg, N2O) or elemental nitrogen (N2). In various embodiments, the oxidant continuously flowing during the dielectric film deposition cycle includes nitrous oxide.

In some embodiments, the dielectric film is made by initially using an oxidant gas with a high oxygen content and a relatively low nitrogen content during the initial growth phase of the dielectric film. Later, after forming part of the thin film on the substrate structure to be doped, the composition of the oxidant gas is changed so that it is relatively rich in nitrogen. For example, during the initial deposition cycle, the oxidant gas used for the dielectric film may completely contain molecular oxygen. In a later dielectric layer deposition cycle, the oxidant gas is changed so that at least a portion of the oxygen is replaced by nitrous oxide. The goal is to increase diffusion towards the bottom of the film and prevent diffusion towards the top of the film (assuming that the device structure to be doped is below the dielectric film). The inventors have found that if the nitrogen concentration level is greater than about 1E20 atoms/cc (measured by, for example, SIMS), the effect of preventing boron diffusion is significant. In contrast, at a nitrogen concentration level of about 1E19 atoms/cc or lower, the blocking effect can actually be ignored.

From the viewpoint of the film composition itself, the nitrogen content in the film can vary from a relatively low level in the portion of the film close to the substrate structure to be doped to a relatively high level in the portion opposite the structure to be doped.

The deposition temperature used during the formation of the dielectric film also affects the ability of the dopant atoms to diffuse inside the film. In general, it has been found that dielectric layers deposited by CFD processing at relatively low temperatures generally allow relatively high dopant diffusion rates. An example of a relatively low temperature associated with a relatively high dopant diffusion rate is a temperature in the range of about 300 to 400°C, or more specifically between about 350 to 400°C. Of course, these temperature ranges depend on the choice of dielectric precursors and other deposition parameters. Although it can be used with some precursors, it is particularly suitable for using BTBAS as a dielectric precursor.

In contrast, dielectric layers deposited at relatively high temperatures tend to resist the diffusion of dopant species. In the case of using BTBAS as a dielectric precursor, the relative high temperature associated with the relatively low dopant diffusion rate is in the range of about 350 to 400°C, or more specifically between about 300 to 380°C between. Of course, these temperatures can be applied to other precursors. In addition, although the fact is that higher temperatures generally produce denser films that resist the diffusion of dopants, the diffusivity and/or density can also be controlled by other RF exposure times and power during plasma oxidation, for example. Examples of baseline parameters that can be used during CFD oxide growth include (1) high frequency plasma at about 200-2500 Watts (for 300mm wafers), usually without low frequency plasma, and (2) at about 0.2 to 1.5 Plasma exposure time in the second range.

In some embodiments, a relatively low temperature is used to deposit the dielectric film adjacent to the doped device structure, and a higher temperature is used to deposit the portion of the dielectric film further away from the device. In some embodiments, the temperature employed during the deposition of all dielectric thin films varies, and likewise, the ratio of nitrogen to oxygen in the oxidant gas during the deposition process varies. In this way, the dopant diffusion characteristics of the resulting dielectric film can be varied to an extent within the thickness of the film.

In various embodiments, the deposition temperature is controlled by heating and/or cooling the pedestal or chuck that holds the substrate during CFD. Examples of suitable pedestals are described in U.S. Patent Application No. 12/435890 filed on May 5, 2009 (Public Application No. US-2009-0277472) and U.S. Patent filed on April 13, 2011 Application No. 13/086010, both of which are incorporated herein by reference in their entirety.

In some embodiments, the device structure on the surface of the substrate to be doped is pre-treated before the deposition of the dielectric film or dopant precursor. In one example, pretreatment involves exposure to plasma, such as reduced plasma. When, for example, the substrate features to be doped include silicon, such processing may be appropriate. Silicon usually contains a small amount of native oxide that can act as a barrier to subsequent dopant diffusion. In a specific embodiment, the substrate surface is pretreated with a reducing plasma such as a hydrogen-containing plasma, and then the surface is brought into contact with the dopant precursor in the gas phase before the first cycle of dielectric thin film deposition . The precursor can be delivered to the reaction chamber immediately after the plasma pretreatment is completed. In some examples, the dopant precursor is diborane. In general, the procedure depicted in FIG. 17 can be modified so that the dopant or dopant precursor is delivered to the substrate surface before the first dielectric layer deposition cycle.

In various embodiments, the partially formed dielectric film itself is pre-treated with plasma or other activation treatment before being exposed to the dopant precursor. This is used to improve intra-wafer consistency by (a) providing thermal consistency before the dopant precursor is exposed, (b) activating the surface of the dielectric layer (eg by chemical and/or physical roughening) In order to increase the dopant precursor adhered to the surface of the dielectric layer.

In some other embodiments, the chemical conditions of the dopant species during the dopant precursor delivery and/or activation phase of the thin film deposition process are controlled. In some embodiments, the dopant precursor is processed in a manner that "fixes" the dopant in the dielectric film and thereby limits the diffusion of the dopant until subsequently activated by tempering or other such operations. In one example, some dopants are fixed by oxidizing them or their precursors during the dopant delivery stage of the dielectric film deposition process. In a specific example, diborane is delivered to the reaction chamber in an oxidizing environment so that the resulting boron-containing material is effectively fixed in the dielectric film. Alternatively, the dopant is fixed by delivering the precursor to the reaction chamber in an inert or reducing environment, and then exposed to an oxidizing environment while on the dielectric film. In contrast, in the absence of subsequent oxidation, treating some dopant precursors with a reducing agent can produce more mobile dopants in the dielectric film.

After the source layer is formed (or during its formation), the dopant species are driven or otherwise incorporated into the adjacent structure of the device being fabricated. In some embodiments, the dopant species are driven in by tempering during or after the formation of the conformal dopant source film. In addition to the conventional thermal tempering, flash tempering and laser spike tempering can be used, for example. The tempering time and temperature depend on various parameters, including: the concentration, amount, and type of dopant in the source layer; the composition and morphology of the source layer substrate (such as oxide glass); the dopant species must move into the adjacent The distance in the device structure; the desired dopant concentration in the device structure; and the composition and morphology of the device structure. In some embodiments, the tempering is performed at a temperature between about 900 and 1100°C for about 2 to 30 seconds.

Various equipment can be designed to deposit the doped dielectric film as described herein. Generally, the apparatus will include a processing chamber used to hold the substrate during the deposition of the doped film. The processing chamber will Contains one or more gas inlets that allow process gas to enter, the process gas including a dielectric precursor, an oxidant, a carrier gas or an inert gas, a dopant species, and the like. In various embodiments, the device will additionally include features for generating a plasma having a dielectric layer suitable for producing; incorporating dopants into the dielectric layer; processing the dielectric layer to modify the layer Electrical, optical, mechanical, and/or chemical properties; and the property of driving dopants into the substrate from the thin film. Typically, the equipment will include a vacuum pump or a supply to connect to this pump. Furthermore, the device will have one or more controllers configured or designed to control the device to complete the sequence of the doped dielectric layer deposition operations described herein. The controller may contain instructions to control various features of the equipment, including valves to deliver process gas and control pressure, power supplies to generate plasma, and vacuum sources. This instruction can control the time and sequence of various operations. In various embodiments, the apparatus may have features as provided in the VectorTM series of deposition tools available from Novellus Systems, San Jose, California. Other features of suitable equipment for depositing doped dielectric films will be described elsewhere in this article.

Characteristics of doped CFD thin film

The dielectric thin film as a source of dopant species will have various characteristics. In various embodiments, the film thickness is between about 20 and 200 angstroms. In some cases, such as for doping the front end of the source-drain extension of the three-dimensional transistor structure, the film thickness is between about 50 and 100 angstroms. The average concentration of dopant atoms (or other dopant species) in the dielectric film depends on various factors, including the total amount of dopant per unit surface area of the film, the diffusivity of the dopant atoms in the film, and the doping Miscellaneous applications. In some embodiments, the concentration of dopants in the film is between about 0.01 and 10 weight percent. In other embodiments, the concentration of dopants in the film is between about 0.1 and 1 weight percent. In still other embodiments, the concentration of dopants in the film is between about 0.5 to 4 weight percent. The techniques described herein allow the dopant concentration to be adjusted in a wide range (eg, between about 0.01 and 10 weight percent). For example, it has been taught that in a CFD dielectric film, the boron concentration can be easily adjusted between about 0.1 and 4.3 weight percent between. In some embodiments, 5, 7, 10, and 12 nm CFD thin films are grown with boron between about 0.1 and 0.5 wt%.

Other characteristics can be used as the characteristics of CFD doped dielectric films. For example, the sheet resistance (Rs) of CFD deposited films can vary from about 100 to 50,000 ohms/square. In some cases, these values are obtained after some or all of the dopants have been driven from the doped CFD layer. In addition, the junction depth generated by driving the dopant from the CFD film (for example, as measured by SIMS) can be appropriately adjusted to a level of up to about 1000 angstroms. Of course, many front-end devices require a shallow junction depth (for example, in the range of about 5-50 angstroms), which can also be obtained using CFD films. The actual junction depth can be controlled by many factors, such as the concentration of interface dopants (such as boron), the mobility of dopants from the body and the interface into the substrate (such as silicon), and the back to drive the dopants The temperature and duration of the fire.

CFD doping applications

The surface of the substrate on which the dielectric power layer is formed may require high conformal deposition. In some examples, the dielectric film uniformly covers features with an aspect ratio between about 1:0.5 and 1:12 (more specifically between about 1:1 and 1:8), and Have a feature width no greater than about 60 nm (more specifically no greater than about 30 nm). Doping using the dielectric layer type described herein will find specific applications in devices formed according to 45nm technology nodes and beyond (including 22nm technology nodes, 16nm technology nodes, etc.).

Among the device structures that can be doped with the CFD source layer are conventional doped structures such as CMOS source and drain, source-drain extensions, capacitor electrodes in memory devices, gate structures, and so on. Other structures that can be doped in this way are, for example, the junction at the source/drain extension area in the gate structure (as in some 3D gate structures used in some devices fabricated with 22nm technology nodes Non-planar or three-dimensional structure). Some three-dimensional structures can be found in the "Tri-gate (Intel)" proposed by J. Kavalieros et al. in Symp. VLSI Tech Pg 50, 2006, which was previously incorporated by reference. "FinFET" proposed by Yamashita et al. (IBM Alliance) at VLSI 2011, and references therein.

Doped CFD films have various other applications, such as providing etchable layers used in various stages of integrated circuit fabrication. In some embodiments, the etchable layer is a glass layer with an adjustable wet etch rate, where the etch rate can be adjusted by the degree of doping. In other words, the degree of doping is selected to provide a predetermined etch rate. In a specific embodiment, the etchable layer is a silicate glass layer containing dopants such as phosphorus, boron, or a combination thereof.

CFD doping example

The CFD boron-doped silicate glass (BSG) film is ready and achieves almost 100% step coverage on a complex three-dimensional gate structure. Phosphorus-doped silicate glass (PSG) is expected to have similar results. Boron or phosphorous can be driven from such a thin film into the lateral and vertical regions of the source and drain junctions during the subsequent tempering step that provides conformal/homogeneous diffusion under the dopant. Figure 20 shows typical deposition blocks used to synthesize CFD BSG/PSG thin films. The CFD oxide growth cycle contains (a) a saturating dose of SiO ₂ precursor (BTBAS), (b) inert scavenging to flush out residual precursor species, (c) oxidation plasma step, and (d) inert gas scavenging to shift In addition to the reaction by-products. This mechanism ensures that the reaction is self-limiting and promotes the superior shape retention observed in these films. If necessary, a boron or phosphorous exposure step is periodically inserted during the growth of the CFD oxide, followed by a pumping and cleaning sequence, and a selective RF pinning/hardening step (eg exposure to plasma). This deposition block needs to be repeated multiple times depending on the target BSG/PSG thickness. See Figure 20.

The frequency of intervening boron or phosphorous exposure adjusts the dopant diffusion distance at a specific temperature, and the length of the exposure period controls the total dopant dose. These two powerful control parameters provide a multi-faceted synthesis scheme for precisely adjusting the interface dopant concentration.

In experiments, CFD has demonstrated superior growth characteristics in BSG films. The CFDBSG process uses BTBAS as the silicon source, N ₂ O plasma for oxidation, and 5% diborane (B ₂ H ₆ ) in argon for boron doping. A mixture of argon and N ₂ O is used as purge gas. A growth rate of ~1 Angstrom/cycle consistent with the results on the undoped CFD oxide was obtained, thus showing that the inclusion of the boron exposure step did not adversely affect CFD growth. As shown by the SEM photos, the 250 Angstrom thick CFD BSG film exhibits nearly perfect shape retention on different test structures. The step coverage of these films is estimated to be ~100% on dense and separated structures (Figure 21). Step coverage is defined as the quotient of the film thickness on the sidewall of the feature divided by the film thickness on the top of the same feature. Table 6 shows the different differences from the preliminary study to distinguish the effect of boron exposure time, boron insertion frequency, and growth temperature on the final average boron concentration in the film. 25X CFD Ox means that there are 25 CFD undoped oxide cycles per boron insertion stage. This sample grows to approximately 500 angstroms, so the entire sequence is repeated about 20 times (assuming the growth rate of CFD oxide is 1 angstrom/cycle). These divergent SIMS data (shown in Figure 22) show that the average boron concentration can be adjusted in the range of about 0.5-3.5wt% boron, making custom doping options possible.

equipment

It should be appreciated that any suitable processing station may be employed in the case of one or more of the embodiments described above. For example, FIG. 13 schematically shows an embodiment of a CFD processing station 1300. For simplicity, the CFD processing station 1300 is shown as an independent processing station having a processing chamber body 1302 to maintain a low-pressure environment. However, it should be understood that a plurality of CFD processing stations 1300 may be included in a common low-pressure processing tool environment. Although the embodiment shown in FIG. 13 shows a processing station, it should be understood that in some embodiments plural processing stations Can be included in a processing tool. For example, FIG. 14 illustrates an embodiment of a multi-station processing tool 2400. In addition, it should be understood that in some embodiments, one or more hardware parameters of the CFD processing station 1300 may be adjusted programmatically by one or more computer controllers, including the parameters detailed below.

The CFD processing station 1300 is in fluid communication with a reactant delivery system 1301 for delivering processing gas to the distribution showerhead 1306. The reactant delivery system 1301 includes a mixing vessel 1304 to mix and/or regulate the processing gas delivered to the showerhead 1306. One or more mixing vessel intake valves 1320 can control the introduction of process gas into the mixing vessel 1304.

Some reactants such as BTBAS may be stored in liquid form before being vaporized at the processing station and then delivered to the processing station. For example, the embodiment of FIG. 13 includes a vaporization point 1303 for vaporizing the liquid reactant to be supplied to the mixing vessel 1304. In some embodiments, the vaporization point 1303 may be a heated vaporizer. The saturated reactant vapor produced from such a vaporizer may condense in the downstream delivery pipeline. Small particles can be produced by exposing incompatible gases to condensed reactants. These small particles can block pipes, obstruct valve operation, contaminate substrates, and so on. Some methods to deal with these problems involve purging and/or emptying the delivery pipeline to remove residual reactants. However, clearing the delivery pipeline can increase the processing station cycle time, thereby reducing the processing station throughput. Therefore, in some embodiments, the delivery pipeline downstream of the vaporization point 1303 can be thermally traced. In some examples, the hot tracking of the mixing container 1304 may also be performed. In a non-limiting example, the pipe downstream of the vaporization point 1303 has an increasing temperature curve extending from about 100 degrees Celsius to about 150 degrees Celsius at the mixing vessel 1304.

In some embodiments, the reactant liquid may be vaporized at the liquid injector. For example, the liquid injector may inject a pulse of liquid reactant into the carrier gas stream upstream of the mixing vessel. In one case, the liquid injector may vaporize the reactants by abruptly vaporizing the liquid from a higher pressure to a lower pressure. In another case, the liquid injector can atomize the liquid into dispersed droplets that subsequently vaporize in the heated delivery tube. It should be understood that smaller droplets can vaporize faster than larger droplets, thereby reducing the delay between liquid injection and complete vaporization. Faster vaporization can reduce the length of the pipeline downstream from the vaporization point 1303. In one case, the liquid injector may be installed directly to the mixing container 1304. In another case, the liquid injector may be directly mounted to the shower head 1306.

The shower head 1306 and the base 1308 are electrically connected to the RF power supply 1314 and the matching network 1316 to supply power to the plasma. In some embodiments, plasma energy can be controlled by controlling one or more of processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 1314 and the matching network 1316 can be operated at any suitable power to form a plasma with a desired composition of free radical species. Examples of suitable power include, but are not limited to, power between 100W and 5000W for 300mm wafers. Likewise, the RF power supply 1314 can provide RF power at any suitable frequency. In some embodiments, the RF power supply 1314 may be configured to control the high-frequency and low-frequency RF power sources independently of each other. Exemplary low-frequency RF frequencies may include, but are not limited to, frequencies between 50 kHz and 500 kHz. Exemplary high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It should be understood that any suitable parameters can be modulated discretely or continuously to provide plasma energy for surface reactions. In a non-limiting example, the plasma power may be pulsed intermittently to mitigate ion bombardment of the substrate surface relative to the continuously powered plasma.

In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In one case, the plasma power can be monitored by one or more voltage and current sensors (such as VI probes). In another case, the plasma density and/or process gas concentration can be measured by one or more optical emission spectrum sensors (OES). In some embodiments, one or more plasma parameters may be adjusted programmatically based on measurements from such an in-situ plasma monitor. For example, OES sensors can be used in the feedback loop to provide programmable control of plasma power. It should be appreciated that in some embodiments, other monitors may be used to monitor plasma and other process characteristics. Such monitors may include, but are not limited to, far infrared (IR) monitors, acoustic monitors, and pressure transducers.

In some embodiments, the base 1308 may be temperature controlled via the heater 1310. In addition, in some embodiments, pressure control of the CFD processing station 1300 may be provided by the butterfly valve 1318. As shown in the embodiment of FIG. 13, the butterfly valve 1318 regulates the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the processing station 1300 may also be adjusted by changing the flow rate of one or more gases introduced into the CFD processing station 1300.

As described above, one or more processing stations may be included in a multi-station processing tool. 14 shows a schematic diagram of an embodiment of a multi-station processing tool 2400 with an inbound load lock 2402 and an outbound load lock 2404 (either or both of which may include a remote plasma source). A robotic arm 2406 at atmospheric pressure is configured to move wafers from the cassette loaded through the box 2408 through the atmospheric port 2410 into the inbound load lock 2402. The wafer is placed on the base 2412 in the inbound load lock 2402 by the robot arm 2406, the atmosphere port 2410 is closed, and the load lock is evacuated. The wafer can be exposed to remote plasma processing in the load lock before being introduced into the processing chamber 2414, where the inbound load lock 2402 contains a remote plasma source. In addition, the wafer can also be heated in the inbound load lock 2402, for example to remove moisture and adsorb gas. Next, the chamber transport port 2416 leading to the processing chamber 2414 is opened, and another robot (not shown) places the wafer in the reactor on the pedestal of the first station shown in the reactor for processing . Although the embodiment shown in FIG. 14 includes a load lock, it should be understood that in some embodiments direct access of the wafer to the processing station may be provided.

The illustrated processing chamber 2414 includes four processing stations, numbered from 1 to 4 in the embodiment shown in FIG. Each station has a heated pedestal (shown at station 2418) and a gas line inlet. It should be appreciated that in some embodiments, each processing station may have different or multiple purposes. For example, in some embodiments, the processing station may switch between CFD and PECVD process modes. Additionally or alternatively, in some embodiments, the processing chamber 2414 may include one or more matching pairs of CFD and PECVD processing stations. Although the illustrated processing chamber 2414 includes four stations, it should be understood that the processing chamber according to the present invention may have any suitable number of stations. For example, in some embodiments the processing chamber may have five or more stations, while in other embodiments the processing chamber may have three or fewer stations.

FIG. 14 also illustrates an embodiment of a wafer handling system 2490 for transporting wafers within the processing chamber 2414. In some embodiments, the wafer handling system 2490 may be between various processing stations and/or The wafer is transported between the processing station and the load lock. It should be understood that any suitable wafer handling system can be used. Non-limiting examples include wafer conveyors and wafer handling robots. FIG. 14 also illustrates an embodiment of a system controller 2450 for controlling the process conditions and hardware status of the processing tool 2400. The system controller 2450 may include one or more memory devices 2456, one or more mass storage devices 2454, and one or more processors 2452. The processor 2452 may include a CPU or a computer, analog and/or digital input/output connections, a stepper motor controller board, and so on.

In some embodiments, the system controller 2450 controls all activities of the processing tool 2400. The system controller 2450 executes system control software 2458 stored in the mass storage device 2454, loaded into the memory device 2456, and executed on the processor 2452. System control software 2458 may include timing, gas mixing, chamber and/or station pressure, chamber and/or station temperature, wafer temperature, target power level, RF power to control specific processes performed by the processing tool 2400 Commands for level, substrate base, chuck and/or die position, and other parameters. The system control software 2458 can be configured in any suitable manner. For example, various processing tool component subprograms or control target programs can be written to control the operation of processing tool components necessary to implement various processing tool processes. The system control software 2458 can be coded in any suitable computer-readable programming language.

In some embodiments, the system control software 2458 may include input/output control (IOC) sequencing instructions to control various parameters described above. For example, each stage of the CFD process may include one or more instructions for the system controller 2450 to execute. Instructions for setting the process conditions of the CFD process stage can be included in the corresponding CFD recipe stage. In some embodiments, the CFD process stage may be arranged in sequence so that all instructions related to the CFD process are executed simultaneously with the process stage.

In some embodiments, other computer software and/or programs stored on mass storage device 2454 and/or memory device 2456 associated with system controller 2450 may be used. Examples of programs or program fragments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

The substrate positioning program may include code for processing tool elements for loading the substrate onto the base 2418 and controlling the spacing between the substrate and the rest of the processing tool 2400.

The process gas control program may include code for controlling gas composition and flow rate, and optionally for flowing gas into one or more processing stations prior to deposition to stabilize the pressure in the processing station. The pressure control program may include a code to control the pressure in the processing station by adjusting, for example, a throttle valve in the exhaust system of the processing station, the gas flow into the processing station, and so on.

The heater control program may include codes for controlling the current to the heating unit for heating the substrate. Alternatively, the heater control program can control the delivery of heat transfer gas (such as helium) to the substrate.

The plasma control program may include codes for setting the RF power level applied to the processing electrodes in one or more processing stations.

In some embodiments, there may be a user interface associated with the system controller 2450. The user interface may include a graphical software display that displays screens, equipment, and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, and so on.

In some embodiments, the parameters adjusted by the system controller 2450 may be related to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (such as RF bias power level), pressure, temperature, and so on. These parameters can be provided to the user in the form of formulas that can be entered using the user interface.

The signals used to monitor the process can be provided from various processing tool sensors through the analog and/or digital input connections of the system controller 2450. The signal used to control the process can be output to the analog and digital output connection of the processing tool 2400. Non-limiting examples of process tool sensors that can be monitored include mass flow controllers, pressure sensors (such as pressure gauges), thermocouples, and so on. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

The system controller 2450 can provide program instructions for implementing the deposition process described above. Program instructions can control various types such as DC power level, RF bias power level, pressure, temperature, etc. Process parameters. This command can control this parameter to operate the in-situ deposition of thin film stacks according to various embodiments described herein.

The equipment/processes described above can be used in conjunction with lithography patterning tools or processes for making or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, and the like, for example. Usually (though not necessarily) such tools/processes will be used or implemented together in a common production facility. The lithographic patterning of the film usually includes part or all of the following operations (using some suitable tools to achieve each operation): (1) Using a spin coating or spraying tool to coat the photoresist on the work piece (ie, substrate); (2) Use a hot plate or heating furnace or UV hardening tool to harden the photoresist; (3) Use a tool such as a wafer stepper to expose the photoresist to visible or UV or x-ray light; (4) Use a wet type The tool of the workbench develops the photoresist to selectively remove the photoresist and thereby pattern it; (5) transfer the photoresist pattern to the film or work piece below by using a dry or plasma assisted etching tool; And (6) Use tools such as RF or microwave plasma photoresist strippers to remove the photoresist.

It should be understood that the configurations and/or methods described herein are exemplary in nature, and that these specific embodiments or examples should not be considered limiting, as many variations are possible. The specific routines or methods described in this article can represent one or more of any number of countermeasures. Therefore, the various actions illustrated in the legend can be performed in the order shown, in other order, in parallel, or in some cases omitted. Similarly, the order of the processes described above can be changed.

The subject matter of the present invention includes all novel and non-obvious combinations and sub-combinations of various processes, systems and configurations, and other features, functions, actions, and/or characteristics disclosed herein, as well as any and all equivalents related thereto.

Claims (17)

A method for depositing a thin film on a surface of a non-planar substrate in a reaction chamber, the method comprising: introducing the first reactant into the reaction under non-plasma conditions that allow the first reactant to be adsorbed on the surface of the non-planar substrate The chamber; introducing the second reactant into the reaction chamber to react with the adsorbed first reactant; introducing the dopant-containing material into the reaction chamber; in the dopant-containing material After being introduced into the reaction chamber, the surface of the non-planar substrate is exposed to plasma; and a doped thin film conformal to the surface of the non-planar substrate is formed. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the first reactant is a silicon-containing reactant. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber as claimed in item 1, wherein the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the second reactant is an oxidant. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the second reactant is a nitrogen-containing reactant. For example, the method for depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the doped film is a doped silicon oxide film. For example, the method for depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the doped film is a doped silicon nitride film. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the doped film is a doped silicon carbide film. The method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber as claimed in item 1 of the patent scope, wherein the plasma is excited when the second reactant is present in the gas phase in the reaction chamber. The method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope, wherein the dopant-containing material is introduced into the reaction chamber under non-plasma conditions. For example, the method of depositing a thin film on the surface of a non-planar substrate in the reaction chamber of item 1 of the patent application scope further includes repeating one or more of the following operations: the non-electricity allowing the first reactant to be adsorbed on the surface of the non-planar substrate Under slurry conditions, the first reactant is introduced into the reaction chamber; and the second reactant is introduced into the reaction chamber to react with the adsorbed first reactant. For example, the method for depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 11 of the patent application scope further includes repeating the operation of introducing the dopant-containing material into the reaction chamber one or more times. For example, the method of depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 12 of the patent application scope, wherein the dopant-containing material is compared to the frequency at which the first reactant is introduced into the reaction chamber It is introduced into the reaction chamber at a lower frequency. A method for depositing a thin film on a surface of a non-planar substrate in a reaction chamber as claimed in item 12 of the patent scope, wherein the dopant-containing material is applied at the same frequency as the first reactant is introduced into the reaction chamber Introduce into the reaction chamber. For example, the method for depositing a thin film on the surface of a non-planar substrate in a reaction chamber according to item 1 of the patent application scope further includes exposing the surface of the non-planar substrate to the surface of the non-planar substrate after introducing the dopant-containing material into the reaction chamber Tempered. A method for depositing a doped silicon oxide film on a surface of a non-planar substrate in a reaction chamber, the method comprising: reacting the silicon-containing reactant under non-plasma conditions allowing silicon-containing reactants to be adsorbed on the surface of the non-planar substrate Into the reaction chamber; Introducing an oxidant into the reaction chamber to react with the adsorbed silicon-containing reactant; introducing a dopant-containing material into the reaction chamber; after introducing the dopant-containing material into the reaction chamber , The surface of the non-planar substrate is exposed to plasma; and a doped silicon oxide film conformal to the surface of the non-planar substrate is formed. For example, a method for depositing a doped silicon oxide film on a surface of a non-planar substrate in a reaction chamber as claimed in item 16 of the patent scope, wherein when the oxidant is present in the gas phase in the reaction chamber, the plasma is excited.

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