JP6199292B2 - Plasma activated conformal dielectric films - Google Patents

Plasma activated conformal dielectric films Download PDF

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JP6199292B2
JP6199292B2 JP2014531838A JP2014531838A JP6199292B2 JP 6199292 B2 JP6199292 B2 JP 6199292B2 JP 2014531838 A JP2014531838 A JP 2014531838A JP 2014531838 A JP2014531838 A JP 2014531838A JP 6199292 B2 JP6199292 B2 JP 6199292B2
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film
dopant
reactant
plasma
method
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JP2014532304A (en
Inventor
スワミナタン・シャンカー
ヘンリー・ジョン
ハウスマン・デニス・エム.
スブラモニウム・プラモド
スリラム・マンディアム
ランガラジャン・ビシュワナタン
カティーグ・キーシ・ケイ.
バン・シュラベンディジク・バート・ジェイ.
マッケロウ・アンドリュー・ジェイ.
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ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated
ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated
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Priority to US13/242,084 priority patent/US8637411B2/en
Application filed by ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated, ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated filed Critical ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated
Priority to PCT/US2012/052769 priority patent/WO2013043330A1/en
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    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Description

Related Applications This application is filed in US Provisional Patent Application No. 61 / 324,710, filed on April 15, 2010, and US Provisional Patent Application No. 61 / 372,367, filed on August 10, 2010. Claims the benefit of US Provisional Patent Application No. 61 / 379,081, filed September 1, 2010, and US Provisional Patent Application No. 61 / 417,807, filed September 29, 2010, 2011 As a continuation application to US patent application Ser. No. 13 / 084,399 filed on Apr. 11, 35 U.S. Pat. S. C. Claims priority under 120. Each of the above patent applications is incorporated herein by reference in its entirety for all purposes. This application is also a continuation of US patent application Ser. No. 13 / 084,305 filed Apr. 11, 2011, all of which are incorporated herein by reference for all purposes.

  Various thin film layers for semiconductor devices may be deposited by an atomic layer deposition (ALD) process. However, existing ALD processes may not be suitable for depositing high conformal dielectric films.

  Various aspects disclosed herein relate to a method and apparatus for depositing a film on a substrate surface. In certain embodiments, the method includes depositing the film by a surface-mediated reaction that causes the film to grow through adsorption and reaction of one or more cycles of reactants. In one aspect, the method is characterized by intermittently supplying dopant species to the membrane between adsorption and reaction cycles. At some point, the dopant species can be implanted beyond the substrate surface into the doped region of the substrate.

  In one aspect, the disclosed method deposits a film on a substrate surface in a reaction chamber. This method is characterized by the following operations. (A) introducing the first reactant into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface; (b) while the first reactant is adsorbed on the substrate surface; Introducing the reactants into the reaction chamber; (c) bringing the reaction between the first reactant and the second reactant to the substrate surface and exposing the substrate surface to plasma to form a portion of the film. (D) repeating (a) to (c) at least once, (e) a dopant-containing material not introduced between (a) to (d), the dopant-containing material being the exposed surface of the film Introducing into the reaction chamber under accessible conditions, and (f) introducing a dopant from the dopant-containing material into the film. Introduction of the dopant into the film can involve exposing the dopant-containing material to the plasma.

  In various implementations, the method further includes implanting a dopant from the film into a feature on the substrate surface where the film is present. Implanting the dopant from the film can be accomplished by annealing the film. In some applications, the film is present on a three-dimensional feature on the substrate surface, and implanting the dopant from the film causes the dopant to diffuse conformally into the feature. For certain applications, the width of the feature is about 40 nanometers or less.

  In some implementations, the film is a dielectric film. In some cases, the total film thickness is about 10-100 angstroms. In various embodiments, the dopant concentration in the film is about 0.01 to 10% by weight.

  In certain embodiments, the method of this aspect further comprises repeating (a)-(c) after (e) or (f). In certain embodiments, the method of this aspect further includes repeating (a)-(e). Depending on the implementation, the amount of film deposited in (a)-(c) is about 0.5-1 angstrom.

  In certain embodiments, the method further includes purging the second reactant from the reaction chamber prior to exposing the substrate surface to the plasma. Purging can be accomplished by flowing a gas containing oxidant into the reaction chamber. In some implementations, the first and second reactants coexist in the gas phase in the reaction chamber, and the first and second reactants are in the reaction chamber until exposed to the plasma in (c). They do not react clearly to each other.

In certain embodiments, the first reactant is an oxidant, such as nitrous oxide. In certain embodiments, the second reactant is (i) an alkylaminosilane (SiH x (NR 2 ) 4 -x ), wherein x = 1-3, R comprises an alkyl group, or (ii) Dielectric precursors such as halosilane (SiH x Y 4-x ), where x = 1-3, Y includes Cl, Br, and I. In certain embodiments, the second reactant is BTBAS. In certain embodiments, the dopant-containing material is phosphine, arsine, alkylborane, alkylgalane, alkylphosphine, phosphorus halide, arsenic halide, gallium halide, boron halide, alkylborane, or diborane.

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber. This method is characterized by the following operations. (A) flowing an oxidant into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface; (b) while the oxidant continues to flow into the reaction chamber, Introducing into the reaction chamber; (c) exposing the substrate surface to plasma to effect a reaction of the dielectric precursor and oxidant at the substrate surface to form part of the dielectric film; ) Introducing a dopant-containing material that is not introduced between (a) to (c) into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the film; and (e) the dopant- containing material. Incorporating the dopant from the dielectric film. In one implementation, the dielectric precursor is BTBAS, or another precursor as specified in the previous aspect.

  Furthermore, the method may require that operations (a)-(c) be repeated one or more times. In certain embodiments, when (a) is first performed, the oxidant contains a first ratio of oxygen to nitrogen, but when (a) is next performed, the oxidant is oxygen paired. Nitrogen is contained in a second ratio. The second ratio is lower than the first ratio. For example, the oxidant can contain elemental oxygen when (a) is first performed, but can contain nitrous oxide when (a) is repeated. In some embodiments, the substrate is at a first temperature when (c) is first performed, and the substrate is at a second temperature that is higher than the first temperature when (c) is repeated.

  In some cases, the method further includes implanting a dopant from the dielectric film into the substrate. In some embodiments, the method further comprises contacting the substrate surface with a dopant-containing material prior to (a).

  In another aspect, the disclosed method is characterized by the following operations. (A) introducing a dielectric precursor into the reaction chamber under conditions that allow the precursor to be adsorbed on the substrate surface; (b) then reacting while the precursor remains adsorbed on the substrate surface. Purging the dielectric precursor from the chamber; (c) exposing the substrate surface to plasma to drive a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film; and (D) introducing a dopant precursor that is not introduced between (a) to (c) into the reaction chamber under conditions that allow the dopant precursor to come into contact with a portion of the dielectric film; A dielectric film is deposited on the surface of the substrate. In some implementations, the method further includes flowing an oxidant into the reaction chamber before and during (a)-(c). In some cases, the method further involves reacting the dopant precursor to incorporate the dopant into the film.

  Yet another aspect relates to an apparatus for depositing a doped film on a substrate surface. This device is characterized by the following features: A reaction chamber that includes a device that holds the substrate during the deposition of the doped dielectric film, one or more process gas inlets coupled to the reaction chamber, and a controller. The controller is designed or configured to cause the device to perform the following operations: (A) introducing the first reactant into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface; (b) while the first reactant is adsorbed on the substrate surface; Introducing a reactant into the reaction chamber; (c) exposing the substrate surface to a plasma to effect a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film. (D) repeating (a) to (c) at least once; (e) a dopant-containing material that is not introduced between (a) to (d); Introducing into the reaction chamber under conditions accessible to and (f) introducing the dopant from the dopant-containing material into the film so that the controller directly performs other methods as mentioned according to other embodiments. Can be designed or configured.

  In certain embodiments, the controller is further designed or configured such that the apparatus causes the oxidant to flow into the reaction chamber before and during (a)-(d). In some embodiments, the controller is further designed or configured to repeat (a)-(c) after (e) or (f). In certain embodiments, the controller is further designed or configured to drive dopants from the film into features on the substrate surface where the film is present. Implanting the dopant from the film can be accomplished by annealing the film. In some implementations, the controller is further designed or configured such that (e) is executed at intervals between repeating (a)-(d) one or more times, the intervals being defined by the membrane. Changes over the course of the deposition.

  In various implementations, the controller is further designed or configured to purge the second reactant from the reaction chamber prior to exposing the substrate surface to the plasma. In one embodiment, purging is accomplished by flowing a gas containing oxidant into the reaction chamber under the direction of the controller.

  These and other features are described in further detail below with reference to the associated drawings.

FIG. 3 schematically illustrates a time chart for an exemplary conformal film deposition (CFD) process according to an embodiment of the present disclosure. FIG. 6 schematically illustrates a time chart for another exemplary CFD process according to an embodiment of the present disclosure. FIG. 6 schematically illustrates a time chart for another exemplary CFD process according to an embodiment of the present disclosure. FIG. 2 schematically illustrates a time chart for an exemplary CFD process including plasma processing according to an embodiment of the present disclosure. FIG. 4 illustrates an exemplary correlation between wet etch rate ratio and deposition temperature for films deposited according to embodiments of the present disclosure. FIG. 4 illustrates an exemplary correlation between wet etch rate ratio and film stress for films deposited according to embodiments of the present disclosure. FIG. 6 illustrates an exemplary correlation between contaminant concentration and deposition temperature for films deposited according to embodiments of the present disclosure. 1 schematically illustrates an exemplary cross section of a non-planar substrate including a plurality of gaps. FIG. 3 schematically illustrates a time chart for an exemplary CFD process including a transition to a PECVD process according to an embodiment of the present disclosure. FIG. 3 schematically illustrates an exemplary cross section of a gap fill including a keyhole void. FIG. 6 schematically illustrates a time chart for an exemplary CFD process including in-situ etching according to embodiments of the present disclosure. Figure 4 schematically shows an exemplary cross section of a bite gap fill profile. 12D schematically illustrates an exemplary cross-section of the bite gap fill profile of FIG. 12A during an in-situ etch process according to embodiments of the present disclosure. 12D schematically illustrates an example cross-section of the bite gap fill profile of FIG. 12B during a deposition process after in-situ etching in accordance with an embodiment of the present disclosure. 1 schematically illustrates an exemplary processing station according to an embodiment of the present disclosure. 1 schematically illustrates an exemplary processing tool including multiple processing stations and a controller according to embodiments of the present disclosure. FIG. 6 schematically illustrates an example cross-sectional view of a through silicon via during a CFD process including in-situ etching according to embodiments of the present disclosure. A transistor having a three-dimensional gate structure is shown, in which a source and a drain are formed in a thin vertical structure that is difficult to be doped by a conventional ion implantation technique. The basic CFD operation sequence is shown as time advances from left to right along the x-axis. A dopant is deposited at the interface with the underlying substrate, and then a supply of dopant is incorporated during the CFD cycle, optionally covered with an undoped protective “capping” layer can be a CFD oxide. It represents the form. A dopant is deposited at the interface with the underlying substrate, and then a supply of dopant is incorporated during the CFD cycle, optionally covered with an undoped protective “capping” layer can be a CFD oxide. It represents the form. Figure 2 shows a typical deposition block used to synthesize CFD BSG / PSG films. This shows that the step coverage for the CFD film was calculated to be ~ 100% for a dense and isolated structure. The SIMS data indicates that the average boron concentration in the CFD film can be adjusted in the range of about 0.5-3.5 wt% boron.

  Usually, the manufacture of semiconductor devices involves the deposition of one or more thin films on a non-planar substrate in an integrated fabrication process. Depending on the aspect of the integration process, it may be useful to deposit a thin film that conforms to the substrate topography. For example, a silicon nitride film may be deposited on the top surface of the raised gate stack so that it functions as a spacer layer to protect the low concentration source region and the low concentration drain region from subsequent ion implantation steps.

  In the spacer layer deposition process, a chemical vapor deposition (CVD) process is used to form a silicon nitride film on the non-planar substrate, which is then used to form the spacer structure. It may be anisotropically etched. However, as the distance between the gate stacks decreases, the mass transport limit of the CVD gas phase reaction can cause a “bread-loafing” deposition effect. This action typically results in a thicker deposit on the top surface of the gate stack and a thinner deposit on both lower corners of the gate stack. Furthermore, some dies have regions with different device densities, and as a result of mass transport across the entire wafer surface, film thickness variations can occur within the die and within the wafer. As a result of such variations in film thickness, there may be a region that is over-etched or a region that is under-etched. This can reduce device performance and / or die yield.

  Some means for solving these problems involve atomic layer deposition (ALD). In contrast to CVD processes where thermally activated gas phase reactions are used to deposit films, ALD processes use deposition reactions that occur at the surface to deposit films layer by layer. . In one example of an ALD process, the substrate surface, including a collection of surface active moieties, is exposed to the gas phase flow of the first film precursor (P1). Some P1 molecules form a condensed phase on the substrate surface and contain P1 chemisorbed species and physisorbed molecules. The reactor is then evacuated to remove the vapor and physisorbed P1, leaving only the chemisorbed species. Thereafter, the second film precursor (P2) is introduced into the reactor, and as a result, some of the P2 molecules are adsorbed on the substrate. The reactor can be evacuated again to remove unbound P2. Next, the thermal energy provided to the substrate activates the surface reaction between the adsorbed molecules of P1 and P2, forming a film layer. Finally, the reactor is evacuated to complete the ALD cycle in order to remove reaction byproducts, possibly unreacted P1 and P2. Additional ALD cycles can be included to increase the film thickness.

  Depending on the exposure time of the precursor dosing step and the adhesion coefficient of the precursor, each ALD cycle, in one embodiment, can deposit a film layer with a thickness of 0.5 to 3 Angstroms. Thus, the ALD process can be time consuming when depositing films that are several nanometers thick. Furthermore, some precursors may require a long exposure time to deposit a conformal film, which may reduce wafer throughput time.

  A conformal film can also be deposited on a planar substrate. For example, an antireflective layer for applying a lithographic pattern may be formed from a planar stack with alternating film types. The thickness of such an antireflective layer can be about 100 to 1000 angstroms, making the ALD process less attractive than the CVD process. However, such anti-reflective layers may also be less resistant to variations in wafer thickness than many CVD processes provide. For example, a 600 angstrom thick antireflective layer can withstand a thickness range of less than 3 angstroms.

  Accordingly, various embodiments are provided herein and provide processes and apparatus for conformal film deposition (CFD) by plasma activation on non-planar and planar substrates. These embodiments include various features used in some but not all CFD processes. These features include (1) eliminating or shortening the time required to “sweep” one or both reactants from the reaction chamber, and (2) intermittently reacting different reactants. Providing a continuous flow of at least one reactant while flowing into the chamber; (3) not when all reactants are removed from the reaction chamber but while one reactant is present in the gas phase; Igniting the plasma, (4) treating the CFD film deposited with plasma to modify film properties, and (5) after depositing the first part of the film by CFD, usually in the same reaction chamber Depositing part of the film by PECVD, (6) etching the partially deposited film between CFD stages, (7) incorporating a dopant supply cycle between cycles to deposit only the film Be doped with CFD film by Rukoto, there is. Of course, this list is not complete. Various other CFD features will become apparent upon review of the following portions of the specification.

  The concept of CFD “cycle” relates to the description of the various embodiments herein. In general, one cycle is the minimum set of operations required to perform a single surface deposition reaction. One cycle results in at least a partial film layer on the substrate surface. Typically, a CFD cycle includes only those steps necessary to feed and adsorb each reactant to the substrate surface and then react these adsorbed reactants to form a partial film layer. Of course, the cycle can include certain ancillary steps such as sweeping one of the reactants or by-products and / or treating the partial film as it is deposited. In general, one cycle includes only one unique operation order. As an example, one cycle can include the following operations. (I) supplying / adsorbing reactant A, (ii) supplying / adsorbing reactant B, (iii) sweeping B from the reaction chamber, (iv) applying a plasma to A and B To drive the surface reaction and form a partial film layer on the surface.

Next, the above seven features will be further described. In the following description, the CFD reaction in which one or more kinds of reactants are further adsorbed on the substrate surface and then reacted to form a film on the surface by interaction with plasma will be considered.

  Feature 1 (Continuous flow of reactants)-Reactant A continues to flow into the reaction chamber during part or portions of the CFD cycle when reactants do not normally flow in conventional ALD In conventional ALD, reactant A flows for the purpose of adsorbing the reactant on the substrate surface. In the other stages of the ALD cycle, reactant A does not flow. However, according to certain CFD embodiments described herein, reactant A is not only in a stage associated with reactant A adsorption, but also in a CFD cycle that performs operations other than reactant A adsorption. It also flows during the stage. For example, in many embodiments, reactant A flows into the reactor while the apparatus is dosing a second reactant (here, reactant B). Accordingly, reactant A and reactant B coexist in the gas phase during at least some CFD cycles. Reactant A can also flow while plasma is applied to drive the reaction at the substrate surface. Note that a continuously flowing reactant may be supplied to the reaction chamber along with a carrier gas, such as argon.

  One advantage of a continuous flow embodiment is that establishing a flow avoids delays and flow variations that occur with temporary initialization and stabilization of the flow associated with flow on and off.

  As a specific example, the oxide film uses a main reactant (sometimes referred to as a “solid component” precursor, or in this example simply referred to as “reactant B”) to form a conformal film deposition process. Can be deposited. Bis (tert-butylamino) silane (BTBAS) is one such main reactant. In this example, the oxide deposition process involves the supply of an oxidant such as oxygen or nitrous oxide, which oxidant flows continuously from the beginning while supplying the main reactant in a separate exposure stage. The oxidant also continues to flow during the individual plasma exposure phase. For example, see the order shown in FIG. Incidentally, in the conventional ALD process, the flow of the oxidant is stopped when the solid component precursor is supplied to the reactor. For example, when the reactant B is supplied, the flow of the reactant A stops.

  In certain embodiments, the continuously flowing reactant is an “auxiliary” reactant. As used herein, an “auxiliary” reactant is any reactant that is not the main reactant. As suggested above, the main reactant contains an element that is solid at room temperature, which is useful for film formation by CFD. Examples of such elements include metals (eg, aluminum and titanium), semiconductors (eg, silicon and germanium), and non-metals or metalloids (eg, boron). Examples of auxiliary reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkylamine, and the like.

  The continuously flowing reactant may be provided at a constant flow rate or at a variable but controlled flow rate. In the latter case, by way of example, the co-reactant flow rate may be reduced as the first reactant is supplied during the exposure phase. For example, when depositing an oxide, an oxidant (eg, oxygen or nitrous oxide) flows continuously during the entire deposition sequence, but the flow rate is supplied by a first reactant (eg, BTBAS). And can be reduced. This increases the partial pressure of BTBAS during dosing and, as a result, reduces the exposure time required to saturate the substrate surface. Immediately before igniting the plasma, the oxidant flow may be increased to reduce the likelihood of BTBAS being present during the plasma exposure phase. In some embodiments, the continuously flowing reactant flows at a variable flow rate over two or more deposition cycles. For example, the reactants can flow at a first flow rate during a first CFD cycle and at a second flow rate during a second CFD cycle.

  When multiple reactants are used and one stream of the reactants is continuous, at least two of the reactants coexist in the gas phase during some CFD cycles. Similarly, if no purge step is performed after feeding the first reactant, the two reactants will coexist. To that end, it may be important to employ reactants that do not react clearly with each other in the gas phase unless activation energy is added. Typically, the reactants are present on the substrate surface and should not react until exposed to plasma or exposed to another suitable non-thermally activated state. In selecting such reactants, at least (1) thermodynamic favorable sensitivity for the desired reaction (Gibbs free energy 0), and (2) large enough to obtain a negligible reaction at the desired deposition temperature. Consider the activation energy for the reaction that needs to be done.

  Feature 2 (Reduces or eliminates the sweep step) —In some embodiments, saves or reduces the time associated with the sweep step normally performed in conventional ALD. In conventional ALD, separate sweep steps are performed after each reactant is supplied to the substrate surface and adsorbed. Adsorption or reaction occurs little or not in conventional ALD sweep steps. In a CFD cycle, the sweep step after at least one reactant is fed is shortened or eliminated. An example of the process sequence with the sweep step removed is shown in FIG. No sweep step is performed to sweep reactant A from the reaction chamber. In some cases, no sweep step is performed after feeding the first reactant in the CFD cycle, but optionally a sweep step is performed after feeding the second or final feed reactant.

  The concept of a CFD “sweep” step or stage appears in the description of various embodiments herein. Generally, the sweep phase occurs only after one of the gas phase reactants has been removed or purged from the reaction chamber and the supply of such reactants has ended. That is, the reactant is no longer supplied to the reaction chamber during the sweep phase. However, the reactant remains adsorbed on the substrate surface during the sweep phase. Typically, the sweep serves to remove gas phase reactants in the reaction chamber after the reactants are adsorbed to the desired level on the substrate surface. Also, in the sweep stage, weakly adsorbed species (eg, specific precursor ligands or reaction byproducts) can be removed from the substrate surface. In ALD, the sweep step has been considered necessary to prevent the interaction of two reactants or one reactant in the gas phase with heat, plasma or other driving forces for surface reactions. . In general, unless otherwise specified herein, the sweep stage can be accomplished by (i) evacuating the reaction chamber and / or (ii) flowing a gas that does not contain the species to be swept through the reaction chamber. . In the case of (ii), the gas can be, for example, an inert gas or an auxiliary reactant such as a continuously flowing auxiliary reactant.

  The elimination of the sweep stage can be realized with or without the continuous flow of the other reactant. In the embodiment depicted in FIG. 1, reactant A is not swept away, but rather continues to flow (denoted by reference numeral 130 in the drawing) after adsorption to the substrate surface is complete.

  In various embodiments where more than one reactant is used, the reactant for which the sweep step is eliminated or shortened is a co-reactant. As an example, the auxiliary reactant is an oxidant or nitrogen source and the first reactant is a silicon, boron, or germanium containing precursor. Of course, sweeping of the main reactant can also be shortened or eliminated. In some embodiments, no sweep step is performed after the auxiliary reactant is fed, and the sweep step is optionally performed after the main reactant is fed.

  As described above, the sweep stage need not be completely eliminated, but simply needs to be shortened in duration as compared to the sweep stage of the conventional ALD process. For example, the sweeping phase of reactants such as co-reactants during the CFD cycle may be performed for about 0.2 seconds or less, for example, about 0.001 to 0.1 seconds.

  Feature 3 (igniting the plasma while one of the reactants is present in the gas phase) In this feature, the plasma is ignited before all the reactants are removed from the reaction chamber. This differs from conventional ALD in that plasma activation or other reaction-driven operation is provided only after gas phase reactants are no longer present in the reaction chamber. Note that this feature always occurs when reactant A flows continuously in the plasma portion of the CFD cycle, as depicted in FIG. However, the disclosed embodiments are not limited to this method. One or more reactants can flow during the plasma phase of the CFD cycle, but need not flow continuously during the CFD cycle. Furthermore, the reactant present in the gas phase during plasma activation can be the main reactant or auxiliary reactant (when two or more reactants are used in the CFD cycle).

  For example, the sequence may include (i) introducing reactant A, (ii) purging A, (iii) introducing reactant B, applying a plasma while B is flowing, and (iv) ) Purging. In such embodiments, the process uses plasma activated reactive species from the gas phase. This is a common example where CFD is not constrained by the sequence of successive steps.

  If the activated plasma is provided during the time that the solid component precursor (first reactant) is fed to the reactor, the step coverage may be less conformal, but the deposition rate is usually Get faster. However, this is not necessarily the case when plasma activation is performed only during the supply of one auxiliary reactant. The plasma can activate the gas phase auxiliary component to make it more reactive, and as a result, the reactivity in the conformal film deposition reaction can be enhanced. In some embodiments, this feature is used in depositing silicon-containing films such as oxides, nitrides, or carbides.

  Feature 4 (Plasma Treatment of Deposited CFD Film) In these embodiments, the plasma can play more than one role in the conformal film deposition process. One role is to activate or drive the deposition reaction during each CFD cycle. Another role is to process the film after the CFD film has been partially or fully deposited following one or more CFD cycles. The plasma treatment is intended to modify one or more film properties. Usually, but not necessarily, the plasma treatment stage is performed under conditions different from those used to activate the film formation reaction (ie, drive the film formation reaction). As an example, the plasma treatment may be performed in a reducing or oxidizing environment (eg, in the presence of hydrogen or oxygen), but this need not be done during the activation portion of the CFD cycle.

  The plasma treatment operation may be performed every cycle of the CFD process, every other cycle, or at a somewhat low frequency. The processing can be performed at regular intervals associated with a fixed number of CFD cycles, or can be performed variably (eg, at different CFD cycle intervals) or randomly. In an exemplary embodiment, film deposition is performed for several CFD cycles until an appropriate film thickness is reached, after which plasma treatment is used. Thereafter, after the film deposition is again performed without plasma treatment for several CFD cycles, the plasma treatment is again performed. Such a special sequence (super-sequence) in which plasma treatment (film modification) is performed following X CFD cycles can be repeated until the film is completely deposited by CFD.

  In certain embodiments, the plasma treatment can be performed to modify one or more characteristics of the surface on which the CFD film is deposited before initiating the CFD cycle. In various embodiments, the surface is made of silicon (doped or undoped) or a silicon-containing material. The modified surface may be able to better create a high quality interface with the subsequently deposited CFD film. The interface can provide reliable electrical properties through, for example, good adhesion, such as defect reduction.

  Pretreatment of the substrate prior to CFD is not limited to any particular plasma treatment. In certain embodiments, the pretreatment includes hydrogen plasma, nitrogen plasma, nitrogen / hydrogen plasma, ammonia plasma, argon plasma, exposure to helium plasma, helium anneal, hydrogen anneal, ammonia anneal, and helium, hydrogen, argon, nitrogen, With UV curing in the presence of hydrogen / nitrogen forming gas and / or ammonia. Plasma processing is possible with a variety of plasma generators including, but not limited to, microwaves, ICP remotes, direct plasma generators and other plasma generators known to those skilled in the art.

  Overall, this can be done before, during, or after the CFD cycle. When performed during the CFD cycle, the frequency of processing can be selected for appropriate deposition conditions. Usually, processing is not performed more than once per cycle.

  As an example, a process for producing silicon nitride from a precursor in which some carbon is present will be considered. An example of such a precursor is BTBAS. As a result of the carbon present in the precursor, the as-deposited nitride film contains some carbon impurities, which may degrade the electrical properties of the nitride. To solve this problem, after performing several CFD cycles with a carbon-containing precursor, the partially deposited film is converted to hydrogen in the presence of plasma to reduce and ultimately remove carbon impurities. Be exposed.

  The plasma conditions used to modify the film surface can be selected to allow for desired changes in film properties and / or composition. Among the plasma conditions that can be selected and / or tuned for the desired modification are oxidation conditions, reduction conditions, etching conditions, power used to generate the plasma, used to generate the plasma. There are frequency, use of two or more frequencies for generating plasma, plasma density, distance between plasma and substrate, and the like. Examples of CFD film properties that can be modified by plasma treatment include in-film stress, etching resistance, density, hardness, optical properties (refractive index, reflectance, optical density, etc.), dielectric constant, carbon content, electrical properties (flat Band voltage spread (Vfb spread) and the like.

  Depending on the embodiment, processes other than plasma treatment are used to modify the properties of the as-deposited film. Examples of such treatment include electromagnetic radiation treatment, heat treatment (for example, annealing, high temperature pulse) and the like. Any of these processes can be performed alone or in combination with another process, including a plasma process. Any of these treatments can be employed in place of any of the above plasma treatments. In certain embodiments, the treatment involves exposing the film to ultraviolet light. As will be described below, in certain embodiments, the method involves irradiating UV light onto the CFD oxide film in situ (ie, during deposition) or after oxide deposition. Such processing helps to reduce or eliminate defect structures and also improves electrical performance.

  In certain embodiments, ultraviolet treatment is combined with plasma treatment. These two operations can be performed simultaneously or sequentially. With the option to run continuously, optionally, the UV operation is performed first. With the option to run simultaneously, the two treatments can be provided from separate sources (eg, a plasma RF power source and a UV lamp) or from a single source such as helium plasma that generates UV as a byproduct.

  Feature 5 (deposited by CFD and then transition to PECVD) In such embodiments, the completed film is partially generated by CFD and partially by a CVD process such as PECVD. Usually, the CFD portion of the deposition process is performed first and the PECVD portion is performed second, but this is not necessarily so. By mixing the CFD process and the CVD process, the step coverage can be improved more than the step coverage seen by CVD alone, and the deposition rate can be improved more than the deposition rate seen by CFD alone. In some cases, plasma or other activation can be performed with one CFD reactant to create a parasitic CVD operation, thereby increasing the deposition rate, obtaining different types of films, etc. Is applied while is flowing.

  In some embodiments, two or more CFD steps are used and / or two or more CVD steps are used. For example, the first part of the film can be deposited by CFD, then the middle part of the film can be deposited by CVD, and the last part of the film can be deposited by CFD. In such embodiments, it may be desirable to modify the CVD portion of the film, also by plasma treatment or etching, before depositing the latter half of the film by CFD.

  A transition phase may be used between the CFD phase and the CVD phase. The conditions used during such a transition phase are different from those used in either the CFD or CVD phase. Usually, but not necessarily, the conditions allow a CFD surface reaction and a CVD-type gas phase reaction to be simultaneously performed. The transition phase usually involves exposure to a plasma, which may be pulsed, for example. Furthermore, the transition stage can involve feeding one or more reactants at a low flow rate, i.e. significantly less than the flow rate used in the corresponding CFD stage of the process.

  Feature 6 (deposited by CFD, etched, and then further deposited by CFD) In such embodiments, CFD deposition is performed one or more cycles (usually several cycles), after which the resulting film is: For example, it is etched to remove some extra film at or near the indentations (cusps) and then further cycles of CFD deposition are performed. Examples of other structural features in the deposited film can be etched in a similar manner. The etchant selected for this process depends on the material being etched. In some cases, the etching operation may be performed with a fluorine-containing etchant (eg, NF 3) or hydrogen.

  In some embodiments, remote plasma is used to generate the etchant. In general, remote plasma is etched more isotropically than direct plasma. Remote plasma generally provides radicals to the substrate in a relatively high fraction. The reactivity of these radicals may vary depending on the vertical position within the recess. At the top of this feature, radicals are more concentrated and as a result, etch at high speed, while further descending the recess, and at the bottom, some radicals are lost and etch at low speed. This is, of course, a desirable reaction profile to solve the problem of over-depositing at the recess openings. A further advantage of using remote plasma during etching is that the plasma is relatively weak, so there is no risk of damaging the substrate layer. This can be particularly beneficial when the underlying substrate layer is susceptible to oxidation or other damage.

  Feature 7 (Adjusting the film composition with additional reactants) Many of the examples presented herein relate to CFD processes using one or two reactants. Further, many of the examples use the same reactant for all CFD cycles. However, it is not necessary to do so. First, many CFD processes may use more than two types of reactants. Examples include (i) tungsten used as a reactant for CFD, diborane, tungsten hexafluoride, and hydrogen, and (ii) silicon oxide used as a reactant for CFD, diborane BTBAS, and oxygen. . Diborane can be removed from the growing film or, if appropriate, incorporated into the film.

  In addition, some of the examples use additional reactants in only a few CFD cycles. In a basic CFD process cycle, only such reactants are used to make a substrate film composition (eg, silicon oxide or silicon carbide). This basic process is performed in all or almost all CFD cycles. However, some CFD cycles are performed as deformation cycles and deviate from normal deposition cycle conditions. For example, a deformation cycle may use one or more additional reactants. Also, these deformation cycles need not necessarily do so, but can use the same reactants used in the basic CFD process.

  Such a CFD process is particularly beneficial when preparing a doped oxide or other doped material as a CFD film. In some implementations, dopant precursors are included in only a few CFD cycles as “further” reactants. The frequency of adding the dopant is determined by the desired concentration of the dopant. For example, a dopant precursor may be included every 10 substrate deposition cycles.

  Unlike many other deposition processes that require thermal activation in particular, the CFD process can be performed at a relatively low temperature. Generally, the CFD temperature is about 20-400 ° C. Such temperatures can be selected to allow deposition in temperature sensitive process situations, such as deposition on a photoresist core. In certain embodiments, a temperature of about 20-100 ° C. is used to apply double patterning (eg, using a photoresist core). In another embodiment, a temperature of about 200-350 ° C. is used for the memory fabrication process.

  As suggested above, CFD is well suited for film deposition in advanced technology nodes. Therefore, for example, in the CFD processing, the process may be unified at a 32 nm node, a 22 nm node, a 16 nm node, an 11 nm node, and any one of these. These nodes are described in the International Technology Roadmap for Semiconductors (ITRS), an industry consensus on microelectronic technology requirements over the years. In general, the node is based on the half pitch of the memory cell. In certain embodiments, CFD processing is applied to “2X” devices (having device features in the 20-29 nm region).

  Although most examples of CFD films described herein relate to silicon-based microelectronic devices, the films also find application in other fields. Microelectronic or optoelectronic semiconductors that use non-silicon semiconductors, such as GaAs and other III-V semiconductors, as well as II-VI materials such as HgCdTe, can benefit from using the CFD process disclosed herein. . Application of conformal dielectric films is possible in the field of solar energy such as photovoltaic devices, in the field of electrochromics and in other fields.

FIG. 1 schematically illustrates a timing chart 100 for an exemplary embodiment of a plasma activated CFD process. Two complete CFD cycles are represented. As shown, each cycle consists of a step 120 A or 120 B that exposes to reactant A, a step 140 A or 140 B that immediately exposes to reactant B, a step 160 A or 160 B that sweeps reactant B, and Finally, a plasma activation stage 180A or 180B is included. The plasma energy provided during plasma activation stages 180A and 180B activates the reaction between reactive species A and B adsorbed on the surface. In the illustrated embodiment, no sweeping step is performed after one reactant (Reactant A) is fed. In practice, this reactant flows continuously during the film deposition process. Thus, the plasma is ignited while reactant A is present in the gas phase. The above features 1 to 3 are embodied in the embodiment of FIG.

  In the illustrated embodiment, the reaction gases A and B can coexist in the gas phase without reacting. Thus, one or more of the process steps described in the ALD process can be shortened or eliminated in this exemplary CFD process. For example, the sweep step after the A exposure stages 120A and 120B can be eliminated.

  The CFD process is used to deposit any of a number of different types of films. Although most of the examples presented herein relate to dielectric materials, the disclosed CFD process may be used to form films of conductive and semiconductor materials. Nitride and oxide are the picked dielectric materials, but carbides, oxynitrides, carbon-doped oxides, borides and the like can also be produced. Oxides include a wide range of materials including undoped silica glass (USG), doped silica glass. Examples of the doped glass include boron-doped silica glass (BSG), phosphorous-doped silica glass (PSG), and boron-phosphorous silica glass (boron phosphorous doped glass) Can be mentioned.

In some embodiments, a silicon nitride film can be formed by reaction of a silicon-containing reactant with one or more nitrogen-containing reactants and / or nitrogen-containing reactant mixtures. Examples of silicon containing reactants include bis (tertiary butylamino) silane (SiH 2 (NHC (CH 3 ) 3 ) 2 or BTBAS), dichlorosilane (SiH 2 Cl 2 ), and chlorosilane (SiH 3 Cl). For example, but not limited to. Examples of the nitrogen-containing reactant, ammonia, nitrogen, and tert- butylamine ((CH 3) 3 CNH 2 or t- butylamine) include, but are not limited to. An example of a nitrogen-containing reactant mixture includes, but is not limited to, a mixture of nitrogen and hydrogen.

  The selection of one or more types of reactants may be done considering various membranes and / or hardware. For example, in some embodiments, the silicon nitride film can be formed from the reaction of dichlorosilane and plasma activated nitrogen. Chemisorption of dichlorosilane onto the silicon nitride surface can create a silicon-hydrogen terminated surface and release hydrogen chloride (HCl). An example of this chemisorption reaction is schematically represented by Reaction Formula 1.

  The cyclic intermediate shown in Scheme 1 can then be transformed to a silicon amine terminated surface by reaction with plasma activated nitrogen.

  However, some dichlorosilane molecules chemisorb by another mechanism. For example, surface morphology may interfere with the configuration of the cyclic intermediate represented by Scheme 1. Another embodiment of the chemisorption mechanism is shown schematically in Scheme 2.

  During the next nitrogen plasma activation, the residual intermediate species of chlorine atoms shown in Scheme 2 can be released and activated by the plasma. As a result, the silicon nitride surface can be etched, and the silicon nitride film may be roughened or hazy. Furthermore, residual chlorine atoms may re-adsorb and contaminate the deposited film physically and / or chemically. This contamination may change the physical characteristics and / or electrical characteristics of the silicon nitride film. Furthermore, the activated chlorine atoms may cause etching damage to some of the processing station hardware and may shorten the useful life of the processing station.

  Thus, in some embodiments, chlorosilane may be used in place of dichlorosilane. By doing so, film contamination, film damage, and / or processing station damage can be reduced. An example for chemisorption of chlorosilane is shown schematically in Scheme 3.

  In the example represented by Scheme 3, chlorosilane is used as the silicon-containing reactant, but it will be appreciated that any suitable mono-substituted halosilane can be used.

  As explained above, the illustrated intermediate structure can react with a nitrogen source to form a silicon amine terminated surface of silicon nitride. For example, ammonia can be activated by plasma to generate various ammonia radical species. The radical species reacts with the intermediate to form a silicon amine terminated surface.

However, ammonia strongly adsorbs to the surface of the reactant supply line, the processing station, and the exhaust piping, which can increase the purge and evacuation time. Furthermore, ammonia may be highly reactive with some gas phase silicon-containing reactants. For example, a gas phase mixture of dichlorosilane (SiH 2 Cl 2 ) and ammonia can produce unstable species such as diaminosilane (SiH 2 (NH 2 ) 2 ). Such species may decompose in the gas phase and form small particle nuclei. Small particles may also be formed when ammonia reacts with hydrogen chloride produced during chemisorption of halosilanes. If such particles accumulate on the processing station and can contaminate the substrate surface, this can lead to failure of the integrated device, and can contaminate the processing station hardware. May lead to cleaning. Small particles can also accumulate in the exhaust piping, which can clog pumps and blowers, and the need for special environmental exhaust scrubbers and / or cold traps.

  Thus, in some embodiments, substituted amines may be used as nitrogen-containing reactants. For example, various radicals generated by plasma activating alkyl-substituted amines such as t-butylamine may be supplied to the processing station. Substituted amines such as t-butylamine may have a lower adhesion coefficient to processing hardware than ammonia, and as a result, the physical adsorption rate can be relatively low and the processing purge time can be relatively short.

  Furthermore, such nitrogen-containing reactants can produce halogenated salts that are relatively more volatile than ammonium chloride. For example, t-butyl ammonium chloride may be more volatile than ammonium chloride. Therefore, tool downtime, device defect formation, and environmental problem mitigation costs can be reduced.

  Furthermore, such nitrogen-containing reactants can produce other amine precursors by various byproduct reactions. For example, the reaction of t-butylamine with dichlorosilane can produce BTBAS. Therefore, an alternative route can be provided to improve the film yield to produce silicon nitride as a by-product. In another example, substituted amines can provide a route that is thermally activated at low temperatures for silicon nitride films. For example, t-butylamine is pyrolyzed at temperatures above 300 ° C. to produce isobutylene and ammonia.

  While the illustrative examples provided above describe the formation of silicon nitride films using t-butylamine, it will be appreciated that any suitable substituted amine may be used within the scope of this disclosure. . A suitable substituted amine may be selected in some embodiments based on the thermodynamic and / or reaction characteristics of the reactants. For example, the relative volatility of the halide salt produced from the reactants may be taken into account, as different pyrolysis paths exist and can be selected depending on the temperature involved.

  Further, while the provided examples describe the deposition of silicon nitride films, it should be understood that the principles described above are generally applicable to the deposition of other films. For example, in some embodiments, a suitable halosilane can be used in combination with a suitable oxygen-containing reactive species such as oxygen plasma to deposit silicon oxide.

  A non-limiting list of reactants, product membranes, and membrane properties and processing property ranges is provided in Table 1.

  FIG. 1 also illustrates exemplary CFD process stage embodiments over time for various CFD processing parameters. Although depicted in FIG. 1 for an exemplary two deposition cycle 110A and 110B, it will be appreciated that any suitable number of deposition cycles may be included in the CFD process to deposit the desired film thickness. . Exemplary CFD processing parameters include, but are not limited to, flow rates for inert and reactive species, plasma power and frequency, substrate temperature, and processing station pressure. Non-limiting parameter ranges for an exemplary silicon dioxide deposition cycle using BTBAS and oxygen are provided in Table 2.

  A CFD cycle typically includes an exposure phase for each reactant. During this “exposure phase”, reactants are supplied to the processing chamber to adsorb the reactants onto the substrate surface. Usually, at the beginning of the exposure phase, no obvious amount of reactant is adsorbed on the substrate surface. In FIG. 1, in the reactant A exposure stages 120A and B, reactant A is fed to the processing station at a controlled flow rate to saturate the exposed surface of the substrate. Reactant A may be any suitable deposition reactant; for example, main reactant or auxiliary reactant. In one embodiment where CFD produces a silicon dioxide film, reactant A may be oxygen. In the embodiment shown in FIG. 1, reactant A flows continuously through deposition cycles 110A and 110B. Unlike normal ALD processes where the film precursor exposure is performed separately to prevent gas phase reactions, reactants A and B can be mixed in the gas phase in some embodiments of the CFD process. is there. As mentioned above, in some embodiments, reactants A and B do not clearly react with each other under conditions that occur in the reactor before applying plasma energy or activating the surface reaction, It is selected so that it can coexist in the gas phase. In some cases, the reactants are (1) a thermodynamically favorable reaction between both reactants (ie, Gibbs free energy <0), and (2) the reaction has a sufficiently high activation energy. However, at the desired deposition temperature, one is chosen that has negligible reaction. Various reactant combinations that meet these criteria are also found elsewhere in this disclosure. Many such combinations include a main reactant that provides an element that becomes solid at room temperature, and a co-reactant that is not. Examples of auxiliary reactants used in some combinations include oxygen, nitrogen, alkylamines, and hydrogen.

  By continuously supplying reactant A to the processing station, in the ALD process, reactant A is first started, then stabilized, exposed to the substrate, then stopped, and finally removed from the reactor. Compared to the case, the flow rate of the reactant A is started to be supplied, and the time until stabilization can be shortened or eliminated. In the embodiment shown in FIG. 1, reactant A exposure stages 120A and B are represented as having a constant flow rate, but of course any suitable reactant A flow, including variable flow rates, is also possible. May be used within the scope of this disclosure. Further, in FIG. 1, reactant A is maintained at a constant flow rate during the entire CFD cycle (deposition cycle 110A), although this need not necessarily be the case. For example, the reactant A flow rate may decrease during the B exposure stages 140A and 140B. Thereby, the partial pressure of B is increased, and as a result, the driving force for adsorbing the reactant B on the substrate surface can be increased.

  In some embodiments, the Reactant A exposure stage 120A can have a duration that exceeds the substrate surface saturation time for Reactant A. For example, the embodiment of FIG. 1 includes a reactant A post-saturation exposure time 130 in the reactant A exposure stage 120A. Optionally, reactant A exposure stage 120A includes a controlled flow of inert gas. Exemplary inert gases include, but are not limited to, nitrogen, argon, and helium. Inert gases can be used to control process station pressure and / or temperature, to evaporate liquid precursors, to assist in faster delivery of precursors, and / or to remove process gases from process stations and / or process station piping Can be provided as a sweeping gas.

In the reactant B exposure stage 140A of the embodiment shown in FIG. 1, reactant B is supplied to the processing station at a controlled flow rate to saturate the exposed substrate surface. In the silicon dioxide film of one embodiment, the reactant B may be BTBAS. In the embodiment of FIG. 1, reactant B exposure stage 140A is represented as having a constant flow rate, but it will be appreciated that any suitable reactant B flow, including variable flow rates, is within the scope of this disclosure. Used. Furthermore, it will be appreciated that the reactant B exposure stage 140A may have any suitable duration. In some embodiments, the reactant B exposure stage 140A can have a duration that exceeds the substrate surface saturation time for reactant B. For example, the embodiment shown in FIG. 1 represents the reactant B post-saturation exposure time 150 included in the reactant B exposure stage 140A. Optionally, the reactant B exposure stage 140A may include a controlled flow of a suitable inert gas, which, as described above, controls the pressure and / or temperature of the processing station, vaporizes the liquid precursor. , Can aid in faster delivery of precursors and can prevent back diffusion of process station gases. In the embodiment shown in FIG. 1 , an inert gas is continuously supplied to the processing station through the reactant B exposure stage 140A.

  In some embodiments, plasma activation of the deposition reaction may result in a lower deposition temperature than the thermal activation reaction and may reduce the consumption of thermal budgets for available integration processes. For example, in some embodiments, the plasma activated CFD process can be performed at room temperature.

  Although the CFD process embodiment depicted in FIG. 1 is plasma activated, it will be appreciated that other non-thermal energy sources may be used within the scope of this disclosure. Non-limiting examples of non-thermal energy sources include, but are not limited to, ultraviolet lamps, downstream or remote plasma sources, inductively coupled plasmas, and microwave surface wave plasmas.

  Furthermore, although many of the examples mentioned herein include two reactants (A and B), it will be appreciated that any suitable number of reactants may be used within the scope of this disclosure. . In some embodiments, a single reactant and inert gas used to provide the plasma energy for the reactant surface decomposition reaction may be used. Alternatively, as described above in the context of feature 7, in some embodiments, more than two reactants can be used to deposit the film.

  In some scenarios, the surface-adsorbed B species may exist as discontinuous islands on the substrate surface, making it difficult for the reactant B to reach surface saturation. Various surface conditions can delay nucleation and saturation of reactant B at the substrate surface. For example, a ligand released upon adsorption of reactants A and / or B may block some surface active sites and prevent further adsorption of reactant B. Thus, in some embodiments, during the reactant B exposure stage 140A, by adjusting the flow of reactant B and / or by continuously pulsing reactant B into the processing station in a continuous manner. An adsorption layer for reactant B is provided. Thereby, compared with a constant flow scenario, time margin can be given to a surface adsorption process and a surface desorption process, saving the reactant B.

  Additionally or alternatively, in some embodiments, one or more sweep steps can be included between successive reactant B exposures. For example, the embodiment of FIG. 2 schematically illustrates an exemplary CFD process time chart 200 for the deposition cycle 210. In reactant B exposure stage 240A, reactant B is exposed to the substrate surface. Next, at sweep stage 260A, reactant B is turned off and the vapor phase species of reactant B is removed from the processing station. In one scenario, gas phase reactant B can be rearranged by a continuous flow of reactant A and / or inert gas. In another scenario, gas phase reactant B can be removed by evacuating the processing station. By removing the gas phase reactant B, the equilibrium of the adsorption / desorption process is shifted, the ligand is desorbed, and rearrangement on the surface of the adsorbed reactant B is promoted, so that the discontinuous adsorbed reactant B You can merge islands. In the reactant B exposure step 240B, the reactant B is again exposed to the substrate surface. The embodiment shown in FIG. 2 includes a single reactant B sweep and exposure cycle, but it should be understood that any suitable number of alternating sweep and exposure cycles may be used in the present disclosure. It may be used within the range.

  Returning to the embodiment of FIG. 1, prior to activation by plasma at 180A, the gas phase reactant B may be removed from the processing station in a sweep stage 160A, in some embodiments. A CFD cycle can include one or more sweep stages in addition to the exposure stage described above. In addition, sweeping the processing station can remove ligands adsorbed on surfaces that would otherwise remain and otherwise contaminate the membrane. Examples of the sweep gas include, but are not limited to, argon, helium, and nitrogen. In the embodiment shown in FIG. 1, the sweep gas for sweep stage 160A is supplied by an inert gas stream. In some embodiments, sweep stage 160A can include one or more evacuation sub-stages for evacuating the processing station. Or, of course, in some embodiments, the sweeping step 160A may be omitted.

  The sweep stage 160A may have any suitable duration. In some embodiments, the duration of the sweep stage 160A can be shortened by increasing the flow rate of one or more types of sweep gas. For example, the flow rate of the sweep gas may be adjusted depending on the thermodynamic characteristics of the various reactants and / or the geometric characteristics of the process station and / or process station piping to change the duration of the sweep stage 160A. Can. In one non-limiting example, the duration of the sweep phase can be optimized by adjusting the sweep gas flow rate. Thereby, the deposition cycle time can be shortened, and as a result, the substrate throughput can be improved.

  A CFD cycle typically includes an “activation phase” in addition to the exposure phase and optional sweep phase described above. The activation stage serves to drive the reaction of one or more reactants adsorbed on the substrate surface. In the plasma activation stage 180A of the embodiment shown in FIG. 1, plasma energy is provided to activate the surface reaction between reactants A and B adsorbed on the surface. For example, the plasma can directly or indirectly activate reactant A gas phase molecules to generate reactant A radicals. These radicals then interact with the surface-adsorbed reactant B, resulting in a film-forming surface reaction. Plasma activation phase 180A completes deposition cycle 110A, but in the embodiment of FIG. 1, deposition cycle 110B is then performed and reactant A exposure phase 120B begins.

  In some embodiments, the plasma ignited in the plasma activation stage 180A can be generated directly above the substrate surface. Thereby, a plasma density can be made high and the surface reaction rate between the reactant A and the reactant B can be improved. For example, the plasma for the CFD process can be generated by applying a radio frequency (RF) electric field to the low pressure gas using two capacitively coupled plates. In an alternative embodiment, remotely generated plasma may be generated outside the main reaction chamber.

  Any suitable gas can be used to generate the plasma. In the first embodiment, an inert gas such as argon or helium can be used to generate the plasma. In a second embodiment, a reactant gas such as oxygen or ammonia can be used to generate the plasma. In a third embodiment, a sweep gas such as nitrogen can be used to generate the plasma. Of course, combinations of these types of gases may be used. The gas is ionized between the plates by the RF electric field, the plasma is ignited, and free electrons are generated in the plasma discharge region. These electrons are accelerated by the RF field and can collide with gas phase reactive molecules. When these electrons collide with the reactive molecules, radical species involved in the deposition process can be generated. Of course, the RF field can be coupled by any suitable electrode. Non-limiting examples of electrodes include a process gas dispersion showerhead and a substrate support. Of course, the CFD process plasma may be generated by one or more suitable methods other than capacitive coupling of the RF field to the gas.

  Plasma activation stage 180A can have any suitable duration. In some embodiments, the plasma activation stage 180A has a duration that exceeds the time that the plasma activated radicals interact with all exposed substrate surfaces and adsorbates to form a continuous film on the substrate surface. Can do. For example, the embodiment shown in FIG. 1 includes a post-plasma saturation exposure time 190 in the plasma activation phase 180A.

  As will be explained more fully below and as suggested by reference to feature 4, by increasing the plasma exposure time and / or providing multiple plasma exposure steps, the bulk portion of the deposited film And / or post-reaction treatment in the vicinity of the surface. In one scenario, a surface for adsorption of reactant A can be prepared by reducing surface contamination by plasma treatment. For example, a silicon nitride film produced from the reaction of a silicon-containing reactant and a nitrogen-containing reactant may have a surface that resists subsequent adsorption of the reactant. By treating the silicon nitride surface with plasma, hydrogen bonds that promote subsequent adsorption and reaction phenomena can be generated.

  In some embodiments, film properties such as film stress, dielectric constant, refractive index, etch rate, etc. can be tuned by changing plasma parameters, which will be discussed in more detail below. Table 3 provides an example list of various film properties for three CFD silicon dioxide film examples deposited at 400 ° C. For reference purposes, Table 3 also includes film information for an example of a PECVD silicon dioxide film deposited at 400 ° C.

  For example, FIG. 3 schematically illustrates an embodiment relating to a CFD process time chart 300 that includes a plasma treatment stage 390 followed by a deposition stage 310. Of course, any suitable plasma may be used during the plasma processing step. In the first scenario, a first plasma gas can be used during the activation of the deposition cycle and a second different plasma gas can be used during the plasma processing phase. In the second scenario, a second different plasma gas can supplement the first plasma gas during the plasma processing phase. Non-limiting parameter ranges for exemplary in-situ plasma processing cycles are provided in Table 4.

  In the plasma activation stage 380 shown in FIG. 3, the substrate surface is exposed to plasma to activate the film deposition reaction. As represented in the embodiment shown in FIG. 3, the processing station is provided with a continuous flow of reactant A and an inert gas, which may be an auxiliary reactant such as oxygen, for example, in the plasma processing sweep stage 390A. Is done. By sweeping the processing station, volatile contaminants can be removed from the processing station. Although the sweep gas is shown in FIG. 3, it will be appreciated that any suitable reactant removal method may be used within the scope of the present disclosure. In the plasma processing activation stage 390B, the plasma is ignited to process the bulk region and / or the near-surface region of the newly deposited film.

  The embodiment of FIG. 3 includes one CFD cycle that includes a plasma processing stage, but it will be appreciated that any suitable number of repetitions may be used within the scope of this disclosure. Furthermore, it will be appreciated that one or more plasma treatment cycles may be inserted (regularly or otherwise) at intervals between normal deposition cycles. For example, FIG. 4 shows an embodiment of a CFD process time chart 400 that includes a plasma processing stage inserted between two deposition cycles. The embodiment of FIG. 4 includes a plasma treatment cycle inserted between two deposition cycles, but it will be appreciated that any suitable number of deposition cycles may be performed before or after one or more plasma treatment cycles. Also good. For example, in a scenario where plasma processing is used to change the film density, a plasma processing cycle can be inserted every 10 deposition cycles. In scenarios where plasma treatment is used to prepare adsorption and reaction event surfaces, the plasma treatment stage can be incorporated into every CFD cycle, eg after each CFD deposition stage.

  Plasma treatment of the deposited film can change one or more physical properties of the film. In one scenario, the plasma treatment can densify the newly deposited film. The dense film may have higher etching resistance than the non-dense film. For example, FIG. 5 shows an embodiment for a comparison 500 of an exemplary CFD-treated silicon dioxide film etch rate versus a thermally grown silicon dioxide film etch rate. The exemplary film embodiment of FIG. 5 was deposited at various temperatures from 50 to 400 ° C. by CFD processes 502 and 504. For reference, the relative etch rates of undoped silica glass (USG) and silicon dioxide spacer layers deposited in a plasma CVD process are displayed in FIG. The film produced by step 502, which includes a 1 second radio frequency oxygen plasma activation step in each deposition cycle, is resistant to wet etching with dilute hydrofluoric acid (100: 1 water: hydrofluoric acid (H 2 O: HF)). About half of film 504 with a 10 second radio frequency oxygen plasma activation step in the deposition cycle. Accordingly, it can be seen that the etch rate of the deposited film can be changed by changing one or more aspects of the plasma activation stage and / or including one or more plasma processing cycles.

  In another scenario, the plasma treatment of the film can change the stress characteristics of the film. For example, FIG. 6 shows an embodiment of a wet etch rate ratio and film stress correlation 600 for an exemplary CFD silicon dioxide film. In the embodiment shown in FIG. 6, reducing the wet etch rate ratio, for example by increasing the plasma exposure time, may increase the compressive film stress.

  In another scenario, the plasma treatment of the deposited film is a trace of film contaminants (eg, in the exemplary silicon dioxide film) relative to other film components (eg, silicon and / or oxygen in the exemplary silicon dioxide film). Hydrogen, nitrogen and / or carbon) can be temporarily fractionated off. For example, FIG. 7 shows an embodiment for a correlation 700 between deposition temperature, plasma exposure time, and film contaminant concentration. In the embodiment shown in FIG. 7, CFD silicon dioxide film 704 deposited at 50 ° C. and subjected to an oxygen plasma activation step for 10 seconds is deposited at the same temperature for hydrogen and carbon, but for 1 second. It is lower than the CFD silicon dioxide film 702 that has been subjected to the oxygen plasma activation step. By changing the contaminant concentration in the membrane, the electrical and / or physical properties of the membrane can be altered. For example, the film dielectric constant and / or the film etch rate can be adjusted by adjusting the carbon and / or hydrogen content. Thus, it can be seen that a method of changing the film composition can be provided by changing one or more aspects of the plasma activation stage and / or including one or more plasma treatment cycles.

Although the plasma treatment described above relates to an oxygen plasma treatment, it will be appreciated that any suitable plasma treatment may be used without departing from the scope of this embodiment. For example, in some embodiments, a substituted amine may be used in place of NH 3 as a nitrogen-containing reactant in a suitable CFD process. Replacing NH 3 with a substituted amine (eg, an alkyl amine such as t-butylamine) for conformal SiN deposition can provide many benefits, but in some cases, the deposited film may be an alkylamine reactant. Carbon residues (eg, carbon residues from three methyl groups, each containing a t-butylamine molecule (NH 2 (CH 3 ) 3 )). As a result of the carbon in the film, there is a risk of causing electric leakage, and the film may not be used for dielectric barrier applications.

  Therefore, in some embodiments, igniting hydrogen plasma during SiN film deposition can reduce carbon residues in the SiN film, thereby relatively improving the insulating properties of the film. In some embodiments, the carbon residue reduction can be easily observed in the FTIR spectrum. For example, the SiN: C—H level may be reduced from about 10 at% to about 1 at%.

  To that end, in some embodiments, a silicon nitride film can be deposited in a CFD process using an alkylamine or a mixture of alkylamines contained in a nitrogen-containing reactant, and one or more hydrogen plasma treatments. . Of course, any suitable hydrogen plasma may be used without departing from the scope of the present disclosure. Thus, in some embodiments, H2 mixed with a gas such as He or Ar, or other H-containing gas, or active H atoms generated by a remote plasma source are used to treat the deposited film. Can. Further, in some embodiments, the carbon content of the film can be varied by changing one or more of the number of processing pulses and duration of the processing pulses, the intensity of the processing plasma, the substrate temperature, and the processing gas composition. It can be adjusted to an appropriate concentration.

  Although the hydrogen plasma treatment described above relates to silicon nitride films, it should be understood that suitable hydrogen plasma treatment applications include, but are not limited to, SiOx, GeOx, and SiOxNy, which can be used to reduce the carbon content of other CFD deposited films. It may be used to adjust.

  Certain embodiments disclosed herein relate to ultraviolet treatment (with or without plasma treatment) of CFD oxide films. This treatment can alleviate oxide defects and improve electrical properties such as CV characteristics of the gate dielectric. Device and package applications using CFD oxide that can benefit from such processes include through-silicon vias, logic techniques using gate oxide, shallow trench isolation (STI), and STI-photoresist stripping. Thin thermal oxidation, sacrificial oxide before P-well implantation (e.g. ~ 60A), thermal oxide growth after "well", gate / channel oxide, DRAM pre-metal dielectric (PMD) PECVD oxide is mentioned.

  In some cases, the untreated CFD oxide film has been observed to have relatively poor electrical performance due to possible fixed charges in the as-deposited film. For example, some films have a large change in the wafer Vfb. Such problems have been solved by using post-deposition treatment with ultraviolet radiation and / or thermal annealing in the presence of hydrogen. This step may passivate and / or pass defects related to fixed charges at (1) the oxide-silicon interface, or (2) the deposited dielectric film, or (3) the atmosphere / oxidized surface (surface charge). It seems to ease. Using such a treatment, the Vfb broadening for the as-deposited oxide was narrowed to 8.3 V to about 1.5 V after UV curing.

  Although these embodiments primarily relate to improving oxide films, the disclosed methods can be generally applied to the development of dielectrics, metals, metal / dielectric interface engineering. Specific dielectric materials include, for example, silicon oxide including doped silicon oxide, silicon carbide, silicon oxycarbide, silicon nitride, silicon oxynitride, and ashable hard mask materials. .

Examples of treatments that can be applied to improve dielectric properties include:
(A) Post-deposition treatment of a dielectric film synthesized by CFD in which hydrogen annealing is performed after UV curing. In the simplest embodiment, only UV treatment is used to reduce the fixed charge.
(B) H 2 -plasma, N 2 -plasma, N 2 / H 2 -plasma, NH 3 -plasma, Ar-plasma, He-plasma, He anneal, H 2 -anneal, NH 3 -anneal, and He, H 2, Ar, N 2, H 2 / N 2 - forming gas, containing the ultraviolet curing in the presence of NH 3, involving processing, CFD- dielectric film deposition process before the previous substrate. The plasma treatment includes various types of plasma generators including, but not limited to, microwaves, ICP remotes, direct plasma generators, and the like.
(C) H 2 -plasma, N 2 -plasma, N 2 / H 2 -plasma, NH 3 -plasma, Ar-plasma, He-plasma, He anneal, H 2 -anneal, NH 3 -anneal, and He, H 2, Ar, N 2, H 2 / N 2 - forming gas, containing the ultraviolet curing in the presence of NH 3, involving treatment (hardening during deposition) simultaneous processing. Plasma processing can be performed with a variety of plasma generators including, but not limited to, microwaves, ICP remotes, direct plasma generators, and other plasma generators known to those skilled in the art. Isotropic and directional treatments can be applied including but not limited to remote plasma, ultraviolet irradiation, direct plasma, and microwave plasma. Exemplary methods include a method of intermittently treating the film between CFD cycle groups. The CFD cycle group can vary from about 1 to 10,000 cycles. A typical scenario is (1) 5 cycles of CFD oxide growth, then (2) one or more film treatments (eg, He-plasma, UV treatment) in any of the ways described above, and then (3) Includes 5 cycles of CFD oxide growth. This method can be used to grow films of any desired thickness.
(D) UV treatment applied as a byproduct of any of the above plasmas (eg, helium plasma irradiates with UV).

The following operation is mentioned as an example of the procedure regarding the in-situ “curing” in the CFD cycle.
He- Repeat dose purge O 2 / Ar-RF plasma activation purge step 1-5 ultraviolet treatment BTBAS through the plasma, generating a film of desired thickness.

  The range of UV curing conditions can be adopted for any of the above contents. Generally, the mounting table temperature is maintained at about 250-500 ° C. during curing. For many device fabrication applications, the upper temperature limit is limited to 450 ° C. or 400 ° C. The atmosphere used during curing may be inert or reactive. Examples of gases that may be present during curing include helium, argon, nitrogen, forming gas, and ammonia. The flow rate of such gas can be about 2 to 20,000 sccm, preferably about 4,000 to 18,000 sccm. The power of the ultraviolet lamp can be, for example, 2 to 10 kW, preferably about 3.5 to 7 kW. A suitable period of exposure to ultraviolet light from such a source is about 20-200 seconds (eg, about 90 seconds). Finally, the pressure can be maintained at a level of 0 to about 40 torr.

In certain embodiments, effective processing of the CFD oxide was performed using the following conditions.
Mounting table temperature = 400 ° C.
Atmosphere = He
Pressure = 40 Torr He
Flow rate = 10,000sccm

In some embodiments, thermal annealing of the oxide is performed after the ultraviolet curing operation. In one example, the following conditions were used during annealing.
Mounting table temperature = 400 ° C.
Atmosphere = H 2 + N 2
Pressure = 2.5 Torr Flow rate = 750 sccm H 2 ; 3000 sccm N 2

  The physical and electrical properties of the deposited film can also be changed by adjusting other processing parameters such as the deposition temperature. Further, for example, the correlation 700 of the embodiment illustrated in FIG. 7 shows an example of the relationship between the CFD film deposition temperature and the film contaminant concentration. As the film deposition temperature increases, the deposition of film contaminants decreases. In another example, the embodiment shown in FIG. 5 shows that the wet etch rate ratio of an exemplary silicon dioxide CFD film decreases as the deposition temperature increases, as described above. Other deposition parameters that can be adjusted to tune film properties include RF power, RF frequency, pressure, and flow rate. Furthermore, in some embodiments, the characteristics of the membrane can be changed by changing the selection of reactants. For example, the hydrogen content of a silicon dioxide film is reduced by using tetraisocyanate silane (TICS) as the silicon-containing reactant and oxygen and / or nitrous oxide as the oxygen-containing reactant. be able to.

  Of course, changes in the physical and / or electrical properties of the film as described above can provide not only an opportunity to adjust device performance and yield, but also an opportunity to change the manner in which the device manufacturing process is integrated. As a non-limiting example, the ability to tune the etch rate characteristics of a CFD silicon dioxide film may make it suitable for etch stop, hard mask, and other process integration applications. Accordingly, various embodiments of CFD produced films are provided herein for use throughout the integrated semiconductor device fabrication process.

  In one scenario, the CFD process can deposit a conformal silicon dioxide film on a non-planar substrate. For example, CFD silicon dioxide films can be used to fill gaps in structures, such as shallow trench isolation (STI) trench fills. While the various embodiments described below relate to gap filling applications, it should be understood that this is merely a non-limiting, illustrative application, and other suitable applications using other suitable membrane materials are also disclosed herein. Can be within the range. Other uses of the CFD silicon dioxide film include an interlayer dielectric (ILD) application, an intermetal dielectric (IMD) application, a premetal dielectric (PMD) application, a through-silicon via. : TSV) dielectric liner applications, resistance change memory (ReRAM) applications, and / or stacked capacitor fabrication in DRAM applications, but is not limited thereto.

  Doped silicon oxide can be used as a diffusion source for boron, phosphorus, or arsenic dopants. For example, it can be used for boron-doped silica glass (BSG), phosphorus-doped silica glass (PSG), or boron phosphorus-doped silica glass (BPSG). Doped CFD layers can be employed to provide conformal doping, for example, in three-dimensional transistor structures and three-dimensional memory devices such as multi-gate FinFETs. Conventional ion implanters have a particularly high aspect ratio structure and do not easily dope the sidewalls. There are various advantages to diffusing a CFD doped oxide. First, CFD doped oxide provides high conformality at low temperatures. In contrast, doped TEOS (tetraethylorthosilicate) produced by low pressure CVD is known, but needs to be deposited at high temperatures, while quasi-atmospheric CVD and PECVD doped oxides are relatively cooler. This is possible, but the conformality is insufficient. Although the conformality of the doping is important, the conformality of the film itself is also important because the film is usually sacrificial and therefore needs to be removed. Non-conformal films typically face more difficult challenges with respect to removal, i.e., some areas may be over-etched. CFD can control the doping concentration very well. As described above, the CFD process can provide single layer doping from several layers of undoped oxide. The level of doping can be strictly controlled from the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled, for example, by using a dopant source with significant steric hindrance. In addition to conventional silicon-based microelectronics, other applications of CFD doping include microelectronics and optoelectronics based on III-V semiconductors such as GaAs and II-VI semiconductors such as HgCdTe, photovoltaics, flat panel displays, And electrochromic technology.

  Some gap filling processes involve two film deposition steps performed with different deposition tools, requiring vacuum breaks and atmospheric exposure between the deposition processes. FIG. 8 schematically illustrates an exemplary non-planar substrate 800 that includes a plurality of gaps 802. As shown in FIG. 8, the gaps 802 have different aspect ratios, and each aspect ratio can be defined as the ratio of the gap depth (H) and the gap width (W) of each gap 802. it can. For example, the logic region of an integrated semiconductor device can have various gap aspect ratios corresponding to different logic device structures.

  As shown in FIG. 8, the non-planar substrate 800 is covered with a thin conformal film 804. While conformal film 804 completely fills gap 802A, gaps 802B and 802C remain open. Sealing gaps 802B and 802C with a conformal film may extend the process time. Thus, depending on the manner, thick films may be deposited ex-situ with a high deposition rate process such as CVD and / or PECVD. However, if the gap filling film is deposited at a position other than the original position, there is a possibility that the wafer processing capability in the production line is lowered. For example, substrate handling and transfer times between deposition tools can reduce many substrate processing activities during production. Therefore, it may be necessary to reduce the production line processing capacity, install additional processing tools on the production line, or maintain the tools.

  Furthermore, the aspect ratio of the gap 802C may be suitable for a vapor deposition process, but the aspect ratio of the gap 802B may result in incomplete filling and high formation of keyhole voids in processes with high deposition rates. For example, FIG. 10 shows an example of a high aspect ratio structure 1000 formed on the substrate 1002. As shown in FIG. 10, keyhole voids 1008 are generated by the bread-loafing action during the deposition of the thick film 1006. The keyhole void may be opened again and filled with the conductive film in the subsequent process, but may cause a short circuit of the device.

  Among the methods for solving a high aspect ratio gap such as the gap 802B, there is a method of providing a device design rule that does not form such a gap. However, such design rules may require additional masking steps, which may make device design difficult and / or increase the integrated semiconductor device area, leading to increased manufacturing costs. It might be. Thus, in some embodiments, the CFD process may include a transition from an in situ CFD process to a CVD and / or PECVD process. For example, FIG. 9 shows an embodiment of a CFD process time chart 900 divided into three stages. CFD process stage 902 represents an exemplary CFD process cycle. For clarity, a single CFD process cycle is shown in the embodiment depicted in FIG. 9, but it will be appreciated that any suitable number of CFD process cycles and plasma processing cycles may be used for CFD process stage 902. May be included. A transition stage 904 is performed following the CFD process stage 902. As represented in the embodiment of FIG. 9, the transition phase 904 includes aspects of both a CFD process and a PECVD process. In particular, reactant B is provided to the processing station after the completion of reactant B exposure phase 904A so that both reactants A and B are present in the gas phase during plasma activation phase 904B. Thereby, a CFD type surface reaction can be provided simultaneously with a PECVD type gas phase reaction. Transition phase 904 includes only one iteration of reactant B exposure phase 904A and plasma activation phase 904B, although it will be appreciated that any suitable number of iterations may be included in the transition phase.

  In some embodiments, the plasma generator can be controlled to provide intermittent pulses of plasma energy during the plasma activation phase 904B. For example, the plasma can be generated in pulses at one or more frequencies, including but not limited to a frequency of 10 to 150 Hz. Thereby, step coverage can be improved by reducing the directivity of ion bombardment as compared with continuous plasma. Further, this can reduce damage to the substrate due to ion bombardment. For example, a photoresist substrate may be eroded by ion bombardment in continuous plasma. By generating plasma energy in pulses, erosion of the photoresist can be reduced.

  In the embodiment shown in FIG. 9, the flow rate of reactant B during plasma activation stage 904B is less than the flow rate of reactant B during reactant B exposure stage 904A. Thus, reactant B may be “tricked” into the processing station during plasma activation phase 904B. This can provide a gas phase PECVD reaction that supplements the CFD type surface reaction. Of course, however, in some embodiments, the flow rate of reactant B may vary during a single plasma activation phase or over the transition phase. For example, in a transition phase that includes repeating reactant B exposure and plasma activation twice, the flow rate of reactant B during the first plasma activation phase is greater than the flow rate of reactant B during the second plasma activation phase. It may be less. By changing the flow rate of reactant B in plasma activation stage 904B, a smooth transition can be made from CFD process stage 902 featuring step coverage to PECVD process stage 906 featuring deposition rate.

  In some embodiments, the CFD process may include in-situ etching to selectively remove a re-entrant portion of the deposited film. Non-limiting parameter ranges for an exemplary silicon dioxide deposition process including in-situ etching of a gap fill CFD process are provided in Table 5.

  FIG. 11 illustrates an embodiment of a CFD process time chart 1100 that includes a deposition stage 1102, an etching stage 1104 and a next deposition stage 1106. In the deposition stage 1102 of the embodiment shown in FIG. 11, a film is deposited on the exposed surface of the substrate. For example, the deposition phase 1102 may include one or more CFD process deposition cycles.

  In the etching stage 1104 of the embodiment of FIG. 11, reactants A and B are turned off and an etching gas is introduced into the processing station. One non-limiting example of an etching gas is nitrogen trifluoride (NF3). In the embodiment depicted in FIG. 11, the etching gas is activated by the plasma ignited during the etching stage 1104. Various process parameters, such as process station pressure, substrate temperature, etch gas flow rate, and the like, can be adjusted during the etch stage 1104 to selectively remove the bite of deposited film on the non-planar substrate. Any suitable etching process is used within the scope of this disclosure. Other exemplary etching steps include, but are not limited to, reactive ion etching, non-plasma gas phase etching, solid phase sublimation, etching species adsorption and directed activation (eg, by ion bombardment). Not.

  In some embodiments, incompatible gas phase species can be removed from the processing station before and after etching the film. For example, the embodiment of FIG. 11 includes a continuous flow of inert gas after the reactants A and B are stopped and after the etch gas is stopped during the etch step 1104.

  At the end of the etch phase 1104, the deposition phase 1106 begins and further fills the non-planar substrate gap. The deposition stage 1106 may be any suitable deposition process. For example, the deposition stage 1106 may include one or more processes such as a CFD process, a CVD process, and a PECVD process. Although the embodiment of FIG. 11 shows a single etch stage 1104, it will be appreciated that multiple in-situ etch processes may be spaced between any suitable type of multiple deposition stages during the gap fill process. Can be placed and inserted.

  12A-12C depict exemplary cross-sectional views of a non-planar substrate at various stages of an embodiment relating to the in-situ deposition process and etching process described above. FIG. 12A shows a cross-sectional view of an exemplary non-planar substrate 1200 that includes a gap 1202. The gap 1202 is covered with a thin film 1204. The thin film 1204 is almost conformal to the gap 1202, but the thin film 1204 includes a biting portion 1206 near the tip of the gap 1202.

  In the embodiment depicted in FIG. 12B, the bite portion 1206 of the thin film 1204 has been selectively removed, and the upper region 1204A of the thin film 1204 is thinner than the lower region 1204B. Selective bite removal and / or sidewall angle adjustment can be achieved by limiting mass transfer and / or lifetime limits for active etch species. In some embodiments, selective etching at the tip of the gap 1202 can also adjust the sidewall angle of the gap 1202 so that the gap 1202 is wider at the tip than at the bottom. Thereby, the bread loafing action in the subsequent deposition stage can be further reduced. In the embodiment shown in FIG. 12C, after a subsequent deposition step, the gap 1202 is substantially filled and free of any voids.

Another embodiment of the in-situ etching process is shown in FIG. 15, which represents a through-silicon via (TSV ) for a copper electrode. Some exemplary TSVs have a depth of about 105 microns and a diameter of about 6 microns, resulting in an aspect ratio of about 17.5: 1 and an upper thermal budget limit of about 200 ° C. . As it is shown in the embodiment of FIG. 15, the through silicon vias, in order to electrically isolate the silicon substrate from the metal-filled vias, are covered by a dielectric isolation layer 2502. Examples of dielectric isolation layer materials include, but are not limited to, silicon oxide, silicon nitride, and low dielectric constant (low-k) dielectric materials. In some embodiments, the exemplary etching process described above can be supplemented with a bite physical sputtering using a suitable sputtering gas such as argon.

  Other exemplary applications of CFD films include conformal low dielectric constant films (e.g., dielectric constant (k) for BEOL (back end of line) wiring isolation applications, in some non-limiting examples, 3.0 or less), conformal silicon nitride films for etch stop and spacer layer applications, conformal anti-reflective layers, and copper adhesion and copper barrier layers. Various compositions of low dielectric constant dielectrics for BEOL processing can be made using CFD. Examples include silicon oxide, oxygen-doped carbide, carbon-doped oxide, oxynitride and the like.

  In another example, in one integrated process scenario, a silicon dioxide spacer layer can be deposited on the photoresist “core”. By using a photoresist core instead of another core material (such as a silicon carbide layer), the patterning step in the integration process can be eliminated. The process can involve patterning the photoresist using conventional lithographic techniques and then depositing a thin film of CFD oxide directly on the core. Next, a directional dry etch process is used to remove the CDF oxide on the top surface of the patterned photoresist, leaving only the material along the sidewall of the patterned photoresist (considered as a trench) on the bottom surface. Can. At this stage, simple ashing can be used to remove the exposed core remaining under the CFD oxide. Where there was a single photoresist line, at this point there will be two CFD oxide lines. Thus, this process doubles the pattern density; therefore, it is sometimes called “double patterning”. Unfortunately, the use of a photoresist core may limit the deposition temperature of the spacer layer to below 70 ° C., which may be lower than the deposition temperature of conventional CVD, PECVD and / or ALD processes. Thus, in some embodiments, the low temperature CFD silicon dioxide film may be deposited below 70 ° C. Of course, other possible integration process applications exist within the scope of this disclosure for proper CFD deposition. Also, in various embodiments, nitrides such as silicon nitride deposited as described above are used as conformal diffusion barrier layers and / or etch stops in various stages of semiconductor device manufacturing.

  While the various CFD deposition processes described above are intended to deposit, process, and / or etch a single type of film, it should be understood that several CFD processes within the scope of this disclosure include multiple types. Some involve depositing the film in situ. For example, alternating layers of multiple types of films may be deposited in situ. In a first scenario, a dual structure spacer for a gate device may be fabricated by depositing a silicon nitride / silicon oxide spacer stack in situ. This can reduce cycle time, increase processing station throughput, and avoid interlayer failures formed by mismatches that can occur between film layers. In the second scenario, an antireflective layer for lithographic patterning applications can be deposited as a SiON or amorphous silicon and SiOC stack with tunable optical properties.

  In some embodiments, the dopant-containing source layer is formed by a conformal film deposition process. The layer is referred to as a “source” layer because it provides a source of dopant species (eg, dopant atoms such as boron, phosphorus, gallium, and / or arsenic). The doped CFD layer functions as a source of dopant to dope the underlying (or top) structure of the device. After the source layer is formed (or during formation), the dopant species is implanted or otherwise incorporated into adjacent structures in the device being fabricated. In some embodiments, dopant species are implanted by annealing during or after forming a conformal dopant source film. The highly conformal nature of CFD allows different device structures to be doped, including structures that need to be doped in three dimensions. CFD dopant source layers are typically formed by one or more of the processes described herein, but also include additional process operations that incorporate the dopant species. In some embodiments, the dielectric layer functions as a base source layer from which dopant species are incorporated.

  For example, doped silicon oxide can be used as a diffusion source for boron, phosphorus, arsenic, and the like. For example, boron-doped silica glass (BSG), phosphorus-doped silica glass (PSG), or boron phosphorus-doped silica glass (BPSG) can be used.

  Doped CFD layers can be employed to provide conformal doping in, for example, three-dimensional transistor structures such as multi-gate FinFETs and three-dimensional memory devices. Some examples of three-dimensional structures are “Trigate (Intel)” J.A. Kavalieros et al., VLSI Technology Symposium 2006, p. 50, and “FinFET” Yamashita et al. (IBM Alliance), VLSI 2011, both of which are incorporated herein by reference in their entirety. Conventional ion implanters cannot easily dope the sidewalls, especially in high aspect ratio structures. In addition, since the densely arranged i3D structure may have a shadowing effect on the directional ion beam in the implantation apparatus, a serious dose retention problem occurs regarding the tilt of the implantation angle. In addition to conventional silicon-based microelectronics, other applications of CFD doping include microelectronics and optoelectronics based on III-V semiconductors such as GaAs and II-VI semiconductors such as HgCdTe, photovoltaics, flat panel displays, And electrochromic technology.

  FIG. 16 shows a transistor having a three-dimensional gate structure, in which the source and drain are formed in a thin vertical structure that is difficult to be doped by a conventional ion implantation technique. However, when a thin layer of n- or p-doped CFD oxide is formed over the entire vertical structure, conformal doping is completed. Conformal doping was observed to increase the current density of the three-dimensional device by 10-25% due to the decrease in series resistance. See Yamashita et al., VLSI 2011.

  CFD doped oxide as a diffusion source has various advantages. First, it provides high conformality at low temperatures. Because doped films can be sacrificial, non-conformal films typically face more difficult challenges with respect to removal, i.e., some regions may be over-etched. As explained, CFD provides a high conformal film. In addition, the CFD can control the doping concentration very well. In the CFD process, after providing one or more undoped oxide layers, a single layer can be doped as necessary. The doping level can be strictly controlled by the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled using, for example, a dopant source with significant steric hindrance.

In FIG. 17, the basic CFD operation sequence is shown by moving the time from left to right along the x-axis. A number of variations have been identified and this figure is presented for illustrative purposes only. At the beginning of the sequence, during operation A, a vapor phase oxidant is introduced into the reaction chamber containing the substrate on which the CFD film is deposited. Examples of suitable oxidants include elemental oxygen (eg, O 2 or O 3 ), nitrous oxide (N 2 O), water, alkyl alcohols such as isopropanol, carbon monoxide, and carbon dioxide. The oxidant is usually provided with an inert gas such as argon or nitrogen.

Next, in operation B, a dielectric precursor is temporarily introduced into the reaction chamber. The period of operation B is selected so that the precursor can be adsorbed onto the substrate surface in an amount sufficient to accommodate one cycle of film growth. In some embodiments, the precursor saturates the substrate surface. The precursor is selected by its ability to produce a dielectric of the desired composition. Examples of dielectric compositions include silicon oxide (including silica glass), silicon nitride, silicon oxynitride, and silicon oxycarbide. Examples of suitable precursors include alkylaminosilanes (SiH x (NR 2 ) 4-x , where x = 1-3, R is an alkyl group such as methyl, ethyl, propyl, butyl, and various isomers. including the configuration), and halosilane (SiH x Y 4-x, wherein x = 1 to 3, Y is, Cl, Br, and a I). More specific examples include bis-alkylaminosilanes and sterically hindered alkylsilanes. In one particular example, BTBAS is a precursor for producing silicon oxide.

  During operation B, the oxidant introduced into the reaction chamber during stage A continues to flow. In certain embodiments, the oxidant continues to flow at the same flow rate and at the same concentration as in Operation A. At the end of operation B, the flow of dielectric precursor to the reaction chamber is terminated and operation C begins as shown. During operation C, oxidant and inert gas continue to flow as in operations A and B to purge residual dielectric precursor in the reaction chamber.

  After purging is completed during operation C, the precursor is reacted on the substrate to form part of the dielectric film (see operation D). In various embodiments, a plasma is applied to drive the reaction of the adsorbed dielectric precursor. In some embodiments, this reaction is an oxidation reaction. A portion of the oxidant that previously flowed into the reaction chamber can be adsorbed to the surface along with the dielectric precursor, thereby providing an oxidant that is readily available for surface reaction by plasma.

  Operations A to D are combined to provide a one-cycle dielectric film deposition step. Of course, other CFD embodiments described herein may be used in place of the basic cycle illustrated here. In the illustrated embodiment, the deposition cycle (AD) is performed without introducing any dopant species. In various embodiments, the cycle represented by operations AD is repeated continuously one or more times before introducing the dopant species. This is described in stage E of FIG. In some embodiments, operations AD are repeated at least once, or at least twice, or at least five times before introducing the dopant.

  As one example, the dielectric is deposited at a rate of about 0.5-1 Angstrom / cycle. Through each cycle of one or more cycles (A to D repetitions), the oxidant continues to flow into the reaction chamber.

  At several points in the process, the dielectric deposition cycle is interrupted by the introduction of a dopant precursor species such as diborane. This is illustrated as operation F in the drawing. Examples of dopants that can be provided in the dielectric source film include valence III and IV elements such as boron, gallium, phosphorus, arsenic, and other dopants. Examples of dopant precursors include phosphine and other hydride sources in addition to diborane. Non-hydride dopants such as alkyl precursors (eg trimethyl gallium), halo precursors (eg gallium chloride) can also be used.

  In some versions, a dopant is deposited at the interface with the underlying substrate, and then a pulse of dopant is incorporated into the CFD cycle every x cycles (as described), optionally with an undoped protective “capping” layer. The covered one can be a CFD oxide film. See FIG. 18 for an example of the resulting laminate.

  In certain embodiments, the dopant precursor species are mixed with a carrier gas, such as an inert gas (eg, argon), and not the oxidant or other reactants, and supplied to the reaction chamber. Therefore, in this basic example, the flow of the oxidant is interrupted during the operation F. In other embodiments, the precursor is introduced with a reducing or oxidizing agent. In certain embodiments, the concentration of dopant to carrier gas is about 1: 5 to 1:20. In certain embodiments, the dopant deposition temperature is about 300-400 ° C. The duration of the dopant exposure step varies depending on the target concentration. In certain embodiments, the exposing step is about 2.5 to 7.5 seconds. In a specific embodiment, diborane 1,000 sccm is flowed into argon 10,000 sccm at a pressure of 3 Torr and about 400 ° C.

  In some embodiments, the dopant precursors assemble on the substrate surface by a non-surface limited mechanism. For example, the precursor can be deposited by a CVD type process rather than an ALD (limited to surface adsorption) process.

  Optionally, the dopant precursor is purged from the reaction chamber prior to further processing of the dielectric film. Also, as shown in FIG. 17, after supplying the dopant precursor, an optional activation operation G that can be performed by plasma, temperature rise or the like follows. In an example in which diborane is used as a dopant precursor, diborane is converted to boron element by an activation operation. After operation G is complete, the process continues with an optional purge (not shown).

  In one embodiment using diborane as a dopant in CVD, the activation operation only performs temperature-based decomposition to produce boron. This is a process corresponding to a temperature change. Higher temperatures require a relatively short exposure time to obtain the same boron concentration per unit thickness. Alternatively, in some processes (for example, a process using trimethylborane (TMB)), activation may involve a plasma or thermal oxidation step. For some other precursors, it may be appropriate to use a “pinning” step to hold free boron or other dopants in place. This can be achieved using a “pinning” plasma.

  In certain embodiments, plasma activation requires RF power at any frequency suitable for incorporating carbon into the film. In some embodiments, the RF power source can be configured to control the high frequency and low frequency RF power sources independently of each other. Exemplary low frequency RF power includes, but is not limited to, a frequency of about 200-1000 kHz. Exemplary high frequency RF power includes, but is not limited to, a frequency of about 10-80 MHz (eg, 13.56 MHz). Similarly, the RF power source and matching network can be operated with any suitable power to generate a plasma. Examples of suitable power include, but are not limited to, about 100-3,000 W for high frequency plasma and about 100-10,000 W (per wafer) for low frequency plasma. The RF power source can be operated at any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, a duty cycle of about 5 to 90%. Generally acceptable processing pressures are about 0.5-5 torr, preferably about 2-4 torr. For certain plasma pretreatments (under the substrate) prior to exposure to the dopant, pressures up to about 10 Torr (or up to about 9 Torr) have been found to be effective.

  The table below summarizes the range of plasma parameters that can be used for various BSG processes.

  In the basic process shown, the cycle of dielectric deposition and intermittent dopant supply (operations AG) can be performed multiple times, as shown in stage H of the drawing. The actual number of times the process sequence is repeated depends not only on the total film thickness desired and the thickness of the dielectric deposited per cycle, but also on the amount of dopant incorporated into the film. In some embodiments, operations AG are repeated at least twice, or at least three times, or at least five times, or at least about ten times.

  After the dielectric film is fully deposited, the dielectric film can be used as a dopant seed source in nearby semiconductor structures. This can be achieved by implanting the dopant from the deposited film into the device structure, as represented by operation I in FIG. In various embodiments, the implantation is achieved by a thermal diffusion process such as annealing. In some cases, laser spike annealing may be used, particularly when employing very shallow junctions.

  Many variations on this basic process can be envisaged. In some such variations, the goal is to increase the amount of dopant available to diffuse into adjacent semiconductor structures. Another variation is designed to control the flow rate of dopant supplied from the source film to the nearby semiconductor structure. In yet another variation, the direction in which the dopant species diffuses is controlled. Often it is desirable to favor the dopant to diffuse toward the device structure and away from the opposite side of the film.

  In some embodiments, the frequency with which dopant is introduced into the growing dielectric film is controlled. The more frequent the dopant precursor supply cycle, the higher the total concentration of dopant in the final dielectric film. As a result, the dopant is distributed relatively uniformly throughout the film. When fewer dopant precursor supply cycles are inserted into the deposition process, the regions with higher dopant concentration of the film are more spaced apart than if the dopant supply cycles were more frequent.

  In one embodiment, the dopant precursor is supplied to the growing dielectric film once for each dielectric deposition cycle. In another embodiment, the dopant precursor is provided once every other dielectric deposition cycle. In other embodiments, a low frequency dopant precursor feed cycle is incorporated into the process. For example, the dopant precursor may be delivered once every 3, 4, or 5 dielectric deposition cycles. In some cases, the dopant precursor is provided about once every 5-20 dielectric deposition cycles.

  Of course, the frequency of dopant precursor introduction into the growing film need not be constant throughout the deposition of the dielectric film. Considering this point, the resulting dielectric film may have a graded composition of dopants such that the average concentration of dopants is unequal over the thickness of the deposited dielectric film. In one embodiment, the dopant concentration is higher on the side of the dielectric film adjacent to the doped semiconductor device structure. Of course, the dopant concentration gradient of the dielectric film can be adjusted as desired by carefully changing the frequency of the dopant supply cycle throughout the entire dielectric deposition process.

  Another variation on the basic process involves adjusting the amount of dopant precursor delivered during any dopant precursor delivery cycle. The amount of dopant precursor supplied during any given dopant supply cycle depends not only on the concentration of dopant precursor supplied to the reaction chamber, but also on the period of time the substrate is exposed to the supplied dopant precursor. It is determined.

  As mentioned above, some dopant precursors can be provided on the growing film via processes such as CVD. In such cases, the amount of dopant precursor supplied to the growing film in any given cycle is not limited by adsorption or other surface phenomena. As such, the amount of dopant precursor provided during any dopant delivery cycle may be relatively large and controllable. The more dopant precursor is supplied during the dopant supply cycle, the higher the total concentration of dopant in the dielectric film. As a result, even if the dopant precursor supply cycle is relatively infrequent in all steps, it is possible to make up for the effects caused thereby. However, of course, increasing the amount of dopant delivered during any given dopant precursor delivery cycle can result in locally high dopant concentrations in the film. Of course, such a surge in dopant concentration can be mitigated by annealing or other operations that diffuse the dopant to make the dopant concentration more uniform in the dielectric film.

  In the case of boron as a dopant, the boron flux supplied during a typical boron precursor feed cycle is from about 7.5 ML (Mega-Langmuir) to 30 ML to the target film concentration. Accordingly, it is variable and ML is a unit of flux / exposure.

  In some embodiments, the amount of dopant precursor supplied in each precursor supply cycle is not constant throughout the growth of the complete dielectric film. Thus, the amount of dopant precursor supplied per cycle can be adjusted to produce the desired dopant concentration gradient in the dielectric film. For example, it may be desirable to provide a higher amount of dopant precursor in a dopant precursor supply cycle that occurs at a location in the dielectric film that is relatively close to the feature of the doped semiconductor device. The resulting concentration gradient results in a high dopant concentration in the region of the film adjacent to the doped device structure.

  In some embodiments, the dopant precursor is incorporated into the substrate surface only for adsorption. With such a precursor, introduction of the dopant into the film proceeds via a process such as ALD (as opposed to methods such as CVD described above). Examples of the dopant precursor that adheres to the substrate surface by the adsorption step include trimethylborane and other alkyl precursors such as trimethylgallium. Examples of dopant precursors that accumulate on the substrate surface by processes such as CVD include diborane, phosphine, and arsine.

  In general, the concentration profile relating to the dopant of the dielectric film can be adjusted as appropriate. In one embodiment, the dopant concentration suddenly goes high at the edge of the film adjacent to the doped structure. In some embodiments, the concentration increases and decreases intermittently throughout the film thickness. In one example, the dopant (eg, boron) is provided only at the interface between the underlying substrate and the CFD dielectric layer. This dopant layer is sometimes referred to as a “spike layer”. In some cases, dopant exposure is pulsed rather than single-step (eg, using CVD exposure to the dopant precursor) to increase uniformity in dopant incorporation within the wafer. It is done. In another embodiment, a CFD oxide or other dielectric is incorporated with a dopant (eg, boron in doped BSG). Please refer to FIG. 18 and FIG. The incorporated doped dielectric may or may not include a spike layer. In yet another embodiment, an undoped CFD oxide or other dielectric cap functions as a protective layer. Please refer to FIG. 18 and FIG. 19 again.

  The dielectric film itself in which the dopant species is present can be tuned to affect the diffusion of the dopant species through the film itself. For example, film density and / or chemical composition can be controlled to have a desired effect on the diffusion of dopant species. In some ways, the overall dielectric thickness has the same density or composition so that the tailored dopant diffusivity is unchanged throughout the thickness. In other ways, the film properties are adjusted so that the diffusion of the dopant varies across the film thickness. The inventors have found that the plasma oxidation parameters can be altered to lower the density of the CFD oxide, for example, to allow more dopant to diffuse across the CFD oxide during annealing. .

In some embodiments, the composition of the dielectric film (or process gas used for deposition) is adjusted to affect dopant diffusion in the film. For example, it has been found that the ratio of nitrogen to oxygen in the oxidant process gas supplied to the reaction chamber during the dielectric film deposition cycle affects the ability of the dopant species to diffuse through the dielectric film. For example, a large amount of nitrogen present in the oxidant gas used during dielectric film formation results in the dielectric film having a substantial resistance to dopant diffusion. In contrast, the relatively large amount of oxygen present in the gas results in the film having a much smaller resistance to dopant diffusion. Nitrogen present in the process gas can be provided as a nitrogen-containing compound (eg, N 2 O) or elemental nitrogen, N 2 . In various embodiments, the oxidant that flows continuously during the dielectric film deposition cycle contains nitrous oxide.

  In some embodiments, the dielectric film is first fabricated by using an oxidant gas (oxidant gas) having a high oxygen content and a relatively low nitrogen content during the initial growth stage of the dielectric film. The Later, after the film is partially formed on the doped substrate structure, the oxidant gas is altered in composition so that it is relatively rich in nitrogen. For example, during the initial deposition cycle, the oxidant gas used for the dielectric film may entirely contain molecular oxygen. In later dielectric deposition cycles, the oxidant gas is modified so that oxygen is at least partially replaced by nitrous oxide. This assumes that the goal is to promote diffusion in the direction toward the bottom of the film and block diffusion toward the top of the film-the doped device structure is below the dielectric film Is assumed to be located. The inventors have found that when the nitrogen concentration level is higher than about 1E20 atoms / cc (eg, as measured by SIMS), the blocking effect on boron diffusion is significantly greater. In contrast, at nitrogen concentration levels below about 1E19 atoms / cc, the blocking effect can be virtually eliminated.

  From the point of view of the film composition itself, the nitrogen content of the film can be relatively low in the part of the film close to the doped substrate structure, and relatively high in the part located on the opposite side of the doped structure. Can be varied up to level.

  Also, the deposition temperature used during the formation of the dielectric film affects the ability of dopant atoms to diffuse within the film. In general, it has been found that dielectrics deposited at relatively low temperatures by CFD processing can generally have a relatively high dopant diffusion rate. Examples of relatively low temperatures associated with relatively fast dopant diffusion rates are temperatures in the range of about 300-400 ° C, in particular about 350-400 ° C. Of course, these temperature ranges depend on the choice of dielectric precursor and other deposition parameters. These temperature ranges are used with many precursors, but are particularly suitable when using BTBAS as a dielectric precursor.

  In contrast, dielectrics deposited at relatively high temperatures tend to resist dopant species diffusion. When using BTBAS as the dielectric precursor, the relatively high temperature associated with the relatively slow dopant diffusion rate is in the range of about 350-400 ° C, particularly in the range of 300-380 ° C. Of course, these temperatures can also be applied to other precursors. In addition, the higher the temperature, the denser the film, which generally resists dopant diffusion, but the diffusivity and / or density can also be controlled by other parameters such as RF exposure time and power during plasma oxidation. . Examples of basic parameters used during CFD oxide growth include: (1) about 200 to 2,500 watts (for a 300 mm wafer) of high frequency plasma, usually without low frequency plasma, and (2) about 0. . Plasma exposure time in the range of 2 to 1.5 seconds.

  In some embodiments, a relatively low temperature is used to deposit the dielectric film adjacent to the doped device structure, and the high temperature deposits a portion of the dielectric film further away from the structure. Used for. In certain embodiments, the temperature used to completely deposit the dielectric film varies, and similarly the ratio of nitrogen to oxygen in the oxidant gas also varies during the deposition process. Thus, the dopant diffusivity of the resulting dielectric film may change excessively over the film thickness.

  In various embodiments, the deposition temperature is controlled by heating and / or cooling a mounting table or chuck that holds the substrate in the CFD. Examples of suitable mounting tables are US patent application Ser. No. 12 / 435,890 filed May 5, 2009 (US Application Publication No. 2009-0277472), and filed April 13, 2011. U.S. patent application Ser. No. 13 / 086,010, both of which are incorporated herein by reference in their entirety.

  In some embodiments, the device structure on the substrate surface to be doped is pretreated before depositing the dielectric film or dopant precursor. In one example, the pretreatment involves exposure to a plasma, such as a reducing plasma. Such a process may be suitable, for example, when the doped substrate feature contains silicon. Silicon typically contains a small amount of native oxide that can serve as a barrier to subsequent dopant diffusion. In certain embodiments, the substrate surface is pretreated with a reducing plasma, such as a hydrogen-containing plasma, after which the surface is contacted with a gas phase, dopant precursor, prior to the first cycle of dielectric film deposition. . The precursor can be fed into the reaction chamber immediately after the plasma pretreatment is completed. In some embodiments, the dopant precursor is diborane. In general, the process depicted in FIG. 17 may be modified such that the dopant or dopant precursor is delivered to the substrate surface prior to the first dielectric deposition cycle.

  In various embodiments, the partially formed dielectric film itself is pretreated with a plasma or other activation process before being exposed to the dopant precursor. This helps to increase uniformity within the wafer by (a) providing thermal uniformity prior to exposure to the dopant precursor, and (b) to enhance the adhesion of the dopant precursor to the dielectric surface. In addition, it helps to activate the dielectric surface (eg, chemically and / or physically roughened).

  In certain other embodiments, the chemical state of the dopant species is controlled during the dopant precursor supply and / or activation phases of the film deposition process. In some embodiments, the dopant precursor is processed in a manner that “fixes” the dopant in the dielectric film, thereby limiting dopant diffusion until it is next activated by annealing or other such operation. The In one embodiment, a particular dopant is fixed by oxidizing the dopant or dopant precursor during the dopant supply phase of the dielectric film deposition process. In certain embodiments, diborane is supplied to the reaction chamber in an oxidizing environment to effectively fix the resulting boron-containing material in the dielectric film. Alternatively, the dopant is fixed by supplying the precursor to the reaction chamber in an inert or reducing environment and then exposed to the oxidizing environment while being located on the dielectric film. In contrast, treating a particular dopant precursor with a reducing agent and not performing subsequent oxidation can produce a more mobile dopant in the dielectric film.

  After the source layer is formed (or during the formation of the source layer), dopant species are implanted or otherwise incorporated into adjacent structures in the device being fabricated. In some embodiments, the dopant species are implanted by annealing during or after the formation of the conformal dopant source film. In addition to conventional thermal annealing, for example, flash annealing and laser spike annealing can be used. The time and temperature of the anneal include the concentration, amount and type of dopant in the source layer, the composition and morphology of the source layer matrix (eg, oxide glass), the distance that the dopant species must travel within the adjacent device structure, device It depends on a variety of parameters including the desired dopant concentration in the structure and the composition and morphology of the device structure. In some embodiments, the annealing is performed at a temperature of about 900-1100 ° C. for about 2-30 seconds.

  As described herein, various devices can be designed to deposit the doped dielectric film. Generally, such an apparatus includes a processing chamber for holding a substrate during the deposition of a doped film. The processing chamber includes one or more inlets for introducing processing gases including dielectric precursors, oxidants, carrier or inert gases, dopant species, and the like. In various embodiments, the apparatus further includes features for generating a plasma having properties suitable for creating a dielectric layer, features for incorporating dopants into the dielectric layer, and processing the dielectric layer. , Features for modifying the electrical, optical, mechanical and / or chemical properties of the layer, and features for implanting dopants from the film into the substrate. Typically, this device includes a vacuum pump or equipment for connecting to such a pump. Furthermore, the apparatus includes a controller or a controller configured or designed to control the apparatus to implement the sequence of doped dielectric deposition operations described herein. The controller can include instructions for supplying various processing features of the apparatus, including a valve for supplying process gas and controlling pressure, a power source for generating plasma, and a vacuum source. Instructions can control the timing and sequence of various operations. In various embodiments, the apparatus can have features as provided by the Vector® family of deposition tools available from Novellus Systems, San Jose, California. Other features relating to an apparatus suitable for depositing a doped dielectric film are described elsewhere herein.

Characteristics of Doped CFD Film A dielectric film that functions as a dopant seed source has various characteristics. In various embodiments, the film thickness is about 20 to 200 angstroms. In some cases, the film thickness is about 50-100 angstroms, such as for doping the front end of the source-drain extension region of the three-dimensional transistor structure. The average concentration of dopant atoms (or other dopant species) in the dielectric film depends on various factors including the total amount per unit surface area of the film, as well as the diffusivity of the dopant atoms in the film and dope application. In certain embodiments, the dopant concentration in the film is about 0.01 to 10% by weight. In a further embodiment, the dopant concentration in the film is about 0.1-1% by weight. In yet a further embodiment, the dopant concentration in the film is about 0.5-4% by weight. The techniques described herein allow for adjustment of the dopant concentration over a wide range, for example, about 0.01 to 10 weight percent. For example, it has been demonstrated that the boron concentration can be easily adjusted to about 0.1-4.3 wt% in the CFD dielectric film. In certain embodiments, 5, 7, 10 and 12 nm CFD films are grown with about 0.1-0.5 wt% boron.

  The CFD doped dielectric film can be characterized by other characteristics. For example, the sheet resistance (Rs) of the CFD deposited film is about 100 to 50,000 Ω / sq. Can vary. In some cases, these values are obtained after some or all of the dopant is implanted from the doped CFD layer. The junction depth created by implanting dopant from the CFD film (as measured by SIMS, for example) can be adjusted to a level of up to about 1,000 angstroms as appropriate. Of course, many front-end devices require a fairly shallow junction depth, for example in the range of about 5-50A, which can also be obtained using CFD films. The actual junction depth is determined by, for example, the interplane dopant (eg, boron) concentration, the mobility of the dopant from the bulk and interface to the substrate (eg, silicon), and the annealing used to implant the dopant. It can be controlled by many factors, including temperature and duration.

Application of CFD Doping The substrate surface on which the dielectric source layer is formed may require highly conformal deposition. In some embodiments, the dielectric source film has an aspect ratio of about 1: 0.5 to 1:12 (especially about 1: 1 to 1: 8) and no greater than about 60 nm (particularly about 30 nm). Forms having the following feature width are conformally coated. Doping using dielectric source layers of the type described herein will find particular application in devices formed according to 45 nm technology nodes and beyond, including 22 nm technology nodes, 16 nm technology nodes, and the like.

  Among device structures that can be doped using a CFD source layer are conventional doped structures such as CMOS sources and drains, source-drain extension regions, capacitor electrodes of memory elements, and gate structures. Other structures that can be doped in this way are junctions in the source / drain extension regions in gate structures such as those in some three-dimensional gate structures used in some devices fabricated with 22 nm technology nodes. It is a non-planar or three-dimensional structure such as a part. Some three-dimensional structures have been previously incorporated by reference as “Trigate (Intel)”: Kavalieros et al., VLSI Technology Symposium 2006, p. 50, and “FinFET” Yamashita et al. (IBM Alliance), VLSI 2011, and references in both documents.

  Doped CFD films can be applied in many other ways, such as providing an etchable layer that is used in various stages of integrated circuit fabrication. In some embodiments, the etchable layer is a glass layer with an adjustable wet etch rate where the etch rate can be adjusted with the doping level. That is, the doping level is selected to provide a predetermined etch rate. In certain embodiments, the etchable layer is a silicate glass layer containing a dopant such as phosphorus, boron, or combinations thereof.

CFD Doped Example A CFD boron doped silica glass (BSG) film was provided that achieved a step coverage of approximately 100% for a complex three-dimensional gate configuration. Similar results are expected with phosphorus-doped silica glass (PSG). Boron or phosphorus can be implanted from such a film into the longitudinal and lateral regions of the source and drain junctions during the next annealing step to make it conformal / homogeneous under dopant diffusion. FIG. 20 shows a typical deposition block used to synthesize CFD BSG / PSG films. The CFD oxide growth cycle consists of (a) a saturated dose of SiO 2 precursor (BTBAS), (b) an inert purge to wash away residual precursor species, (c) an oxidizing plasma step, and (d) Includes an inert gas purge to remove reaction byproducts. This mechanism ensures that the reaction is self-limiting and that excellent conformality can be observed in these films. A boron or phosphorus exposure step is periodically inserted during CFD oxide growth, followed by a pumping and purging sequence, and an optional RF pinning / curing step (eg, exposure to plasma) is performed if necessary. Is called. This deposition block is repeated as many times as necessary depending on the thickness of the target BSG / PSG. See FIG.

  The dopant diffusion distance is adjusted at a given temperature by the frequency of inserting boron or phosphorus exposure, while the total dose of dopant is controlled by the length of exposure. These two powerful control parameters provide a flexible synthesis scheme to accurately tune the interfacial dopant concentration.

In experiments, CFD showed excellent growth characteristics with BSG films. The CFD BSG process used BTBAS as the silicon source, N 2 O plasma for oxidation, and 5% diborane (B 2 H 6 ) in argon for doping with boron. A mixture of argon and N 2 O was used as the purge gas. Consistent with the results for the undoped CFD oxide, a growth rate of ˜1 A / cycle was obtained, indicating that inclusion of the boron exposure step did not adversely affect CFD growth. The 250 A thick CFD BSG film showed almost perfect conformality for different test structures, as shown in the SEM pictures. The step coverage for these films was calculated to be ˜100% for dense and separated structures (FIG. 21). The step coverage is defined as the quotient obtained by dividing the thickness of the sidewall of the feature by the thickness of the upper portion of the same feature. Table 3 shows a different division from the original study to distinguish the effects of boron exposure time, boron insertion frequency, and growth temperature on the final average boron concentration in the film. 25X CFD Ox means that there are 25 CFD undoped oxide cycles per boron insertion stage. Since this sample was grown to about 500 angstroms, the entire sequence would be repeated about 20 times (assuming a growth rate of 1 A / cycle for CFD oxide). SIMS data for these splits can be adjusted as the average boron concentration ranges from about 0.5 to 3.5 wt% boron, as shown in FIG. Indicates that it will be possible.

Apparatus Of course, any suitable processing station may be used in one or more of the embodiments described above. For example, FIG. 13 schematically illustrates an embodiment of a CFD processing station 1300. For simplicity, the CFD processing station 1300 is represented as a stand alone processing station having a processing chamber body 1302 for maintaining a low pressure environment. Of course, however, multiple CFD processing stations 1300 may be included in a typical low pressure processing tool environment. Although the embodiment illustrated in FIG. 13 shows one processing station, it should be understood that multiple processing stations may be included in the processing tool in some embodiments. For example, FIG. 14 illustrates an embodiment of a multi-station processing tool 2400. Further, it will be appreciated that in some embodiments, one or more hardware parameters of the CFD processing station 1300, including those detailed below, are programmatically adjusted by one or more computer controllers. Also good.

  The CFD processing station 1300 is in fluid communication with a reactant supply system 1301 that supplies process gas to the distributed showerhead 1306. The reactant supply system 1301 includes a mixing vessel 1304 that mixes and / or regulates process gases for supply to the showerhead 1306. One or more mixing vessel inlet valves 1320 can control the introduction of process gas into the mixing vessel 1304.

  Some reactants, such as BTBAS, may be vaporized at the processing station and then stored in liquid before being fed to the processing station. For example, the embodiment of FIG. 13 includes a vaporization point 1303 for vaporizing the liquid reactant supplied to the mixing vessel 1304. In some embodiments, the vaporization point 1303 may be a heated vaporizer. The saturated reactant vapor generated from the vaporizer can be condensed in the downstream supply pipe. Exposure of incompatible gases to condensed reactants can create small particles. These small particles may clog the piping, obstruct the valve operation, and contaminate the substrate and the like. Some ways to solve these problems involve sweeping and / or evacuating supply lines to remove residual reactants. However, when the supply pipe is swept, the cycle time of the processing station becomes longer and the processing capacity of the processing station may be lowered. Accordingly, in some embodiments, the downstream supply piping of the vaporization point 1303 may be heat traced. In some embodiments, the mixing container 1304 may also be heat traced. In one non-limiting example, the downstream piping of the vaporization point 1303 has a temperature rise profile extending from about 100 ° C. and rising to about 150 ° C. in the mixing vessel 1304.

  In some embodiments, the reaction liquid may be vaporized by a liquid ejecting apparatus. For example, the liquid ejecting apparatus can eject the liquid reactant into the carrier gas flow upstream of the mixing container in a pulsed manner. In one scenario, the liquid ejector can vaporize the reactants by flushing the liquid from high pressure to low pressure. In another scenario, the liquid ejector can atomize the liquid into dispersed microdroplets, which can then be vaporized with a heated supply pipe. Of course, small droplets vaporize faster than large droplets, thus reducing the delay between liquid ejection and full vaporization. By vaporizing faster, the downstream pipe length from the vaporization point 1303 can be shortened. In one scenario, the liquid ejection device is attached directly to the mixing vessel 1304. In another scenario, the liquid ejection device is attached directly to the showerhead 1306.

  The shower head 1306 and the mounting table 1308 are in electrical communication with an RF power source 1314 and a matching network 1316 that supply electricity to the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 1314 and the matching network 1316 can be operated at any suitable power to form a plasma having a desired radical species composition. Examples of suitable power include, but are not limited to, 100-5,000 W for a 300 mm wafer. Similarly, the RF power source 1314 can provide any suitable frequency of RF power. In some embodiments, the RF power source 1314 can be configured to control the high frequency RF power source and the low frequency RF power source independently of each other. Exemplary low frequency RF frequencies include, but are not limited to, frequencies between 50 and 500 kHz. Exemplary high frequency RF frequencies include, but are not limited to, frequencies from 1.8 MHz to 2.45 GHz. Of course, any suitable parameter can be adjusted individually or continuously to provide plasma energy to the surface reaction. In one non-limiting example, the plasma power can be intermittently pulsed to reduce ion bombardment to the substrate surface as compared to a continuously output plasma.

  In some embodiments, the plasma can be monitored in situ by one or more plasma monitors. In one scenario, the plasma power can be monitored by one or more voltage, current sensors (eg, VI probes). In another scenario, plasma density and / or process gas concentration can be measured with one or more optical emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters can be programmatically adjusted based on measurements from such an in-situ plasma monitor. For example, OES sensors can be used in a feedback loop that programmatically controls plasma power. Of course, in some embodiments, other monitors can be used to monitor plasma and other process characteristics. Such monitors include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

  In some embodiments, the mounting table 1308 can be temperature controlled via a heater 1310. Further, in some embodiments, pressure control for the CFD processing station 1300 can be provided by a butterfly valve 1318. As shown in the embodiment of FIG. 13, a butterfly valve 1318 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the processing station 1300 may be adjusted by changing the flow rate of one or more gases introduced into the CFD processing station 1300.

  As described above, one or more processing stations can be included in a multi-station processing tool. FIG. 14 shows a schematic diagram of an embodiment of a multi-station processing tool 2400 having an inward load lock 2402 and an outward load lock 2404, where either or both of these load locks comprise a remote plasma source. Can do. Atmospheric pressure robot 2406 is configured to move wafers from a cassette loaded through pod 2408 into inward load lock 2402 through atmospheric pressure port 2410. The wafer is placed on the mounting table 2412 in the inward load lock 2402 by the robot 2406, the atmospheric pressure port 2410 is closed, and the load lock is pumped down. If the inward load lock 2402 includes a remote plasma source, the wafer can be exposed to remote plasma processing in the load lock before being introduced into the processing chamber 2414. In addition, the wafer can be heated in an inward load lock 2402, for example, to remove moisture and adsorbed gases. Next, the chamber transfer port 2416 to the processing chamber 2414 is opened and another robot (not shown) places the wafer into the reactor and mounts the first station shown in the reactor for processing. Place on the table. The embodiment depicted in FIG. 14 includes a load lock, but it will be appreciated that in some embodiments, the wafer may be placed directly into the processing station.

  The illustrated processing chamber 2414 comprises four processing stations, numbered 1-4 in the embodiment shown in FIG. Each station has a heated mounting table (designated as station 1 at 2418) and a gas line inlet. Of course, in some embodiments, each process station may have different or multiple purposes. For example, in some embodiments, the processing station may be switchable between a CFD process mode and a PECVD process mode. Additionally or alternatively, in some embodiments, the processing chamber 2414 can include one or more pairs of CFD process stations and PECVD process stations. The illustrated processing chamber 2414 comprises four stations, but it will be appreciated that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some embodiments, a processing chamber can have five or more stations, while in other embodiments, a processing chamber can have three or fewer stations.

  FIG. 14 also shows a wafer handling system 2490 for transferring wafers within the processing chamber 2414. In some embodiments, wafer handling system 2490 can transfer wafers between various processing stations and / or between processing stations and load locks. Of course, any suitable wafer handling system may be used. Non-limiting examples include a wafer carousel and a wafer handling robot. FIG. 14 also illustrates an embodiment of a system controller 2450 that is used to control the processing conditions and hardware status of the processing tool 2400. The system controller 2450 can include one or more memory devices 2456, one or more mass storage devices 2454, and one or more processors 2452. The processor 2452 can include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, and the like.

  In some embodiments, the system controller 2450 controls all activities of the processing tool 2400. The system controller 2450 executes system control software 2458 that is stored on the mass storage device 2454, read into the memory device 2456, and executed on the processor 2452. The system control software 2458 can include timing, gas mixing, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power level, RF power level, substrate platform, chuck and / or susceptor position, and processing. Instructions may be included to control other parameters relating to the particular processing performed by tool 2400. System control software 2458 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects can be written to control the operation of the processing tool component necessary to perform various processing tool steps. System control software 2458 can be encoded as any suitable computer-readable programming language.

  In some embodiments, the system control software 2458 can include input / output control (IOC) sequencing instructions to control the various parameters described above. For example, each stage of the CFD process can include one or more instructions executed by the system controller 2450. Instructions for setting processing conditions for the CFD process step can be included in the corresponding CFD recipe step. In some embodiments, the CFD recipe stages can be arranged in order so that all instructions for a CFD process stage are executed simultaneously with the process stage.

  In some embodiments, other computer software and / or programs stored in mass storage device 2454 and / or memory device 2456 in connection with system controller 2450 may be used. Examples of programs or program parts for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

  The substrate positioning program may include program code for the processing tool component that is used to place the substrate on the mounting table 2418 and to control the spacing between the substrate and other parts of the processing tool 2400. it can.

  A process gas control program is code for controlling the gas composition and flow rate, and optionally for injecting gas into one or more process stations prior to deposition to stabilize the pressure in the process station. Can be included. The pressure control program can include code for controlling the pressure in the processing station, for example, by regulating a throttle valve in the exhaust system of the processing station, a gas flow entering the processing station, or the like.

  The heater control program can include code for controlling the current to the heating unit used to heat the substrate. Alternatively, the heater control program can control the supply of heat transfer gas (such as helium) to the substrate.

  The plasma control program can include code for setting the RF power level applied to the processing electrodes of one or more processing stations.

  In some embodiments, there may be a user interface associated with the system controller 2450. User interfaces include display screens, graphic software displays of devices and / or processing conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, and the like.

  In some embodiments, the parameters adjusted by system controller 2450 may relate to processing conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (RF bias power level, etc.), pressure, temperature, and the like. These parameters can be provided to the user in the form of a recipe that can be entered using the user interface.

  Signals for monitoring the process can be provided from various processing tool sensors through the analog and / or digital input connections of the system controller 2450. Signals for controlling the process can be output on the analog and digital output connections of the processing tool 2400. Non-limiting examples of processing tool sensors that can be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, and the like. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain processing conditions.

  The system controller 2450 can provide program instructions for performing the deposition process. Program instructions can control various processing parameters such as DC power level, RF bias power level, pressure, temperature, and the like. The instructions can control these parameters to perform the operation of depositing the stacked film in situ, according to various embodiments described herein.

  The apparatus / process described herein above can be used in conjunction with a lithographic patterning tool or process for making or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Usually, though not necessarily, such tools / processes are used or performed together in a common fabrication facility. Lithographic film patterning typically involves the following operations: (1) applying a photoresist to a workpiece, ie a substrate, using a spin-on tool or spray tool; (2) a heating plate or a high temperature furnace or Operation to cure the photoresist using a UV curing tool; (3) Operation to expose the photoresist with visible light, UV light or x-rays using a tool such as a wafer stepper; (4) Selective removal of the resist (5) Transfer the resist pattern to the underlying film or workpiece using a dry etching tool or a plasma-assisted etching tool. And (6) a resist using a tool such as an RF or microwave plasma removal stripper In the operation of removing the comprise a portion or all, each operation is made possible by several conceivable tool.

  The configurations and / or practices described herein are exemplary in nature and these particular embodiments or examples are not meant to be limiting as many variations are possible. It should be understood. The particular routines or methods described herein may present only one or more of any processing strategies. Thus, the various acts described may be performed in the order described, in other orders, in parallel, or in some cases omitted. Similarly, the order of the steps described above can be changed.

  This disclosure includes all novel and inventive combinations and subcombinations of various processes, systems and configurations disclosed herein, as well as other features, functions, acts and / or characteristics, And some and all equivalents.

Claims (41)

  1. A method of depositing a film on a substrate surface in a reaction chamber comprising:
    (A) introducing the first reactant into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface;
    (B) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface;
    (C) exposing the substrate surface to plasma to effect a reaction between the first reactant and the second reactant on the substrate surface to form part of the film;
    (D) repeating (a) to (c) at least once;
    (E) introducing a dopant-containing material that is not introduced between (a) to (d) into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the film;
    (F) introducing a dopant into the film from the dopant-containing material.
  2.   The method of claim 1 further comprising repeating (a)-(c) after (g) (e) or (f).
  3.   The method of claim 1, further comprising repeating (g) (a)-(e).
  4. The method of claim 1, wherein the thickness of the film deposited between (a)-(c) is about 0.5-1 angstrom.
  5. 2. The method of claim 1, further comprising diffusing the dopant from the film into a feature on the substrate surface where the film is present.
  6. 6. The method of claim 5, wherein diffusing the dopant from the film comprises annealing the film.
  7. 6. The method of claim 5, wherein the film is present on a three-dimensional feature on the substrate surface, and the dopant is diffused conformally into the feature by diffusing the dopant from the film. .
  8.   8. The method of claim 7, wherein the feature width is about 40 nanometers or less.
  9.   The method of claim 1, further comprising purging the second reactant from the reaction chamber prior to exposing the substrate surface to plasma.
  10.   The method of claim 9, wherein the purging includes flowing a gas comprising an oxidant into the reaction chamber.
  11. 2. The method of claim 1, wherein the first reactant and the second reactant coexist in the gas phase in the reaction chamber, and the first reactant and the second reactant are in (c). until exposed to a plasma, not respond to each other in the reaction chamber, the method.
  12.   The method of claim 1, wherein introducing the dopant into the film comprises exposing the dopant-containing material to a plasma.
  13.   The method of claim 1, wherein the first reactant is an oxidant.
  14.   14. The method of claim 13, wherein the oxidant is nitrous oxide.
  15. The method of claim 1, wherein the second reactant is
    Alkylamino silane (SiH x (NR2) 4- x), ( wherein x = 1 to 3, R comprises an alkyl group), and halosilane (SiH x Y 4-x) , ( wherein x = 1 to 3 , Y includes Cl, Br, and I)
    A method selected from the group consisting of:
  16.   The method of claim 1, wherein the second reactant is BTBAS.
  17.   2. The method of claim 1, wherein the dopant-containing material comprises phosphine, arsine, alkylborane, alkylgalane, alkylphosphine, phosphorus halide, arsenic halide, gallium halide, boron halide, alkylborane, and diborane. A method selected from the group consisting of:
  18.   The method of claim 1, wherein the film is a dielectric film.
  19.   The method of claim 1, wherein the total film thickness is about 10-100 angstroms.
  20.   The method of claim 1, wherein the dopant concentration in the film is about 0.01 to 10 wt%.
  21. The method of claim 1, further comprising:
    Applying a photoresist to the substrate surface;
    Exposing the photoresist to light;
    Patterning the resist and transferring the pattern to the substrate surface;
    Selectively removing the photoresist from the substrate surface;
    A method comprising:
  22. A method of depositing a dielectric film on a substrate surface in a reaction chamber, comprising:
    (A) flowing the oxidant into the reaction chamber under conditions that allow the oxidant to be adsorbed on the substrate surface;
    (B) introducing a dielectric precursor into the reaction chamber while the oxidant continues to flow into the reaction chamber;
    (C) exposing the substrate surface to plasma to effect a reaction of the dielectric precursor and oxidant on the substrate surface to form a portion of the dielectric film;
    (D) introducing a dopant-containing material that is not introduced between (a) to (c) into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the dielectric film;
    (E) incorporating a dopant from the dopant-containing material into the dielectric film.
  23.   23. The method of claim 22, wherein the dielectric precursor is BTBAS.
  24. 23. The method of claim 22, further comprising diffusing a dopant from the dielectric film into a substrate.
  25.   23. The method of claim 22, wherein operations (a)-(c) are repeated.
  26.   26. The method of claim 25, when (a) is first performed, the oxidant contains a first ratio of oxygen to nitrogen, and when (a) is repeated, the oxidant is oxygenated. A method comprising containing nitrogen in a second ratio that is less than the first ratio.
  27.   27. The method of claim 26, wherein the oxidant comprises elemental oxygen when (a) is first performed and the oxidant comprises nitrous oxide when (a) is repeated. .
  28.   26. The method of claim 25, wherein the substrate is at a first temperature when (c) is first performed and the substrate is a second temperature that is higher than the first temperature when (c) is repeated. The method that is the temperature.
  29.   24. The method of claim 22, further comprising contacting the substrate surface with the dopant-containing material prior to (a).
  30. A method of depositing a dielectric film on a substrate surface in a reaction chamber, comprising:
    (A) introducing the dielectric precursor into the reaction chamber under conditions that allow the dielectric precursor to be adsorbed to the substrate surface;
    (B) then purging the dielectric precursor from the reaction chamber while the dielectric precursor remains adsorbed on the substrate surface;
    (C) exposing the substrate surface to plasma to effect a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film;
    (D) introducing a dopant precursor that is not introduced between (a) to (c) into the reaction chamber under conditions that allow the dopant precursor to contact a portion of the dielectric film. Method.
  31.   31. The method of claim 30, further comprising flowing an oxidant into the reaction chamber before and during (a)-(c).
  32.   32. The method of claim 30, further comprising: (e) reacting the dopant precursor to introduce a dopant into the dielectric film.
  33. An apparatus for depositing a doped film on a substrate surface,
    A reaction chamber including a device for holding the substrate during the deposition of the doped film;
    One or more process gas inlets coupled to the reaction chamber;
    A controller,
    (A) introducing the first reactant into the reaction chamber under conditions that allow the first reactant to be adsorbed on the substrate surface;
    (B) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface;
    (C) exposing the substrate surface to plasma to effect a reaction between the first reactant and the second reactant on the substrate surface to form part of the doped film;
    (D) repeating (a) to (c) at least once;
    (E) introducing a dopant-containing material that is not introduced between (a) to (d) into the reaction chamber under conditions that allow the dopant-containing material to contact the exposed surface of the doped film;
    (F) An apparatus comprising a controller designed or configured to cause the apparatus to perform introduction of a dopant from the dopant-containing material into the doped film.
  34.   34. The apparatus of claim 33, wherein the controller is further designed or configured to cause an oxidant to flow into the reaction chamber before and during (a)-(d). .
  35.   34. The apparatus of claim 33, wherein the controller is further designed or configured to repeat (a)-(c) after (g) (e) or (f).
  36. The apparatus according to claim 33, wherein the controller is further, (g) the said dopant from the doped film, said doped layer is designed or configured to Maseru Captures the configuration of the substrate surface which is present, apparatus.
  37. 38. The apparatus of claim 36, wherein incorporating the dopant from the doped film comprises annealing the doped film.
  38.   34. The apparatus of claim 33, wherein the controller is further designed or configured to purge the second reactant from the reaction chamber prior to exposing the substrate surface to plasma.
  39.   40. The apparatus of claim 38, wherein the purging includes flowing a gas containing oxidant into the reaction chamber.
  40.   34. The apparatus of claim 33, wherein the controller is further designed or configured such that (e) is performed at intervals between one or more of (a)-(d), An apparatus wherein the spacing varies over a period of depositing the doped film.
  41.   34. A system comprising the apparatus of claim 33 and a stepper.
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