KR102084901B1 - Plasma activated conformal dielectric film deposition - Google Patents

Abstract

Methods of depositing a film on a substrate surface include surface mediated reactions in which the film grows over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the membrane between cycles of adsorption and reaction.

Description

Plasma Activated Conformal Dielectric Film Deposition {PLASMA ACTIVATED CONFORMAL DIELECTRIC FILM DEPOSITION}

Cross Reference to Related Applications

This application is directed to US Provisional Patent Application No. 61 / 324,710, filed April 15, 2010; United States Provisional Patent Application 61 / 372,367, filed August 10, 2010; United States Provisional Patent Application No. 61 / 379,081, filed September 1, 2010; And US Pat. Appl. No. 61 / 417,807, filed Nov. 29, 2010, as a priority for some additional continuing applications of US Patent Application No. 13 / 084,399, filed April 11, 2011. 35 USC Claim under §120. Each of these application documents is hereby incorporated by reference in its entirety for all purposes. In addition, this application is part of a further continuing application of US Patent Application No. 13 / 084,305, filed April 11, 2011, which is hereby incorporated by reference in its entirety.

Various thin film layers for semiconductor devices can be deposited using atomic layer depostion (ALD) processes. However, existing ALD processes may not be suitable for depositing highly conformal dielectric films.

Various aspects disclosed herein relate to methods and apparatus for depositing a film on a substrate surface. In certain embodiments, the method includes depositing the film by surface mediated reactions, in which the film is deposited over one or more reactant adsorption and reaction cycles. In one aspect, the method is characterized by intermittent delivery of dopant species to the membrane between adsorption and reaction cycles. At some point, dopant species may be driven across the substrate surface to dope regions of the substrate.

In one aspect, the disclosed method deposits a film on a substrate surface in a reaction chamber. The method includes the steps of (a) introducing the first reactant into the reaction chamber under conditions such that the first reactant is adsorbed onto the substrate surface; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface; (c) exposing the substrate surface to plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film; (d) repeating (a) to (c) at least once; (e) introducing the dopant containing material into the reaction chamber under conditions such that dopant containing material not introduced during (a) to (d) is in contact with the exposed surface of the film; And (f) introducing a dopant from the dopant containing material into the film. Introducing the dopant into the film includes exposing the dopant containing material to a plasma.

In various implementations, the method further includes driving the dopant from the film into features of the substrate surface on which the film resides. Driving the dopant from the film may be accomplished by annealing the film. In some applications, the film resides on a three-dimensional feature of the substrate surface, and the act of driving the dopant from the film provides conformal diffusion of the dopant into the feature. In certain applications, the feature has a width no greater than about 40 nanometers.

In certain embodiments, the film is a dielectric film. In some cases, the total film thickness is about 10 to 100 angstroms. In various embodiments, the concentration of dopant in the film is about 0.01 to 10 weight percent.

In certain embodiments, the method of this aspect further includes repeating (a) to (c) after (e) or (f). In certain embodiments, the method of this aspect further includes repeating (a) through (e). In some embodiments, the amount of film deposited during (a) to (c) is about 0.5 to 1 angstrom.

In certain embodiments, the method further includes purging the second reactant from the reaction chamber prior to the operation of exposing the substrate surface to a plasma. The purging operation may be accomplished by flowing a gas containing an oxidant into the reaction chamber. In some embodiments, the first reactant and the second reactant coexist in a vapor phase in the reaction chamber, wherein the first reactant and the second reactant are exposed until the plasma is exposed in (c). They do not react with each other appreciably within the reaction chamber.

In certain embodiments, the first reactant is an oxidant such as, for example, nitrous oxide. In certain embodiments, (i) the second reactant is SiH _x (NR ₂ ) _4-x with x = 1 to 3 and R is alkylamino silanes comprising alkyl groups; Or (ii) SiH _x Y _4-x with x = 1 to 3 and Y is a dielectric precursor, such as halosilanes comprising Cl, Br, and I. In certain embodiments, the second reactant is BTBAS. In certain embodiments, the dopant containing material is phosphine, arsine, alkylborane, alkyl gallane, alkylphosphine, phosphorus halide, arsenic halide, gallium halide , Boron halide, alkylborane or diborane.

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber. The method includes the steps of (a) introducing an oxidant into the reaction chamber under conditions such that a first reactant is adsorbed onto the substrate surface; (b) introducing a dielectric precursor into the reaction chamber while the oxidant flows into the reaction chamber; (c) exposing the substrate surface to plasma to cause a reaction between the oxidant on the substrate surface and the dielectric precursor to form a portion of the dielectric film; (d) introducing the dopant containing material into the reaction chamber under conditions such that dopant containing material not introduced during (a) to (c) is in contact with the exposed surface of the film; And (e) including the dopant from the dopant containing material into the dielectric film. In one embodiment, the dielectric precursor is BTBAS or another precursor as specified in the preceding embodiments.

In addition, this method may require that operations (a) to (c) are repeated one or more times. In a particular example, the oxidant comprises a first ratio of oxygen to nitrogen when (a) is first performed and the oxidant comprises a second ratio of oxygen to nitrogen when (a) is subsequently performed . The second ratio is smaller than the first ratio. For example, the oxidant includes elemental oxygen when (a) is first performed and the oxidant includes nitrous oxide when (a) is repeated. In some embodiments, the substrate is at a first temperature when (c) is first performed, the substrate is at a second temperature when (c) is repeated, and the second temperature is higher than the first temperature. .

In some cases, the method further includes driving the dopant from the dielectric film into the substrate. In some embodiments, the method further includes contacting the substrate surface with the dopant containing material prior to (a).

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber in accordance with operations wherein the operations comprise (a) allowing the dielectric precursor to adsorb onto the substrate surface. Introducing into the reaction chamber; (b) thereafter, purging the dielectric precursor from the reaction chamber with the dielectric precursor adsorbed on the substrate surface; (c) exposing the substrate surface to plasma to cause a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film; And (d) introducing the dopant precursor into the reaction chamber under conditions that cause a dopant precursor not introduced during (a) to (c) to come into contact with a portion of the dielectric film. In some embodiments, the method further includes flowing an oxidant into the reaction chamber before and during (a) to (c). In some cases, the method further includes reacting the dopant precursor to include the dopant into the dielectric film.

Another aspect relates to an apparatus for depositing a doped film on a substrate surface. The apparatus includes a reaction chamber including a device for holding a substrate during deposition of a doped dielectric film; One or more process gas inlets in communication with the reaction chamber; And features such as a controller. The controller is configured or designed to cause the apparatus to perform operations, wherein the operations comprise (a) introducing the first reactant into the reaction chamber under conditions such that the first reactant is adsorbed onto the substrate surface. ; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed on the substrate surface; (c) exposing the substrate surface to plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film; (d) repeating (a) to (c) at least once; (e) introducing the dopant containing material into the reaction chamber under conditions such that dopant containing material not introduced during (a) to (d) is in contact with the exposed surface of the film; And (f) introducing a dopant from the dopant containing material into the film. The controller may be designed or configured to directly perform other methods, such as those discussed in accordance with other aspects.

In certain embodiments, the controller is further designed or configured to cause the apparatus to flow oxidant into the reaction chamber before and during (a) to (d). In certain embodiments, the controller is further designed or configured such that an operation of repeating (a) to (c) occurs after (e) or (f). In certain embodiments, the controller is further designed or configured to cause an operation to drive the dopant from the film into features of the substrate surface on which the film resides. Driving the dopant from the film may be accomplished by annealing the film. In some implementations, the controller is further designed or configured to allow (e) to be performed at intervals between one or more iterations of (a) to (d), the intervals vary over the course of depositing the film.

In various implementations, the controller is further designed or configured to purge the second reactant from the reaction chamber prior to exposing the substrate surface to the plasma. In one example, the purge is accomplished by flowing a gas containing an oxidant into the reaction chamber.

These and other features will be described in more detail below with reference to the associated drawings.

1 schematically illustrates a timing diagram of an example conformal film deposition (CFD) process in accordance with an embodiment of the present disclosure.
2 schematically illustrates a timing diagram of another exemplary CFD process according to an embodiment of the present disclosure.
3 schematically illustrates a timing diagram of another exemplary CFD process according to an embodiment of the present disclosure.
4 schematically illustrates a timing diagram of an example CFD process including a plasma processing cycle in accordance with an embodiment of the present disclosure.
5 illustrates an example correlation between wet etch rate ratio and deposition temperature for films deposited according to an embodiment of the present disclosure.
6 illustrates an exemplary correlation between wet etch rate ratio and film stress for films deposited according to embodiments of the present disclosure.
7 shows an exemplary correlation between film contamination concentration and deposition temperature for films deposited according to an embodiment of the present disclosure.
8 is a schematic diagram of an example cross section of a non-planar substrate including a plurality of gaps.
9 schematically depicts a timing diagram of an example CFD process including a transition to PECVD in accordance with an embodiment of the present disclosure.
10 is a schematic diagram of an exemplary cross section of a gap fill including a keyhole void.
11 schematically illustrates a timing diagram of an example CFD process including in-situ etching in accordance with an embodiment of the present disclosure.
12A is a schematic diagram of an example cross section of a refilled gap fill profile.
12B is a schematic diagram of an exemplary cross-section of the refilled gap fill profile of FIG. 12A during an in-situ etch process according to embodiments of the present disclosure.
12C is a schematic diagram of an exemplary cross-section of the refilled gap fill profile of FIG. 12B during a deposition process after in-situ etching in accordance with an embodiment of the present disclosure.
13 is a schematic diagram of an example process station in accordance with an embodiment of the present disclosure.
14 is a schematic diagram of an example process tool including a plurality of process stations and a controller in accordance with an embodiment of the present disclosure.
15 is an exemplary schematic cross-sectional view of through silicon vias during a CFD process including in-situ etching in accordance with an embodiment of the present disclosure.
FIG. 16 illustrates a transistor having a three-dimensional gate structure, with a source and a drain formed in thin vertical structures that are difficult to dope by conventional ion implantation techniques.
17 provides a basic CFD sequence of operations from left to right over time along the x axis.
18 and 19 illustrate an undoped protective " capping that can be deposited at an interface with a substrate underlying a dopant and subsequently followed by intervening CFD cycles and optionally an CFD oxide film. '' Shows embodiments topped off with a layer.
20 shows a typical deposition block used to synthesize a CFD BSG / PSG film.
FIG. 21 shows the step coverage for CFD films calculated to be ˜100% on dense and isolated structures.
FIG. 22 provides SIMS data indicating that the average boron concentration in CFD films can be adjusted within the range of about 0.5 to 3.5 wt% boron.

Semiconductor device fabrication typically involves depositing one or more thin films on a non-planar substrate in an integrated fabrication process. In some aspects of such an integrated manufacturing process, it may be useful to deposit conformal thin films on substrate topography. For example, a silicon nitride film may be deposited on top of an elevated gate stack to serve as a spacer layer to protect the lightly doped source and drain regions from subsequent ion implantation processes.

In spacer layer deposition processes, CVD processes can be used to form a silicon nitride film on a non-planar substrate, which is then anisotropically etched to form a spacer structure. However, as the distance between gate stacks becomes smaller, it results in a "bread-loafing deposition effect" due to the mass transport constraints of CVD gas phase reactants. The thicker deposits appear at the top surfaces of the gate stacks and the thinner deposits at the bottom corners of the gate stacks Furthermore, because some dies may have different device density regions, the effect of mass transfer across the wafer surface is This results in in-film thickness variation and in-wafer thickness variation, which leads to over-etching in some areas and under-etching in others. This degrades and / or die yields.

Some ways to deal with these problems include atomic layer deposition (ALD). In contrast to CVD processes where thermally activated gaseous reactants are used to deposit the films, the ALD process uses a surface-mediated deposition reaction to deposit the film layer by layer. In one exemplary ALD process, the substrate surface comprising the surface active site population is exposed to the gas phase distribution of the first film precursor P1. Several molecules of P1 may form a condensed phase on the substrate surface, including chemisorbed species and physisorbed molecules of P1. The reactor is then evacuated so that only chemisorbed species remain and the physisorbed P1 and gas phases are removed. Subsequently, a second membrane precursor P2 is introduced into the reactor such that some molecules of the second membrane precursor P2 are adsorbed onto the substrate surface. Once again the reactor is discharged and this time unbound P2 is removed. Thereafter, thermal energy is provided to the substrate to activate the surface reaction between the adsorbed molecules P1 and P2 to form a film layer. Finally, the reactor is withdrawn and the reaction by-products and possibly unreacted P1 and P2 are removed and the ALD cycle ends. Additional ALD cycles can be included to build the film thickness.

Depending on the exposure time of the precursor dosing steps and the sticking coefficient of the precursors, each ALD cycle may in one example deposit a film layer of 0.5 to 3 Angstroms thick. Thus, ALD processes can be time consuming when depositing films thicker than a few nanometers thick. Furthermore, some precursors may have long exposure times for depositing conformal films, thereby reducing wafer throughput time.

Conformal films can also be deposited on planar substrates. For example, the antireflective layers used in lithographic patterning can be formed from alternating planar stacks of film types. Such antireflective layers may be approximately 100 to 1000 angstroms thick, so the ALD process is less attractive than the CVD process for this. However, these antireflective layers may also have an in-wafer thickness variation tolerance that is lower than the in-wafer thickness variation tolerance that many CVD processes can provide. For example, a 600 angstrom thick antireflective layer can allow a thickness range less than 3 angstroms.

Accordingly, various embodiments are provided herein that provide a process and equipment for plasma activated conformal film deposition (CFD) on a non-planar substrate and a planar substrate. These embodiments include various features used in some CFD processes, rather than all CFD processes. Among these features are: (1) removing or reducing the time required to "sweep" one or both reactants from the reaction chamber, (2) at least one other while intermittenly introducing one reactant into the reaction chamber; Continuously flowing the reactants of (3) igniting the plasma when one of the reactants is in the gas phase rather than all reactants removed from the reaction chamber, and (4) CFD films deposited to modify the film properties. Treatment using plasma, (5) depositing a portion of the film by PECVD, typically after depositing a first portion of the film by CFD in the same reaction chamber, and (6) depositing a partially deposited film between CFD stages. Etching and (7) doping the CFD film by placing the dopant transfer cycle only between film deposition cycles. have. Of course, these features are not a definitive list. Various other CFD features will become apparent upon reference to the remainder of this specification.

The concept of a CFD "cycle" is associated with the discussion of various embodiments herein. In general, a cycle is the minimum set of operations required to perform a single surface deposition reaction. The result of one cycle is the production of at least a partial film layer on the substrate surface. Typically, the CFD cycle will include only the steps necessary to deliver and adsorb each reactant to the substrate surface and then react the adsorbed reactants to form a partial film layer. Of course, this cycle may include additional steps such as removing one of the reactants or by-products and / or treating the deposited partial film. In general, a cycle can include only one instance of a unique sequence of operations. Illustratively, the cycle comprises (i) delivering / adsorbing reactant A, (ii) delivering / adsorbing reactant B, (iii) removing reactant B from the reaction chamber, and (iv) Operations such as applying a plasma to cause a surface reaction to form a partial film layer on the surface.

The seven above-mentioned features will now be described further. In the following description, consider a CFD reaction in which two or more reactants are adsorbed onto the substrate surface by interaction with the plasma and then react to form a film on the surface.

Feature 1: Continuous flow of reactants

Reactant A continues to flow into the reaction chamber even during one or more portions of the CFD cycle, which would normally not flow in conventional ALD. In conventional ALD, reactant A flows only to adsorb itself to the substrate surface. In another phase of the ALD, reactant A does not flow. However, according to certain CFD embodiments described herein, reactant A flows not only during the phase associated with its adsorption but also during the phase of the CFD cycle performing the non-adsorbent operation of reactant A. For example, in many embodiments, reactant A flows into the reactor while the device is dosing the second reactant (reactant B in this example). Thus, during at least a portion of the CFD cycle, reactants A and B coexist in the gas phase. Furthermore, reactant A may flow even when plasma is applied to cause a reaction on the substrate surface. The continuously flowing reactant may be delivered into the reaction chamber together with a carrier gas such as, for example, argon.

One advantage of this continuous flow embodiment is to suppress delays and flow variations caused by transient initialization and stabilization of the flow associated with the established flow initiating and stopping the flow.

As one specific example, an oxide film may be deposited by performing a conformal film deposition process using a main reactant (sometimes a “solid component” precursor or simply “reactant B” in this example). One such main reactant is bis (tert-butylamino) silane (BTBAS). In this example, the oxide deposition process includes delivering an oxidant, such as oxygen or nitrous oxide, which flows first and continuously during the delivery of the main reactant within the individual exposure phases. This oxidant also continues to flow during the individual plasma exposure phases. See, for example, the sequence shown in FIG. 1. For comparison, in a typical ALD process, the flow of oxidant will stop when the solid component precursor is delivered to the reactor. For example, if reactant B is delivered, the flow of reactant A will be stopped.

In some specific examples, the continuously flowing reactant is a "secondary" reactant. As used herein, the term “secondary” reactant is any reactant that is not the main reactant. As mentioned above, the main reactant is a solid at room temperature and includes elements that contribute to the film formed by CFD. Examples of such elements are metals (eg aluminum and titanium), semiconductors (eg silicon and germanium), and nonmetals or metalloids (eg boron). Examples of auxiliary reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkyl amines, and the like.

Continuously flowing reactants may be provided at a constant flow rate or at a variable but controlled flow rate. In the latter case, by way of example, the flow rate of the auxiliary reactant may drop during the exposure phase, when the main reactant is delivered. For example, in oxide deposition, the oxidant (eg oxygen or nitrous oxide) flows continuously during the entire deposition sequence, but its flow rate may drop when the main reactant (eg BTBAS) is delivered. . This increases the partial pressure of BTBAS while dosing itself, reducing the exposure time required to saturate the substrate surface. Just before igniting the plasma, the oxidant flow increases to reduce the probability of BTBAS present during the plasma exposure phase. In some embodiments, the continuously flowing reactant flows at a variable flow rate over two or more deposition cycles. For example, the reactants may flow at a first flow rate during a first CFD cycle and the reactants may flow at a second flow rate during a second CFD cycle.

If multiple reactants are used and the flow of one of them is continuous, at least two of them will coexist in the gas phase during part of the CFD cycle. Likewise, if no purging operation is performed after the first reactant delivery, the two reactants will coexist. Therefore, it may be important to employ reactants that do not react visibly with each other in the gas phase when no activation energy is applied. Typically, the reactants should not react until they are present on the substrate surface and exposed to plasma or other suitable nonthermal activation conditions. The choice of these reactants includes the activation energies for reactions that must be large enough so that there is at least (1) the thermodynamic favorability of the target reaction (free energy of the cast <0) and (2) a negligible reaction at the target deposition temperature. Include what is considered.

Feature 2: shorten or skip the sweep step

In certain embodiments, this process eliminates or shortens the time associated with the sweep step that would normally be performed in a typical ALD. In conventional ALD, a separate removal step is performed after each reactant is delivered and adsorbed onto the substrate surface. In a typical ALD removal step, very little adsorption or reaction takes place or not at all. In the CFD cycle, the removal step is omitted or shortened after at least one of the reactants has been delivered. An example of a process sequence with the elimination step omitted is provided in FIG. 1. No removal step is performed to remove reactant A from the reaction chamber. In some cases, no removal step is performed after delivery of the first reactant in the CFD cycle, but removal step is optionally performed after delivery of the second or last delivered reactant.

The CFD “removal” step or phase concept is shown while discussing various embodiments of the present disclosure. Generally, the removal phase removes or purges one of the gaseous reactants from the reaction chamber and typically occurs only after delivery of such reactants is complete. In other words, these reactants are no longer delivered to the reaction chamber during the removal phase. However, the reactants remain adsorbed on the substrate surface during the removal phase. Typically, the removal step serves to remove any residual gaseous reactants in the chamber after the reactants are adsorbed onto the substrate surface to the desired level. In addition, the removal phase may remove weakly adsorbed species (eg, certain precursor ligands or reaction byproducts) from the substrate surface. In ALD, the removal phase was considered necessary to prevent gas phase interaction between two reactants or interaction of one reactant with another driving force for thermal plasma or surface reaction. In general, unless otherwise specified herein, the removal phase may be accomplished by (i) venting the reaction chamber and / or (ii) flowing a gas that does not contain species to be removed through the reaction chamber. In the case of (ii), such a gas may be an inert gas or an auxiliary reactant, for example a continuously flowing auxiliary reactant.

Omission of the removal phase can be made with or without continuous flow of other reactants. In the embodiment shown in FIG. 1, reactant A continues to flow rather than be removed after adsorption to the substrate surface is complete (as indicated by reference numeral 130 in the figure).

In various embodiments in which two or more reactants are used, the reactants with shortened or omitted removal steps for themselves are auxiliary reactants. By way of example, the auxiliary reactant is an oxidant or nitrogen source and the main reactant is a silicon, boron, or germanium containing precursor. Of course, main reactant removal may also be omitted or shortened. In some instances, no removal step is performed after delivery of the auxiliary reactant, but the removal step is optionally performed after delivery of the main reactant.

As discussed above, the removal phase need not be omitted entirely, but the duration can be shortened compared to removal phases in conventional ALD processes. For example, the removal phase of a reactant, such as an auxiliary reactant, during the CFD cycle can be performed for about 0.2 seconds or less, for example about 0.001 to 0.1 seconds.

Feature 3: Ignite the plasma when one of the reactants is in gas phase

In this feature, the plasma is ignited before all reactants are removed from the reaction chamber. This is different from conventional ALD, where plasma activation or other reaction drive operation is provided only after the gaseous reactants no longer exist in the plasma chamber. This feature inevitably occurs when reactant A continues to flow during the plasma portion of the CFD cycle as shown in FIG. 1. However, the disclosed embodiments are not limited only in this manner. One or more reactants may flow during the plasma phase of the CFD cycle but need not flow continuously over the CFD cycle. In addition, the reactants present in the gas phase during plasma activation may be auxiliary reactants or main reactants (if two or more reactants are used in the CFD cycle).

For example, the sequence can be (i) introducing reactant A, (ii) purging reactant A, (iii) introducing reactant B, striking the plasma while reactant B is flowing, and (iv) purging. In such embodiments, the process uses plasma activated reactant species from the gas phase. This is a common example where CFD is not constrained by the sequence of subsequent steps.

If the activation plasma is supplied during the time that the solid component precursor (main reactant) is supplied to the reactor, the step coverage will be less conformal but the deposition rate will typically increase. However, if plasma activation occurs only during the delivery of the auxiliary reactant, this is not necessarily the case. The plasma activates the gaseous auxiliary component, which makes the component more reactive, thereby increasing its reactivity during the conformal film deposition reaction. In certain embodiments, this feature is used when depositing silicon containing films such as oxides, nitrides or carbides.

Feature 4: Plasma Treatment of Deposited CFD Films

In such embodiments, the plasma may play two or more roles in the conformal film deposition process. One of these roles is to activate or drive the film formation reaction during each CFD cycle. Another role is to treat the film after the CFD film is fully or partially deposited along one or more CFD cycles. Plasma treatment is intended to modify one or more film properties. Typically, but not necessarily, the plasma treatment phase is performed under conditions different from those used to activate the film formation reaction (ie, to drive the film formation reaction). By way of example, plasma treatment may be performed in the presence of a reducing or oxidizing atmosphere (eg, in the presence of oxygen or hydrogen), but this is not necessary during the active portion of the CFD cycle.

The plasma treatment operation may be performed every cycle of the CFD process, every two cycles, or at a lower frequency. Plasma treatment may be performed at regular intervals or limited to a fixed number of CFD cycles (eg at variable CFD cycle intervals) or may be performed at random. In a typical example, film deposition is performed over several CFD cycles to form a suitable film thickness followed by plasma treatment. Thereafter, film deposition is again performed over a number of CFD cycles without plasma treatment before plasma treatment is performed again. This x number of CFD cycles and subsequent super-sequences of plasma treatment (film modification) can be repeated until the film is completely formed by CFD.

In certain embodiments, the plasma treatment may be performed prior to initiation of the CFD cycle to modify one or more characteristics of the surface on which the CFD film is deposited. In various embodiments, the surface can be composed of silicon (doped or undoped) or silicon containing material. The modified surface can better produce a high quality interface with subsequently deposited CFD films. Such an interface may provide, for example, good adhesion properties and reliable electrical properties, for example through defect reduction and the like.

Substrate pretreatment prior to CFD is not limited to any particular plasma treatment. In certain embodiments, the pretreatment includes hydrogen plasma, nitrogen plasma, nitrogen / hydrogen plasma, ammonia plasma, argon plasma, exposure to helium plasma, helium annealing, hydrogen annealing, ammonia annealing, and helium, hydrogen, argon, nitrogen, hydrogen UV curing in the presence of nitrogen forming gas and / or ammonia. Plasma processing can be realized using various plasma generators including, but not limited to, microwave plasma generators, ICP remote plasma generators, direct plasma generators, and other plasma generators known to those skilled in the art.

Overall, plasma treatment can occur before, during and after a CFD cycle. If the plasma treatment occurs before the CFD cycle, the frequency can be selected for suitable deposition conditions. Typically, the plasma treatment will not occur more than once per cycle.

As an example, consider a process for forming silicon nitride from precursors with some carbon. Examples of such precursors include BTBAS. Due to the carbon present in the precursor, the deposited nitride film has some carbon impurity, which degrades the electrical properties of the nitride. To solve this problem, after several CFD cycles using a carbon containing precursor, this partially deposited film is exposed to hydrogen in the presence of a plasma, thereby reducing and ultimately removing carbon impurities.

Plasma conditions used for film surface modification can be selected to achieve a target change in film properties and / or composition. Among the plasma conditions that can be selected and / or tailored for the desired modification, there are two oxidation conditions, reduction conditions, etching conditions, power used to generate the plasma, frequency used to generate the plasma, and two to generate the plasma. When using the above frequency, there may be a plasma density, the distance between the plasma and the substrate. Examples of CFD film properties that can be modified by plasma treatment include internal film stress, etch resistance, density, hardness, optical properties (refractive index, reflectivity, optical density, etc.), dielectric constant, carbon content, electrical properties (Vfb spread, etc.) And the like.

In some embodiments, treatments other than plasma treatments are used to modify the properties of the deposited film. Such treatments include electromagnetic radiation treatments, thermal treatments (eg, annealing or high temperature pulses), and the like. Any of these processes may be performed alone or in combination with other processes, including plasma treatment. Any such processes may be used in place of any of the plasma processes described above. In certain embodiments, such treatment includes exposing the film to ultraviolet light. As will be described below, in certain embodiments, the method includes applying ultraviolet light to the oxide CFD film in-situ (ie, during film formation) or after oxide deposition. Such treatment can provide improved electrical performance by reducing or eliminating defect structures.

In certain particular embodiments, ultraviolet treatment may be combined with plasma treatment. These two processing operations may be performed simultaneously or sequentially. In the sequential case, ultraviolet treatment is optionally performed first. In the simultaneous case, the two treatments may be provided from separate sources (e.g., RF power source for plasma treatment and lamp for ultraviolet treatment) or from a single source such as helium plasma generating ultraviolet light as a byproduct. Can be.

Feature 5: CFD Deposition and Subsequent Transition to PECVD

In these embodiments, part of the finished film is produced by CFD and the other part is formed by CVD, such as PECVD. Typically, but not necessarily the CFD deposition process is performed first followed by the PECVD process. Combined CFD / CVD processes can improve step coverage compared to when CVD is performed alone, and can further improve deposition rate as compared to when CFD is performed alone. In some cases, plasma or other activation energy is applied while one CFD reactant is flowing to produce parasitic CVD operations to achieve higher deposition rates, different classes of films.

In certain embodiments, two or more CFD phases may be used and / or two or more CVD phases may be used. For example, the initial portion of the film may be deposited by CFD followed by the middle portion of the film by CVD and then the last portion of the film may be deposited by CFD. In such embodiments, it may be desirable to modify the CVD portion of the film by, for example, a plasma treatment or an etching treatment prior to depositing a later portion of the film by CFD.

A transition phase can be employed between the CFD phase and the CVD phase. The conditions used during this transition phase are different from the conditions used in the CFD phase and / or the CVD phase. Typically, but not necessarily, these transition conditions allow for simultaneous CFD surface reactions and CVD type gas phase reactions. The transition phase typically involves exposure to a plasma, which may be pulsed, for example. The transition phase also includes delivering one or more reactants at a low flow rate that is much lower than the flow rate used in the corresponding CFD phase of the process.

Feature 6: Deposition by CFD, Etch and Subsequent Deposition by CFD

In such embodiments, CFD deposition is performed over one or more cycles (typically multiple cycles), and the resulting film is then etched away, for example at or near the recess inlet (cusp). Some excess film is removed, followed by additional CFD deposition cycles. Other examples of structural features in the deposited film can be etched in a similar manner. The etchant selected for this process will depend on the material to be etched. In some cases, the etching operation may be performed using fluorine containing etchant (eg, NF ₃ ) or hydrogen.

In certain embodiments, a remote plasma is used to generate an etchant. In general, remote plasma can be etched isotropically than direct plasma. Remote plasmas generally provide a relatively high proportion of radicals to the substrate. The reactivity of these radicals may vary depending on the vertical position in the recess. At the top of the feature, the radicals will be more concentrated and thus etched at a higher rate, while at the bottom and bottom of the recess some radicals will be lost and therefore etched at a lower rate. Of course, this is a preferred reaction profile to deal with the very large deposition problems that occur in the recess openings. A further advantage of using a remote plasma in etching is that the plasma is relatively gentle and thus less prone to damaging the substrate layer. This is particularly advantageous when the substrate layer present below it is sensitive to oxidation or other damage.

Feature 7: Customize membrane composition with additional reactants

Many of the examples provided herein relate to CFD processes using one or two reactants. In addition, many examples use the same reactant in every CFD cycle. However, this is not necessarily the case. First, many CFD processes may use three or more reactants. Examples include (i) CFD tungsten using diborane, tungsten hexafluoride and hydrogen as reactants, and (ii) CFD silicon oxide using diborane, BTBAS, and oxygen as reactants. Include. Diborane may be removed from the growing membrane or included in this membrane as appropriate.

In addition, some examples may only use additional reactants in some CFD cycles. In these instances, the basic CFD process cycle uses only reactants that produce a basic film composition (eg, silicon oxide or silicon carbide). This basic process is performed in all CFD cycles or almost all CFD cycles. However, some of the CFD cycles are executed as strain cycles and they deviate from the conditions of the normal deposition cycle. For example, these modification cycles may use one or more additional reactants. Such modification cycles may also use the same reactants as used in the basic CFD process, but this is not necessarily the case.

Such CFD processes are particularly advantageous when preparing doped oxides or other doped materials as CFD films. In some embodiments, dopant precursors are included as "additional" reactants only in small portions of CFD cycles. The frequency of adding dopants is specified by the target dopant concentration. For example, the dopant precursor may be included every tenth cycle of base material deposition.

Unlike many other deposition processes, in particular unlike processes requiring thermal activation, CFD processes can be performed at relatively low temperatures. In general, the CFD temperature will be about 20 to 400 ° C. This temperature may be selected to enable deposition in temperature sensitive process situations such as deposition on photoresist cores. In certain embodiments, a temperature of about 20-100 ° C. is used when using double patterning (eg using photoresist cores). In another embodiment, a temperature of about 200 to 350 ° C. is used in the memory manufacturing process.

As mentioned above, CFD is well suited for depositing films at advanced technology nodes. Thus, for example, the CFD process can be integrated into processes of 32 nm node, 22 nm node, 16 nm node, 11 nm node and processes beyond any of these nodes. These nodes are described in an industry agreement on microelectronic technology requirements of the International Technology Roadmap for Semiconductors (ITRS) over the years. In general, this is based on 0.5 pitch of memory cells. In a particular example, the CFD process is applied for "2X" devices (having device features in the range of 20 to 29 nm) and devices beyond it.

Most examples of CFD films provided herein relate to silicon based microelectronic devices, but these films may also be applied in other fields. Microelectronic or optoelectronic devices using non-silicon semiconductors such as GaAs and other Group III-V semiconductors and Group II-VI semiconductors such as HgCdTe may benefit from using the CFD processes described herein. Conformal dielectric films may also be used in the solar energy field, electrochromic field and other fields, such as photovoltaic devices.

1 schematically illustrates a timing diagram 100 of an exemplary embodiment of a plasma activated CFD process. Two full CFD cycles are shown. As shown, each includes an exposure phase 120 to reactant A, an exposure phase 140 immediately following reactant B, a reactant B removal phase 160, and finally a plasma activation phase 180. The plasma energy provided during the plasma activation phases 180A, 180B activates the reaction between the surface adsorbed reactant species A and B. In the illustrated embodiments, no removal phase is performed on one reactant (Reactant A) after it is delivered. In practice, this reactant continues to flow during the film deposition process. Thus, the plasma is ignited when reactant A is in the gas phase. Features 1 to 3 are embodied in the example of FIG. 1.

In the embodiment shown, reactants A and B can coexist in the gas phase without reacting with each other. Thus, one or more of the process steps described in the ALD process may be shortened or eliminated in this exemplary CFD process. For example, the removal steps after reactant A exposure phases 120A, 120B may be omitted.

The CFD process can be used to deposit any of a number of different types of films. While most of the examples provided herein relate to dielectric materials, the disclosed CFD processes can also be used to form conductor material films and semiconductor material films. Although nitrides and oxides are characteristic dielectric materials, carbides, oxynitrides, carbon doped oxides, borides and the like can also be formed. Oxides include a wide range of ashes, including USG (undoped silicate glass), doped silicate glass. Examples of doped glasses include boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG) and boron phosphorus doped silicate glass (BPSG).

In some embodiments, the silicon nitride film may be formed by the reaction of one or more of a mixture of silicon containing reactants and nitrogen containing reactants and / or nitrogen containing reactants. Examples of silicon-containing reactants include, but are not limited to, bis (tertiarybutylamino) silane (SiH ₂ (NHC (CH ₃ ) ₃ ) ₂ or BTBAS), dichlorosilane (SiH) ₂ Cl ₂ ) and chlorosilane (SiH ₃ Cl). Exemplary nitrogen containing reactants include, but are not limited to, ammonia, nitrogen, and tert-butyl amine ((CH ₃ ) ₃ CNH ₂ or t-butyl amine). Exemplary nitrogen containing reactant mixtures include, but are not limited to, mixtures of nitrogen and hydrogen.

The selection of one or more reactants can be made by various membrane and / or hardware considerations. For example, in some embodiments, the silicon nitride film can be formed from the reaction of dichlorosilane with plasma activated nitrogen. Chemical adsorption of dichlorosilane to the silicon nitride surface produces a silicon-hydrogen terminated surface and hydrogen chloride (HCl) is liberated. An example of such a chemisorption reaction is schematically shown in reaction 1.

Reaction 1:

The cyclic intermediate shown in this reaction 1 can then be converted to a silicon amine terminated surface through reaction with plasma activated nitrogen.

However, some molecules of dichlorosilane can be chemisorbed by other mechanisms. For example, surface morphology can interfere with the formation of the periodic intermediate shown in Reaction 1. Examples of other chemisorption mechanisms are shown schematically in Reaction 2.

Reaction 2

During the subsequent plasma activation of nitrogen, the remaining chlorine atoms in the intermediate species shown in reaction 2 can be released and activated by the plasma. This causes silicon nitride surface etching and potentially causes the silicon nitride film to be rough or hazy. In addition, residual chlorine atoms are physically and / or chemically resorbed to contaminate the deposited film. Such contamination changes the physical and / or electrical properties of the silicon nitride film. Furthermore, activated chlorine atoms cause etching damage to parts of the process station hardware, potentially shortening the service life of the parts of the process station.

Thus, in some embodiments, chlorosilanes can replace dichlorosilanes. This reduces membrane contamination, membrane damage and / or process station damage. An example of chemisorption of chlorosilanes is shown schematically in Reaction 3.

Reaction 3

The example shown in reaction 3 uses chlorosilane as the silicon containing reactant, but it will be appreciated that any suitable mono-substituted halosilane may be used.

As noted above, the intermediate structures shown react with a nitrogen source to form a silicon amine terminated surface of silicon nitride. For example, ammonia is activated by the plasma to form various ammonia radical species. These radical species react with the intermediate structures to form the silicon amine termination surface.

However, ammonia can be strongly physically adsorbed to the reactant delivery lines, the process station, and the surfaces of the exhaust plumbing to prolong purge and evacuation times. In addition, ammonia can be highly reactive with some gaseous silicon containing reactants. For example, a gaseous mixture of dichlorosilane (SiH ₂ Cl ₂ ) and ammonia can produce labile species such as diaminosilane (SiH ₂ (NH ₂ ) ₂ ). These species decompose in the gas phase and nucleate small particles. If ammonia reacts with the hydrogen chloride produced during chemisorption of halosilanes, smaller particles may be formed. These particles accumulate in the process station, resulting in potentially included device defects by contaminating the substrate surface, and also contaminating the process station hardware, potentially causing the tool to stop and be cleaned. Small particles also accumulate in the exhaust plumbing to clog pumps and blowers and require special ambient exhaust scrubbers and / or cold traps.

Thus, in some embodiments, substituted amines can be used as nitrogen containing reactants. For example, various radicals formed from plasma activation of alkyl substituted amines, such as t-butyl amine, may be supplied to the process station. Alkyl substituted amines, such as t-butyl amine, have a lower adhesion coefficient to process hardware than ammonia, resulting in a relatively low physical adsorption rate and a relatively low process purge time.

In addition, these nitrogen-containing reactants can form halogenated salts that are relatively more volatile than ammonium chloride. For example, t-butylammonium chloride may be more volatile than ammonium chloride. This can reduce tool downtime, device defect generation and environmental abatement expense.

Furthermore, these nitrogen containing reactants can form other amine precursors through various byproduct reactions. For example, the reaction of t-butyl amine with dichlorosilane can form BTBAS. Thus, the byproducts provide another route to form silicon nitride, thereby potentially improving membrane yield. In another example, substituted amines can provide low temperature thermally activated pathways to form silicon nitride films. For example, t-butyl amine thermally decomposes at temperatures above 300 ° C. to form isobutylene and ammonia.

While the illustrated example provided above describes silicon nitride film formation using t-butyl amine, it will be understood that any suitable substituted amine may be used within the scope of the present disclosure. In some embodiments, suitable substituted amines may be selected based on the thermodynamic and / or reaction properties of the reactants. For example, the relative volatility of the halogenated salts formed from the reactants may be considered, as the presence and selectivity of various thermal decomposition pathways at appropriate temperatures may be considered.

In addition, although the examples provided above describe silicon nitride film deposition, it will be appreciated that the principles described above may generally be applied to other film depositions. For example, some embodiments may use suitable halosilanes with suitable oxygen containing reactant species such as an oxygen plasma to deposit silicon oxide.

A non-limiting list of reactants, resulting films and membrane and process characteristic ranges is provided in Table 1.

Table 1
membrane Reactant
A Reactant
B Reactant
C Temperature (C) pressure
(torr) Refractive index
(ref.index) SiO ₂ BTBAS O ₂ - 50-400 1-4 1.45-1.47 SiN SiH ₃ Cl O ₂ - 50-400 1-4 SiO ₂ SiH (N (CH ₃ ) ₂ ) ₃ O ₂ - 50-400 1-4 1.45-1.47 SiN BTBAS NH ₃ - 50-400 1-4 1.80-2.05 SiN BTBAS - N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN BTBAS NH ₃ N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH ₃ Cl NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 SiN SiH ₃ Cl t-butyl
Amine Optionally N ₂ / H ₂ SiN SiH ₂ Cl ₂ NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH ₂ Cl ₂ t-butyl
Amine Optionally N ₂ / H ₂ SiN SiH (CH ₃ )-(N (CH ₃ ) ₂ ) ₂ NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH (CH ₃ ) ( Cl ₂ ) NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiHCl- (N (CH ₃ ) ₂ ) ₂ NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN (Si (CH ₃ ) ₂ NH) ₃ NH ₃ Optionally N ₂ / H ₂ 50-400 1-4 1.80-2.05

1 shows a time-lapse embodiment of exemplary CFD process phases for various CFD process parameters. 1 illustrates two example deposition cycles 110A, 110B, it will be understood that any suitable number of deposition cycles may be included in the CFD process to deposit the target film thickness. Exemplary CFD process parameters include, but are not limited to, the flow rate, plasma power and frequency, substrate temperature, and process station pressure of inert and reactant species. Non-limiting parameter ranges for an exemplary silicon dioxide deposition cycle using BTBAS and oxygen are provided in Table 2.

TABLE 2 Phase Reactant A Exposure Phase Reactant B Exposure Phase Removal phase Plasma activation phase Time (sec) continuation 0.25-10 0.25-10 0.25-10 BTBAS (sccm) n / a 0.5-5.0 0 0 O ₂
(slm) 1-20 1-20 1-20 1-20 Ar (slm) 1-20 1-20 1-20 1-20 Pressure (torr) 1-4 1-4 1-4 1-4 Temperature (C) 50-400 50-400 50-400 50-400 HF power (W) 0 0 0 50-2500 LF power (W) 0 0 0 0-2500

The CFD cycle typically includes an exposure phase for each reactant. During this "exposure phase", the reactants are delivered into the process chamber allowing the reactants to adsorb to the substrate surface. Typically, at the beginning of the exposure phase, the substrate surface does not adsorb a noticeable amount of reactants. In FIG. 1, in reactant A exposure phases 120A and 120B, reactant A is supplied to the process station at a controlled flow rate, thereby saturating the exposed surface of the substrate. Reactant A may be any suitable deposition reactant, such as a primary reactant or a secondary reactant. In one example where CFD forms a silicon dioxide film, reactant A may be oxygen. In the embodiment shown in FIG. 1, reactant A continues to flow throughout the deposition cycles 110A, 110B. Unlike conventional ALD processes in which membrane precursor exposures are separated to prevent gas phase reactions, reactant A and reactant B are allowed to mix in the gas phase of some embodiments of the CFD process. As noted above, in some embodiments, reactants A and B are selected to coexist in the gas phase without appreciably reacting with each other under conditions visible in the reactor prior to surface reaction activation or plasma energy application. do. In some cases, the reaction is sufficiently high so that (1) the reaction between reactants is thermodynamically favorable (ie, the free energy of the cast <0), and (2) there is a negligible reaction at the target deposition temperature. The reactants are selected to have an activation energy. Various reactant combinations that meet these criteria are specified elsewhere in this disclosure. Many such combinations include primary reactants that provide urea that is solid at room temperature and secondary reactants that do not. Examples of auxiliary reactants used in some combinations include oxygen, nitrogen, alkyl amines and hydrogen.

Continued supply of reactant A to the process station allows reactant A to be turned on, then stabilized, then exposed to the substrate, then turned off and finally removed from the reactor, compared to ALD process. Flow rate onset and stabilization times can be shortened or eliminated. Although the embodiment shown in FIG. 1 illustrates that reactant A exposure phases 120A, 120B have a constant flow rate, suitable reactant A flows may be used, including variable flow rates, within the scope of the present disclosure. In addition, although React A is illustrated as having a constant flow rate during the entire CFD cycle (deposition cycle 110A), this need not be the case. For example, the flow rate of reactant A may decrease during the reactant B exposure phases 140A, 140B. This increases the partial pressure of reactant B, thereby increasing the force driving the adsorption of reactant B onto the substrate surface.

In some embodiments, reactant A exposure phase 120A may have a period that exceeds the substrate surface saturation period of reactant A. For example, the embodiment of FIG. 1 includes an exposure period 130 after reactant A saturation within the reactant A exposure phase 120A. Optionally, reactant A exposure phase 120A includes a controlled flow rate of inert gas. Exemplary inert gases include, but are not limited to, nitrogen, argon, and helium. Inert gas provides faster delivery of sweep gas to remove process gas from pressure and / or temperature control of the process station, vaporization of the liquid precursor, precursor and / or process station and / or process station plumbing May be provided to assist.

In the reactant B exposure phase 140A of the embodiment shown in FIG. 1, reactant B is fed to the process station at a controlled flow rate, thereby saturating the exposed surface of the substrate. In one exemplary silicon dioxide film, reactant B may be BTBAS. Although the embodiment shown in FIG. 1 illustrates that reactant B exposure phase 140A has a constant flow rate, suitable reactant B flows may be used including variable flow rates within the scope of the present disclosure. It will also be appreciated that the reactant B exposure phase 140A may have any suitable time period. In some embodiments, reactant B exposure phase 140A may have a period above the substrate surface saturation period of reactant B. For example, the embodiment of FIG. 1 includes an exposure period 150 after reactant B saturation within the reactant B exposure phase 140A. Optionally, reactant B exposure phase 140A includes a controlled flow rate of a suitable inert gas as described above, which controls the pressure and / or temperature of the process station, vaporizes the liquid precursor, faster delivery of the precursor. And back diffusion of the process station gases. In the embodiment shown in FIG. 1, the inert gas continues to flow to the process station throughout the reactant B exposure phase 140A.

In some embodiments, plasma activation of deposition reactions enables lower deposition temperatures than in thermally activated reactions, thereby reducing the available thermal cost consumption of the integrated process. For example, in some embodiments, a plasma activated CFD process may occur at room temperature.

Although the CFD process embodiment shown in FIG. 1 is plasma activated, it will be appreciated that other nonthermal energy sources may be used within the scope of the present disclosure. Non-limiting examples of such nonthermal energy sources include, but are not limited to, ultraviolet lamps, downstream or remote plasma sources, inductively coupled plasmas, and microwave surface wave plasmas.

In addition, although many of the examples described herein included two reactants (A and B), it will be understood that any suitable number of reactants may be used within the scope of the present disclosure. In some embodiments, a single reactant and an inert gas used to supply plasma energy for the surface decomposition reaction of the reactant may be used. Alternatively, as described above in the context of feature 7, some embodiments may use three or more reactants to deposit the film.

In some scenarios, the surface adsorbed B species exist as discrete islands on the substrate surface, thereby making it difficult to achieve surface saturation of reactant B. Various surface conditions can retard the nucleation and saturation of reactant B on the substrate surface. For example, ligands released upon reactant A and / or B adsorption may block some surface active sites to prevent subsequent adsorption of reactant B. Thus, in some embodiments, continuous adlayers of reactant B by controlling the flow of reactant B into the process station and / or discretely pulsing reactant B during reactant B exposure phase 140A. adlayers) may be provided. This can provide additional time for surface adsorption and desorption processes while conserving reactant B as compared to certain flow scenarios.

Additionally or alternatively, in some embodiments, one or more removal phases may be included between successive exposures of reactant B. For example, the embodiment of FIG. 2 schematically shows an example CFD process timing diagram 210 during the deposition cycle 210. In reactant B exposure phase 240A, reactant B is exposed to the substrate surface. Subsequently, in removal phase 260A, reactant B is turned off and gaseous species of reactant B are removed from the process station. In one scenario, gaseous reactant B may be removed by a continuous flow of reactant B and / or inert gas. In another scenario, gaseous reactant B can be removed by venting the process station. Gas phase reactant B removal may shift the adsorption / desorption process equilibrium of adsorbed B to desorb adsorbed B ligands to promote adsorbed B discontinuous islands and promote surface rearrangement. In reactant B exposure phase 240B, reactant B is once again exposed to the substrate surface. Although the embodiment shown in FIG. 2 includes one instance of a reactant B removal and exposure cycle, it will be understood that any suitable number of iterations of alternating removal and exposure cycles may be employed within the scope of the present disclosure.

Returning to the embodiment of FIG. 1, prior to activation by plasma in phase 180A, gaseous reactant B may be removed from the process station in the removal phase in some embodiments. The CFD cycle may include one or more sweep phases in addition to the exposure phases described above. By sweeping the process station, gaseous reactions in which reactant B is affected by plasma activation are prevented. It is also possible to remove surface adsorbed ligands by cleaning the process station, which can contaminate the membrane if not removed. Exemplary removal or cleaning gases include, but are not limited to, argon, helium, and nitrogen. In the embodiment shown in FIG. 1, the removal gas in the removal phase 160A is supplied by an inert gas stream. In some embodiments, removal phase 160A may include one or more exhaust subphases for evacuating the process station. Alternatively, it will be appreciated that the removal phase 160A may be omitted in some embodiments.

The removal phase 160A can have any suitable period. In some embodiments, increasing the flow rate of one or more removal gases can reduce the duration of removal phase 160A. For example, the removal gas flow rate may be adjusted according to various reactant thermodynamic properties and / or geometric characteristics of the process station and / or process station plumbing to modify the duration of the removal phase 160A. In one non-limiting example, the duration of the removal phase can be optimized by adjusting the removal gas flow rate. This can improve substrate throughput by reducing the deposition cycle time.

Typically the CFD cycle includes an "activation phase" in addition to the exposure phase and the optional removal phase as described above. The activation phase serves to activate the reaction of one or more reactants adsorbed on the substrate surface. In the plasma activation phase 180A of the embodiment shown in FIG. 1, plasma energy may be provided to activate the surface reaction between surface adsorbed reactants A and B. For example, the plasma may directly or indirectly activate the gaseous molecules of reactant A such that reactant A radicals are formed. These radicals then react with the surface-adsorbed reactant B to give rise to film forming surface reactions. Plasma activation phase 180A ends deposition cycle 110A, which in the embodiment of FIG. 1 is followed by deposition cycle 110B followed by deposition cycle 110B and reactant A exposure phase 120B. ).

In some embodiments, the plasma ignited in the plasma activation phase 180A may be formed directly above the substrate surface. This can increase the plasma density to increase the surface reaction rate between reactant A and reactant B. For example, a plasma for a CFD process can be generated by applying a radio frequency field to a low pressure gas using two capacitively coupled plates. In other embodiments, remotely generated plasma may be generated outside the main reaction chamber.

Any suitable gas can be used to generate the plasma. In a first example, an inert gas such as argon or helium may be used to form the plasma. In a second example, a reactant gas such as oxygen or ammonia can be used to form the plasma. In a third example, a removal gas such as nitrogen can be used to form the plasma. Of course, a combination of gases of this category may be used. Ionizing the gas between the plates by the RF field ignites the plasma and creates free electrons within this plasma discharge region. These free electrons are accelerated by the RF field and collide with gas phase reactant molecules. This collision of free electrons and reactant molecules forms radical species that participate in the deposition process. It will be appreciated that the RF field may be coupled through any suitable electrode. Non-limiting examples of such electrodes include a process gas distribution showerhead and a substrate support pedestal. It will be appreciated that the plasma for the CFD process may be formed by one or more of any suitable method besides capacitively coupling the RF field to the gas.

Plasma activation phase 180A may have any suitable period. In some embodiments, the plasma activation phase 180A may have a period of time beyond which the plasma activated radicals interact with all exposed substrate surfaces and adsorbates, thereby forming a continuous film on the substrate surface. have. For example, the embodiment shown in FIG. 1 includes a plasma exposure period 190 after saturation within the plasma activation phase 180A.

As will be explained more fully below and as discussed above in the discussion of feature 4 described above, prolonging the plasma exposure time and / or providing a plurality of plasma exposure phases provides bulk and / or surface proximal portions of the deposited film. Post-reaction treatment of near-surface portions may be provided. In one scenario, the surface may be prepared for adsorption of reactant A by reducing surface contamination by plasma treatment. For example, a silicon nitride film formed from the reaction of a silicon containing reactant and a nitrogen containing reactant may have a surface that resists adsorption of subsequent reactants. Treatment of this silicon nitride film with plasma can produce hydrogen bonds that facilitate subsequent adsorption and reaction events.

In some embodiments, film properties, such as film stress, dielectric constant, refractive index, etch rate, can be adjusted by changing plasma parameters, which will be discussed in more detail below. Table 3 provides an exemplary list of various film properties for three exemplary CFD silicon dioxide films deposited at 400 ° C. For reference, Table 3 further includes film information for an exemplary PECVD silicon dioxide film deposited at 400 ° C.

TABLE 3 SiO ₂
fair Deposition Rate (Angstrom / Cycle) NU
((Max minutes) /
Average) NU
(1 sigma) Refractive index Membrane stress
(MPa) dielectric
a constant Wet
etching
Rate ratio 1 sec.
200 W
O ₂ plasma
(Only HF) 0.9 5% 2% 1.456 -165 6.6 7.87 10 sec. 1000 W
O ₂ plasma
(Only HF) 0.6 5% 2% 1.466 -138 3.9 1.59 10 sec. 1000 W
O ₂ plasma
(HF / LF) 0.6 12% 5% 1.472 -264 3.9 1.55 PECVD SiO ₂ 600 3% One% 1.477 -238 4.2 5.28

For example, FIG. 3 schematically shows a CFD process timing diagram 300 that includes a deposition phase 310 and a subsequent plasma processing phase 390. It will be appreciated that any suitable plasma may be used during this plasma treatment phase. In a first scenario, a first plasma gas is used during activation in the deposition cycle and a second, different plasma gas is used during the plasma treatment phase. In a second scenario, a second, different plasma gas may supplement the first plasma gas during the plasma treatment phase. Non-limiting parameter ranges during the in-situ plasma processing cycle are provided in Table 4.

Table 4 Phase plasma
process
remove
Phase plasma
process
Activation
Phase Duration (sec) 0.25-10.0 0.25-10.0 Ar (sccm) 1-20 1-20 Pressure (torr) 1-4 1-4 Temperature (C) 50-400 50-400 HF power (W) 50-2500 50-2500 LF power (W) 0-2500 0-2500

In the plasma activation phase 380 shown in FIG. 3, the substrate surface is exposed to the plasma to activate the film deposition reaction. As shown in the embodiment shown in FIG. 3, in the plasma treatment removal phase 390A, the process station continues to flow reactant A and an inert gas, which may be an auxiliary reactant such as, for example, oxygen. Cleaning the process station can remove volatile contaminants from the process station. Although the removal gas is shown in FIG. 3, it will be appreciated that any suitable reactant removal method may be used within the scope of the present disclosure. In the plasma treatment activation phase 390B, the plasma is ignited to treat the bulk and / or surface proximal regions of the newly deposited film.

Although the embodiment of FIG. 3 includes one instance of a CFD cycle that includes a plasma treatment phase, it will be understood that any suitable number of iterations may be used within the scope of the present disclosure. It will also be appreciated that one or more plasma processing cycles may be inserted (regularly or irregularly) at intervals between normal deposition cycles. For example, FIG. 4 illustrates an embodiment of a CFD process timing diagram 400 that includes one plasma treatment phase inserted between two deposition cycles. Although the embodiment of FIG. 4 includes one plasma processing cycle inserted between two deposition cycles, it will be understood that any suitable number of deposition cycles may precede or follow one or more plasma processing cycles. For example, in a scenario where plasma processing is used to change film density, a plasma processing cycle may be inserted after every tenth deposition cycle. In scenarios where plasma treatment is used to prepare the surface for adsorption and reaction events, the plasma treatment phase may be included in every CFD cycle, for example after each CFD deposition phase.

Plasma treatment on the deposited film can change one or more physical properties of the film. In one scenario, the plasma treatment can densify the newly deposited film. Densified films may be more resistant to etching than undensified films. For example, FIG. 5 shows an embodiment of a graph 500 comparing the etch rate of exemplary CFD treated silicon dioxide films for thermally grown silicon dioxide films. The exemplary film embodiments of FIG. 5 were deposited in the 50-400 ° C. temperature range by CFD processes 502, 504. For reference, the relative etch rates for silicon dioxide spacer films and USG (undoped silicate glass) deposited by a PECVD process are shown in FIG. 5. Films 502 produced by a process comprising a high frequency oxygen plasma activation phase of 1 second in each deposition cycle were subjected to DHF for films 504 produced by a process comprising a high frequency oxygen plasma activation phase of 10 seconds in each deposition cycle. (dilute hydrofluric acid) The resistance to wet etching (100: 1 H ₂ O: HF) is approximately 0.5 times. Accordingly, it will be appreciated that the etching rate of the deposited film may vary by varying various aspects of the plasma activation phase and / or including one or more plasma processing cycles.

In other scenarios, the film plasma treatment can change the stress characteristics of the film. For example, FIG. 6 shows an embodiment of the correlation 600 between the wet etch rate ratio and film stress for exemplary CFD silicon dioxide films. In the embodiment shown in FIG. 6, the compressive film stress can increase when the wet etch rate ratio decreases, for example by extending the plasma exposure period.

In other scenarios, the deposited film plasma treatment may include other film components (eg, hydrogen, nitrogen and / or carbon in the case of an exemplary silicon dioxide film) (eg, exemplary). In the case of silicon dioxide films it may provide transient differential removal for silicon and / or oxygen). For example, FIG. 7 illustrates an embodiment of a correlation 700 between deposition temperature, plasma exposure period, and film contamination concentration. In the embodiment shown in FIG. 7, a CFD silicon dioxide film 704 deposited at 50 ° C. and having an oxygen plasma activation phase of 10 seconds is deposited at the same temperature but with an oxygen plasma activation phase of 1 second 702. Lower hydrogen and carbon concentrations are seen. Modifying the contaminant concentration in the membrane can modify the electrical and / or physical properties of the membrane. For example, by controlling the carbon and / or hydrogen concentration, the dielectric constant and / or film etch rate of the film can be controlled. Accordingly, it will be appreciated that a method of changing film composition may be provided by changing various aspects of the plasma activation phase and / or including one or more plasma processing cycles.

Although the plasma treatment described above relates to an oxygen plasma treatment, it will be appreciated that any suitable plasma treatment may be employed without departing from the scope of this embodiment. For example, in some embodiments, substituted amines can be used as nitrogen containing reactants in a suitable CFD process instead of NH ₃ . Replacing NH ₃ with a substituted amine (eg, an alkyl amine such as t-butyl amine) for conformal SiN deposition provides a number of advantages, but in some cases, the deposited film is derived from an alkyl amine reactant. Carbon residues (eg, carbon residues from three methyl groups each comprising a t-butyl amine molecule (NH ₂ — (CH ₃ ) ₃ )). Carbon in such films can cause electrical leakage, making the film unsuitable for some dielectric barrier applications.

Thus, in some embodiments, it is possible to ignite a halogen plasma during SiN film deposition to reduce the carbon residues in the SiN film to thereby relatively increase the insulating properties of the film. In some instances, carbon residue reduction can be easily observed in the FTIR spectrum. For example, SiN: C—H levels may be reduced from approximately 10% atomic level to approximately 1% atomic level.

Thus, in some embodiments, the silicon nitride film may be deposited in a CFD process using one or more instances of hydrogen plasma treatment and an alkyl amine or a mixture of alkyl amines contained within a nitrogen containing reactant. It will be appreciated that any suitable hydrogen plasma may be used within the scope of the present disclosure. Thus, in some embodiments, a mixture of H ₂ and He or Ar or other active hydrogen atoms or active H atoms generated by a remote plasma source may be used to treat the deposited film. In addition, in some embodiments, the carbon concentration of this film may be adjusted to any suitable concentration by varying one or more of the number of processing pulses, their duration, plasma processing intensity, substrate temperature, and processing gas composition.

While the above-described hydrogen plasma treatment is for silicon nitride films, it will be understood that suitable hydrogen plasma treatment can be used to adjust the carbon concentration of other CFD deposited films including, but not limited to, SiOx, GeOx, and SiOxNy. will be.

Certain embodiments disclosed herein relate to ultraviolet treatment (which may or may not be plasma treatment) of oxide CFD films. This ultraviolet treatment reduces defects in the oxide to improve electrical properties such as CV characteristics of the gate dielectric. Device and package applications using CFD oxides that can benefit from this process include thin thermal oxides formed after through silicon vias, logic technologies using gate oxides, shallow trench isolation (STI), and STI-photoresist stripping. Sacrificial oxide prior to P well implantation (eg ˜60 μs), thermal oxide growth after “well”, gate / channel oxide, DRAM PMD PECVD oxide.

In some cases, untreated CFD oxide films were believed to have relatively poor electrical performance due to the fixed charge in the deposited film. For example, some films have been found to have significant in-wafer Vfb variations. These problems can be solved through post deposition treatment using ultraviolet radiation and / or thermal annealing in the presence of hydrogen. This process passes defects associated with (1) a fixed charge at the oxide to silicon interface, or (2) a fixed charge in the deposited dielectric film, or (3) a fixed charge (surface charge) at the air to oxide interface. It is believed to reduce bastion and / or reduction. Using this treatment, the Vfb deviation for the oxide so deposited was narrowed from 8.3 V to about 1.5 V after UV curing.

While these embodiments relate primarily to improving oxide films, the disclosed method can generally be applied to dielectric growth, metal growth, or metal to dielectric interface treatment. Specific dielectric materials include, for example, silicon oxides, silicon carbides, silicon oxycarbides, silicon nitrides, silicon oxynitrides, and ashable hard mask materials including doped silicon oxide.

Examples of processes that can be applied to improve dielectric properties include:

(A) Post deposition treatment of dielectric films synthesized by CFD using UV curing and subsequent hydrogen annealing. In the simplest embodiment, UV treatment can be used alone to reduce the fixed charge.

H ₂ in the presence of a forming _{gas, NH 3 - - (B)} He, H 2, Ar, N 2, H 2 / N 2 plasma, N ₂ - plasma, N ₂ / H ₂ - plasma, NH ₃ - plasma, Pretreatment of the substrate prior to CFD dielectric film deposition using treatments including Ar-plasma, He-plasma, He annealing, H ₂ -annealing, NH ₃ -annealing, and UV curing. Plasma processing can be realized using various plasma generators including, but not limited to, microwave plasma generators, ICP-remote plasma generators, direct plasma generators, and the like.

H ₂ in the presence of a forming _{gas, NH 3 - - (C)} He, H 2, Ar, N 2, H 2 / N 2 plasma, N ₂ - plasma, N ₂ / H ₂ - plasma, NH ₃ - plasma, Simultaneous treatment (cure during deposition) using treatments including Ar-plasma, He-plasma, He annealing, H ₂ -annealing, NH ₃ -annealing, and UV curing. Plasma processing can be implemented using various plasma generators including, but not limited to, microwave plasma generators, ICP-remote plasma generators or direct plasma generators, or other plasma generators known to those skilled in the art. Although not limited to the following, isotropic treatment and directional treatment may be applied, including remote plasma, UV exposure, direct plasma, and microplasma treatment. Exemplary methods include intermittent treatment of the film between CFD cycle groups. One CFD cycle group can vary from about 1 to 10000 cycles. Typical scenarios include (1) five cycles of CFD oxide growth, (2) one or more film treatments using any of the methods described above, and (3) five cycles of CFD oxide film growth. Include. This method can be used to grow films of any desired thickness.

(D) UV treatment concomitantly imparted by any of the plasmas listed above (eg, helium plasma emits ultraviolet light).

One example of an in-situ “cure” procedure during a CFD cycle includes the following operations:

UV treatment through helium plasma

BTBAS dose

Purge

O ₂ / Ar-RF plasma activation

- Fudge

Repeating the steps 1 to 5 times to produce the target thickness film

A range of UV curing conditions can be used in any of the situations listed above. In general, the pedestal temperature will be maintained at a temperature of 250 to 500 ° C. during curing. In many device manufacturing applications, the upper temperature limit will be 450 or 400 ° C. The atmosphere used during curing may be active or inert. Examples of gases that may be present during curing may include helium, argon, nitrogen, forming gas and ammonia. The flow rate of these gases is about 2 to 20000 sccm, preferably about 4000 to 18000 sccm. The power of the UV lamp can be for example about 2 to 10 kW, preferably about 3.5 to 7 kW. Suitable periods of exposure to UV from such sources can be from about 20 seconds to 200 seconds (eg, about 90 seconds). Finally, the pressure can be maintained at a level of about 0 torr to about 40 torr.

In certain embodiments, effective treatment of CFD oxide has been obtained using the following conditions:

Pedestal temperature = 400 ℃

Atmosphere = helium

Pressure = 40 Torr Helium

Flow rate = 10000 sccm

In some embodiments, thermal annealing for the oxide is performed after the UV curing operation. In one example, the following conditions were used in thermal annealing:

Pedestal temperature = 400 ℃

Atmosphere = hydrogen + nitrogen

Pressure = 2.5 torr

Flow rate = hydrogen: 750 sccm; Nitrogen: 3000 sccm

The physical and electrical properties of the deposited film can also be changed by adjusting other process parameters such as deposition temperature. For example, correlation 700 of the embodiment shown in FIG. 7 illustrates an exemplary relationship between CFD film deposition temperature and film contaminant concentration. As the film deposition temperature increases, the film contaminant concentration decreases. In another example, in the embodiment shown in FIG. 5, as discussed above, the wet etch rate ratio of exemplary silicon dioxide CFD films decreases as the deposition temperature increases. Other deposition parameters that can be used to adjust film properties include RF power, RF frequency, pressure and flow rate. Further, in some embodiments, the membrane properties can be changed by selecting reactants. For example, the hydrogen concentration of the silicon dioxide film can be reduced by using tetra isocyanate silane (TICS) as the silicon containing reactant and / or by using nitrous oxide as the oxygen containing reactant.

It will be appreciated that the physical film properties and / or electrical film properties as described above may provide opportunities to adjust device performance and yield and to modify aspects of device manufacturing process integration. In one non-limiting example, the ability to adjust the etch rate characteristics of a CFD silicon dioxide film can make this film a candidate for etch stop applications, hard mask applications, and other process integration applications. Thus, various embodiments of CFD generated films can be used throughout the semiconductor device manufacturing process integrated herein.

In one scenario, the CFD process may deposit a conformal silicon dioxide film on a non-planar substrate. For example, CFD silicon dioxide films can be used for gap filling of structures, such as trench filling of shallow trench isolation (STI) structures. While the various embodiments described below relate to gap fill applications, it will be understood that these are merely non-limiting and exemplary uses and that other suitable uses using other suitable membrane materials are within the scope of the present disclosure. Other uses for CFD silicon dioxide films include, but are not limited to, interlayer dielectric (ILD) use, intermetal dielectric (IMD) use, pre-metal dielectric (PMD) use, and through silicon via (TSV) use. Dielectric liner applications, resistive RAM (ReRAM) applications, and / or stacked capacitor fabrication in DRAMs.

Doped silicon oxide may be used as a diffusion source of boron dopant, phosphorous dopant or arsenic dopant. For example, BSG, PSG, or BPSG can be used. Doped CFD layers may be used to provide conformal doping in three-dimensional transistor structures such as, for example, multi-gate FinFETs and three-dimensional memory devices. Conventional ion implanters cannot readily do sidewalls, especially in high aspect ratio structures. CFD doped oxides have various advantages as diffusion sources. First, they provide high conformality at low temperatures. In comparison, low pressure CVD generated doped tetraethylorthosilicate (TEOS) is known but requires high temperature deposition and CVD and PECVD doped oxide films at pressures below atmospheric pressure are possible at low temperatures but have inadequate conformality. Doping conformality is important, but the conformality of the membrane itself is also important because this membrane typically has a sacrificial use and then needs to be removed. Non-conformal films typically have more problems in removal, that is, some areas may be over etched. In addition, CFD provides an extremely well controlled doping concentration. As mentioned above, the CFD process can provide several undoped oxide layers followed by a single doped layer. The doping level can be tightly controlled by the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled using, for example, a dopant source that has significant steric hindrance. In addition to conventional silicon-based microelectronic devices, other uses of CFD doping include microelectronic and optoelectronic devices such as group III-V semiconductors such as GaAs, group II-VI semiconductors such as HgCdTe, and flat panel displays and electrical Discoloration techniques.

Some gap filling processes include two film deposition steps performed on different deposition tools, requiring vacuum breakdown and air exposure between deposition processes. 8 schematically illustrates an exemplary non-planar substrate 800 that includes a plurality of gaps 802. As shown in FIG. 8, the gaps 802 can have variable aspect ratios that can be defined as the ratio to the gap width W of the gap depth H for each gap 802. For example, a logic region of an integrated semiconductor device may have variable gap aspect ratios corresponding to different logic device structures.

As shown in FIG. 8, the non-planar substrate 800 is covered by a conformal thin film 804. While the conformal film 804 has fully filled gaps 802A, the gaps 802B and 802C remain open. The process time can be extended if the gaps 802B, 802C are to be closed using a conformal film. Thus, in some ways, a thick film may be ex-situ deposited using higher deposition rate processes such as CVD and / or PECVD methods. However, ex-situ deposition of gap fill films can degrade wafer throughput in a production line. For example, substrate handling and transfer time between deposition tools can reduce the number of substrate processing activities during the production period. This lowers production line throughput and may require the installation and maintenance of additional process tools on the production line.

In addition, gap 802C may have an aspect ratio suitable for gas phase deposition processes, while gap 802B may result in incomplete filling by higher deposition rate processes to form keyhole shaped voids. It may have an aspect ratio. For example, FIG. 10 shows an exemplary high aspect ratio structure 1000 formed in a substrate 1002. As shown in FIG. 10, the bread loafing effects during the deposition of the thick film 1006 produce a keyhole shaped void 1008. This keyhole shaped void can be reopened in subsequent processes and filled with conductive films, which causes a device short circuit.

Some ways of dealing with high aspect ratio gaps, such as gap 802B, include providing device design rules that suppress the generation of such gaps. However, these device design rules require additional masking steps and make device design difficult and / or increase the integrated semiconductor device area, which can increase manufacturing costs. Thus, in some embodiments, the CFD process may include an in-situ transition from a CFD process to a CFD process or a PECVD process. For example, FIG. 9 shows an embodiment of a CFD process timing diagram 900 divided into three phases. CFD process phase 902 illustrates an example CFD process cycle. For clarity, although a single CFD process cycle is shown in the embodiment shown in FIG. 9, it will be appreciated that any suitable number of CFD process cycles and plasma processing cycles may be included in the CFD process phase 902. Transition phase 904 follows CFD process phase 902. As shown in the embodiment of FIG. 9, transition phase 904 includes aspects of both a CFD process and a PECVD process. Specifically, reactant B is provided to the process station after the end of reactant B exposure phase 904A such that both reactant A and reactant B are in gaseous phase in the plasma activation phase 904B. This may provide PECVD type gas phase reactions that occur simultaneously with CFD type surface reactions. Although transition phase 904 includes only one iteration of reactant B exposure phase 904A and plasma activation phase 904B, it will be understood that any suitable number of iterations may be included within the transition phase.

In some embodiments, the plasma generator may be controlled to provide interrupted pulses of plasma energy during the plasma activation phase 904B. For example, the plasma may be pulsed at one or more frequencies including, but not limited to, frequencies of 10 Hz to 150 Hz. This can improve step coverage by reducing the directionality of ion bombardment compared to continuous plasma. In addition, this can reduce ion collision damage of the substrate. For example, photoresist substrates can be eroded by ion bombardment during successive plasmas. By pulsing the plasma energy, photoresist erosion can be reduced.

In the embodiment shown in FIG. 9, the flow rate of reactant B during the plasma activation phase 904B is less than the flow rate of reactant B during the reactant B exposure phase 904A. Thus, reactant B is “trickled” into the process station during the plasma activation phase 904B. This can provide a gas phase PECVD reaction that supplements the CFD type surface reaction. However, it will be appreciated that in some embodiments, the flow rate of reactant B may vary over the course of the transition phase or during a single plasma activation phase. For example, in a transition phase involving two repetitions of reactant B exposure and plasma activation, the flow rate of reactant B during the first plasma activation phase may be lower than the flow rate of reactant B during the second plasma activation phase. . Changing the flow rate of reactant B during the plasma activation phase 904B may provide a smooth transition from the step coverage characteristics of the CFD process phase 902 to the deposition rate characteristics of the PECVD process phase 906.

In some embodiments, the CFD process may include an in-situ etch to selectively remove the reentrant portion of the deposited film. Non-limiting parameter ranges for an exemplary silicon dioxide deposition process including in-situ etching during a gap filled CFD process are provided in Table 5.

Table 5 Phase Reactant A Exposure Phase Reactant B Exposure Phase remove
Phase plasma
Activation
Phase
etching
Phase Time (sec) Continuous 0.25-10.0 0.25-10.0 0.25-10.0 0.25-10.0 BTBAS (sccm) - 0.5-2.0 0 0 0 O ₂
(slm) 1-20 1-20 1-20 1-20 0 NF ₃
(sccm) 0 0 0 0 1-15 Ar (slm) 1-20 1-20 1-20 1-20 1-20 Pressure (torr) 1-4 1-4 1-4 1-4 1-4 Temperature (C) 50-400 50-400 50-400 50-400 50-400 HF power (W) 0 0 0 50-2500 50-2500 LF power (W) 0 0 0 0-2500 0-2500

11 shows an embodiment of a CFD process timing diagram 1100 that includes a deposition phase 1102, an etch phase 1104, and a subsequent deposition phase 1106. In the deposition phase 1102 of the embodiment shown in FIG. 11, a film is deposited on the exposed surface of the substrate. For example, deposition phase 1102 may include one or more CFD process deposition cycles.

In the etching phase 1104 of the embodiment of FIG. 11, reactant A and reactant B flow are stopped and etching gas is introduced into the process station. One non-limiting example of an etching gas is NF ₃ (nitrogen trifluoride). In the embodiment shown in FIG. 11, the etching gas is activated by the plasma ignited during the etching phase 1104. Various process parameters such as process station pressure, substrate temperature, etch gas flow rate can be adjusted during the etch phase 104 to selectively remove reentrant portions of the film deposited on the non-planar substrate. Any suitable etching process may be employed within the scope of the present disclosure. Other exemplary etching processes include, but are not limited to, reactive ion etching, non-plasma vapor phase etching, solid phase sublimation, and adsorption and directivity activation (eg, by ion bombardment) of the etching species.

In some embodiments, incompatible gaseous species may be removed from the process station before and after etching the film. For example, the embodiment of FIG. 11 includes a continuous flow of inert gas after reactant A and reactant B are stopped and after the etch gas is stopped during etching phase 1104.

At the end of the etching phase 1104, the deposition phase 1106 begins to fill more gaps on the non-planar substrate. Deposition phase 1106 may be any suitable deposition process. For example, deposition phase 1106 may include one or more of a CFD process, a CVD process, a PECVD process, and the like. Although the embodiment of FIG. 11 shows a single etch phase 1104, it will be appreciated that a plurality of in-situ etch may be inserted at intervals between multiple deposition phases of any suitable type during a gap fill process.

12A-12C illustrate exemplary cross-sections of a non-planar substrate at various phases of the in-situ deposition process and the in-situ etch process described above. 12A shows a cross-section of an exemplary non-planar substrate 1200 that includes a gap 1202. The gap 1202 is covered with a thin film 1204. Thin film 1204 is substantially conformal with gap 1202 but thin film 1204 includes portion 1206 reentering near the top of gap 1202.

In the embodiment shown in FIG. 12B, the reentrant portion 1206 of the thin film 1204 is selectively removed such that the upper region 1204A of the thin film 1204 is thinner than the lower region 1204B. Selective removal and / or sidewall angle adjustment of this reentrant portion can be achieved by imparting mass transfer limitations and lifetime limitations on active etch species. In some embodiments, selective etching at the top of the gap 1202 may adjust the sidewall angle of the gap 1202 such that the gap 1202 is wider at the top than at the bottom. This may further reduce the bread shaping effect in subsequent deposition phases. In the embodiment shown in FIG. 12C, after the subsequent deposition phase, the gap 1202 is almost filled so that no voids are visible.

Another embodiment of an in-situ etch process is shown in FIG. 15, which shows through silicon via (TSV) 2500 for a copper electrode. Some exemplary TSVs have a depth of approximately 105 microns and a diameter of approximately 6 microns, providing an aspect ratio of approximately 17.5: 1, and may have a thermal budget ceiling of approximately 200 ° C. As shown in the embodiment of FIG. 15, the through silicon via 2500 is covered by a dielectric isolation layer 2502 to electrically isolate the silicon substrate from the metal filled vias. Exemplary dielectric isolation layer materials include, but are not limited to, silicon dioxide, silicon nitride, low k dielectric materials. In some embodiments, the exemplary etching processes described above can be supplemented by physical sputtering of the reentrant portion using a suitable sputter gas such as argon.

Other exemplary uses for CFD films include, but are not limited to, conformal low k films for back-end-of-line interconnect isolation applications (eg, a k value of approximately 3.0 or less in some non-limiting examples). ), Conformal silicon nitride films, conformal antireflective layers and copper adhesion and barrier layers for etch stop and spacer layer applications. Numerous other compositions of low k dielectrics for the BEOL process can be fabricated using CFD. Examples include silicon oxide, oxygen doped carbide, carbon doped oxide, oxynitride and the like.

In another example, in one integrated process scenario, a silicon dioxide spacer layer may be deposited on the photoresist “core”. Using a photoresist core instead of another core material (such as a silicon carbide layer) can eliminate the patterning step in the integrated process. This process involves patterning the photoresist using normal lithographic techniques and then depositing a thin layer of CFD oxide directly onto this core. Subsequently, a directional dry etch is used such that the CFD oxide film is removed on top of the patterned photoresist and the oxide remains only along the sidewalls of the patterned photoresist (considering trenches). At this stage, simple ashing is used to remove the exposed core remaining behind the CFD oxide. So far, there has been a single photoresist line, but this time there are two CFD oxide lines. As such, the process doubles the pattern density, thus it is referred to as "double patterning". Unfortunately, the use of photoresist cores constrains the spacer layer deposition temperature to temperatures below 70 ° C., which may be lower than the deposition temperatures of conventional CVD, PECVD, and / or ALD processes. Thus, in some embodiments, a low temperature CFD silicon dioxide film may be deposited at temperatures below 70 ° C. It will be appreciated that other potential integrated process applications may exist for suitable CFD-generated membranes within the scope of the present disclosure. Also, in various embodiments, nitride, such as silicon nitride deposited as described above, may be used as the conformal diffusion barrier layer and / or etch stop layer at various stages of semiconductor device fabrication.

While the various CFD deposition processes described above have been directed to depositing, treating, and / or etching single film types, some CFD processes within the scope of the present disclosure may include multiple film types of in-situ deposition. Will be understood. For example, the film type of alternating layers can be deposited in-situ. In a first scenario, double spacers for the gate device can be fabricated during silicon nitride / silicon oxide spacer stack in-situ deposition. This can reduce cycle time, increase process station throughput, and suppress interlayer defects formed by potential film layer incompatibility. In a second scenario, an antireflective layer for lithographic patterning applications can be deposited as a stack of SiON or amorphous silicon and SiOC with adjustable optical properties.

In certain embodiments, the dopant containing source layer is formed by a conformal film deposition process. This layer is referred to as a “source” layer because it provides a source of dopant species (eg, dopant atoms such as boron, phosphorus, gallium and / or arsenic). The doped CFD layer serves as a source of dopant for doping the underlying structure (or the underlying structure) within the device. After the source layer is formed (or during its formation), the dopant species are driven or otherwise included into adjacent structures in the device being manufactured. In certain embodiments, the dopant species are driven by an annealing operation during or after forming the conformal dopant source film. The very conformal nature of CFD makes it possible to dope unconventional device structures, including structures that require doping in three dimensions. The CFD dopant source layer is typically formed by one or more of the processes described herein, but includes additional process operations to introduce dopant species. In some embodiments, the dielectric layer can serve as a base source layer into which dopant species are introduced.

For example, doped silicon oxide can be used as a diffusion source for boron, phosphorus, arsenic, and the like. For example, boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), and boron phosphorus doped silicate glass (BPSG) can be used.

Doped CFD layers may be employed to provide conformal doping in three-dimensional transistor structures such as, for example, multi-gate FinFETs and three-dimensional memory devices. Examples of some three-dimensional transistor structures are described in "Tri-gate (Intel)": J. Kavalieros et al., Symp. VLSI Tech Pg 50, 2006 and “FinFET”: Yamashita et al. (IBM Alliance), VLSI 2011, both of which are incorporated herein by reference in their entirety. Conventional ion implanters cannot readily do sidewalls, especially in high aspect ratio structures. In addition, in dense arrays of i3D structures, there may be a shadowing effect on the directional ion beam in the injector, which causes severe dose retention problems at inclined implant angles. do. In addition to conventional silicon-based microelectronic devices, other applications of CFD doping include Group III-V semiconductors such as GaAs, Group II-VI semiconductors such as HgCdTe, optoelectronic devices, flat panel displays, and electrical Microelectronic devices and optoelectronic devices based on electrochromic technology.

FIG. 16 illustrates a transistor having a three-dimensional gate structure, with a source and a drain formed in thin vertical structures that are difficult to dope by conventional ion implantation techniques. However, when a thin layer of n-doped or p-doped CFD oxide is formed over the vertical structure, conformal doping is achieved. Conformal doping has been observed to increase the current density in three-dimensional devices by 10-25% due to the reduced series resistance. Yamashita et al. See VLSI 2011.

CFD doped oxides as diffusion sources have various advantages. First, they provide high conformality at low temperatures. Since the doped film can be sacrificial, the non-conformal film typically faces more challenges when removed, i.e. some areas may be over etched. As explained, CFD provides very conformal films. In addition, CFD provides a very well controlled doping concentration. The CFD process can provide one or more undoped oxide layers and, if desired, a single doped layer thereafter. The doping level can be tightly controlled by the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled, for example, by using a dopant source with significant steric hindrance.

17 provides a basic CFD sequence of operations from left to right over time along the x axis. Numerous variations are supported, and this figure is provided for illustrative purposes only. Initially in this sequence, during operation A, a vapor phase oxidant is introduced into the reaction chamber containing the substrate on which the CFD films are to be deposited. Examples of suitable oxidants include elemental oxygen (eg, O ₂ or O ₃ ), nitrous oxide (N ₂ O), water, alkyl alcohols such as isopropanol, carbon monooxide, and carbon dioxide. The oxidant is usually provided with an inert gas such as argon or nitrogen.

Next, in operation B, a dielectric precursor is temporarily introduced into the reaction chamber. The duration of operation B is selected to allow the precursor to be absorbed onto the substrate surface in an amount sufficient to support one cycle of film growth. In some embodiments, the precursor saturates the substrate surface. The precursor will be selected to produce a dielectric of the desired composition. Examples of dielectric compositions include silicon oxides (including silicate glass), silicon nitrides, silicon oxynitrides and silicon oxycarbide. Examples of suitable precursors are alkylamino silanes ((SiH _x (NR ₂ ) _4-x ) where x = 1-3, and R is methyl, ethyl, propyl and butyl in various isomeric configurations Same alkyl groups), and halosilanes ((SiH _x Y _4-x ) where x = 1-3, and Y comprises Cl, Br, and I). More specific examples include bis-alkylamino silanes and steric hindered alkyl silanes. In one particular example, BTBAS is a precursor for producing silicon oxide.

During operation B, the oxidant introduced into the chamber during phase A continues to flow. In certain embodiments, the oxidant continues to flow at the same rate and same concentration as during operation A. At the end of operation B, the flow of the dielectric precursor into the chamber is terminated and operation C is initiated as shown. During operation C, the oxidant and inert gas continue to flow during operation A and operation B to purge the residual dielectric precursors in the reaction chamber.

Once purge is completed during operation C, the precursor reacts on the substrate surface to form part of the dielectric film (see operation D). In various embodiments, a plasma is applied to activate the reaction of the adsorbed dielectric precursor. In some instances, this reaction is an oxidation reaction. Some of the oxidant previously introduced into the reaction chamber may be adsorbed to the substrate surface along with the dielectric precursor to provide readily available oxidizing agents for plasma mediated surface reactions.

Operations A through D together provide a single cycle of the dielectric film deposition process. It should be understood that other CFD embodiments described herein may be used instead of the basic cycle shown herein. In the embodiment shown, the deposition cycles A to D are performed without the introduction of any dopant species. In various embodiments, the cycle represented by operations A through D is repeated one or more times in succession prior to the introduction of dopant species. This is indicated as phase E in FIG. 17. In some instances, operations A through D are repeated at least once, at least two times, or at least five times before dopant introduction.

As an example, a dielectric is deposited at a rate of about 0.5 to 1 angstroms / cycle. Through each of the one or more cycles (repeats A through D), the oxidant continues to flow into the reaction chamber.

At some point in this process, the cycles of dielectric deposition are stopped by the introduction of dopant precursor species such as diborane, for example. This is illustrated by operation F in the figure. Examples of dopants that may be provided in the dielectric source film include balance III and IV elements such as boron, gallium, phosphorus, arsenic, and other dopants. In addition to diborane, examples of dopant precursors include phosphine and other hydride sources. Non-hydride dopants such as alkyl precursors (eg trimethylgallium), halo precursors (eg gallium chloride) may be used.

In some versions, dopants are deposited at the interface with the underlying substrate and then dopant pulses are followed by intervening CFD cycles (as described) every x th of the cycles and optionally a CFD oxide film. Topped off with a protective "capping" layer that is not protected. Reference is made to the example of the resulting stack of FIG. 18.

In certain embodiments, dopant precursor species are provided in the reaction chamber without mixing with a carrier gas such as an inert gas (eg, argon) but with an oxidant or other reactants. Thus, in this basic example, the flow of oxidant stops during operation F. In other embodiments, the precursor is introduced with a reducing or oxidizing agent. In certain embodiments, the concentration of carrier dopant may be about 1: 5 to 1:20. In certain embodiments, the dopant deposition temperature is about 300 to 400 ° C. The duration of the dopant exposure step varies depending on the target dopant concentration. In certain embodiments, the exposing step is about 2.5 seconds to 7.5 seconds. In certain embodiments, 1000 sccm of diborane flows in 10000 sccm argon at 3 Torr pressure and about 400 ° C.

In certain embodiments, the dopant precursor is collected on the substrate surface by a non-surface defined mechanism. For example, precursors may be deposited by CVD type processes rather than ALD (surface adsorption limited) processes.

Optionally, the dopant precursor is purged from the reaction chamber prior to further processing of the dielectric film. In addition, as shown in FIG. 17, there is a selective activation operation G that can be mediated by plasma, elevated temperature, etc. after the dopant precursor delivery. In the example of diborane as a dopant precursor, the activation action changes the diborane into elemental boron. After operation G is completed, the process continues with an optional purge (not shown).

In one example, with respect to diborane dopant CVD, the activation operation is only temperature based decomposition producing boron. This is a temperature sensitive process. At higher temperatures, relatively short exposure times may be employed to achieve the same boron concentration per unit thickness. In contrast, in some processes (eg, those employing trimethylborane (TMB)), the activation may comprise a plasma or thermal oxidation step. In the case of some other precursors, it may be appropriate to employ a “pinning” step of holding the free boron or other dopant in place. This can be accomplished using a "pinning" plasma.

In certain embodiments, plasma activation relates to RF power at any frequency suitable for introducing carbon into the film. In some embodiments, the RF power source can be configured to control the high frequency RF power source and the low frequency RF power source independently of each other. Examples of low frequency RF powers may include about 200 to 1000 kHz frequencies, although not limited to the following. An example of high frequency RF powers may include but is not limited to about 10 to 80 MHz frequencies (eg, 13.56 MHz). Likewise, RF power supplies and matching networks operate at any suitable power to form a plasma. Examples of suitable powers include, but are not limited to, powers of about 100 to 3000 W in the case of high frequency plasma (per wafer) and powers of about 100 to 10000 W in the case of low frequency plasma. The RF power supply can operate with any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles of about 5% to 90%. Generally acceptable process pressures are about 0.5 to 5 Torr and preferably about 2 to 4 Torr. For certain plasma pretreatments (of underlying substrate) prior to exposure to dopant, pressures up to about 10 Torr (or pressures up to about 9 Torr) have proven effective.

Table 6 below summarizes the ranges of plasma parameters that can be used in various BSG processes:

fair Plasma power Plasma exposure time Process pressure CFD oxidation growth HF: 200 to 2500 W 0.1 to 5s 0.5-5 Torr Plasma pretreatment HF: 100-1000 W; LF: 0 to 1000 W 0 to 60 s 2-9 Torr

In the basic process shown, the cycles of dielectric deposition and intermittent dopant delivery (operations A to G) can be performed multiple times as shown in phase H of the figure. The actual number of times a process sequence is performed depends on the target total thickness of the film and the thickness of the dielectric film deposited per cycle and the amount of dopant included in the film. In some embodiments, operations A through G may be repeated at least two times, at least three times, at least five times, or at least ten times.

After the dielectric film is completely deposited, the dielectric film can be used as a source of dopant species for nearby semiconductor structures. This can be done by driving the dopant from the deposited film into the device structure as shown in operation I of FIG. 17. In various embodiments, this driving is done by a thermally mediated diffusion process such as annealing. In some cases, especially when employing ultra-shallow junctions (USJ), laser spike annealing may be employed.

Numerous variations on this basic process may be realized. Some of these variations have the purpose of increasing the amount of dopant available to diffuse into adjacent semiconductor structures. Other variations are designed to control the rate at which the dopant transfers from the source film into the nearby semiconductor structure. Still other variations control the direction in which dopant species diffuse. It is sometimes desirable to encourage diffusion of the dopant towards the device structure and away from the opposite side of the membrane.

In certain embodiments, the frequency at which dopants are introduced into the growing dielectric film is controlled. The high frequency of dopant precursor delivery cycles results in a large overall dopant concentration in the final dielectric film. This may also allow the dopant to be distributed relatively uniformly throughout the film. If a few dopant precursor delivery cycles are inserted in the deposition processes, the high dopant concentration regions in the film are spaced wider than in the case of high frequency of dopant delivery cycles.

In one embodiment, the dopant precursor is delivered to the growing dielectric film once for each cycle of dielectric deposition. In another embodiment, the dopant precursor is delivered once every other cycle of dielectric deposition. In another embodiment, a less frequent dopant precursor delivery cycle may be included in the process. For example, dopant species may be delivered once every third, fourth, or fifth cycle of dielectric deposition. In some cases, the dopant precursor is delivered at a frequency every five to twenty cycles of dielectric deposition.

It should be understood that the frequency of dopant precursor introduction cycles into the growing film need not be constant throughout the course of the dielectric film deposition. With this in mind, the final dielectric film may have a gradient concentration of dopant such that the average concentration of the dopant is non-uniform over the thickness of the deposited dielectric film. In one embodiment, the concentration of dopant may be greater on the side of the dielectric film in contact with the semiconductor device structure to be doped. Of course, the dopant concentration gradient in the dielectric film can be tailored as desired by carefully changing the frequency of the dopant delivery cycles throughout the entire dielectric deposition process.

Another variation on the basic process involves adjusting the amount of dopant precursor delivered during any dopant precursor delivery cycle. The amount of dopant precursor delivered during any given dopant precursor delivery cycle can be determined by the concentration of dopant precursor delivered to the reaction chamber and the period of time the substrate is exposed to the delivered dopant precursor.

As mentioned above, some dopant precursors may be provided on a growing film through a CVD type process. In such cases, the amount of dopant precursor delivered to the growing film in any given cycle is not limited by adsorption or other surface-mediated phenomena. Thus, the amount of dopant precursor provided during any dopant delivery cycle may be relatively large and controllable. The overall concentration of dopant in the dielectric film increases so that a greater amount of dopant precursor is delivered during any dopant delivery cycle. This may counteract the effect of having relatively low frequency dopant precursor delivery cycles in the overall process. However, it should be understood that increasing the amount of dopant delivered during any given dopant precursor delivery cycle may result in a relatively high local concentration of dopant in the membrane. Of course, these dopant concentration spikes can be mitigated through annealing or other operation to diffuse the dopant such that the dopant concentration is more uniform in the dielectric film.

If boron is a dopant, the flux of boron delivered during a typical boron precursor delivery cycle can vary from about 7.5 mL (Mega-Langmuirs) to 30 mL depending on the target membrane concentration, where ML is the unit of flux / exposure .

In some embodiments, the amount of dopant precursor delivered in each precursor delivery cycle is not constant over the growth of the entire dielectric film. Thus, the amount of dopant precursor delivered per cycle can be tailored to obtain a target dopant concentration gradient in the dielectric film. For example, it may be desirable to provide a greater amount of dopant precursor in a dopant precursor delivery cycle that occurs at locations in the dielectric film relatively close to the semiconductor feature to be doped. The resulting concentration gradient has a higher dopant concentration in the film regions that abut the device structure to be doped.

In some embodiments, the dopant precursor is introduced onto the substrate surface in an adsorption-limited manner. Using such precursors, the introduction of dopants into the film proceeds through an ALD type process (as opposed to the CVD type method as described above). Examples of dopant precursors attached to the substrate surface by an adsorption-mediated process include other alkyl precursors such as trimethyl borane and trimethylgallium. Examples of dopant precursors that accumulate on the substrate surface by a CVD type process include diborane, phosphine and arsine.

In general, the concentration profile of the dopant in the dielectric film can be suitably tailored. In one embodiment, the dopant concentration spikes to high levels at the edge of the film adjacent the structure to be doped. In some embodiments, the concentration increases and decreases intermittently across the film thickness. In one example, dopants (eg, boron) are provided only at the interface between the underlying substrate and the CFD dielectric layer. This dopant layer is sometimes referred to as a "spike layer". In some cases, pulsing the dopant exposure rather than employing a single-step (eg, using CVD exposure to the dopant precursor) increases the in-wafer uniformity of the dopant incorporation. Let's do it. In another example, a CFD oxide or other dielectric is intervened with the dopant (eg, boron in the doped BSG). See FIG. 18 and FIG. 19. This intervening doped dielectric may or may not be provided with a spike layer. In another example, undoped CFD oxide or other dielectric cap can serve as a protective layer. See also FIGS. 18 and 19.

The dielectric film itself in which the dopant species reside may be tailored to affect the diffusion of the dopant species through the film itself. For example, film density and / or chemical composition can be controlled to have a desired effect on dopant species diffusion. In some ways, the overall dielectric thickness has the same density or composition so that the tailored dopant diffusion properties do not change over the film thickness. In other ways, the film properties are tailored such that the dopant diffusion changes over the film thickness. The inventors have found that plasma oxidation parameters can be changed, for example, to make the CFD oxide less dense, allowing greater dopant diffusion across the CFD oxide during annealing.

In certain embodiments, the composition of the dielectric film (or process gas used to form the film) is tailored to affect dopant diffusion therein. For example, it has been found that the ratio of nitrogen to oxygen in the oxidant process gas delivered into the reaction chamber during dielectric film deposition cycles affects the ability of the dopant species to diffuse through the dielectric film. For example, the greater amount of nitrogen present in the oxidant gas used during dielectric film formation results in a dielectric film having significant resistance to dopant diffusion. In contrast, if the amount of oxygen present in the gas is relatively high, the resistance to dopant diffusion becomes much smaller. Nitrogen present in the process gas may be provided in the manner of a nitrogen containing compound (eg N ₂ O) or elemental nitrogen N ₂ . In various embodiments, the oxidant flowing continuously during the dielectric film deposition cycle includes nitrous oxide.

In certain embodiments, the dielectric film is prepared by first using an oxidant gas having a relatively high oxygen content and a relatively low nitrogen content during the initial growth phase of the dielectric film. Thereafter, after the film is partially formed on the substrate structures to be doped, the oxidant gas composition is changed to be relatively richer in nitrogen therein. For example, during the initial deposition cycle, the oxidant gas used for the dielectric film may include oxygen in its entirety. In subsequent dielectric deposition cycles, the oxidant gas is modified such that oxygen is at least partially replaced by nitrous oxide. This assumes that the purpose is to promote diffusion in the direction toward the bottom of the film and to prevent diffusion in the direction toward the top of the film, assuming that the device structure to be doped is located under the dielectric film. The inventors have found that if the nitrogen concentration level is greater than about 1E20 atoms / cc (as measured by SIMS for example), the blocking effect on boron diffusion is significant. In contrast, at a nitrogen concentration level of about 1E19 atoms / cc or less, the blocking effect on boron diffusion can be effectively eliminated.

Considering the film composition itself, the nitrogen content in the film may vary from a relatively low level in the portion of the film near the substrate structure to be doped to a relatively high level in the portion opposite the structure to be doped.

The deposition temperature employed during the dielectric film formation also affects the ability of the dopant to diffuse in the film. In general, it was found that dielectrics deposited at relatively low temperatures by CFD processing generally enabled relatively high dopant diffusion rates. Examples of relatively low temperatures associated with relatively high dopant diffusion rates are temperatures in the range of about 300 to 400 degrees Celsius or more specifically in the range of about 350 to 400 degrees Celsius. Of course, this temperature range depends on the choice of dielectric precursors and other deposition parameters. While they can be employed with a number of precursors, they are particularly suitable for using BTBAS as a dielectric precursor.

In contrast, dielectrics deposited at relatively high temperatures tend to resist diffusion of dopant species. In the case of using BTBAS as the dielectric precursor, the relatively high temperature examples associated with the relatively low dopant diffusion rate are temperatures in the range of about 350 to 400 ° C or more specifically in the range of about 300 to 380 ° C. Of course, this temperature range can be applied to other precursors. It is also true that high temperatures generally provide dense films that impede dopant diffusion, but may control diffusion and / or density through other parameters such as power and RF exposure time during plasma oxidation. Examples of basic parameters that can be employed during CFD oxide growth include (1) a high frequency plasma at about 200 to 2500 watts (for a 300 mm wafer) and (2) about 0.2 to 1.5 seconds, typically without a low frequency plasma. Plasma exposure time.

In certain embodiments, a relatively low temperature is employed to deposit a dielectric film adjacent to the device structure to be doped and a higher temperature is employed to deposit a portion of the dielectric film further away from the structure. In certain embodiments, the temperature employed during deposition of the entire dielectric film varies and the nitrogen to oxygen ratio in the oxidant gas also changes during the deposition process. As such, the dopant diffusion properties of the resulting dielectric film may vary with an exaggerated degree over the thickness of the film.

In various embodiments, the deposition temperature is controlled by heating and / or cooling the pedestal or chuck holding the substrate during CFD. Examples of suitable pedestals are disclosed in US patent application Ser. No. 12 / 435,890 (published 2009-0277472), filed May 5, 2009, and US patent application Ser. No. 13 / 086,010, filed April 13, 2011, All of which are incorporated herein by reference in their entirety.

In certain embodiments, the device structure on the substrate surface to be doped is pretreated prior to the deposition of the dielectric film or dopant precursor. In one example, the pretreatment includes exposure to a plasma, such as a reducing plasma. This treatment may be appropriate, for example, when the substrate features to be doped comprise silicon. Typically, silicon contains small amounts of native oxide, which can serve as a barrier to subsequent diffusion of dopants. In a particular embodiment, prior to the first cycle of dielectric film deposition, the substrate surface is pretreated with a reducing plasma, such as a hydrogen containing plasma, and then the substrate surface is in contact with the dopant precursor in vapor phase. The precursor may be delivered into the reaction chamber immediately after the plasma pretreatment is complete. In some instances, the dopant precursor is diborane. In general, the process shown in FIG. 17 may be modified such that the dopant or dopant precursor is delivered to the substrate surface prior to the first dielectric deposition cycle.

In various embodiments, the partially formed dielectric film itself is pretreated using a plasma or other activation treatment prior to exposure to the dopant precursor. This can be accomplished by (a) activating the dielectric surface (eg, chemical and / or physical roughening) to (a) provide thermal uniformity prior to dopant precursor exposure and (b) increase dopant precursor adhesion to the dielectric surface. By) improves in-wafer uniformity.

In certain other embodiments, the chemical conditions of the dopant species are controlled during the dopant precursor transfer phase and / or activation phase of the film deposition process. In some embodiments, the dopant precursor is " fixed " the dopant in the dielectric film, thereby treating the dopant diffusion until the dopant is subsequently activated by annealing or other such operation. In one example, certain dopants are fixed by oxidizing them or their precursors during the dopant delivery phase of the dielectric film deposition process. In certain instances, diborane is delivered to the fixation chamber in an oxidizing atmosphere that effectively fixes the resulting boron containing material in the dielectric film. Alternatively, the dopant is fixed by transferring the precursor to the reaction chamber in an inert or reducing atmosphere and subsequently exposed to an oxidizing atmosphere while placed on the dielectric film. In contrast, treating certain dopant precursors with a reducing agent, without subsequent oxidation, can produce more mobile dopants in the dielectric film.

After the source layer is formed (or during its formation), the dopant species are driven or otherwise introduced into adjacent structures in the device being manufactured. In certain embodiments, the dopant species are driven by annealing during or after the conformal dopant source film is formed. In addition to conventional thermal annealing, for example flash annealing and laser spike annealing may be used. The annealing time and temperature can be determined by the concentration, amount and type of dopant in the source layer, the composition and morphology of the source layer substrate (eg, oxide glass), the distance at which dopant species must move into adjacent device structures, within the device structure It depends on various parameters including the target concentration of the dopant and the composition and morphology of the device structure. In certain embodiments, annealing is performed at about 900 to 1100 ° C. temperature for about 2 to 30 seconds.

Various devices are designed to deposit the doped dielectric films described herein. In general, these devices will include a process chamber for holding the substrate during deposition of the doped film. The process chamber will include one or more inlets for receiving a process gas comprising a dielectric precursor, an oxidant, a carrier gas or inert gas, dopant species, and the like. In various embodiments, the device includes a feature for generating a plasma having properties suitable for producing dielectric layers, a feature for introducing a dopant into the dielectric layer, electrical properties, optical properties, mechanical properties, and And / or features for treating the dielectric layer to modify chemical properties and features for driving dopants from the film into the substrate. Typically, the device will comprise a vacuum pump or parts for connection to such a vacuum pump. In addition, the apparatus will have a controller or controllers configured or designed to control the apparatus to achieve the sequence of doped dielectric deposition operations described herein. The controller may include instructions for controlling various features of the apparatus, including a valve for process gas delivery and pressure control, a power source for generating a plasma, and a vacuum source. These instructions can control the timing and sequence of various operations. In various embodiments, the device is provided in Vector ^TM , a deposition tool family available from Novellus Systems, San Jose, California. Other features of an apparatus suitable for depositing doped dielectric films are described in other places herein.

Doped CFD Film Properties

The dielectric film serving as a source of dopant species will have various properties. In various embodiments, the film thickness is about 20 to 200 angstroms. In some cases, the film thickness is about 50 to 100 angstroms, for example for front end doping of the source-drain extension of the three-dimensional transistor structure. The average concentration of dopant atoms (or other dopant species) in the dielectric film depends on various factors including the total amount of dopant per surface area of the film and the diffusivity and doping application of the dopant atoms in the film. In certain embodiments, the concentration of dopant in the film is between about 0.01 weight percent and 10 weight percent. In other embodiments, the concentration of dopant in the film is about 0.1 weight percent to 1 weight percent. In still other embodiments, the concentration of dopant in the film is about 0.5 weight percent to 4 weight percent. The techniques described herein enable dopant concentration adjustment over a wide range, for example between about 0.01 weight percent and 10 weight percent. For example, it has been demonstrated that boron concentration can be easily controlled between about 0.1 weight percent and 4.3 weight percent in CFD dielectric films. In certain embodiments, 5, 7, 10 and 12 nm CFD films are grown to have about 0.1 to 0.5 wt% boron.

CFD doped dielectric films may be characterized by other properties. For example, the sheet resistance (Rs) of CFD deposited films can vary between about 100 to 50000 ohms / square. In some cases, these values are achieved after some or all dopants are driven from the doped CFD layer. The deep junction depths (as measured by SIMS, for example) produced by driving the dopant from the CFD film can be adjusted to levels up to about 1000 angstroms as appropriate. Of course, many front end devices require a shallower junction depth, for example, to some extent in the range of about 5 to 50 Angstroms, which is achievable using CFD films. The actual junction depth includes many factors including, for example, interfacial dopant (eg, boron) concentration, bulk and mobility of the dopant from the interface into the substrate (eg, silicon), temperature and duration of annealing used to drive the dopant. Can be controlled by

CFD doping applications

The substrate surface on which the dielectric source layer is formed may require very conformal deposition. In certain instances, the dielectric source film conformally coats features having an aspect ratio between about 1: 0.5 and 1:12 (more specifically, an aspect ratio between about 1: 1 and 1: 8) and is no larger than about 60 nm. Widths (more specifically feature widths not greater than about 30 nm). Doping using dielectric source layers of the type described herein will find particular application in devices formed in accordance with 45 nm technology nodes and beyond, for example 22 nm technology nodes, 16 nm technology nodes, and the like.

Among the device structures that can be doped using a CFD source layer are conventional doped structures such as CMOS sources and drains, source-drain extension regions, capacitor electrodes in a memory device, gate electrodes, and the like. Other structures that may be doped in this manner include junctions in source / drain extension regions in gate structures, such as those in some three-dimensional gate structures employed in some devices fabricated at a 22 nanometer technology node. The same non-planar or three-dimensional structures. Some three-dimensional structures are described in "Tri-gate (Intel)": J. Kavalieros et al., Symp. VLSI Tech Pg 50, 2006 and “FinFET”: Yamashita et al. (IBM Alliance), VLSI 2011 and references therein, which were previously incorporated by reference.

Doped CFD films have a variety of other applications, such as providing etchable layers used at various stages in integrated circuit fabrication. In certain embodiments, the etchable layer is a glass layer having an adjustable wet etch rate, wherein the etch rate is adjustable by the doping level. In other words, the doping level is selected to provide a predefined etch rate. In certain embodiments, the etchable layer is a silicate glass layer comprising a dopant, such as phosphorus, boron, or a combination thereof.

CFD Doping Examples

CFD boron doped silicate glass (BSG) films were prepared and achieved nearly 100 percent step coverage on a complex three-dimensional gate architecture. Similar results are expected for in-doped silicate glass (PSG). Boron or phosphorus is the lateral and vertical regions of the source and drain junctions from the films described during the subsequent annealing step that provide a conformal / homogenous under diffusion of the dopant. Can be driven into 20 shows a typical deposition block used to synthesize a CFD BSG / PSG film. The CFD oxide growth cycle includes (a) a saturated dose of SiO ₂ precursor (BTBAS), (b) an inert purge that flushes out residual precursor species, (c) an oxidative plasma step, and (d) a reaction byproduct An inert gas purge is included. This mechanism ensures that the response is self-limiting and improves the good conformality observed in these films. The boron or phosphorus exposure step is inserted periodically during CFD oxide growth, followed by a pump and purge sequence, optionally followed by an RF pinning / cure step (e.g. exposure to plasma). . This deposition block is repeated as many circuits as required by the target BSG / PSG thickness. See FIG. 20.

The frequency of insertion of boron or phosphorus exposure controls the dopant diffusion distance at a given temperature, while the exposure length controls the total dopant dose. These two powerful control parameters provide a versatile synthesis method for precisely controlling interfacial dopant concentration.

In the experiments, CFD showed good growth properties in BSG films. The CFD BSG process used BTBAS as the silicon source, N ₂ O plasma for oxidation and 5 percent diborane (B ₂ H ₆ ) in argon for boron doping. A mixture of argon and N ₂ O was used as the purge gas. A growth rate of ˜1 ms / cycle was obtained consistently with the results for undoped CFD oxide, demonstrating that the insertion of the boron exposure step does not adversely affect CFD growth. 250 mm3 thick CFD BSG films showed nearly perfect conformality on different test structures as shown by SEM photographs. Step coverage for these membranes was calculated to be ˜100 percent on dense and small structures (FIG. 21). Step coverage is defined as the quotient of the film thickness on the sidewall of the feature divided by the film thickness on the top of the same feature. Table 7 shows the different studies divided from the initial study to divide the effects of boron exposure time, boron insertion frequency, and growth temperature on the final average boron concentration in the membrane. 25X CFD Ox means that there are 25 undoped oxide cycles per boron insertion stage. This sample grows up to approximately 500 angstroms so the entire sequence is repeated approximately 20 times (given a growth rate of 1 ms / cycle for CFD oxide). SIMS data for these divided study results, as provided in FIG. 22, indicate that the average boron concentration can be adjusted within the range of about 0.5 to 3.5 wt% boron, which realizes tailored doping options.

sign Deposition conditions CFDS1 400 ° C / 25x CFD Ox + 5s B ₂ H ₆ Exposure CFDS2 400 ° C / 25x CFD Ox + 2.5s B ₂ H ₆ Exposure CFDS3 400 ° C / 50x CFD Ox + 5s B ₂ H ₆ Exposure CFDS4 350 ° C / 25x CFD Ox + 5s B ₂ H ₆ Exposure

Device

It will be appreciated that any suitable process station may be used with one or more of the embodiments described above. For example, FIG. 13 schematically illustrates an embodiment of a CFD process station 1300. For simplicity, the CFD process station 1300 is shown as a standalone process station with a process chamber body 1302 for maintaining a low pressure atmosphere. However, it will be understood that multiple CFD process stations 1300 may be included in a common low pressure atmosphere process tool. Although the embodiment shown in FIG. 13 includes one process station, it will be appreciated that in some embodiments, a plurality of process stations may be included in the process tool. For example, FIG. 14 illustrates an embodiment of a multi station processing tool 2400. Further, in some embodiments, one or more hardware parameters of CFD process station 1300 may be programmatically adjusted by one or more computer controllers, including as discussed in detail below.

CFD process station 1300 is in fluid communication with a reactant delivery system 1301 for delivering process gases to gas distribution showerhead 1306. Reactant delivery system 1301 includes a mixing vessel 1304 for mixing and / or conditioning process gases to be delivered to a showerhead 1306. One or more mixing vessel inlet valves 1320 may control the introduction of process gases into mixing vessel 1304.

Some reactants, such as BTBAS, may be stored in liquid form prior to vaporization and subsequent delivery to the process station. For example, the embodiment of FIG. 13 includes a vaporization point 1303 for liquid reactant to be supplied to the mixing vessel 1304. In some embodiments, vaporization point 1303 may comprise a heated vaporizer. Saturated reactant gas produced from such vaporizers may be condensed in the downstream delivery pipe. Small particles may be produced when incompatible gases are exposed to this condensed reactant. These small particles can clog the pipe, hinder valve operation and contaminate the substrate. Some ways to solve this problem include cleaning and / or venting the delivery pipe to remove residual reactants. However, cleaning the transfer pipe increases the process station cycle time, thereby lowering the process station throughput. Thus, in some embodiments, the delivery pipe downstream of the vaporization point 1303 is heat traced. In some instances, mixing vessel 1304 may also be heat traced. In one non-limiting example, the delivery pipe downstream of vaporization point 1303 may have an increasing temperature profile that extends from approximately 100 ° C. to approximately 150 ° C. in mixing vessel 1304.

In some embodiments, the reactant liquid may be vaporized in a liquid injector. For example, the liquid injector may inject pulses of the liquid reactant into a carrier gas stream upstream of the mixing vessel. In one scenario, the liquid injector may vaporize the reactants by flashing this liquid from high pressure to low pressure. In another scenario, the liquid injector atomizes the liquid into fine droplets which can then be vaporized in a heated delivery pipe. It will be appreciated that smaller droplets may vaporize more quickly than larger droplets to reduce the delay between liquid injection and complete vaporization. Rapid vaporization can reduce the length of the pipe downstream from the vaporization point 13023. In one scenario, the liquid injector may be mounted directly to the mixing vessel 1304. In another scenario, the liquid injector may be mounted directly to the showerhead 1306.

The showerhead 1306 and pedestal 1308 are electrically connected to an RF power source 1314 and matching network 1316 that power the plasma. In some embodiments, plasma energy may be controlled by controlling one or more of process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 1314 and the matching network 1316 can be operated at any suitable power to form a plasma having a target composition of radical species. Examples of suitable powers include, but are not limited to, 100 W to 5000 W for 300 mm wafers. Likewise, the RF power supply 1314 can provide RF power of any suitable frequency. In some embodiments, the RF power supply 1314 may be configured to control the high frequency power source and the low frequency RF power source independently of each other. Low frequency examples of low frequency RF power sources include, but are not limited to, frequencies of 50 to 500 kHz. High frequency examples of high frequency RF power sources include, but are not limited to, frequencies from 1.8 to 2.45 MHz. It will be appreciated that any suitable parameters may be adjusted discretely or continuously to provide plasma energy for surface reactions. In one non-limiting example, plasma power may be intermittently pulsed to reduce ion bombardment with the substrate surface as compared to a continuously powered plasma.

In some embodiments, the plasma may be monitored in-situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more current and voltage sensors (eg, VI probes). In another scenario, the plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters may be adjusted programmatically based on measurements from such in-situ plasma monitors. For example, an OES sensor can be used in a feedback loop to provide programmatic control of plasma power. In some embodiments, other monitors may be used to monitor plasma and other process characteristics. Such monitors may include, but are not limited to, infrared monitors, acoustic monitors, and pressure transducers.

In some embodiments, pedestal 1308 may be temperature controlled via heater 1310. Also, in some embodiments, pressure control of the CFD process station 1300 may be provided by the butterfly valve 1318. As shown in the embodiment of FIG. 13, the butterfly valve 1318 throttles the vacuum provided by the downstream vacuum pump (not shown). However, in some embodiments, pressure control of the CFD process station 1300 may be adjusted by varying the flow rate of one or more gases introduced to the CFD process station 1300.

As mentioned above, one or more process stations may be included in a multi station processing tool. 14 is a schematic diagram of an embodiment of a multi-station processing tool 2400 having an inbound load lock 2402 and an outbound load lock 2404, and an inbound load lock 2402. Either or both of the outbound load locks 2404 can include a remote plasma source. The robot 2406 at atmospheric pressure is configured to move the wafer from the cassette loaded through the pod 2408 into the inbound load lock 2402 through the atmospheric port 2410. The wafer may be placed on the pedestal 2412 in the inbound load lock 2402 by the robot 2406 and the standby port 2410 may be closed and then the load lock pumped down. If inbound load lock 2402 includes a remote plasma source, the wafer may be exposed to remote plasma processing within this load lock before being introduced into processing chamber 2414. In addition, the wafer may be heated in inbound load lock 2402, for example, to remove moisture and intake gas. Subsequently, the chamber transfer port 2416 into the processing chamber 2414 is opened and another robot (not shown) moves the wafer into the pedestal of the first station shown in the reactor to perform subsequent processing within the processing chamber 2414. Can be deployed. Although the embodiments shown in FIG. 14 include load locks, in some embodiments a wafer may be introduced directly into a processing station.

The illustrated processing chamber 2414 includes four process stations numbered 1 through 4 in the embodiment shown in FIG. 14. Each station may have a heated or unheated pedestal (shown at 2418 in the case of station 1) and a gas line inlet. In some embodiments, it will be appreciated that each process station may have a different or plurality of purposes. For example, in some embodiments, the process station can be switched between a CFD process mode and a PECVD process mode. Additionally or alternatively, in some embodiments, processing chamber 2414 may include one or more matched CFD process stations and PECVD process station pairs. While the illustrated processing chamber 2414 includes four stations, the processing chamber according to the present disclosure may include any suitable number of stations. For example, in some embodiments, the processing chamber may include five or more stations, while in other embodiments, the processing chamber may include three or fewer stations.

14 also shows a wafer handling system 2490 for delivering wafers within the processing chamber 2414. In some embodiments, this wafer handling system 2490 can transfer a wafer between various process stations and / or between a process station and a load lock. Any suitable wafer handling system may be employed. Non-limiting examples may include a wafer carousel and a wafer handling robot. 14 also shows a system controller 2450 used to control process conditions and hardware state of the processing tool 2400. The system controller 2450 can include one or more memory devices 2456, one or more storage devices 2454, and one or more processors 2452. The processor 2452 may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, and the like.

In some embodiments, system controller 2450 controls all operation of process tool 2400. System controller 2450 executes system control software 2458 stored in mass storage device 2454 and loaded into memory device 2456 to be executed by processor 2452. System control software 2458 may include timing, gas mixing, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power level, RF power level, substrate of a particular process performed by process tool 2400. Instructions for controlling the pedestal, chuck and / or susceptor position and other parameters may be included. System control software 2458 can be configured in any suitable manner. For example, various process tool component subroutines or control objects may be recorded to control the operation of process tool components required to perform the process of the various process tools. System control software 2458 can be coded in any suitable computer readable programming language.

In some embodiments, system control software 2458 may include an input / output control (IOC) that sequences instructions for controlling the various parameters described above. For example, each phase of the CFD process may include one or more instructions executed by system controller 2450. Instructions for setting process conditions for the CFD process phase may be included in the corresponding CFD recipe phase. In some embodiments, CFD recipe phases can be configured sequentially so that all instructions for a CFD process phase are executed concurrently with the process phase.

Other computer software and / or programs stored on mass storage device 2454 and / or memory device 2456 associated with system controller 2450 may be used in other embodiments. Examples of programs or program sections for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs and plasma control programs.

The substrate positioning program may include program code for proset tool components used to load the substrate onto pedestal 2418 and control the degree of separation between the substrate and other elements of process tool 2400.

The process gas control program may include code for introducing gas into one or more process stations prior to deposition to control gas components and flow rates and optionally to stabilize pressure in the process station. The pressure control program may include code for controlling the pressure in the process station by adjusting the gas flow into the process station or the throttle valve in the exhaust system of the process station.

The heater control program may include code for controlling the current to the heating portion used to heat the substrate. Alternatively, the heater control program can control the supply of heat transfer gas (eg, helium) to the substrate.

The plasma control program may include code for setting an RF power level applied to process electrodes in one or more process stations.

In some embodiments, there may be a user interface associated with system controller 2450. The user interface may include a display screen, a device and / or a graphical software display and pointing device in a process state, a user input device such as a keyboard, a touch screen, a Michaelphone or the like.

In some embodiments, parameters adjusted by system controller 2450 can be related to process conditions. Non-limiting examples can include process gas component and flow rate, temperature, pressure, plasma conditions (such as RF bias power level), pressure, temperature, and the like. These parameters can be provided to the user in the form of recipes that can be entered using the user interface.

Signals for monitoring this process may be provided by analog and / or digital input connections of system controller 2450 from various process tool sensors. Signals for controlling the process may be output on the analog output connections and the digital output connections of the process tool 2400. Non-limiting examples of such process tool sensors may include mass flow controllers, pressure sensors (such as manometers), thermocouples, and the like. Appropriately programmed feedback algorithms and control algorithms can be used with the data from these sensors to maintain process conditions.

System controller 2450 can provide program instructions for implementing various semiconductor processing processes. These program instructions can control various process parameters such as DC power level, RF bias power level, pressure, temperature and the like. These instructions may control these parameters to operate in-situ deposition of the film stack in accordance with various embodiments described herein.

The devices and / or processes described herein above can be used, for example, in conjunction with lithographic patterning tools or processes for the manufacture or processing of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, such tools or processes are not necessarily such but can be used or performed together in a common manufacturing facility. Film lithography patterning typically includes some or all of the following operations, each of which is realized using a plurality of possible tools, which (1) are used to spin a workpiece such as a wafer using a spin on or spray on tool. Applying the resist, (2) curing the photoresist using a hot plate furnace or UV curing tool, (3) exposing the photoresist to visible or ultraviolet or x-ray light using a tool such as a wafer stepper (4) developing the photoresist to selectively remove and pattern the resist using a tool such as a wet bench; (5) the resist pattern using a dry or plasma assisted etching tool. And (6) RF or microwave plasma And removing the photoresist using a tool such as a mar resist stripper.

It is to be understood that the configurations and / or manners described herein are illustrative in nature and that such specific embodiments or examples are not to be interpreted as limiting and that many variations are possible. Certain methods or routines described herein may represent one or more of any number of processing strategies. Thus, the various operations illustrated may be performed in the illustrated order, in other orders, in parallel, or in some cases omitted. Likewise, the order of the processes described above can be changed.

Subject matter of the present disclosure is all novel and non-obvious combinations of the various processes, systems, configurations, other features, functions, operations and / or features and any and all equivalents thereof disclosed herein. And subcombinations.

Claims (42)

A method of depositing a film on a non-planar substrate surface in a reaction chamber,
Introducing the first reactant into the reaction chamber under non-plasma conditions that cause the first reactant to be adsorbed onto the non-planar substrate surface;
Introducing a dopant containing material into the reaction chamber under nonplasma conditions; And
Sequentially exposing the nonplanar substrate surface to a plasma to subsequently form a conformal doped film on the nonplanar substrate surface. The method of claim 1,
And the first reactant is a silicon containing reactant. The method of claim 1,
And the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium. The method of claim 1,
And introducing a second reactant into the reaction chamber prior to exposing the non-planar substrate surface to the plasma. The method of claim 4, wherein
And the second reactant is an oxidant. The method of claim 4, wherein
And the second reactant is a nitrogen containing reactant. The method of claim 5, wherein
And the doped film is a doped silicon oxide film. The method of claim 6,
And the doped film is a doped silicon nitride film. The method of claim 1,
And the doped film is a doped silicon carbide film. The method of claim 1,
And introducing a second reactant into the reaction chamber while the first reactant is adsorbed onto the non-planar substrate surface. The method of claim 10,
Exposing the non-planar substrate surface to plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film. A method of depositing a film on a non-planar substrate surface in a reaction chamber,
Introducing the first reactant into the reaction chamber under non-plasma conditions that cause the first reactant to be adsorbed onto the non-planar substrate surface;
Introducing a second reactant into the reaction chamber to react with the adsorbed first reactant;
Introducing a dopant containing material into the reaction chamber; And
Forming a conformal doped film on the non-planar substrate surface. The method of claim 12,
And the first reactant is a silicon containing reactant. The method of claim 12,
And the dopant is selected from the group consisting of boron, phosphorus, arsenic, and gallium. The method of claim 12,
And the second reactant is an oxidant. The method of claim 12,
And the second reactant is a nitrogen containing reactant. The method of claim 12,
Exposing the non-planar substrate surface to a plasma after introducing the dopant containing material into the reaction chamber. The method of claim 12,
Introducing the first reactant into the reaction chamber under non-plasma conditions causing the first reactant to adsorb onto the non-planar substrate surface and a second reactant into the reaction chamber to react with the adsorbed first reactant The method of claim 1, further comprising repeating the step of one or more times. The method of claim 12,
And repeating the step of introducing the dopant containing material into the reaction chamber one or more times. The method of claim 19,
And the dopant containing material is introduced into the reaction chamber at a frequency less than the frequency at which the first reactant is introduced into the reaction chamber. The method of claim 19,
And the dopant containing material is introduced into the reaction chamber at the same frequency as the frequency at which the first reactant is introduced into the reaction chamber. A method of depositing a doped silicon oxide film on a non-planar substrate surface in a reaction chamber,
Introducing the silicon-containing reactant into the reaction chamber under non-plasma conditions causing the silicon-containing reactant to be adsorbed onto the non-planar substrate surface;
Introducing an oxidant into the reaction chamber to react with the adsorbed silicon-containing reactant; And
Introducing a dopant containing material into the reaction chamber to form a conformal doped silicon oxide film on the non-planar substrate surface. The method of claim 22,
Wherein the plasma is ignited while the oxidant is in the gas phase in the reaction chamber. delete delete A method of depositing a doped silicon nitride film on a non-planar substrate surface in a reaction chamber,
Introducing the first reactant into the reaction chamber under non-plasma conditions that cause a silicon-containing first reactant to be adsorbed onto the non-planar substrate surface;
Introducing a nitrogen containing reactant into the reaction chamber to react with the adsorbed first reactant; And
Introducing a dopant containing material into the reaction chamber to form a conformal doped silicon nitride film on the non-planar substrate surface. The method of claim 26,
Wherein a plasma is ignited while the nitrogen-containing reactant is in the gas phase in the reaction chamber. delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete

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