TWI663681B - 靜電夾具以及製造其之方法 - Google Patents

靜電夾具以及製造其之方法 Download PDF

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Publication number
TWI663681B
TWI663681B TW104104028A TW104104028A TWI663681B TW I663681 B TWI663681 B TW I663681B TW 104104028 A TW104104028 A TW 104104028A TW 104104028 A TW104104028 A TW 104104028A TW I663681 B TWI663681 B TW I663681B
Authority
TW
Taiwan
Prior art keywords
dielectric layer
electrode
layer
electrostatic fixture
electrostatic
Prior art date
Application number
TW104104028A
Other languages
English (en)
Chinese (zh)
Other versions
TW201545268A (zh
Inventor
Richard A. Cooke
理查Ａ 庫克
Wolfram Neff
沃弗蘭 內夫
Carlo Waldfried
卡羅 沃弗萊德
Jakub Rybczynski
雅各 萊辛斯基
Michael Hanagan
麥克 漢那根
Wade Krull
偉德 羅歐
Original Assignee
Entegris, Inc.
美商恩特葛瑞斯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Entegris, Inc., 美商恩特葛瑞斯股份有限公司 filed Critical Entegris, Inc.
Publication of TW201545268A publication Critical patent/TW201545268A/zh
Application granted granted Critical
Publication of TWI663681B publication Critical patent/TWI663681B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/72—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using electrostatic chucks
    • H10P72/722—Details of electrostatic chucks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0602—Temperature monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/72—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
TW104104028A 2014-02-07 2015-02-06 靜電夾具以及製造其之方法 TWI663681B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201461937135P 2014-02-07 2014-02-07
US61/937,135 2014-02-07

Publications (2)

Publication Number Publication Date
TW201545268A TW201545268A (zh) 2015-12-01
TWI663681B true TWI663681B (zh) 2019-06-21

Family

ID=52544589

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104104028A TWI663681B (zh) 2014-02-07 2015-02-06 靜電夾具以及製造其之方法

Country Status (8)

Country Link
US (1) US10497598B2 (enExample)
EP (1) EP3103136B1 (enExample)
JP (1) JP6527524B2 (enExample)
KR (1) KR102369706B1 (enExample)
CN (1) CN107078086B (enExample)
SG (1) SG10201806706VA (enExample)
TW (1) TWI663681B (enExample)
WO (1) WO2015120265A1 (enExample)

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US10975469B2 (en) 2017-03-17 2021-04-13 Applied Materials, Inc. Plasma resistant coating of porous body by atomic layer deposition
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CN112553592B (zh) * 2019-09-25 2023-03-31 中微半导体设备(上海)股份有限公司 一种利用ald工艺对静电吸盘进行处理的方法
CN113053774A (zh) * 2019-12-27 2021-06-29 迪科特测试科技(苏州)有限公司 探测装置
KR102701133B1 (ko) * 2020-03-06 2024-09-03 세메스 주식회사 지지 유닛 및 그를 포함하는 기판 처리 장치
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KR102520805B1 (ko) * 2021-05-10 2023-04-13 주식회사 템네스트 이종 복합재료로 이루어진 전극층을 포함하는 정전척의 제조방법 및 이에 의해 제조된 정전척
EP4398684A4 (en) * 2021-08-31 2025-09-17 Kyocera Corp PLASMA-RESISTANT LAMINATE, MANUFACTURING METHOD THEREOF, AND PLASMA PROCESSING APPARATUS
KR102875533B1 (ko) * 2021-10-28 2025-10-27 엔테그리스, 아이엔씨. 유전체 층을 포함하는 상부 세라믹 층을 포함하는 정전 척, 및 관련 방법 및 구조
KR102697860B1 (ko) * 2022-02-08 2024-08-22 (주)아이씨디 정전 장치 및 그 동작 방법
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WO2026014263A1 (ja) * 2024-07-12 2026-01-15 東京エレクトロン株式会社 プラズマ処理装置、静電チャックの製造方法及び静電チャックの再生方法

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Also Published As

Publication number Publication date
KR20160118259A (ko) 2016-10-11
JP6527524B2 (ja) 2019-06-05
EP3103136A1 (en) 2016-12-14
WO2015120265A1 (en) 2015-08-13
TW201545268A (zh) 2015-12-01
CN107078086B (zh) 2021-01-26
SG10201806706VA (en) 2018-09-27
JP2017507484A (ja) 2017-03-16
EP3103136B1 (en) 2021-06-23
KR102369706B1 (ko) 2022-03-04
CN107078086A (zh) 2017-08-18
US20160336210A1 (en) 2016-11-17
US10497598B2 (en) 2019-12-03

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