TWI660468B - 封裝結構及其製造方法 - Google Patents

封裝結構及其製造方法 Download PDF

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TWI660468B
TWI660468B TW106111240A TW106111240A TWI660468B TW I660468 B TWI660468 B TW I660468B TW 106111240 A TW106111240 A TW 106111240A TW 106111240 A TW106111240 A TW 106111240A TW I660468 B TWI660468 B TW I660468B
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layer
opening
elastic bump
passivation layer
bump
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TW106111240A
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TW201830594A (zh
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Pochun Lin
林柏均
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Nanya Technology Corporation
南亞科技股份有限公司
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Abstract

一種封裝結構，包含內連接層、鈍化層、至少一彈性凸塊，以及一導電層。鈍化層配置於內連接層上，且具有至少一開口。彈性凸塊配置於內連接層上，其中彈性凸塊之一部分嵌入至開口中。導電層配置於彈性凸塊以及鈍化層上。

Description

封裝結構及其製造方法
本揭露是關於一種封裝結構及其製造方法。
隨著封裝結構的發展，具有低成本之重分布層及凸塊技術已有顯著之進步。由聚醯亞胺(polyimide；PI)所製成之鈍化層由於具有彈性，因此對配置於其上方的凸塊具有良好的緩衝能力。然而，聚醯亞胺層與其下方的層具有低黏著力，故在成品階段時，聚醯亞胺容易剝落並產生損壞。另一方面，在製程中，聚醯亞胺亦容易萎縮，而成品的品質，如節距(pitch)，也相應地受到影響。
由硬質材料，如二氧化矽(SiO2)，所製成之鈍化層雖可提供較高的精準度。然此類鈍化層對於底層的凸塊會產生高內部應力，而對整體結構造成影響。因此，為了達到高精準品質以及高穩定性，改良的封裝結構製造方法是必須的。
本揭露之一實施例為一種封裝結構，包含內連接層、鈍化層、至少一彈性凸塊，以及一導電層。鈍化層配置於 內連接層上，且具有至少一開口。彈性凸塊配置於內連接層上，其中彈性凸塊之一部分嵌入至開口中。導電層配置於彈性凸塊以及鈍化層上。
本揭露之另一實施例為一種形成封裝結構之方法，包含形成一內連接層。形成一鈍化層於內連接層上。開槽鈍化層以形成至少一開口。形成至少一彈性凸塊於開口中，其中彈性凸塊之一部分嵌入至開口中。形成導電層於彈性凸塊以及鈍化層上。
本揭露之又一實施例為一種形成封裝結構之方法，包含形成內連接層。開槽內連接層以形成至少一開口。形成至少一彈性凸塊於開口中，其中彈性凸塊之一部分嵌入至開口中。形成導電層於彈性凸塊以及鈍化層上。
4‧‧‧基板
5‧‧‧下層結構
10‧‧‧內連接層
102‧‧‧襯墊
104‧‧‧耦接塊
106、108‧‧‧金屬線
112、114、116、118、119、152‧‧‧開口
110、150‧‧‧鈍化層
120‧‧‧附著層
130‧‧‧彈性凸塊
130A‧‧‧嵌入部分
130B‧‧‧凸出部分
140‧‧‧導電層
142‧‧‧襯墊部分
WA、WB‧‧‧寬度
閱讀以下詳細敘述並搭配對應之圖式，可了解本揭露之多個態樣。應注意，根據業界中的標準做法，多個特徵並非按比例繪製。事實上，多個特徵之尺寸可任意增加或減少以利於討論的清晰性。
第1A圖至第1G圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。
第1H圖為本揭露之部分實施例之封裝結構之剖面圖。
第2A圖至第2E圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。
第3A圖至第3E圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。
第4A圖至第4D圖為本揭露之部分實施例之封裝結構之剖面圖。
以下揭露提供眾多不同的實施例或範例，用於實施本案提供的主要內容之不同特徵。下文描述一特定範例之組件及配置以簡化本揭露。當然，此範例僅為示意性，且並不擬定限制。舉例而言，以下描述「第一特徵形成在第二特徵之上方或之上」，於實施例中可包括第一特徵與第二特徵直接接觸，且亦可包括在第一特徵與第二特徵之間形成額外特徵使得第一特徵及第二特徵無直接接觸。此外，本揭露可在各範例中重複使用元件符號及/或字母。此重複之目的在於簡化及釐清，且其自身並不規定所討論的各實施例及/或配置之間的關係。
此外，空間相對術語，諸如「下方(beneath)」、「以下(below)」、「下部(lower)」、「上方(above)」、「上部(upper)」等等在本文中用於簡化描述，以描述如附圖中所圖示的一個元件或特徵結構與另一元件或特徵結構的關係。除了描繪圖示之方位外，空間相對術語也包含元件在使用中或操作下之不同方位。此設備可以其他方式定向(旋轉90度或處於其他方位上)，而本案中使用之空間相對描述詞可相應地進行解釋。
第1A圖至第1G圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。本揭露所提及之半導體元件中可能具有其他結構位於基板以及內連接結構之間，如電晶體或其他元件(如接觸點)等等。然於第1B圖至第1G圖(以及第1H、第2A至2E圖，及第3A至3E圖)的細節圖示將省略，以便簡潔描述之目的。應了解可在1A圖至第1G圖(以及第2A至2E圖，及第3A至3E圖)之前、之後，或其中添加額外製程，且部分製程可以取代或省略。部分製程之順序亦可改變。
第1A圖中，內連接層10形成於下層結構5上方，其中下層結構5配置於基板4上方。下層結構5可包含電晶體、電阻、電容、局部導線、隔離結構，及/或元件隔離層等。其中為了簡化描述之目的，下層結構5以及基板4在後續圖示中將省略。
內連接層10可為單層或多層結構。內連接層10包括金屬線、導電通孔，以及一層或多層之層間介電質(interlayer dielectric；ILD)。金屬線及導電通孔設計於提供電性連接。而層間介電質包覆金屬線及導電通孔。於部分實施例中，層間介電質包括氧化矽(SiO2)、氮氧化矽(SiON)、碳氧化矽(SiOC)、碳氮氧化矽(SiOCN)、碳氫氧化矽(SiCOH)，以及氮化矽基之材料，如氮化矽(SiN)、氮碳化矽(SiCN)，等等。
第1B圖中，襯墊102及多個耦接塊104經圖案化並形成於內連接層10上。襯墊102電性連接至內連接層10(如金屬線或導孔)。於部分實施例中，耦接塊104為金屬線，且可 依據設計需求電性連接至內連接層10。襯墊102可由相同的材料，如金屬(銀或銅等)，且可同時形成。於部分實施例中，耦接塊104之材料可不同於襯墊102，例如耦接塊104可為介電質。
接著，第一鈍化層110形成內連接層10、襯墊102，以及耦接塊104上方。於部分實施例中，第一鈍化層110是由二氧化矽(SiO2)形成，使整體結構具有較高的精準度以及較佳的節距品質。於部分實施例中，第一鈍化層110可為聚醯亞胺。
第1C圖中，第一鈍化層110經開槽，並形成多個開口112及114於第一鈍化層110中。襯墊102經由開口112自第一鈍化層110中曝露。而部分的耦接塊104及內連接層10之上表面之一部分經由開口114自第一鈍化層110中曝露。換句話說，開口112是由第一鈍化層110、內連接層10，以及耦接塊104界定的。開口112及114可由適合的方法形成，如光微影製程及蝕刻。蝕刻劑的材料、第一鈍化層110、襯墊102、耦接塊104，及/或內連接層10經挑選以提供蝕刻選擇性。
第1D圖中，附著層120形成於開口114中。詳細地，附著層120是共形地形成於第一鈍化層110、曝露之耦接塊104，以及曝露之內連接層10之側壁以及表面上。於部分實施例中，附著層120可為樹酯，如環氧樹脂(epoxy)。於部分其他實施例中，附著層120可省略。
第1E圖中，形成彈性凸塊130於開口114以及內連接層10上方。彈性凸塊130是由彈性材料所組成，例如聚醯 亞胺(PI)、聚二甲基矽氧烷(polydimethylsiloxane；PDMS)，或聚胺酯(polyurethane；PU)。詳細而言，彈性凸塊130具有嵌入部分130A以及凸出部分130B。凸出部分130B自第一鈍化層110中曝露。嵌入部分130A則是嵌入至第一鈍化層110中並與耦接塊104相接。由於耦接塊104耦接至嵌入部分130A，故彈性凸塊130與耦接塊104之間的接觸面積增加了，使得彈性凸塊130之附著力上升。
參照回第1B圖，誠如上述，由於耦接塊104可以增加和彈性凸塊130之間的接觸面積。故耦接塊104並不限定於電性連接至內連接層10。於部分實施例中，耦接塊104與襯墊102是於不同步驟中以不同材料形成。例如，耦接塊104可為硬質遮罩。然而，於部分實施例中，耦接塊104與襯墊102為相同材料(如金屬)，故耦接塊104不但可用於和其他元件之間的電性連接，亦可用於增加和彈性凸塊130之間的接觸面積。
第1F圖中，形成導電層140於開口112內以及第一鈍化層110及彈性凸塊130上方。導電層140直接配置於第一鈍化層110及彈性凸塊130上方。換句話說，導電層140經由襯墊102電性連接至內連接層10以及下層結構5(如第1A圖所示)。導電層140可由適合的技術形成，如化學氣相沉積(chemical vapor deposition；CVD)、物理氣相沉積(physical vapor deposition；PVD)，或原子層沉積(atomic layer deposition；ALD)等。此外，導電層140可進一步根據需求而進行圖案化。
詳細來說，導電層140是形成於彈性凸塊130之凸出部分130B之表面。因此，彈性凸塊130以及導電層140可合 併稱為導電凸塊，其中導電凸塊電性連接至內連接層10以及其他元件。
第1G圖中，形成第二鈍化層150於導電層140以及第一鈍化層110上方。接著，圖案化第二鈍化層150。因此，覆蓋於彈性凸塊130之凸出部分130B上方的導電層140自第二鈍化層150中曝露，使得導電凸塊(即彈性凸塊130以及導電層140)可電性連接至其他元件。
此外，在第二鈍化層150內形成開口152以曝露襯墊102上方之導電層140，使得內連接層10可透過導電層140以及襯墊102電性連接至其他元件。於部分實施例中，第二鈍化層150可由二氧化矽組成，故結構具有較高的精準度以及較佳的節距品質。於部分其他實施例中，第二鈍化層150可為聚醯亞胺。在又其他實施例中，第二鈍化層150可省略。
在傳統封裝結構當中，具有高硬度(如二氧化矽)的鈍化層可用於增加準度以及節距品質。然而，形成於高硬度鈍化層上之傳統凸塊(如錫凸塊)可能會產生高應力並產生損壞。本揭露使用彈性凸塊，可以釋放鈍化層內之應力。此外，傳統封裝結構中的翹曲現象會產生不均勻之表面，而本揭露之彈性凸塊亦可用於釋放封裝結構之不均勻表面以及其他元件、之間的應力。
第1H圖為本揭露之部分實施例之封裝結構之剖面圖。不同於第1G圖，第1G圖之耦接塊104以及附著層120在第1H圖中省略。而本實施例中，彈性凸塊130的凸出部分130B側向延伸至第一鈍化層110之上表面。亦即，彈性凸塊130的 凸出部分130B之寬度WB大於彈性凸塊130的嵌入部分130A之寬度WA。而此配置亦增加了彈性凸塊130與第一鈍化層110之接觸面積，並增加了附著力。
應了解上述實施例僅以一個凸塊作為解釋，但本揭露並不限定於此。於部分實施例中，彈性凸塊的數量根據設計需求可為二個或更多。
第2A圖至第2E圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。部分細節類似於第1A圖至第1H圖將省略。第2A圖中，形成內連接層10。內連接層10包含襯墊102以及多條金屬線106，其中金屬線106是於先前步驟中形成於內連接層10中的。於部分實施例中，襯墊102與金屬線106為金屬，如銀或銅，且可同時形成。於本實施例中，內連接層10為多層結構，而襯墊102及金屬線106位於內連接層10之最上層。換句話說，襯墊102及金屬線106是曝露自內連接層10。
接著，形成第一鈍化層110於內連接層10上方。於部分實施例中，第一鈍化層110是由二氧化矽組成。第一鈍化層110經圖案化並形成開口112及116於第一鈍化層110中，其中開口112曝露襯墊102，而開口116曝露部分金屬線106以及內連接層10之表面。於本實施例中，第一鈍化層110可在後續製程中做為遮罩。開口116界定了後續所要形成之凸塊的位置。
第2B圖中，內連接層10經開槽以形成開口118。開口118的形成使得金屬線106之側壁曝露。開口118可由適當 的方法形成，如光微影製程及蝕刻。蝕刻製程可經調控使得開口118具有適當的深度。部分實施例中，金屬線106之側壁可局部地曝露。
開口118界定了後續所要形成之彈性凸塊的位置。然而，由於實際繞線的布局，彈性凸塊的下方未必會有金屬線106。因此，部分實施例中，開口118內並不包含金屬線。
形成附著層120於開口118內。特別地，附著層120是共形地性成於第一鈍化層110之側壁，曝露之金屬線106，以及內連接層10之曝露表面。於部分實施例中，附著層120可為樹酯，如環氧樹酯。於部分其他實施例中，附著層120可省略。
第2C圖中，形成彈性凸塊130於內連接層10上方及開口118內。彈性凸塊130是由彈性材料所組成，例如聚醯亞胺(PI)、聚二甲基矽氧烷(polydimethylsiloxane；PDMS)，或聚胺酯(polyurethane；PU)。詳細而言，彈性凸塊130具有嵌入部分130A以及凸出部分130B。凸出部分130B自第一鈍化層110中曝露。嵌入部分130A則是嵌入至第一鈍化層110中並與金屬線106相接。由於金屬線106耦接至嵌入部分130A，故彈性凸塊130與金屬線106之間的接觸面積增加了，使得彈性凸塊130之附著力上升。
第2D圖中，形成導電層140於開口112內以及第一鈍化層110及彈性凸塊130上方。導電層140直接配置於第一鈍化層110及彈性凸塊130上方。換句話說，導電層140經由襯墊102電性連接至內連接層10以及下層結構5(如第1A圖所 示)。此外，導電層140可進一步根據需求而進行圖案化。
詳細來說，導電層140是形成於彈性凸塊130之凸出部分130B之表面。因此，彈性凸塊130以及導電層140可合併稱為導電凸塊，其中導電凸塊電性連接至內連接層10以及其他元件。
第2E圖中，形成第二鈍化層150於導電層140以及第一鈍化層110上方。接著，圖案化第二鈍化層150。因此，覆蓋於彈性凸塊130之凸出部分130B上方的導電層140自第二鈍化層150中曝露，使得導電凸塊(即彈性凸塊130以及導電層140)可電性連接至其他元件。
此外，在第二鈍化層150內形成開口152以曝露襯墊102上方之導電層140，使得內連接層10可透過導電層140以及襯墊102電性連接至其他元件。於部分實施例中，第二鈍化層150可由二氧化矽組成，故結構具有較高的精準度以及較佳的節距品質。於部分其他實施例中，第二鈍化層150可為聚醯亞胺。在又其他實施例中，第二鈍化層150可省略。
第3A圖至第3E圖為本揭露之部分實施例之製造封裝結構的方法在各步驟之剖面圖。第3A圖中，形成內連接層10。內連接層10包含多條金屬線106及108，其中金屬線108及106是於先前步驟中形成於內連接層10中的。於本實施例中，內連接層10為多層結構，而金屬線106是位於內連接層10之最上層，金屬線108則是位於內連接層10的內層，其中金屬線106及108可以透過其他內連接結構連接，例如導孔或金屬層。因此，金屬線108包覆於內連接層10內，而金屬線106則 曝露於內連接層10。
第3B圖中，內連接層10經開槽以形成開口119。開口119可由適當的方法形成，如光微影製程及蝕刻。蝕刻製程可經調控使得開口119具有適當的深度。使得位於內層之金屬線108可以全部或局部地經由開口119自內連接層10中曝露。
開口119界定了後續所要形成之彈性凸塊的位置。然而，由於實際繞線的布局，彈性凸塊的下方未必會有金屬線。因此，部分實施例中，開口119內並不包含金屬線。
第3C圖中，形成彈性凸塊130於內連接層10上方及開口118內。彈性凸塊130是由彈性材料所組成，例如聚醯亞胺(PI)、聚二甲基矽氧烷(polydimethylsiloxane；PDMS)，或聚胺酯(polyurethane；PU)。詳細而言，彈性凸塊130具有嵌入部分130A以及凸出部分130B。凸出部分130B自內連接層10中曝露。嵌入部分130A則是嵌入至內連接層10中並與金屬線108相接。由於金屬線108耦接至嵌入部分130A，故彈性凸塊130與金屬線108之間的接觸面積增加了，使得彈性凸塊130之附著力上升。
第3D圖中，形成導電層140於內連接層10及彈性凸塊130上方。導電層140直接配置於內連接層10及彈性凸塊130上方。此外，導電層140與內連接層10之金屬線106接觸，其中部分導電層140與金屬線106電性連接的部分可以定義為襯墊部分142。換句話說，導電層140經由導電層140之襯墊部分142電性連接至內連接層10以及下層結構5(如第1A圖所 示)。此外，導電層140可進一步根據需求而進行圖案化。
詳細來說，導電層140是形成於彈性凸塊130之凸出部分130B之表面。因此，彈性凸塊130以及導電層140可合併稱為導電凸塊，其中導電凸塊電性連接至內連接層10以及其他元件。
第3E圖中，形成第一鈍化層110於導電層140以及內連接層10上方。接著，圖案化第一鈍化層110。因此，覆蓋於彈性凸塊130之凸出部分130B上方的導電層140自第一鈍化層110中曝露，使得導電凸塊(即彈性凸塊130以及導電層140)可電性連接至其他元件。
此外，在第一鈍化層110內形成開口152以曝露導電層140之襯墊部分142，使得內連接層10可透過襯墊部分142電性連接至其他元件。於部分實施例中，第一鈍化層110可由二氧化矽組成，故結構具有較高的精準度以及較佳的節距品質。於部分其他實施例中，第一鈍化層110可為聚醯亞胺。在又其他實施例中，第一鈍化層110可省略。
第4A圖至第4D圖為本揭露之部分實施例之封裝結構之剖面圖。第4A圖中，彈性凸塊130包括凸出部分130B以及嵌入部分130A，其中凸出部分130B具有半圓頂表面。凸出部分130B具有寬度WB，而嵌入部分具有寬度WA，其朱寬度WA大於寬度WB。嵌入部分130A具有較大的寬度可以增加彈性凸塊130的接觸面積。
第4B圖中，彈性凸塊130之凸出部分130B具有平坦上表面。
第4C圖中，彈性凸塊130之凸出部分130B的剖面為三角形。
第4D圖中，彈性凸塊130包括凸出部分130B以及嵌入部分130A，其中凸出部分130B具有半圓頂表面。嵌入部分130A具有漸變之寬度，其中嵌入部分130A的寬度從底部往上由寬度WB變化至寬度WA。此設計可增加彈性凸塊130與鈍化層110之間的附著力，由於具有較寬底部寬度之彈性凸塊130較難自鈍化層110中剝落。
第4D圖中，彈性凸塊130之輪廓可由調整鈍化層110的圖案化條件而得。意即，圖案化(如蝕刻)將會影響鈍化層110之輪廓。因此，藉由調整圖案化參數，如蝕刻時間、蝕刻劑等，可相應地調整彈性凸塊130之輪廓。
上文概述了若干實施例的特徵，以便本領域熟習此項技藝者可更好地理解本揭示案的態樣。本領域熟習此項技藝者應當瞭解到他們可容易地使用本揭示案作為基礎來設計或者修改其他製程及結構，以實行相同目的及/或實現相同優勢的。本領域熟習此項技藝者亦應當瞭解到，此類等效構造不脫離本揭示案的精神及範疇，以及在不脫離本揭示案的精神及範疇的情況下，其可對本文進行各種改變、取代及變更。

Claims (8)

  1. 一種封裝結構，包含：一內連接層；一第一鈍化層，配置於該內連接層上，其中該第一鈍化層具有至少一開口；一附著層，配置於該開口中；至少一彈性凸塊，配置於該內連接層上，其中該彈性凸塊之一部分嵌入至該開口中；一導電層，配置於該彈性凸塊以及該第一鈍化層上；以及一第二鈍化層，覆蓋該導電層，其中該第二鈍化層曝露該導電層覆蓋於該彈性凸塊上方的一部分。
  2. 如請求項1所述之封裝結構，其中該彈性凸塊之材料包含聚醯亞胺、聚二甲基矽氧烷，或聚胺酯。
  3. 如請求項1所述之封裝結構，其中該第一鈍化層之材料包含二氧化矽。
  4. 如請求項1所述之封裝結構，更包含：至少一耦接塊，配置於該開口中，其中該耦接塊嵌入至該彈性凸塊中。
  5. 一種形成封裝結構之方法，包含：形成一內連接層；形成一第一鈍化層於該內連接層上；開槽該第一鈍化層以形成至少一開口；開槽該內連接層以形成該開口於該第一鈍化層及該內連接層中；形成至少一彈性凸塊於該開口中，其中該彈性凸塊之一部分嵌入至該開口中；形成一導電層於該彈性凸塊以及該第一鈍化層上；以及形成一第二鈍化層於該導電層上，其中該第二鈍化層曝露該導電層覆蓋於該彈性凸塊上方的一部分。
  6. 如請求項5所述之方法，更包含：形成至少一耦接塊於該開口中，使得該耦接塊嵌入至該彈性凸塊中。
  7. 一種形成封裝結構之方法，包含：形成一內連接層；開槽該內連接層以形成至少一開口；形成至少一彈性凸塊於該開口中，其中該彈性凸塊之一部分嵌入至該開口中；以及形成一導電層於該彈性凸塊以及該內連接層上。
  8. 如請求項7所述之方法，其中開槽該內連接層後，至少一金屬線自該內連接層中曝露。
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