TWI652744B - 用於製造基板配置之方法、基板配置及用於連接基板配置至電子組件之方法 - Google Patents

用於製造基板配置之方法、基板配置及用於連接基板配置至電子組件之方法 Download PDF

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TWI652744B
TWI652744B TW105132378A TW105132378A TWI652744B TW I652744 B TWI652744 B TW I652744B TW 105132378 A TW105132378 A TW 105132378A TW 105132378 A TW105132378 A TW 105132378A TW I652744 B TWI652744 B TW I652744B
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Taiwan
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substrate
contact material
material layer
electronic component
configuration
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TW105132378A
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TW201724295A (zh
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安德列斯 辛瑞區
蘇珊納 杜齊
安東 米瑞克
麥可 夏佛
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賀利氏德國有限兩合公司
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    • HELECTRICITY
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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
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Abstract

本發明關於用於製造連接基板配置至電子組件之方法,其包含下列步驟:- 提供具有一第一側和一第二側的一基板,- 隨後將一接觸材料施加至該基板的該第一側,- 在至少一些部分中,施加一預固定構件至背對該基板的該接觸材料層的一側。

Description

用於製造基板配置之方法、基板配置及用於連接基板配置至電子組件之方法
本發明關於用於製造基板配置的方法,該基板配置用於連接電子組件。此外,本發明關於用於連接至電子組件的基板配置。另外,本發明關於用於連接電子組件至基板配置之方法。
在電力電子學中,習知的是,在客戶工廠的製造處理期間,尤其是從裝配位置運送至燒結位置期間,基板或組件可用預施加的接觸構件提供,例如舉例來說,預乾燥的燒結膏、焊料、導電性黏著劑。組件,尤其是電子組件,其係使用可滑動位置的預施加接觸構件接附至基板,尤其是預施加的燒結膏。
在這方面習知的是,組件,尤其是電子組件,其係施加該乾燥燒結膏同時將其暴露於熱。已發現此類溫暖的裝配由於彎曲的組件及/或污染的表面及/或不利 的表面幾何形狀不足以允許從裝配位置可靠運送至燒結位置或該運送工具內的加速力非常高,所以黏著力不足導致多個電子組件的運送強度不足。因此習知的是,尚未焊接及/或燒結或膠合之裝配的電子組件可藉由遮蔽或成型固定或可在複雜的操作中用彈簧的方式夾在適當位置。
已知現有技術水平的另一個缺點為施加至基板的接觸材料係經常施加得同時與該組件的邊緣保持距離及/或形成不平的斜坡型結構。用習知的方法使全表面塗佈接觸材料是不可能的及/或僅可能以有限程度塗佈,因為舉例來說,當噴塗燒結膏時,該燒結膏有特殊要求,以及由於噴塗,全面積塗佈經常與高噴塗損耗有關。
基於此現有技術水平,本發明的目的為提供用於製造供連接一電子組件之基板配置的方法,使得從裝配位置至燒結該電子組件地點的運送係創造足夠的運送強度。另外,最大可能的面積應有效率地可塗佈及/或可用進一步開發的方法製造。由於接觸材料突出至該組件邊緣所有側邊上的事實,所以從此表面積移除該組件為可能的。
此外,本發明的目的為提供連接至一電子組件之基板配置,其中該基板配置係設計為俾使經裝配、但尚未焊接及/或燒結或膠合的組件,在運送期間該基板配置上的強度將具有充足的強度。另外,欲進行進一步的開發,使得該基板配置具有大的接觸材料的表面積。
另外,本發明的一目的為提供用於連接電子組件至基板配置的方法。
根據本發明,關於用於製造基板配置連接至電子組件的方法之目的係藉由專利請求項1的標的達成,對於該基板配置係藉由專利請求項11的標的達成,以及對於用於連接電子組件至基板配置的方法係藉由專利請求項16的標的達成。
本發明係基於提供一種用於製造連接至電子組件的基板配置的方法之概念,其包含下列步驟:- 供應帶有一第一側和一第二側的一基板,- 施加一接觸材料層至該基板的該第一側,- 在至少一些部分中,施加一預固定構件至背對該基板之該接觸材料層的一側。
借助根據本發明的方法製造的該基板配置係用於後續連接至電子組件。
該基板可為金屬片或金屬條部分,尤其是銅片或銅條部分。此外,該基板有可能為引線框架或DCB基板或PCB基板。銅片亦可理解為由銅合金材料製成的片材。銅條部分可為由銅合金材料製成的此類條狀部分。
金屬片或金屬條部分,尤其是銅片或銅條部分,較佳為不預先構造化。可在所使用的基板上進行切割至長度及/或將該側邊緣構造化。
所供應的基板或空白基板可在至少一側上 經塗佈,尤其是用含有金(Au)或鎳-金(NiAu)或銀(Ag)或鎳-銀(NiAg)或鎳-鈀-金(NiPdAu)的材料,尤其是經電鍍(galvanized)。另外,將該材料化學地沉積至該基板或該空白基板的至少一側上為可能的。
所供應的基板或空白基板較佳以上述材料塗佈,尤其是在之後欲接觸的至少該側上。另外,可以想像所供應的空白基板或基板的兩側係以上述材料塗佈。在本發明的一具體例中,在供應之前,尤其是在塗佈之前將該基板與一/該空白基板分離是有可能的。該空白基板可為金屬條或金屬片,尤其是銅條或銅片。該空白基板亦有可能為銅合金條或銅合金片。
有可能使全面積金屬條,尤其是銅條被供應和在一側上經電鍍、在一側上經連續地電鍍,尤其是在一側上經連續地電鍍。或者,有可能使該基板與該空白基板分離,尤其是與該金屬條分離,尤其是與銅條分離,並且舉例來說,單獨地在電鍍框架中經電鍍。
一接觸材料層係施加至該基板的該第一側,舉例來說,其可為該塗佈側或與該基板塗佈側相對之側。該接觸材料層較佳應施加在該基板的該第一側的整個面積及/或幾乎整個面積。可將至少一基板定位在一壓力艙中,以施加該接觸材料層。有可能定位數個基板在一壓力艙中。此外,有可能藉由噴塗法將形成接觸材料層的一接觸材料施加至該基板的該第一側。刮刀施加方法亦有可能。
該接觸材料,其為燒結膏,尤其是含有銀或焊料或導電性黏著劑或膠膜的燒結膏係適於實際地連接該基板至該電子組件。該預固定構件僅用於預固定基板或用於臨時地接附該基板至該電子組件或接附該電子組件至該基板。由於此預固定及/或接附步驟,實現了該組件從裝配位置至燒結位置的足夠運送能力。該預固定構件包含臨時的固定構件。換句話說,該預固定構件為固定劑,其允許基板配置及/或基板至電子組件的臨時固定。
該預固定構件係在至少一些部分施加至背對該基板的接觸材料層的一側。該預固定構件可分散、澆注、噴塗、分配、噴射或藉由轉移處理施加至接觸材料層。
因為該預固定構件係直接地施加至該接觸材料層,所以該基板不需要額外地設置預固定構件。換句話說,不需要為施加預固定構件及/或保持無接觸材料層而準備基板部分。此帶來對於該基板材料的材料節省。施加至該基板的該接觸材料層可具有10-150μm,尤其是30-100μm,尤其是40-80μm的層厚度。
施加至基板的接觸材料層以及施加至接觸材料層的預固定構件係較佳在施加之後乾燥。
在施加接觸材料層之後,該基板較佳不具有側邊緣。在此情況下,該基板係在整個表面上設置一接觸材料層。另外,具有無施加接觸材料層的側邊緣之基板為可能的,其中該邊緣具有一寬度,俾使該寬度佔該基板 總寬度的尤其至多20%、該基板總寬度的尤其至多10%、該基板總寬度的尤其至多5%、該基板總寬度的尤其至多1%。
在用接觸材料塗佈該基板及/或在該基板上製造一接觸材料層時,具有盡可能少的無用邊緣的基板配接器及/或基板配置係在此方法階段製造。換句話說,該基板的第一側係設置盡可能多的接觸材料,以便形成最大可能的接觸材料層。
施加至該基板的該接觸材料層以及施加至該接觸材料層的預固定構件較佳為乾燥的。換句話說,將該基板與施加的接觸材料層以及施加至該接觸材料層的預固定構件一起暴露於乾燥處理。該乾燥可發生在80-150℃的目標溫度達2-30分鐘。假使進行乾燥及/或預乾燥,則該施加的預固定構件的厚度以及該施加的接觸材料層的厚度基於該乾燥及/或預乾燥將減少。
在本發明的另一個具體例中,帶有該施加之接觸材料層和該施加之預固定構件的該基板可以俾使該基板的該第一側配置成面向一托架的方式定位在該托架上,其中該預固定構件以及任擇地該接觸材料層係至少黏著性地結合至該托架。是以,該基板可以俾使包含一基板、預固定構件、一接觸材料層與任擇地一托架的基板配置可運送至另一個製造工廠及/或至另一個加工機器的方式施加至該托架。有可能僅將該預固定構件黏著性地結合至該托架。舉例來說,在該托架與該接觸材料層之間可能 有一短距離。
該托架係適於允許該基板配置從第一製造工廠運送至另一個製造工廠及/或從第一製作機器至另一個製作機器。該托架可為,舉例來說,托架薄膜,尤其是具有低黏著力的托架薄膜。此外,有可能用UV膠帶覆蓋晶圓框架來產生托架。設置接觸材料層與該預固定構件的該基板可黏著性地結合至此UV膠帶。
根據本發明的較佳具體例,該基板的一/該側邊緣,較佳在連接至該托架的情況下,在至少一些部分係為分離的,及/或較佳在連接至該托架的情況下該基板為構造化及/或分離的。於是最終部件的幾何,即該基板配接器及/或該基板配置的最終幾何可在施加該接觸材料層以及預固定構件之後製造,尤其是在其連接至該托架的情況下。假使該基板的一/該側邊緣和其餘的基板配置及/或其餘的基板配接器在至少一些部分是分離的,則製造出一基板配接器,其基板較佳地完全設置在該第一側上及/或具有在該第一側的全表面上方的一接觸材料層。該基板配置及/或該基板配接器的無用邊緣被去除。
此外,藉由從初始較大的基板配置以雷射分離的方式製造數個基板配置為可能的。借助雷射切割方法,可處理極小的組件。此外,在雷射切割方法的協助下可創建非常尖銳的邊緣。
該側邊緣的分離及/或該基板的構造化及/或該基板的隔離係較佳以雷射的方式完成。借助雷射切割方 法,可處理極小的組件。此外,借助雷射切割方法可創建非常尖銳的邊緣。
當分離側邊緣及/或當構造化基板及/或當分離基板時,尤其是在該基板連接至該托架的情況下,則該接觸材料層及/或該預固定構件在至少一些部分可被分離及/或構造化及/或隔離。假使該接觸材料層被分離及/或構造化及/或隔離,則由於,舉例來說,在該接觸材料層上的壓力而形成斜坡。另外,多虧該接觸材料層的雷射處理,創建或製造最平坦可能的接觸材料層為可能的。
因為之後的雷射切割及/或該基板配置的處理係以雷射方式進行,所以自由成形為可能的,使各種結構與組件組合可用根據本發明的方法製造。舉例來說,具有大約180mm x 180mm及/或190mm x 190mm的基底面積的接觸材料層可施加至具有200mm x 200mm尺寸的基板。於是在分離側邊緣之後,製造具有190mm x 190mm最大尺寸的基板配接器為可能的,其中此類基板在其整個表面積上設置一層接觸材料。
該接觸材料層的該接觸材料較佳包含燒結助劑和金屬顆粒,尤其是銀顆粒。該燒結助劑係理解為有機化合物。此外,該接觸材料可包含黏合劑及/或脂肪酸。該黏合劑尤其為例如纖維素衍生物的聚合物,舉例來說,甲基纖維素、乙基纖維素、乙基甲基纖維素、羧基纖維素以及羥丙基纖維素。
該脂肪酸可為,尤其是羊脂酸(辛酸)、羊臘 酸(癸酸)、月桂酸(十二酸)、肉豆蔻酸(十四酸)、棕櫚酸(十六酸)、珠光脂酸(十七酸)、硬脂酸(十八酸)、花生酸(花生脂酸/二十酸)、俞樹酸(二十二酸)、木答酸(二十四酸)。
術語燒結助劑於是包括該脂肪酸及/或黏合劑及/或存在於該接觸材料中的有機化合物。該接觸材料層的該接觸材料較佳為燒結膏,尤其是銀燒結膏。該預固定構件較佳包括相同的燒結助劑。金屬顆粒,尤其是銀顆粒,較佳不包含在該預固定構件中。
因為該接觸材料和該預固定材料較佳包括相同的燒結助劑,所以在另一個預固定構件的形成中,例如在預固定期間的黏著劑及/或將該預固定構件施加至該接觸材料層,該接觸材料層無汙染。因此避免不需要的雜質與該接觸材料層結合。
本發明亦基於提供用於連接至電子組件的基板配置的概念,其中該基板配置較佳為根據本發明前述方法的其中一者製造。根據本發明的該基板配置包括基板,尤其是具有一第一側和一第二側的金屬片或金屬條部分、銅片金屬或銅條部分或引線框架或DCB基板或PCB基板,其中在至少一些部分中,一接觸材料層係施加至該基板的該第一側,其中在至少一些部分中,一預固定構件係施加至背對該基板的該接觸材料層的一側。
在本發明的較佳具體例中,該接觸材料層係施加在該基板的該第一側的全面積及/或大約全面積之 上方。
該接觸材料層的該接觸材料包含燒結助劑和金屬顆粒,尤其是銀顆粒。在本發明的較佳具體例中,該預固定構件包含相同的燒結助劑。該燒結助劑係理解為存在於該接觸材料中的脂肪酸及/或黏合劑及/或有機化合物。
該黏合劑尤其是例如纖維素衍生物的聚合物,舉例來說,甲基纖維素、乙基纖維素、乙基甲基纖維素、羧基纖維素以及羥丙基纖維素。
該脂肪酸可尤其為羊脂酸(辛酸)、羊臘酸(癸酸)、月桂酸(十二酸)、肉豆蔻酸(十四酸)、棕櫚酸(十六酸)、珠光脂酸(十七酸)、硬脂酸(十八酸)、花生酸(花生脂酸/二十酸)、俞樹酸(二十二酸)、木答酸(二十四酸)。
該基板係在至少一側上經塗佈,尤其是用包含金(Au)或鎳-金(NiAu)或銀(Ag)或鎳-銀(NiAg)或鎳-鈀-金(NiPdAu)的材料,尤其是經電鍍。另外,有可能將所述材料化學沉積在該基板的至少一側上。
在另一個具體例中,該基板配置具有一托架,尤其是設計為托架薄膜,其中該托架係至少黏著性地結合至該預固定構件。亦可能使該接觸材料在至少一些部分黏著性地結合至該托架。該基板係以俾使該基板的該第一側配置成面向該托架的方式相對於該托架配置。該托架係適於俾使該基板配置可從第一製造工廠運送至另一個製 造工廠及/或從第一製造機器運送至另一個製造機器。該托架可為,舉例來說,具有低黏著力的托架薄膜。此外,該托架可能為UV膠帶。
在本發明的特佳具體例中,該基板具有在該第一側的全部表面上方的該接觸材料層。在本發明的另一個具體例中,該基板具有無施加接觸材料層的側邊緣為可能的,其中該邊緣具有一寬度,俾使該寬度佔該基板總寬度的尤其至多20%、該基板總寬度的尤其至多10%、該基板總寬度的尤其至多5%、該基板總寬度的尤其至多1%。
關於該基板配置的結構,尤其是關於根據本發明的基板配置的優點,參照先前的解釋以及結合根據本發明方法的說明。
本發明係額外地基於提供用於連接電子組件至基板配置的方法的概念。該基板配置可尤其為根據本發明的基板配置及/或借助根據本發明在此說明的方法製造的基板配置。根據本發明用於連接電子組件至基板配置的方法包含以下步驟:- 以俾使一/該基板的一/該第一側配置成面向該電子組件的方式使該基板配置與該至少一電子組件彼此相對定位,- 在至少一些部分中,藉由將一/該預固定構件施加至一接觸材料層的一側預固定該基板配置至該至少一電子組件, - 連接該基板配置至該至少一電子組件。
定位以俾使該基板的一/該第一側配置成面向該電子組件的方式使該基板配置與該至少一電子組件彼此相對定位係首先以俾使該基板配定位置在該電子組件上的方式進行。在另一個具體例中,可設想施加該電子組件至該基板配置。
假使該基板配置包含及/或配置在一托架上,則該基板配置與該施加的接觸材料層和該施加的預固定構件係一起從一/該托架釋放,尤其是在該基板配置和該電子組件相對於彼此定位之前。
在該基板配置和該電子組件相對於彼此定位之後,較佳執行該基板配置與該電子組件的預固定。此預固定係借助在至少一些部分施加預固定構件至該基板的該第一側進行。要如此做的話,進行熱處理為較佳。較佳為施加100-150℃的溫度,俾使該預固定構件經由該施加的熱活化,於是該基板配置可與該電子組件預固定。因為該預固定,對於連接至該基板配置以及該基板配置預固定的該電子組件的此類運送強度可以俾使該電子組件不再能夠由於傳送帶的前進而被搖晃鬆動的方式達到。相反的,該電子組件保持在該預固定的位置。
將該基板與該施加的接觸材料層和該施加的預固定構件一起從一/該托架釋放可借助於噴嘴完成。作為貼裝處理的一部分,該基板與該施加的接觸材料層和該施加的預固定構件可一起施加至電子組件。此可在一步 驟中發生,即在從該托架釋放之後,該基板可立刻放置在該電子組件上。此外,從該托架釋放該基板以及該基板與該接觸材料層和該預固定構件一起定位在該電子組件上係有可能在兩個單獨步驟中發生。
該電子組件可為半導體或DCB基板或PCB基板。在預固定之後,該基板配置係連接至該電子組件。該基板配置至該電子組件的連接,舉例來說,可藉由燒結及/或壓合及/或焊接及/或黏結的方式發生。換句話說,該基板配置係燒結及/或壓合及/或焊接及/或黏結至該電子組件。該基板配置較佳為燒結至該電子組件。要如此做的話,該基板配置具有接觸材料層,尤其是以銀燒結膏的形式。
關於該預固定構件連同根據本發明用於將電子組件連接至基板配置的方法一起,參照先前對於該預固定構件的討論。亦參照之前對於相對於彼此的該預固定構件和該接觸材料層的配置之討論。
運送附加該電子組件的該基板配置係為了在處理爐中連接該基板配置至該電子組件的目的。該處理爐可為,舉例來說,壓力-燒結爐及/或燒結壓機或迴焊爐或層壓爐。
10,10',10"‧‧‧基板配置
11‧‧‧基板
12‧‧‧第一側
13‧‧‧第二側
15‧‧‧接觸材料層
16‧‧‧接觸材料層的第一側
18‧‧‧預固定構件
19‧‧‧邊緣
20‧‧‧托架
25‧‧‧切口
30、30'‧‧‧電子組件
31‧‧‧電子組件的第一側
32‧‧‧電子組件的第二側
40‧‧‧噴嘴
bS‧‧‧該基板的總寬度
bR‧‧‧寬度邊緣
本發明係用下列參照以示範性具體例為基礎的附圖更詳細的解釋,其顯示:圖1-5:用於製造基板配置的方法的個別步驟; 圖6a-8:根據本發明用於連接電子組件至根據第一具體例的基板配置的方法的個別步驟;以及圖9-11:根據本發明用於連接電子組件至根據另一個具體例的基板配置的方法的個別步驟。
下列相同的參考標號係用於相同和等效的部件。
圖1顯示一基板11。該基板11具有一第一側12和一第二側13。該基板11較佳為銅條部分。亦有可能使用銅合金條部分。
此外,有可能提供該基板11在一側或兩側12和13上經塗佈。該第一側12及/或該第二側13係較佳塗佈有金或鎳-金或銀或鎳-銀或鎳-鈀-金,尤其是經電鍍。
此處顯示的例子中,該基板11的該第一側12係設計為平行於該基板11的相對第二側13。
圖2顯示用於形成接觸材料層15的接觸材料係施加至該基板10的該側12。該接觸材料層的該接觸材料15較佳為燒結膏,尤其是銀燒結膏。燒結膏經常由燒結助劑與金屬顆粒所組成。尤其是該金屬顆粒為銀顆粒。該燒結助劑為有機化合物及/或脂肪酸及/或黏合劑。
該接觸材料層15可借助印刷方法施加至該基板11的該第一側12。覆蓋最大可能表面積的接觸材料層15較佳為施加至該基板11的該第一側12。然而,舉例來說,因為所選擇的施加技術為印刷方法,所以仍有窄緣 19,其不具有保持在該基板11上及/或在該基板11的該第一側12上的接觸材料層。
該邊緣19較佳地具有一寬度bR,該寬度佔該基板11的總寬度bS的至多5%。
如圖3顯示,一預固定構件18係施加至該接觸材料層15的該第一側16。該接觸材料層15的該第一側16為該接觸材料層15背對該基板11的該側及/或背對在該基板11上的該第一側12。
該預固定構件18係以液滴狀元件及/或橢圓形元件施加至該接觸材料層的此第一側16。該預固定構件18包含與該接觸材料層的該接觸材料15相同的燒結助劑。因此,在該基板配置10與電子組件接觸時,無汙染物或其他類型的材料被導入接觸材料層15中。
根據圖3,該基板配置10包含該基板11、該接觸材料層15與該預固定構件18。施加至基板11的該接觸材料層15具有40-80μm的層厚度。
如圖4顯示,帶有施加的接觸材料層15與施加的預固定構件18的該基板11係定位在一托架20上,俾使該基板11的該第一側12係配置成面向該托架20,其中該預固定構件18係至少黏著性地結合至該托架20。該托架20可為托架薄膜。此處顯示的例子中,用UV膠帶覆蓋晶圓框架使該基板11與該接觸材料層15和該預固定構件18一起施加至此UV膠帶。在根據圖4的圖中,於是該基板配置10'包含該托架20、該基板11和該接觸材料層15以 及該預固定構件18。
圖5顯示該基板配置10'帶入所欲最終的部件幾何形狀。舉例來說,借助於雷射,舉例來說,去除該邊緣19。此外,該基板11係在連接的情況下與該托架20分離。在該基板10'中創建切口25,使該基板配置10'細分成三個個別的幾何形狀及/或三個較小的基板配置10"。在該側邊緣19的分離以及在該基板11的分離中,該接觸材料層15和該預固定構件18亦被分離及/或在至少一些部分構造化與分離。
該分離的基板配置10"係借助根據圖6a的圖示中的噴嘴40從該托架20釋放。該分離的基板配置10",舉例來說,係在圖5左邊的基板配置10"。該預固定構件18與該托架20之間的黏著性結合係藉由施加拉力至該基板配置10"釋放,使該基板配置10"可借助該噴嘴40再次施加至該電子組件30。該基板配置10"和該電子組件30係以俾使該基板11的該第一側12配置成面向該電子組件30的方式彼此相對定位。
根據圖7,於是在至少一些部分中,經由該預固定構件18施加至該接觸層15的該第一側16,該基板配置10"至該至少一電子組件30有一預固定。該基板配置10"於是借助該預固定構件18在該電子組件30的該第一側31上預固定。該預固定可藉由施加輕微壓力及/或藉由施加熱的方式發生。然而,顯示於此處的示範性具體例的該電子組件30的該第二側32係無附加層及/或組件。
圖8顯示該電子組件30連接至該基板配置的情況。當該基板配置10"連接至該電子組件30時,尤其是在燒結及/或壓合及/或黏結時,該預固定構件18被釋放。此處僅顯示該接觸材料層15。因為該預固定構件18與該層的接觸材料包括相同的燒結助劑,所以該接觸材料層15無汙染。換句話說,在處理之後,該預固定構件及/或該預施加的黏著劑係不起作用且不再存在。
圖9-11顯示關於將至少一電子組件連接至基板配置10的方法的第二具體例。此處顯示的方法步驟通常在圖1至3例示的方法步驟之前,其中該基板13亦可為引線框架、DCB或PCB。於是施加兩個電子組件30和30'至一基板配置10為可能的,在此處顯示的例子中該基板配置不包括托架。該電子組件30和30'係以組裝操作的方式施加。在此處可設想所謂的貼裝處理。
在圖9顯示的例子中,亦可有熱輸入。該電子組件30和30'係各自定位,俾使彼等用該電子組件30和30'的該第一側31面向該基板11的該第一側12,使帶有該基板配置10的該電子組件30和30'的預固定可用該預固定構件18在該接觸材料層15的該第一側16上的方式達成。如圖10顯示,該電子組件30和30'係藉由該預固定構件18及/或藉由預施加的黏著劑保持在適當位置,以用於進一步處理。
在該預固定之後,發生該基板配置10與該電子組件30和30'的真正連接。連接係理解為指該基板配 置10至該電子組件30和30'的接合。該連接可藉由焊接或壓合或燒結或黏結完成。在此情況下,可設想為在處理爐中,舉例來說,在壓力燒結爐及/或在壓力燒結壓機或在迴焊爐或層流爐中,燒結該基板配置10至該電子組件30和30'。在連接時,較佳為燒結,該預固定構件18幾乎完全地去除,尤其是燒盡及/或熔融。在處理之後,該預施加的黏著劑係不起作用且不再存在。
此時,應強調的是,上述的全部方法步驟連同根據圖1至11的具體例和元件,單獨地或以任意組合,尤其是在圖中顯示的細節係主張為本發明的基本要素。

Claims (19)

  1. 一種用於製造連接至一電子組件的一基板配置的方法,其包含以下步驟:-提供具有一第一側和一第二側的基板,-將一接觸材料層施加至該基板的該第一側,-在至少一些部分中,施加一預固定構件至背對該基板的該接觸材料層的一側,其中該基板在施加接觸材料層之後不具有一側邊緣或其具有無施加接觸材料層的一側邊緣,其中該邊緣具有一寬度,俾使該寬度佔該基板總寬度的至多20%。
  2. 如請求項1的方法,其中該基板為一金屬片或一金屬條部分。
  3. 如請求項1或2的方法,其中待提供的該基板或一空白基板係在至少一側上經塗佈。
  4. 如請求項3的方法,其中待提供的該基板或一空白基板係在至少一側上,用包含金(Au)或鎳-金(NiAu)或銀(Ag)或鎳-銀(NiAg)或鎳-鈀金(NiPdAu)的一材料來塗佈。
  5. 如請求項1或2的方法,其中施加至該基板的該接觸材料層具有10-150μm。
  6. 如請求項1或2的方法,其中在一托架上定位帶有該施加之接觸材料層和該施加之預固定構件的該基板,俾使該基板的該第一側配置成面向該托架,其中該預固定構件係至少黏著性地結合至該托架。
  7. 如請求項6的方法,其中在至少一些部分中,該基板的一/該側邊緣係分離的,及/或該基板係構造化及/或分離的。
  8. 如請求項7的方法,其中該側邊緣的分離及/或該基板的構造化及/或該基板的分離係藉由雷射的方式完成。
  9. 如請求項7的方法,其中在至少一些部分中,在分離該側邊緣及/或在構造化該基板及/或在分離該基板時,該接觸材料層及/或該預固定構件係分離的及/或構造化及/或分離的。
  10. 如請求項8的方法,其中在至少一些部分中,在分離該側邊緣及/或在構造化該基板及/或在分離該基板時,該接觸材料層及/或該預固定構件係分離的及/或構造化及/或分離的。
  11. 如請求項1或2的方法,其中該接觸材料層的接觸材料包含燒結助劑和金屬顆粒,其中該預固定構件包含相同的燒結助劑。
  12. 一種用於連接至一電子組件的基板配置,包含帶有一第一側和一第二側的一基板,其中在至少一些部分中,一接觸材料層係施加至該基板的該第一側,其中在至少一些部分中,一預固定構件係施加至背對該基板的該接觸材料層的一側,其中該基板具有在該第一側的全表面積上的一接觸材料層或具有無施加接觸材料層的一側邊緣,其中該邊緣具有一寬度,俾使該寬度佔該基板總寬度的至多20%。
  13. 如請求項12的基板配置,其中該接觸材料層的接觸材料包含燒結助劑和金屬顆粒,其中該固定構件包含相同的燒結助劑。
  14. 如請求項13的基板配置,其中該金屬顆粒係銀顆粒。
  15. 如請求項12或13的基板配置,其中該基板係在至少一側上經塗佈。
  16. 如請求項12或13的基板配置,其中一托架係至少黏結至該預固定構件。
  17. 一種將至少一電子組件連接至一如請求項12的基板配置,及/或連接至一如請求項1的方法製造的基板配置的方法,該方法包含以下步驟:-以俾使一/該基板的一/該第一側配置成面向該電子組件的方式使該基板配置與該至少一電子組件彼此相對定位,-藉由在至少一些部分中將一/該預固定構件施加至一接觸材料層的一側,預固定該基板配置至該至少一電子組件,-連接該基板配置至該至少一電子組件。
  18. 如請求項17的方法,其中,該基板和該施加的接觸材料層與該施加的預固定構件係一起從一/該托架釋放。
  19. 如請求項17或18的方法,其中在連接該基板配置至該至少一電子組件時,該基板配置係燒結及/或加壓及/或焊接及/或膠合至該至少一電子組件。
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3553812A1 (de) * 2018-04-11 2019-10-16 Heraeus Deutschland GmbH & Co KG Substratanordnung zur verbindung mit einem elektronikbauteil
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EP3611761A1 (de) * 2018-08-13 2020-02-19 Heraeus Deutschland GmbH & Co KG Verfahren und metallsubstrat zum kontaktieren eines leistungshalbleiters durch ein kontaktierungsmittel mit zumindest einem kontaktierungsfreien bereich als belastungsreduzierende struktur
EP3627544A1 (de) * 2018-09-20 2020-03-25 Heraeus Deutschland GmbH & Co. KG Substratanordnung zum verbinden mit zumindest einem elektronikbauteil und verfahren zum herstellen einer substratanordnung
DE102018221148A1 (de) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Verfahren zum Herstellen eines Substratadapters und Substratadapter zum Verbinden mit einem Elektronikbauteil
US11497112B2 (en) 2020-12-11 2022-11-08 Toyota Motor Engineering & Manufacturing North America, Inc. Driver board assemblies and methods of forming a driver board assembly
DE102021207267A1 (de) 2021-07-09 2023-01-12 Heraeus Deutschland GmbH & Co. KG Als temporäres Fixiermittel verwendbare Zusammensetzung
EP4443487A1 (de) 2023-04-04 2024-10-09 Heraeus Electronics GmbH & Co. KG Substratanordnung mit oberflächenstruktur
EP4443488A1 (de) 2023-04-04 2024-10-09 Heraeus Electronics GmbH & Co. KG Substratanordnung mit oberflächenstruktur

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3928753B2 (ja) * 1996-08-06 2007-06-13 日立化成工業株式会社 マルチチップ実装法、および接着剤付チップの製造方法
US20050127134A1 (en) * 2003-09-15 2005-06-16 Guo-Quan Lu Nano-metal composite made by deposition from colloidal suspensions
JP2006202938A (ja) * 2005-01-20 2006-08-03 Kojiro Kobayashi 半導体装置及びその製造方法
DE102006033073B3 (de) * 2006-07-14 2008-02-14 Danfoss Silicon Power Gmbh Verfahren zur Schaffung einer hitze- und stoßfesten Verbindung des Baugruppen-Halbleiters und zur Drucksinterung vorbereiteter Halbleiterbaustein
DE102008034946B4 (de) * 2008-07-26 2016-05-19 Semikron Elektronik Gmbh & Co. Kg Herstellungsverfahren eines Edelmetallverbindungsmittels
EP2560197A4 (en) * 2010-03-19 2016-04-27 Furukawa Electric Co Ltd CONDUCTIVE CONNECTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME
DE102010021765B4 (de) 2010-05-27 2014-06-12 Semikron Elektronik Gmbh & Co. Kg Herstellungsverfahren zur Anordnung zweier Verbindungspartner mittels einer Niedertemperatur Drucksinterverbindung
DE102010021764B4 (de) * 2010-05-27 2014-09-25 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Niedertemperatur Drucksinterverbindung zweier Verbindungspartner
DE102010030317B4 (de) * 2010-06-21 2016-09-01 Infineon Technologies Ag Schaltungsanordnung mit Shuntwiderstand
DE102010044329A1 (de) 2010-09-03 2012-03-08 Heraeus Materials Technology Gmbh & Co. Kg Kontaktierungsmittel und Verfahren zur Kontaktierung elektrischer Bauteile
HUE028880T2 (en) 2011-09-20 2017-01-30 Heraeus Deutschland Gmbh & Co Kg Paste and process for connecting electronic components with a carrier
JP5971909B2 (ja) * 2011-09-21 2016-08-17 古河電気工業株式会社 導電性ペースト、及び該導電性ペーストを焼成して得られる接合体
DE102012201935A1 (de) * 2012-02-09 2013-08-14 Robert Bosch Gmbh Verbindungsanordnung eines elektrischen und/oder elektronischen Bauelements
DE102012202727B4 (de) 2012-02-22 2015-07-02 Vectron International Gmbh Verfahren zur Verbindung eines ersten elektronischen Bauelements mit einem zweiten Bauelement
SG2014014716A (en) * 2012-07-30 2014-08-28 Erich Thallner Substrate composite, method and device for bonding of substrates
DE102012109156A1 (de) * 2012-09-27 2014-03-27 Osram Opto Semiconductors Gmbh Bauteilanordnung und Verfahren zum Herstellen von elektrischen Bauteilen
KR20150072381A (ko) 2012-10-15 2015-06-29 세키스이가가쿠 고교가부시키가이샤 유기 무기 하이브리드 입자, 도전성 입자, 도전 재료 및 접속 구조체
JP5664679B2 (ja) * 2013-03-07 2015-02-04 三菱マテリアル株式会社 パワーモジュール用基板の製造方法
DE102014104272A1 (de) * 2014-03-26 2015-10-01 Heraeus Deutschland GmbH & Co. KG Träger und Clip jeweils für ein Halbleiterelement, Verfahren zur Herstellung, Verwendung und Sinterpaste
DE102014109766B3 (de) * 2014-07-11 2015-04-02 Heraeus Deutschland GmbH & Co. KG Verfahren zum Herstellen eines Substratadapters, Substratadapter und Verfahren zum Kontaktieren eines Halbleiterelements
DE202015001441U1 (de) * 2015-02-24 2015-03-18 Vincotech Gmbh Leistungshalbleitermodul mit kombinierten Dickfilm- und Metallsinterschichten

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