TWI650049B - 印刷配線板及其製造方法 - Google Patents

印刷配線板及其製造方法 Download PDF

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TWI650049B
TWI650049B TW104121076A TW104121076A TWI650049B TW I650049 B TWI650049 B TW I650049B TW 104121076 A TW104121076 A TW 104121076A TW 104121076 A TW104121076 A TW 104121076A TW I650049 B TWI650049 B TW I650049B
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area
conductor layer
pattern
printed wiring
wiring board
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TW104121076A
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TW201611673A (zh
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佐伯真理
石岡卓
中村聡
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日商京瓷股份有限公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/14—Layered products comprising a layer of metal next to a fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/20—Layered products comprising a layer of metal comprising aluminium or copper
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
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    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B27/18—Layered products comprising a layer of synthetic resin characterised by the use of special additives
    • B32B27/20—Layered products comprising a layer of synthetic resin characterised by the use of special additives using fillers, pigments, thixotroping agents
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B5/08—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by structural features of a fibrous or filamentary layer the fibres or filaments of a layer being of different substances, e.g. conjugate fibres, mixture of different fibres
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    • B32B7/04—Interconnection of layers
    • B32B7/06—Interconnection of layers permitting easy separation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
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    • C23C18/1651—Two or more layers only obtained by electroless plating
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
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    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
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Abstract

本發明提供一種印刷配線板及其製造方法。印刷配線板係具備：在絕緣樹脂的兩面形成有導電性金屬層的絕緣板；以及形成在絕緣板的兩面且根據區域而不同的電路圖案的導體層；形成在絕緣板的兩面的電路圖案係包含線寬精確度為±10μm以下的圖案，並且電路圖案的面積密集的區域的導體層厚度與稀疏的區域的導體層厚度具有下式的關係：密集區域的導體層厚度/稀疏區域的導體層厚度=0.7至1.0。

Description

印刷配線板及其製造方法
本發明係關於一種形成於正反面的導體層的厚度差較小的印刷配線板及其製造方法。
在基板上形成電路時，係有減成法(subtractive process)和加成法(additive process)。如日本特開2010-87213號公報所記載，對於減成法而言，電路寬度的精確度係由導體厚度來決定，因而形成精細圖案是有其極限。
相對於此，對於加成法而言，電路寬度的精確度不易受導體厚度影響，所以例如在電路寬度為50μm以下且±10μm的高精確度的精細圖案形成方面優異。在加成法中，有全加成法和半加成法，主流的技術是半加成法。進而在半加成法中，衍生技術有MSAP(Modified Semi Additive Process，改進型半加成法)。
對於半加成法而言，如日本特開2003-8222號公報以及日本特開2007-88476號公報所記載，在整個絕緣樹脂形成無電解鍍覆的晶種層，在該晶種層上形成鍍覆 阻劑。接著，使鍍覆阻劑進行曝光、顯影，去除欲形成電路圖案、通孔等之部位的鍍覆阻劑。接著，在去除了鍍覆阻劑的部分，以電解圖案鍍覆來形成電路圖案、通孔等。最後，去除鍍覆阻劑，並利用閃蝕刻(flash etching)去除晶種層(無電解鍍覆層)，並去除無電解鍍覆的觸媒，藉此形成電路。
對於MSAP而言，如日本特開2007-88476號公報所記載，除了使用層疊在絕緣樹脂層的銅作為晶種層、不需要去除觸媒以外，與半加成法相同。對於MSAP而言，在形成有通孔的情況下，雖然需要至少在通孔下孔(空洞)內壁進行無電解鍍覆作為晶種層，但無需像半加成法那樣在整個絕緣樹脂表面進行無電解鍍覆。因此，能夠比較容易地形成晶種層。而且，無需去除在無電解鍍覆時作為觸媒來使用的鈀。根據這些特徵，MSAP係與半加成法相比能夠比較容易地形成微細電路。
在日本特開2010-87213號公報所記載的減成法中，成為電路的下部向兩側拉得較長的裙擺狀。裙擺量係由導體層的厚度所決定，電路越精細，裙擺量與電路寬度的比率越高。因此，若欲形成微細電路，則形成電路的導體層的剖面形狀係接近於梯形。若是更加精細的電路則成為三角形，就極端的例示而言，裙擺大到不能構成三角形的頂點的程度，且導體厚度和電路寬度小於設計值，而不再能說是正常的電路形成。對於這樣的形狀的電路而言，還存在有電氣特性不穩定的問題。
對於在日本特開2003-8222號公報以及日本特開2007-88476號公報所記載的半加成法、MSAP中進行的電解圖案鍍覆，可列舉出如下的(I)、(II)之問題點。
(I)導體層的厚度(鍍覆厚度)會對圖案的疏密有較大之影響
用於實施電解圖案鍍覆的電流的密度係受到電路圖案的面積疏密之影響，所以在面內有圖案面積密集的區域和稀疏的區域的情況下，鍍覆厚度的分布會變差。因此，難以使面內成為均勻的鍍覆厚度。尤其是在絕緣板的正反兩面上電路圖案的面積不相同、且電路圖案的疏密大幅不同的情況等時，在圖案較稀疏的面，電流密度較高，且導體層(鍍覆厚度)較厚。相反地，圖案較密集的面存在有電流密度較低、且導體層(鍍覆厚度)較薄的問題點。
(II)電流值的繞流所引起的鍍覆厚度的減少
在電解圖案鍍覆時，在基板的正反兩面電路圖案的面積大幅不同、且在正反施加不同的電流值的情況下，在電流值較低的一方會發生電流值的繞流現象。因此在連續投入基板時，確認到會有鍍覆厚度按照鍍覆投入順序而減少的傾向。為了緩和該現象，雖必須使比通常的虛設板的塊數更多的塊數流通，但問題並未完全消除。
在正反施加不同的電流值的情況下，電流值的繞流量會因投入塊數而不同。由於該影響，而會發生各面板的鍍覆厚度因所投入的塊數而變化的現象。
本發明的課題在於，提供一種在印刷配線板的每個區域電路圖案的面積不同的情況下，抑制各區域的電路圖案的疏密對導體層的厚度造成的影響的印刷配線板及其製造方法。
本實施形態之印刷配線板係具備：在絕緣樹脂的兩面形成有導電性金屬層的絕緣板；及形成在絕緣板的兩面並且根據區域而不同的電路圖案的導體層。形成在絕緣板之兩面的電路圖案包含線寬精確度為±10μm以下的圖案，並且電路圖案的面積密集的區域的導體層厚度與電路圖案的面積稀疏的區域的導體層厚度具有下式的關係：密集區域的導體層厚度/稀疏之區域的導體層厚度=0.7至1.0
本實施形態之印刷配線板的製造方法包括：製作在絕緣樹脂的兩面形成有導電性金屬層的絕緣板的步驟；在絕緣板的兩面形成鍍覆阻劑，接著進行曝光以及顯影，而在兩面分别形成不同的阻劑圖案的步驟；在形成有阻劑圖案的絕緣板的兩面實施電解圖案鍍覆，形成導體層的步驟，該導體層係構成線寬精確度為±10μm以下、且圖案根據區域而不同的電路圖案；從絕緣板的兩面去除前述鍍覆阻劑及前述導電性金屬層，接著在絕緣板的兩面形成焊接阻劑層的步驟；以及在電路圖案的面積稀疏的區域中係與前述電路圖案一同形成虛設圖案，以使絕緣板的兩面中電路圖案的面積密集的區域的電路圖案面積成為電 路圖案的面積稀疏區域的電路圖案面積之1.0至1.2倍，在進行前述電解圖案鍍覆後，從虛設圖案處去除導體層的步驟。
根據本實施形態，即使在每個區域電路圖案的面積的疏密大幅不同的情況下，構成各區域的電路圖案的導體層的厚度也大致均勻。因此，電流密度也均勻，具有製造良率及可靠性提升的效果。
根據本實施形態的印刷配線板的製造方法，關於印刷配線板的每個區域中的電路圖案的面積不同的情況，藉由在電路圖案的面積稀疏的區域追加虛設圖案，即能夠使各區域的電路圖案的面積的疏密差異降低並均勻化。因此，導體層的厚度穩定且均勻。
此外，以往為了減輕因電路圖案的疏密所造成的影響，從1塊面板切割出的印刷配線板(產品)的數量會受到限制。在本發明中，藉由對產品中的電路圖案的面積稀疏的區域賦予虛設圖案，即能夠提高從1塊面板切割出的印刷配線板(產品)的數量，且實現生產性提升及成本降低。對於因電氣特性等理由而不能在出廠的產品內賦予虛設圖案的產品也能夠適用。
在印刷配線板的兩面(正反)施加不同的電流值的情況下，會發生電流的繞流。由此，會發生鍍覆厚度(導體層的厚度)按照鍍覆的投入順序而減少之情形。相對於此，藉由如上所述減低正反的圖案的疏密之差，即能夠在正反施加相同的電流值。由此，不會發生電流的繞 流而能夠防止鍍覆厚度按照投入順序而減少之情形。依據該效果，無需藉由虛設板來緩和鍍覆厚度的減少，且大幅削減虛設板的投入數，從而能夠實現生產性提升及成本降低。而且，由於不會發生電流的繞流，因此鍍覆厚度能夠不取決於投入塊數而得到相同厚度。因此，印刷配線板的品質均勻，而能夠實現製造良率以及可靠性的提升。
而且，即使應用不適於圖案鍍覆的鍍覆浴，也能夠得到均勻的鍍覆厚度。
1‧‧‧絕緣樹脂
2‧‧‧導電性金屬箔
3‧‧‧通孔
3a‧‧‧通孔下孔
4‧‧‧鍍覆阻劑
5、5’‧‧‧電路圖案
6‧‧‧導體層
7‧‧‧蝕刻阻劑
8‧‧‧焊接阻劑
10‧‧‧絕緣板
11‧‧‧鍍覆阻劑圖案
31‧‧‧晶種層
51‧‧‧虛設圖案
51a‧‧‧虛設圖案用鍍覆阻劑開口
100‧‧‧印刷配線板
第1圖是表示本發明的一實施形態之印刷配線板的剖視圖。
第2A至2K圖是表示本發明的一實施形態之印刷配線板的製造方法的剖視圖。
如第1圖所示，本發明的一實施形態之印刷配線板100係由絕緣板10、貫通前述絕緣板10的通孔3、導體層6及焊接阻劑8所形成，其中，前述絕緣板10由絕緣樹脂1及形成在其兩面的導電性金屬箔2(導電性金屬層)所構成，前述導體層6係由形成在前述絕緣板10的上部和前述通孔3的內壁面的電解圖案鍍覆所構成。在前述絕緣板10的兩面，形成有由導體層6所構成、且圖案的面積不同的電路圖案5、5’。
就形成絕緣樹脂1的原材料而言，可列舉 例如環氧樹脂、雙馬來醯亞胺-三嗪樹脂、聚醯亞胺樹脂、聚苯醚(PPE)樹脂等有機樹脂等。這些有機樹脂也可將2種以上進行混合來使用。在使用有機樹脂作為絕緣樹脂1的情況下，較佳為在有機樹脂中混合補強材來使用。就補強材而言，可列舉例如玻璃纖維、玻璃不織布、醯胺不織布、醯胺纖維、聚酯纖維等。這些補強材也可以將2種以上予以併用。絕緣樹脂1更佳為由玻璃纖維等的含有玻璃材料的有機樹脂所形成。而且，在絕緣樹脂1中，也可包含二氧化矽、硫酸鋇、滑石、黏土、玻璃、碳酸鈣、氧化鈦等無機填充材料。
例如在藉由MSAP來形成電路圖案時，在前述絕緣樹脂1的表面黏貼導電性金屬箔2作為電解鍍覆的晶種層，並藉由衝壓處理等成為絕緣板10。就該導電性金屬箔2而言，較佳為例如薄銅箔。
在絕緣板10上形成有用以形成電路圖案5的導體層6，並且形成有貫通絕緣板10的通孔3。在通孔3的內壁面也形成有導體層6。就前述導體層6而言，例舉例如導電性樹脂層、金屬鍍覆層等，特別是從蝕刻等的加工的容易度來看最好是銅鍍覆層。電路圖案5、5’係在一部分或整體包含對於減成法而言製作困難的線寬為50μm以下的纖細的圖案。線寬的精確度最好是±10μm以下。
電路圖案5、5’係彼此不同的圖案，且形成在絕緣板10的兩面。而且，電路圖案5、5’之面積密集的區域的導體層6的厚度、及面積稀疏的區域的導體層 6的厚度大致均勻，具體來說具有下述關係式。
密集的區域的導體層厚度/稀疏的區域的導體層厚度=0.7至1.0
在此，若就本實施形態的例示而言，所謂區域係指分別具有電路圖案5、5’的絕緣板10的正反面。但是，本發明並不限定於此，例如，亦可是在絕緣板的面內圖案面積不同的區域。在該情況下，圖案面積密集的區域和圖案面積稀疏的區域並不一定相鄰接。所謂密集的區域和稀疏的區域既可是依兩個區域將整個面分成兩部分，亦可是面內的一部分。
接著，說明本發明的一實施形態之印刷配線板的製造方法。本發明的一實施形態之印刷配線板的製造方法係包括下述的步驟(i)至(viii)。
(i)製作在絕緣樹脂的兩面層疊有導電性金屬箔的絕緣板的步驟。
(ii)製作貫通前述絕緣板的通孔下孔的步驟。
(iii)在前述絕緣板的兩面形成鍍覆阻劑，以進行曝光及顯影，且在兩面分別形成不同的阻劑圖案的步驟。
(iv)在絕緣板的兩面實施電解圖案鍍覆，在兩面形成構成圖案不同的電路圖案以及虛設圖案的導體層的步驟。
(v)在前述電解圖案鍍覆後，藉由減成法來去除虛設圖案的步驟。
(vi)剝離鍍覆阻劑和蝕刻阻劑的步驟。
(vii)去除導電性金屬箔(晶種層)的步驟。
(viii)形成焊接阻劑的步驟。
依據第2A至2K圖來說明本發明的一實施形態之印刷配線板的製造方法。絕緣樹脂1、導電性金屬箔2、通孔3等係如上所述，省略詳細說明。
首先，如第2A圖所示，準備在絕緣樹脂1的兩面形成有導電性金屬箔2的絕緣板10。就導電性金屬箔2而言，可使用例如厚度3μm左右的薄銅箔。絕緣板10的形成方法，亦可例如將附有樹脂之銅箔層疊於絕緣樹脂板，還可例如將由厚度3μm的薄銅箔與厚度18μm的載體箔構成的附有載體之銅箔隔著預浸料坯(prepreg)層疊於絕緣樹脂。在使用了附有載體之銅箔的情況時，在層疊後去除載體箔。而且，絕緣板10也可以是預先形成有薄銅箔的覆銅層疊板。
接著，如第2B圖所示，形成貫通絕緣板10的通孔下孔3a。通孔下孔3a亦可藉由鑽具或者雷射來形成。在藉由雷射來形成時，亦可將通孔下孔3a正上方的導電性金屬箔2同時進行開口。
就通孔下孔3a而言，即便使用鑽具或雷射之任一種方法，有時都會在內壁面等殘留樹脂殘渣。在這種情況下，藉由去污處理來去除樹脂殘渣。
再者，至少在通孔下孔3a的內壁面，以無電解鍍覆來形成晶種層31。
接著，如第2C圖所示，在兩面形成用以進 行後述的電解圖案鍍覆的鍍覆阻劑4。就鍍覆阻劑4而言，使用電解圖案鍍覆專用的乾膜(例如日立化成(股)製RY-3525等)，將其層壓於絕緣板10。
接著，如第2D圖所示，使鍍覆阻劑4進行曝光、顯影，形成用以製作後述的電路圖案部分及虛設圖案的鍍覆阻劑圖案11。在此，以符號51a表示虛設圖案用鍍覆阻劑開口。
接著，如第2E圖所示，在通孔下孔3a的內壁面以及絕緣板10的兩面實施電解圖案鍍覆來形成導體層6，並形成通孔3、電路圖案5、5’及虛設圖案51。導體層6的鍍覆厚度(導體厚度)例如設為15μm。
如上所述，電路圖案5、5’雖然是彼此面積不同的圖案，但面積密集之區域的導體層6的厚度和面積稀疏之區域的導體層6的厚度大致均等。為了形成這樣的電路圖案5、5’，係在電路圖案面積稀疏的區域與前述電路圖案5一起形成虛設圖案51，以使絕緣板10的各區域中電路圖案面積較大的密集區域的電路圖案5’的面積與稀疏區域的電路圖案5的面積相比為1.2倍以下，較佳為1.2倍至1.0倍。由此，絕緣板10的各區域的電路圖案面積大致均等，而能夠實現上述關係式：密集區域的導體層厚度/稀疏區域的導體層厚度=0.7至1.0。
在尺寸為50mm×50mm至150mm×150mm的印刷配線板中，在電路圖案5、5’的疏密的面積比為密集的導體面積/稀疏的導體面積=5以上的情況時，密集區 域的導體層厚度/稀疏區域的導體層厚度=0.4至1.0。對此，藉由導入虛設圖案51，並將該比例抑制在1.2以下，而能夠降低各區域的導體層厚度之差。
接著，如第2F圖所示，在導體層6、通孔3、電路圖案5、5’及虛設圖案51的表面形成乾膜(例如旭化成電子材料(股)製AQ-1558等)的蝕刻阻劑7。之後，如第2G圖所示，進行曝光、顯影，使虛設圖案51露出。
接著，如第2H圖所示，使用減成法以蝕刻方式將虛設圖案51選擇性地去除。此時，虛設圖案51下表面的導電性金屬箔2也被去除。
接著，如第2I圖所示，剝離蝕刻阻劑7和 鍍覆阻劑圖案11。
接著，如第2J圖所示，藉由閃蝕刻來去除從導體層6露出的導電性金屬箔2。
最後，如第2K圖所示，在表面的預定位置形成焊接阻劑8，以得到印刷配線板100。就焊接阻劑8的形成方法的而言，首先，使用噴塗、輥塗、簾塗、網版法等來塗佈感光性液狀焊接阻劑並進行乾燥、或者利用輥層壓來黏貼感光性乾膜、焊接阻劑。然後，只要進行曝光及顯影使焊墊部分開口並進行加熱硬化、實施外形加工即可。焊接阻劑厚度例如設為20μm。
在形成焊接阻劑8之前，也可以對形成面進行CZ處理等銅的粗糙化處理。也可以在焊接阻劑8的 開口部形成3μm以上之厚度的無電解鎳鍍覆，且在其上形成0.03μm以上(較佳為0.05μm以上，引線接合用途的情況下為0.3μm以上)的厚度的無電解金鍍覆。並且，亦有在其上實施焊料預塗的情況。也可以不利用無電解鍍覆而利用電解鍍覆來形成。也可以不是鍍覆而是形成水溶性防銹有機被膜(例如四國化成工業(股)製Tafuesu等)，或者亦可形成無電解銀鍍覆、無電解錫鍍覆。
本發明並不限定於上述的一實施形態，在申請專利範圍所記載的範圍內能夠進行各種變更、改良。
例如，本實施例所示的印刷配線板的製造方法係以雙面板為例進行說明，但並不限於雙面板，毋庸置疑當然也能夠適用於多層板、積層多層板等，且能夠適用於外層電路、內層電路等所有印刷配線板的電路面。
上述係以MSAP來說明電路形成方法，但並不限定於MSAP，也能夠應用半加成法。
通孔並不限於貫通孔，也能夠應用非貫通孔。

Claims (10)

  1. 一種印刷配線板，係具備在絕緣樹脂的兩面形成有導電性金屬層的絕緣板、及形成在絕緣板的兩面並且根據區域而不同的電路圖案的導體層，形成在絕緣板之兩面的電路圖案係包含線寬精確度為±10μm以下的圖案，並且電路圖案的面積密集的區域的導體層厚度與電路圖案的面積稀疏的區域的導體層厚度具有下式的關係：密集區域的導體層厚度/稀疏區域的導體層厚度=0.7至1.0。
  2. 如申請專利範圍第1項所述之印刷配線板，其中，前述印刷配線板的尺寸為50mm×50mm至150mm×150mm。
  3. 如申請專利範圍第1項所述之印刷配線板，其中，前述絕緣板係具有在內壁面形成有導體層的通孔。
  4. 如申請專利範圍第1項所述之印刷配線板，其中，前述電路圖案係包含線寬為50μm以下的圖案。
  5. 如申請專利範圍第1項所述之印刷配線板，其中，前述區域係具有相互不同之電路圖案的前述絕緣板的正反面。
  6. 如申請專利範圍第1項所述之印刷配線板，其中，前述區域係在前述絕緣板的面內之電路圖案的面積不同的區域。
  7. 一種印刷配線板的製造方法，係包括：製作在絕緣樹脂的兩面形成有導電性金屬層的絕 緣板的步驟；在絕緣板的兩面形成鍍覆阻劑，接著進行曝光及顯影，而在兩面分別形成不同的阻劑圖案的步驟；在形成有阻劑圖案之絕緣板的兩面實施電解圖案鍍覆，形成導體層的步驟，該導體層係構成線寬精確度為±10μm以下、且圖案根據區域而不同的電路圖案；以及從絕緣板的兩面去除前述鍍覆阻劑及前述導電性金屬層，接著在絕緣板的兩面形成焊接阻劑層的步驟，其中，前述印刷配線板的製造方法還包括：在電路圖案的面積稀疏的區域中係與前述電路圖案一同地形成虛設圖案，以使絕緣板的兩面中之電路圖案的面積密集的區域的電路圖案面積成為電路圖案的面積稀疏區域的電路圖案面積之1.0至1.2倍，在進行前述電解圖案鍍覆後，從虛設圖案處去除導體層的步驟。
  8. 如申請專利範圍第7項所述之印刷配線板的製造方法，其中，導體層之面積密集的區域的導體層厚度與導體層之面積稀疏的區域的導體層厚度係具有下式的關係：密集區域的導體層厚度/稀疏區域的導體層厚度=0.7至1.0。
  9. 如申請專利範圍第7項所述之印刷配線板的製造方法，其中，藉由減成法從虛設圖案處去除導體層。
  10. 如申請專利範圍第7項所述之印刷配線板的製造方法，係包括：在前述絕緣板形成通孔下孔，在該通孔下孔的內壁面及絕緣板的兩面實施電解圖案鍍覆來形成導體層的步驟。
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