TWI623365B - 腔穴內焊料互連技術(二) - Google Patents

腔穴內焊料互連技術(二) Download PDF

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Publication number
TWI623365B
TWI623365B TW105117034A TW105117034A TWI623365B TW I623365 B TWI623365 B TW I623365B TW 105117034 A TW105117034 A TW 105117034A TW 105117034 A TW105117034 A TW 105117034A TW I623365 B TWI623365 B TW I623365B
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Taiwan
Prior art keywords
solder
bump
bumps
cavity
solder balls
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Application number
TW105117034A
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English (en)
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TW201716166A (zh
Inventor
胡釧
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英特爾公司
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Publication of TW201716166A publication Critical patent/TW201716166A/zh
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Publication of TWI623365B publication Critical patent/TWI623365B/zh

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0018Brazing of turbine parts
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • B23K1/203Fluxing, i.e. applying flux onto surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06Solder feeding devices; Solder melting pans
    • B23K3/0607Solder feeding devices
    • B23K3/0623Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
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    • BPERFORMING OPERATIONS; TRANSPORTING
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    • Y10T428/12222Shaped configuration for melting [e.g., package, etc.]

Abstract

一互連技術可使用模製焊料來界定焊球。一遮罩層可被圖案化以形成腔穴及積設於該等腔穴中的焊料糊料。加熱時焊球即可形成。腔穴由間隔壁來界定以阻止焊球在一結合過程中發生橋接。在某些實施例中,連接至該等焊球的焊球凸塊可能具有比焊球之接觸面更大的接觸面。

Description

腔穴內焊料互連技術(二) 發明領域
本發明係有關於腔穴內焊料互連技術。
發明背景
此大體上有關於積體電路互連技術。
積體電路互連技術以機械及電氣形式連接二電子組件。例如,焊球可用以連接一積體電路至一印刷電路板,諸如,一母板。該積體電路利用中介的焊球被置於該母板上。在一被稱為回流焊的過程中,在加熱時焊料可被軟化且一焊接接頭形成於裝置之間。
雖然此類型的表面黏著或C4連接已取得了高度成功,但是增加可被形成的互連之密度仍是一持續的想望。單位面積上可形成的互連越多,所產生的裝置就可以越小。一般說來,裝置越小,它們的成本就越低且它們的性能就越高。
此外,現存裝置可能易於發生一些故障,包括焊球與其他組件之間之壓力或疲勞相關故障,諸如焊接接頭下面的低介電常數介電質之脫層。其他故障包括橋接故障, 其中焊料從一連接橋接至一相鄰連接。
依據本發明之一實施例,係特地提出一種裝置,該裝置包含:一平面表面;複數個壁,該等複數個壁從該表面向外延伸並界定出在該等壁之間的數個腔穴;形成於該等腔穴各者之中的一焊料凸塊;及在該等焊料凸塊上的數個焊球,該等焊球之接觸面小於等於該等焊料凸塊之接觸面。
10、10c‧‧‧基板
12‧‧‧焊盤/凸塊
12b、12c‧‧‧凸塊
12d‧‧‧焊料凸塊
14‧‧‧遮罩層/被蝕刻遮罩層/層
15、19‧‧‧壁之一部分
16、16a、16b‧‧‧腔穴
17‧‧‧腔穴間壁/壁
17a‧‧‧二層壁
17b~17d‧‧‧壁
18‧‧‧焊料糊料/印刷焊料
20、20a~20d‧‧‧焊球
22、22a、22b‧‧‧結構
24‧‧‧直立焊盤
24a‧‧‧焊盤
24b‧‧‧突出物
26、28‧‧‧疊置部分/材料
26‧‧‧內部/材料/內層
28‧‧‧外部/材料/層
30‧‧‧層
32‧‧‧焊料糊料
34‧‧‧焊料糊料之一部分
P‧‧‧壓力
S‧‧‧刮刀
L1、L2‧‧‧長度
0/L‧‧‧距離
第1圖為一早期階段的一實施例之一放大截面圖;第2圖為依據一實施例,一其中一塗層已被塗敷並圖案化的後續階段之一放大截面圖;第3圖為依據一實施例,一涉及焊料糊料印刷的後續階段之一放大截面圖;第4圖為依據一實施例,一涉及回流焊的後續階段之一放大截面圖;第5圖為依據一實施例,一繪示二組件之間之互連的後續階段之一放大截面圖;第6圖為另一實施例之一放大截面圖;第7圖為又一實施例之一放大截面圖;第8圖為依據一實施例,一焊球及焊盤之一放大圖;第9圖為繪示一用以施用焊料糊料之實施例之一放大截面圖; 第10圖為一腔穴間壁之一實施例之一放大截面圖;以及第11圖為又一實施例之一放大截面圖。
較佳實施例之詳細說明
依據某些實施例,一互連技術可在焊料凸塊之間使用介入的腔穴間壁來維持焊接互連之間之分離。在某些情況下,這些壁可減小焊料連接之橋接或裂開故障。除此之外,在某些情況下,該等連接之可靠性也可改進。
在某些實施例中,焊料可被模製在一組件上的腔穴中之合適的位置以使其該組件連接至另一組件,而不是積設焊球。接著焊球可形成於腔穴內的合適位置。因此,在某些實施例中,該等腔穴間壁可在相鄰的焊接接頭之間提供分隔,減小橋接,且在某些實施例中准許較小的互連間距。除此之外,中介壁可用以強化或支撐焊接接頭,特別是相應於橫向負荷。
依據第1圖中所示之一實施例,一基板10可能具有多個形成於其上的金屬焊盤或凸塊12。基板10可以是適於連接積體組件的任何組件,包括一積體電路晶圓、一晶粒、一印刷電路板或甚至一封裝積體電路。在某些實施例中,凸塊12可由銅形成。
在某些情況下,凸塊12可能大於習知的凸塊。較大的凸塊可用以減少凸塊與焊球連接之應力。有利的是令凸塊大於焊球,但是在某些情況下,典型的是一焊球大於其底下的凸塊。
應力經由一較小面積耦合,在本發明之一些實施例中,經由較大凸塊耦合,在某些情況下減小凸塊下的應力。因此,在某些實施例中,使凸塊大於所產生的焊球之接觸面是有利的。
參照第2圖,一遮罩層14,諸如光阻劑,可被塗敷並圖案化。圖案化之結果為腔穴16形成於凸塊12之每一者上。除此之外,一中介的腔穴間壁17形成於腔穴16之間。壁17相當於被蝕刻遮罩層14之殘留物。需指出的是在某些實施例中,壁17可以是T形的,其一部分15延伸在相鄰凸塊12之間且一部分延伸在相鄰腔穴16之間。因此,壁17之一部分19實際上覆蓋在凸塊12之一端部。
接著,如第3圖中所示者,第2圖之結構,包括其腔穴16,作用為一用以印刷焊料糊料18的有效模具。焊料糊料18積設於腔穴16內。
在某些實施例中,焊料為在助焊基質中具有一較小尺寸之焊料粉末微球的焊料糊料。在某些實施例中,焊料粉末具有典型地為腔穴16之厚度或深度的一最小特徵尺寸之七分之一或更小的直徑。
接著,參照第4圖,焊料回流,導致印刷焊料18呈現一具有一與凸塊12鄰接的平坦表面的曲面結構或焊球之形狀。還應觀察到的是焊球20之體積小於所積設糊料18體積。其中一個原因為助焊基質之揮發。焊球20之曲面形狀為層14上之焊接材料之表面能量或潤濕角的一函數。
參閱第5圖,第4圖中所示之基板10可接著與結構 22接合。茲舉數例,結構22可以是一積體電路晶片、一積體電路晶圓、一基板或一印刷電路板。結構22可能具有直立焊盤24,每一者被製作成可容納在一腔穴16內並與其中之一焊球20接合的尺寸。
在某些實施例中,直立焊盤24與焊球20接合並滲透至其中,形成一強連接。實際上,該連接是三維的。相較於習知的焊球連接技術,互連的表面積大於習知的表面黏著表面積,在某些實施例中產生一強得多的連接。在某些實施例中,一超過基板10之重量的壓力P被施加以產生焊盤24對焊球20之此一相互接合及滲透。
依據另一實施例,壁17可由第6圖中所示之由疊置部分26及28組成的一個二層壁17a來取代。內部26可由一材料形成且外部28可由一不同的材料形成,使得材料28可被移除,而僅留下材料26。例如,在某些實施例中,材料28可由實質上不影響材料26的蝕刻劑移除。
因此,必要時移除層28的結果,完全被形成於腔穴16內的焊球20a可能突出僅由內層26界定的縮小腔穴。球20a之突出可能在某些實施例中是有利的。在一實施例中,結構22a可能具有不及第5圖之焊盤24高的焊盤24a。
參照第7圖,依據又一實施例,腔穴16a及16b可能具有不同的尺寸。因此,焊球20b及20c可能具有不同的尺寸。此球尺寸差異可能在製造形狀不規則之組件的電氣及機械連接中是有利的。實際上,該等腔穴之尺寸可被製作成產生具有一與另一結構之形態匹配之總體形態的球。 在某些實施例中,間隙G可維持在壁17b及17c與中介的焊球20c或20b之間。在某些實施例中,間隙G可以是介於壁17與焊球之間的一個20微米的間隙。
除此之外,一層30可積設來界定一排除區域以將一焊球局限在凸塊12b或12c上的一特定中央區域。層30可以是一不易被液體焊料潤濕的材料。
接下來參照第8圖,在某些實施例中,凸塊12之長度L2實質上大於焊球20之接觸面之長度L1是有利的。茲提出更具體的範例,在某些實施例中,具有一200微米的習知互連間距可能是有利的。但是對此一間距而言,該等凸塊具有一遠大於習知凸塊的尺寸是有利的,例如,約為180微米,相較下習知的凸塊(200微米間距)普通將具有100微米尺寸。同時,焊球20可能具有一小於凸塊尺寸L2的160微米的尺寸L1。對照之下,此類技術中的習知焊球將大於凸塊且可能大約為130至140微米。
因此,在某些實施例中,對同一間距而言,凸塊及焊球較大。在某些實施例中,較大的焊料凸塊尺寸導致一更可靠的連接。特別是在某些實施例中,焊球尺寸為間距之至少百分之七十五。在某些實施例中,凸塊尺寸為間距之至少百分之七十且凸塊大於焊料。在某些實施例中,由於限制且分隔焊料之壁17提供相鄰連接間的實體障礙而允許有利的形態。
參照第9圖,一種用以積設焊料糊料32到腔穴16中之技術係使用一種利用一刮刀S的刮刀印刷。該刮刀印刷 藉由使一部分焊料糊料34橫向跨越刮刀前方的腔穴16以將焊料端整地積設到腔穴16中。然而,其他技術也可用以印刷或將焊料糊料積設到腔穴16中。
參照第10圖,在某些實施例中,壁17與凸塊12重叠了由「0/L」所標示的距離。在某些實施例中,使壁與凸塊之邊緣重疊阻止了焊料尺寸像凸塊尺寸一樣變大並減小應力。在某些實施例中,基於可靠性的理由,且特別是為了應力減小,焊料不潤濕凸塊邊緣可能是有利的。因此,在某些實施例中,使用一材料來形成粘附在使用作凸塊12之材料上的層14亦為有利者,典型的材料是銅。一較大的凸塊厚度亦較佳,因其使積體電路散熱。
在某些實施例中,壁17遠高於最終凸塊尺寸。例如,在某些情況下,壁17可以比凸塊高50至100微米。此高度差可能以一200至250微米的腔穴16深度或厚度而得以實現。
依據某些實施例,一乾膜可代替習知的光阻劑用以界定該腔穴。在某些情況下,該乾膜腔穴可能比焊球寬。
在某些實施例中,焊料凸塊可能是相當長或更似橢圓而非圓形。換言之,凸塊之縱橫比可能遠大於所描述者。除此之外,該等凸塊可能由二不同焊料之複合物製成。在某些實施例中,結構22上的焊盤可能遠小於基板10上的凸塊。因此,一俟結合,焊料可能呈現一截頭圓錐形狀,而不是所描繪的較呈圓形。在某些情況下,底部填充可應用於截頭圓錐焊料結合之間。
在某些實施例中,焊球可延伸至壁外,且在其他實施例中,它們可能延伸至壁高,且在其他實施例中,焊球可能具有一小於壁高的高度。焊球之不同高度例如可透過結構22上的焊盤之不同高度而調適。
參照第11圖,依據又一實施例,一基板10c可固定於一具有突出物24b的結構22b。基板10c可能具有一在該焊料凸塊12d形成之前經由電鍍、糊料印刷或其他方法形成的壁17d。焊球20d使用同一壁17d被形成且因此具有一實質上等於焊料凸塊12d之直徑的直徑。焊料凸塊12d可以是例如具有一圓柱形或球形的銅材料或焊接材料。
在某些情況下,第11圖之實施例可由利用用以電鍍凸塊12d的同一光阻劑印刷的糊料的焊料形成。一種子層(圖未示)可在焊料回流之後被剝落。
此說明書中提及「一個實施例(one embodiment)」或「一實施例(an embodiment)」意指與包括在包含在本發明內的至少一實施態樣中的實施例相關聯而加以描述的一特定特徵、結構或特性。因此,用語「一實施例(one embodiment)」或「在一實施例中(in an embodiment)」之出現不一定指同一實施例。此外,特定特徵、結構或特性可以所繪示之特定實施例之外的其他適當形式運作且所有的此種形式可被包含在本申請案之申請專利範圍內。
雖然本發明已就有限數目的實施例而加以描述,熟於此技者將瞭解是其有許多修改及變化。後附申請專利範圍意圖涵蓋落入本發明之真正精神及範圍內的所有此種 修改及變化。

Claims (5)

  1. 一種用於互連之裝置,該裝置包含:一平面表面;複數個壁,該等複數個壁從該表面向外延伸並界定出在該等壁之間的數個腔穴;形成於該等腔穴各者之中的一焊料凸塊;及在該等焊料凸塊上的數個焊球,該等焊球朝向該等焊料凸塊之接觸面小於或等於該等焊料凸塊朝向該等焊球之接觸面,其中該等壁自該表面延伸超出該等凸塊之外。
  2. 如請求項1的裝置,其中,該等壁包括光阻劑。
  3. 如請求項1的裝置,其中,該等焊球所具有之尺寸至少為一互連間距的百分之七十五。
  4. 如請求項1的裝置,其中,該等焊料凸塊至少為一互連間距的百分之七十。
  5. 如請求項1的裝置,其中,該等壁與二相鄰焊料凸塊之邊緣部分重疊。
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Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8424748B2 (en) 2009-12-21 2013-04-23 Intel Corporation Solder in cavity interconnection technology
US8936967B2 (en) 2011-03-23 2015-01-20 Intel Corporation Solder in cavity interconnection structures
CN103943515B (zh) * 2013-01-21 2017-03-01 国际商业机器公司 具有电绝缘壁的芯片堆叠及其形成方法
US20150027756A1 (en) * 2013-07-23 2015-01-29 Kinsus Interconnect Technology Corp. Circuit board structure for high frequency signals
CN104425287A (zh) * 2013-08-19 2015-03-18 讯芯电子科技(中山)有限公司 封装结构及制造方法
US20160021153A1 (en) * 2014-07-16 2016-01-21 Highway Hottie, LLC System and computer program for social media utilizing navigation
CN106816417B (zh) * 2017-01-13 2019-02-12 南京大学 一种高密度封装及其制造方法
CN107564923B (zh) * 2017-10-13 2020-03-31 京东方科技集团股份有限公司 一种阵列基板及其制备方法、柔性显示装置
US10483221B2 (en) 2017-10-30 2019-11-19 Micron Technology, Inc. 3DI solder cup
US20190157222A1 (en) * 2017-11-20 2019-05-23 Nxp Usa, Inc. Package with isolation structure
TWI690947B (zh) * 2018-11-30 2020-04-11 台灣愛司帝科技股份有限公司 導電物質的布局方法、布局結構及包含其之led顯示器
CN111354705B (zh) * 2020-03-20 2022-05-20 维沃移动通信(重庆)有限公司 电路板装置及其制备方法、电子设备
JP2021197519A (ja) * 2020-06-17 2021-12-27 東北マイクロテック株式会社 積層型半導体装置及びこれに用いる搭載部品、基体及びバンプ接続体
US11875988B2 (en) 2021-04-29 2024-01-16 Nxp Usa, Inc. Substrate pad and die pillar design modifications to enable extreme fine pitch flip chip (FC) joints

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW407083B (en) * 1998-09-18 2000-10-01 Ind Tech Res Inst The method of forming fine-pitched welding ball and the apparatus of formation
US20030009878A1 (en) * 2001-07-12 2003-01-16 John Gregory Method for attaching an electronic component to a substrate
TW200945978A (en) * 2008-01-25 2009-11-01 Hitachi Plant Technologies Ltd Solder ball printing device

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5074947A (en) * 1989-12-18 1991-12-24 Epoxy Technology, Inc. Flip chip technology using electrically conductive polymers and dielectrics
US5146674A (en) * 1991-07-01 1992-09-15 International Business Machines Corporation Manufacturing process of a high density substrate design
WO1993019487A1 (en) * 1992-03-24 1993-09-30 Unisys Corporation Integrated circuit module having microscopic self-alignment features
US5313021A (en) * 1992-09-18 1994-05-17 Aptix Corporation Circuit board for high pin count surface mount pin grid arrays
JP2800691B2 (ja) 1994-07-07 1998-09-21 株式会社デンソー 回路基板の接続構造
US5539153A (en) * 1994-08-08 1996-07-23 Hewlett-Packard Company Method of bumping substrates by contained paste deposition
CA2135508C (en) * 1994-11-09 1998-11-03 Robert J. Lyn Method for forming solder balls on a semiconductor substrate
US5889326A (en) * 1996-02-27 1999-03-30 Nec Corporation Structure for bonding semiconductor device to substrate
US5796590A (en) * 1996-11-05 1998-08-18 Micron Electronics, Inc. Assembly aid for mounting packaged integrated circuit devices to printed circuit boards
US5929521A (en) * 1997-03-26 1999-07-27 Micron Technology, Inc. Projected contact structure for bumped semiconductor device and resulting articles and assemblies
JP2907188B2 (ja) * 1997-05-30 1999-06-21 日本電気株式会社 半導体装置、半導体装置の実装方法、および半導体装置の製造方法
US5977632A (en) * 1998-02-02 1999-11-02 Motorola, Inc. Flip chip bump structure and method of making
US6190940B1 (en) 1999-01-21 2001-02-20 Lucent Technologies Inc. Flip chip assembly of semiconductor IC chips
TW460991B (en) * 1999-02-04 2001-10-21 United Microelectronics Corp Structure of plug that connects the bonding pad
US20020180029A1 (en) * 2001-04-25 2002-12-05 Hideki Higashitani Semiconductor device with intermediate connector
US6622907B2 (en) * 2002-02-19 2003-09-23 International Business Machines Corporation Sacrificial seed layer process for forming C4 solder bumps
US6583517B1 (en) * 2002-04-09 2003-06-24 International Business Machines Corporation Method and structure for joining two substrates with a low melt solder joint
US6921860B2 (en) * 2003-03-18 2005-07-26 Micron Technology, Inc. Microelectronic component assemblies having exposed contacts
JP4094982B2 (ja) * 2003-04-15 2008-06-04 ハリマ化成株式会社 はんだ析出方法およびはんだバンプ形成方法
JP4389471B2 (ja) * 2003-05-19 2009-12-24 パナソニック株式会社 電子回路の接続構造とその接続方法
TWI241001B (en) * 2004-03-26 2005-10-01 Advanced Semiconductor Eng Method of improving adhesive characteristic between photoresist layer and substrate, and bumping process
US7459386B2 (en) * 2004-11-16 2008-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming solder bumps of increased height
US20070269973A1 (en) * 2006-05-19 2007-11-22 Nalla Ravi K Method of providing solder bumps using reflow in a forming gas atmosphere
JP5017930B2 (ja) * 2006-06-01 2012-09-05 富士通株式会社 半導体装置、はんだバンプ接続用基板の製造方法及び半導体装置の製造方法
US7485563B2 (en) * 2006-06-29 2009-02-03 Intel Corporation Method of providing solder bumps of mixed sizes on a substrate using a sorting mask and bumped substrate formed according to the method
US7652374B2 (en) * 2006-07-31 2010-01-26 Chi Wah Kok Substrate and process for semiconductor flip chip package
US20080157353A1 (en) * 2006-12-29 2008-07-03 Texas Instruments Incorporated Control of Standoff Height Between Packages with a Solder-Embedded Tape
US20090127703A1 (en) * 2007-11-20 2009-05-21 Fujitsu Limited Method and System for Providing a Low-Profile Semiconductor Assembly
US7749887B2 (en) * 2007-12-18 2010-07-06 Micron Technology, Inc. Methods of fluxless micro-piercing of solder balls, and resulting devices
US20090218688A1 (en) * 2008-02-28 2009-09-03 International Business Machines Corporation Optimized passivation slope for solder connections
US7780063B2 (en) * 2008-05-15 2010-08-24 International Business Machines Corporation Techniques for arranging solder balls and forming bumps
TWI473553B (zh) * 2008-07-03 2015-02-11 Advanced Semiconductor Eng 晶片封裝結構
US8424748B2 (en) 2009-12-21 2013-04-23 Intel Corporation Solder in cavity interconnection technology
US8936967B2 (en) * 2011-03-23 2015-01-20 Intel Corporation Solder in cavity interconnection structures

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW407083B (en) * 1998-09-18 2000-10-01 Ind Tech Res Inst The method of forming fine-pitched welding ball and the apparatus of formation
US20030009878A1 (en) * 2001-07-12 2003-01-16 John Gregory Method for attaching an electronic component to a substrate
TW200945978A (en) * 2008-01-25 2009-11-01 Hitachi Plant Technologies Ltd Solder ball printing device

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TW201134588A (en) 2011-10-16
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US9848490B2 (en) 2017-12-19
US20110147440A1 (en) 2011-06-23
US8424748B2 (en) 2013-04-23
US20140240943A1 (en) 2014-08-28
KR20110073314A (ko) 2011-06-29
SG172531A1 (en) 2011-07-28
US20130206820A1 (en) 2013-08-15
TWI546145B (zh) 2016-08-21
CN102136453A (zh) 2011-07-27

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