TWI587470B - 基板、基板之製造方法、半導體裝置及電子機器 - Google Patents
基板、基板之製造方法、半導體裝置及電子機器 Download PDFInfo
- Publication number
- TWI587470B TWI587470B TW102123491A TW102123491A TWI587470B TW I587470 B TWI587470 B TW I587470B TW 102123491 A TW102123491 A TW 102123491A TW 102123491 A TW102123491 A TW 102123491A TW I587470 B TWI587470 B TW I587470B
- Authority
- TW
- Taiwan
- Prior art keywords
- insulating layer
- hole
- base substrate
- substrate
- layer
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W20/211—Through-semiconductor vias, e.g. TSVs
- H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
- H10W20/2125—Top-view shapes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012150345A JP2014013810A (ja) | 2012-07-04 | 2012-07-04 | 基板、基板の製造方法、半導体装置、及び電子機器 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201403780A TW201403780A (zh) | 2014-01-16 |
| TWI587470B true TWI587470B (zh) | 2017-06-11 |
Family
ID=49877913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW102123491A TWI587470B (zh) | 2012-07-04 | 2013-07-01 | 基板、基板之製造方法、半導體裝置及電子機器 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9349673B2 (enExample) |
| JP (1) | JP2014013810A (enExample) |
| KR (1) | KR20140005107A (enExample) |
| CN (1) | CN103531553B (enExample) |
| TW (1) | TWI587470B (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011501410A (ja) * | 2007-10-10 | 2011-01-06 | テッセラ,インコーポレイテッド | 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ |
| SE538062C2 (sv) * | 2012-09-27 | 2016-02-23 | Silex Microsystems Ab | Kemiskt pläterad metallvia genom kisel |
| KR102411064B1 (ko) * | 2015-03-10 | 2022-06-21 | 삼성전자주식회사 | 관통전극을 갖는 반도체 소자 및 그의 제조방법 |
| JP2016225471A (ja) | 2015-05-29 | 2016-12-28 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
| US10049981B2 (en) * | 2016-09-08 | 2018-08-14 | Taiwan Semiconductor Manufacturing Company Ltd. | Through via structure, semiconductor device and manufacturing method thereof |
| JP2018157110A (ja) * | 2017-03-17 | 2018-10-04 | 東芝メモリ株式会社 | 半導体装置およびその製造方法 |
| WO2018198199A1 (ja) * | 2017-04-25 | 2018-11-01 | 三菱電機株式会社 | 半導体装置 |
| US20190013302A1 (en) * | 2017-07-07 | 2019-01-10 | China Wafer Level Csp Co., Ltd. | Packaging method and package structure for fingerprint recognition chip and drive chip |
| WO2019026741A1 (ja) | 2017-08-02 | 2019-02-07 | シャープ株式会社 | 基板及び基板の製造方法 |
| EP3460835B1 (en) * | 2017-09-20 | 2020-04-01 | ams AG | Method for manufacturing a semiconductor device and semiconductor device |
| US10679924B2 (en) | 2018-03-05 | 2020-06-09 | Win Semiconductors Corp. | Semiconductor device with antenna integrated |
| CN109585462B (zh) * | 2019-01-23 | 2024-12-13 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、柔性显示面板、拼接屏 |
| US11688679B2 (en) * | 2020-08-28 | 2023-06-27 | Samsung Electronics Co., Ltd. | Interconnection structure, method of fabricating the same, and semiconductor package including interconnection structure |
| EP4425535A4 (en) * | 2021-10-26 | 2025-07-02 | Sony Semiconductor Solutions Corp | SEMICONDUCTOR DEVICE, PRODUCTION METHOD THEREOF, AND ELECTRONIC DEVICE |
| TWI841118B (zh) * | 2022-12-14 | 2024-05-01 | 南亞科技股份有限公司 | 半導體結構及其製造方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100225004A1 (en) * | 2009-03-03 | 2010-09-09 | Olympus Corporation | Semiconductor apparatus and method of manufacturing semiconductor apparatus |
| TW201041127A (en) * | 2008-12-18 | 2010-11-16 | Toshiba Kk | Semiconductor device and method of manufacturing the same |
| JP2010263130A (ja) * | 2009-05-08 | 2010-11-18 | Olympus Corp | 半導体装置および半導体装置の製造方法 |
| TW201201342A (en) * | 2010-04-05 | 2012-01-01 | Fujikura Ltd | Semiconductor device and method for manufacturing the same |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0263220B1 (en) * | 1986-10-08 | 1992-09-09 | International Business Machines Corporation | Method of forming a via-having a desired slope in a photoresist masked composite insulating layer |
| US5940732A (en) | 1995-11-27 | 1999-08-17 | Semiconductor Energy Laboratory Co., | Method of fabricating semiconductor device |
| JP4289146B2 (ja) | 2003-03-27 | 2009-07-01 | セイコーエプソン株式会社 | 三次元実装型半導体装置の製造方法 |
| JP4127095B2 (ja) | 2003-03-27 | 2008-07-30 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP2005011920A (ja) * | 2003-06-18 | 2005-01-13 | Hitachi Displays Ltd | 表示装置とその製造方法 |
| JP4155154B2 (ja) | 2003-10-15 | 2008-09-24 | セイコーエプソン株式会社 | 半導体装置、回路基板、及び電子機器 |
| JP2005235860A (ja) | 2004-02-17 | 2005-09-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| JP4845368B2 (ja) | 2004-10-28 | 2011-12-28 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
| TWI303864B (en) | 2004-10-26 | 2008-12-01 | Sanyo Electric Co | Semiconductor device and method for making the same |
| JP4501632B2 (ja) | 2004-10-27 | 2010-07-14 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP4388454B2 (ja) | 2004-10-27 | 2009-12-24 | 信越半導体株式会社 | ワーク保持板並びに半導体ウエーハの製造方法及び研磨方法 |
| JP4873517B2 (ja) | 2004-10-28 | 2012-02-08 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
| JP4694305B2 (ja) | 2005-08-16 | 2011-06-08 | ルネサスエレクトロニクス株式会社 | 半導体ウエハの製造方法 |
| JP5326361B2 (ja) * | 2008-05-28 | 2013-10-30 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP2009295676A (ja) | 2008-06-03 | 2009-12-17 | Oki Semiconductor Co Ltd | 半導体装置及びその製造方法 |
| JP5423572B2 (ja) | 2010-05-07 | 2014-02-19 | セイコーエプソン株式会社 | 配線基板、圧電発振器、ジャイロセンサー、配線基板の製造方法 |
| KR20110133251A (ko) * | 2010-06-04 | 2011-12-12 | 삼성전자주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
-
2012
- 2012-07-04 JP JP2012150345A patent/JP2014013810A/ja not_active Withdrawn
-
2013
- 2013-06-27 US US13/929,218 patent/US9349673B2/en active Active
- 2013-07-01 TW TW102123491A patent/TWI587470B/zh active
- 2013-07-03 KR KR1020130077650A patent/KR20140005107A/ko not_active Ceased
- 2013-07-03 CN CN201310277118.4A patent/CN103531553B/zh active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201041127A (en) * | 2008-12-18 | 2010-11-16 | Toshiba Kk | Semiconductor device and method of manufacturing the same |
| US20100225004A1 (en) * | 2009-03-03 | 2010-09-09 | Olympus Corporation | Semiconductor apparatus and method of manufacturing semiconductor apparatus |
| JP2010263130A (ja) * | 2009-05-08 | 2010-11-18 | Olympus Corp | 半導体装置および半導体装置の製造方法 |
| TW201201342A (en) * | 2010-04-05 | 2012-01-01 | Fujikura Ltd | Semiconductor device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| US20140008816A1 (en) | 2014-01-09 |
| KR20140005107A (ko) | 2014-01-14 |
| CN103531553A (zh) | 2014-01-22 |
| US9349673B2 (en) | 2016-05-24 |
| CN103531553B (zh) | 2018-08-03 |
| TW201403780A (zh) | 2014-01-16 |
| JP2014013810A (ja) | 2014-01-23 |
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