TWI547217B - 微電子封裝體及用於製造微電子封裝體之方法 - Google Patents

微電子封裝體及用於製造微電子封裝體之方法 Download PDF

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Publication number
TWI547217B
TWI547217B TW100143112A TW100143112A TWI547217B TW I547217 B TWI547217 B TW I547217B TW 100143112 A TW100143112 A TW 100143112A TW 100143112 A TW100143112 A TW 100143112A TW I547217 B TWI547217 B TW I547217B
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Taiwan
Prior art keywords
microelectronic
substrate
interposer
die
mold compound
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TW100143112A
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English (en)
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TW201230904A (en
Inventor
里歐尼爾Ｒ 艾羅那
艾德華Ｒ 佩克
羅伯特Ｍ 尼克森
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英特爾公司
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Publication of TW201230904A publication Critical patent/TW201230904A/zh
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Description

微電子封裝體及用於製造微電子封裝體之方法 發明領域
所揭示之本發明實施例大體有關於微型電子裝置，且更特別的是有關於微型電子裝置之封裝結構及相關方法。
 發明背景
市場壓力及預期持續驅動微型電子裝置及使用微型電子裝置之產品的小型化。因此，微處理器製造商企圖製作越來越小而薄的微電子晶粒以便可裝入越來越小而短的封裝體。不過，用於薄晶粒的晶粒黏附製程可能會有由以下所造成的問題：晶粒翹曲以及對應地難以在翹曲晶粒、基板之間形成良好連接。用以製造不超過可接受翹曲目標之微電子組件的現有技術存在重大的挑戰以及強迫在滿足成本參數與滿足客戶要求之間要做困難的折衷。
 發明概要
依據本發明之一實施例，係特地提出一種微電子封裝體，其包含：一基板；一中介物，其具有一第一表面與相對的一第二表面，其中該中介物藉由一焊線電氣式連接至該基板，該第一表面以一黏著劑實體連接至該基板，並且該第二表面有形成在內的一導電接觸部；黏附至該基板的一微電子晶粒；以及在該基板上方的一模化合物，該模化合物完全囊封該焊線並部份囊封該中介物，以使得在該中介物之該第二表面中的該導電接觸部維持不被該模化合物覆蓋。
依據本發明之另一實施例，係特地提出一種用於製造微電子封裝體的方法，該方法包含下列步驟：提供一基板總成，其包含黏附至一基板的一中介物；將一微電子晶粒黏附至該基板總成；利用一焊線使該中介物電氣式連接至該基板；以及將該焊線、該中介物之一部份、及該微電子晶粒之至少一部份囊封於一模化合物中。
依據本發明之又一實施例，係特地提出一種用於製造微電子封裝體的方法，該方法包含下列步驟：置備一微電子晶粒；將該微電子晶粒黏附至一基板；將一中介物黏附至該基板；利用一焊線將該中介物電氣式連接至該基板；以及將該焊線、該中介物之一部份、及該微電子晶粒之至少一部份囊封於一模化合物中。
圖式簡單說明
閱讀以下結合附圖的詳細說明可更加明白所揭示的實施例。
第1圖根據本發明之一具體實施例圖示微電子封裝體的橫截面圖；第2a及2b圖的平面圖根據本發明實施例圖示微電子封裝體的中介物及其他部份；以及第3及4圖的流程圖根據本發明實施例圖示製造微電子封裝體的方法。
 較佳實施例之詳細說明
為使圖解說明簡單清楚，附圖以一般構造的方式圖示，且省略習知特徵及技術的描述與細節以避免不必要地模糊描述於此的本發明實施例。此外，附圖中的元件不一定是按比例繪出。例如，相對於其他元件，誇大附圖中之一些元件的尺寸以利瞭解本發明之具體實施例。附圖中以相同元件符號表示相同的元件，然而不一定表示類似的元件。
說明及申請專利範圍中，若有“第一”、“第二”、“第三”、“第四”、等等術語是用來區分類似的元件而且不一定是用來描述特定的順序或時序。應瞭解，以此方式所使用的術語在適當的情況下可互換，藉此本文所描述的本發明具體實施例，例如，能夠用別的順序操作，而不是本文所圖示或以其他方式描述於本文的。同樣，如果方法在此被描述成含有一序列的步驟時，本文所呈現的步驟順序不一定為可執行該等步驟的唯一順序，以及有可能可省略提及步驟中之某些及/或該方法可添加本文未予以描述的某些其他步驟。再者，“包含”與“具有”以及任何彼等之變體均想要涵蓋非排他性包含(non-exclusive inclusion)，使得包含一列元件的處理、方法、物件、或裝置不一定受限於該等元件，而可包含未特別列入或內建於該處理、方法、物件、或裝置內的其他元件。
在說明及申請專利範圍中，若有“左”、“右”、“前”、“後”、“上”、“下”、“上方”、“下方”、等等術語都是用來描述且不一定是描述永久性的相對位置，除非特別表示或由上下文決定。應瞭解，以此方式所使用的術語在適當的情況下可互換，藉此本文所描述的本發明具體實施例，例如，能以其他的方位操作，而不是本文所圖示或以其他方式描述於本文的。本文所用術語“耦合”定義為以電或非電方式直接或間接連接。在此被描述成彼此“鄰近”的物件可相互接觸、彼此緊鄰或彼此在相同的一般區域或地區，若對於該片語的上下文合適的話。本文出現片語“在一具體實施例中”的地方不一定都指同一個具體實施例。
附圖的詳細描述
在本發明之一具體實施例中，微電子封裝體包含基板、有背對背之第一表面及第二表面的中介物、黏附至該基板的微電子晶粒、以及在該基板上方的模化合物(mold compound)。該中介物電氣使用焊線連接至該基板。該中介物的第一表面用黏著劑實體連接至該基板，以及該第二表面有形成於其中的導電接觸部。該模化合物完全囊封該焊線及部份囊封該中介物使得在該中介物之該第二表面中的該導電接觸部仍未被該模化合物覆蓋。
本發明具體實施例係針對封裝體平坦度/翹曲問題以及改善封裝體機械完整性，以及如以下所詳述的，在頂部接觸件間距(top-side-contact pitch)，封裝疊加(POP)偏量(standoff)，表面粗糙度，晶粒厚度，及其他參數方面，可提供高度的設計彈性。該等具體實施例對於現有封裝方法可幫助克服相對高的成本與可靠性問題以及提供可行的方法以致能有POP形式因素的混合技術晶粒堆疊。
致能薄POP堆疊同時允許晶粒厚度及表面粗糙度有彈性的現有解決方案涉及使用焊接中介物與覆晶晶粒黏附。換言之，提及類型的封裝體在傳統上已為純覆晶產品。使用焊線接合中介物(wirebonded interposer)的本發明具體實施例違反現有解決方案，因為在沒有揭示於本文的本發明洞察下，似乎沒有理由引進打線接合(wirebonding)於在已使用覆晶技術的產品。不過，以下會根據本發明實施例來描述該等理由。
與現今所用的焊接中介物方法相比，用於本發明具體實施例的焊線接合中介物會比較便宜，因為：(1)中介物上只需要一個金屬層；(2)不需要電鍍穿孔(PTH)，因而可排除鑽孔的任何需要而且單面加工即可；以及(3)不需要焊錫或凸塊製程。此外，藉由允許放鬆對於中介物的平坦度要求，本發明具體實施例可提高製造容易度，特別是在要用有“生胚強度(green strength)”的膜式黏著劑於中介物黏附時。(有“生胚強度”的黏著劑為在塗佈時就有充分固持力而非只在固化製程才有的黏著劑)。中介物與基板的黏著劑黏附對於引進的中介物翹曲更寬容以及可忍受多件體式中介物。除了前述特徵以外，與現今所用的焊接方法相比，本發明具體實施例的可靠性更高，因為：(1)排除焊點可靠性問題(例如，溫度循環疲勞，衝擊風險)；以及(2)排除中介物在植球或表面貼裝期間分離的風險。
本發明具體實施例的另一潛在效益在於與焊接中介物方法相比，有明顯較小的互連間距(亦即，焊線間距)，以及有明顯更多的互連數(亦即，焊線的數目)，這意謂本發明具體實施例之焊線方法的可擴展性更高。(互連間距的定義為兩條相鄰互連的間隔)。此外，焊線接合中介物不像焊接中介物那樣依賴表面貼裝製程的限制。有多少間距可縮放是用表面貼裝的限制。可達成0.4毫米(mm)的間距，但是在表面貼裝期間使用較少錫料量(solder volume)的例如0.3毫米間距會要求更平坦的中介物用作起始點，以及該中介物對於翹曲會更加敏感，因為錫料比較少而且較少的錫料在表面貼裝期間會塌陷以補償中介物翹曲。對於更小的間距，(例如，0.2毫米及以下)，縮放問題變得更顯著，以致於目前可能甚至不存在可行的製程，或至少是量產製程。簡言之，表面貼裝方法存在縮放風險。這些風險可用本發明的焊線接合中介物排除。構成焊線的導線可具有緊密的間隔使得吾等可輕易實現跟0.1毫米一樣小或更小的間距。
請參考附圖，第1圖根據本發明之一具體實施例圖示微電子封裝體100的的橫截面圖。如以下所詳述的，微電子封裝體100包含有露出頂部接觸件(或“焊盤(land)”)的中介物，其係用黏著劑黏附至基板以及用焊線電氣式連接至基板。例如，中介物的上表面可具有露出的頂部焊盤，焊線墊(可能露出或不露出，亦即，未被模化合物覆蓋)，以及使露出焊盤與焊線墊相互通行(電氣式連接)的導電跡線。
如第1圖所示，微電子封裝體100包含基板110(有多個以水平線表示的導電、介電層)，有背對背之表面121及表面122的中介物120，黏附至基板110的微電子晶粒130，以及在基板110上方的模化合物140。如圖示，中介物120用焊線150電氣式連接至基板110，中介物120的表面121用黏著劑160實體連接至基板110，以及中介物120的表面122有導電接觸部126形成於其中。模化合物140完全囊封焊線150以及部份囊封中介物120使得導電接觸部126仍未被模化合物140覆蓋。在某些本發明具體實施例中，也可存在可被模化合物140囊封或不被它囊封的附加導電接觸部127。
在圖示具體實施例中，晶粒130覆晶互連135黏附至基板110。也圖示各用黏著層161堆疊於微電子晶粒130上方的微電子晶粒131、132，以及包圍該等覆晶互連135的下填材料170。因此，圖示具體實施例的特徵為混合技術(亦即，覆晶+焊線)已堆疊晶粒架構。本發明其他(未圖示)具體實施例可包括以任何方式組合的單晶片(離散)架構與單一技術(亦即，覆晶或者是焊線)架構。
焊線151、152使微電子晶粒131、132各自電氣式連接至基板110。焊線153使微電子晶粒131電氣式連接至中介物120。附加已堆疊晶粒(若有的話)可用相同的方式連接至中介物及/或基板。此外，已堆疊晶粒中之一或更多可用附加焊線電氣式連接至其他已堆疊晶粒中之一或更多。這在第1圖用焊線154圖示。
模化合物140完全囊封微電子晶粒130(以及微電子晶粒131、132)，但是在其他具體實施例中，只部份囊封該等微電子晶粒中之一或更多。例如，一具體實施例可以“裸晶粒”為特徵，亦即，晶粒有不被模化合物覆蓋而露出的背面(或另一面)，這可能是為了放上散熱元件或類似元件。此裸晶粒在特定微電子封裝體中可能為唯一的晶粒，或者為多個晶粒中之一個。一此類裸晶粒實施例涉及較厚的晶粒，在此該晶粒係延伸至模化合物頂面以及露出它的背面。替換地，可縮小該中介物及導線的尺寸比例以便在模造後實現較厚的封裝體同時保持相同的晶粒厚度以便組裝。
回到圖示具體實施例，完全囊封該微電子晶粒(或數個晶粒)的模化合物有助於管理封裝體平坦度以及控制翹曲。事實上，此類包覆成型法(overmolding)可能為達成規定平坦度規格的唯一實用方法，以及由於包覆成型具有焊接中介物的封裝體(如現有封裝架構)同時讓中介物頂部接觸件露出在大量製造條件下難以或不可能實現，本發明的焊線接合中介物在微電子封裝體製造上有可能很有價值，特別是在封裝體平坦度為重要考量的情形下。
在圖示於第1圖的實施例中，中介物120只有一個金屬層(金屬層125)，以及此單一金屬層是在表面122。如圖示，在金屬層125中形成導電接觸部126。例如，焊接中介物係使用於有多個金屬層的現有微電子封裝體中，因而需要電鍍穿孔(PTH)供一金屬層與另一金屬層的通訊用。不過，PTH很貴，因為製作它們需要各種鑽孔及電鍍步驟。對比之下，焊線接合中介物(例如，中介物120)不需要鑽孔，由於有單一金屬層，因此只需要單一電鍍步驟與單一金屬圖案化步驟。少了對應PTH的附加金屬層(亦即，除上述單一金屬層125以外的)意謂著與多金屬層的中介物相比，製造中介物120比較便宜以及容易。
第2a及2b圖的平面圖根據本發明實施例圖示微電子封裝體200的中介物及其他部份。如圖示，封裝體200包含基板210，基板210上的中介物220，以及擱在基板210上或以其他方式黏附至基板210的晶粒230。如圖示，晶粒230被中介物220包圍。在第2a圖中，中介物220a為位於基板210上、形狀像圖框的單一連續件體。例如，用取放程序可轉移中介物220a至基板210上的位置。
單件體式中介物(例如，中介物220a)在材料用量上相當低效，因為它們通常用大面板製造以及移除及拋棄每個中介物的中間部份。可讓製程更有效率，以及每個面板可做出更多中介物，例如，如果面板用來生產矩形中介物部份(例如，部份221b)，然後可將其中多個(參考中介物220b)在基板210上配置於以中介物220a圖示的同一個圖框內。如此各件體都有相同的長度或者它們有各種不同的長度。如上述，中介物220可用黏著劑(例如，黏著劑160，參考第1圖)固定於基板210上。有充分生胚強度(定義於上文)的黏著劑有可能最小化或排除與中介物有關的任何翹曲或對齊問題。
第3圖的流程圖根據本發明之一具體實施例圖示製造微電子封裝體的方法300。例如，方法300可導致形成與第1圖之微電子封裝體100類似的微電子封裝體。
方法300的步驟310是要提供一基板總成，其係包含黏附至基板的中介物。例如，該中介物可與中介物120類似以及該基板可與基板110類似，兩者係圖示於第1圖。可使用形式為膏或膜的標準晶粒黏附黏著劑。在後續步驟之前，視需要固化該黏著劑。
方法300的步驟320是要黏附一微電子晶粒至該基板總成。例如，該微電子晶粒可與第1圖的微電子晶粒130類似。在一具體實施例中，步驟320包括執行一覆晶組裝製程流，它可包括在微電子晶粒的一表面形成數條覆晶互連(例如，覆晶互連135)。在相同或另一實施例中，步驟320包括造成一下填材料形成於該等覆晶互連中之至少一些的周圍。例如，該下填材料可與圖示於第1圖的下填材料170類似。
在使用第二微電子晶粒的具體實施例中，步驟320，或另一步驟，更包括實體黏附該第二晶粒至上述晶粒，亦即，被簡稱為微電子晶粒者，以及電氣式連接該第二晶粒至該中介物與該基板中之至少一者。在一具體實施例中，使用一或更多焊線使該中介物及/或該基板與該第二晶粒相互電氣式連接。
方法300的步驟330是用焊線使該中介物電氣式連接至該基板。例如，該焊線可與圖示於第1圖的焊線150類似。
方法300的步驟340是要囊封該焊線，該中介物之一部份，以及該微電子晶粒之至少一部份於一模化合物中。例如，該模化合物可與圖示於第1圖的模化合物140類似。在某些實施例中，該微電子晶粒被該模化合物完全囊封。可使用各種模造製程，包括轉移模造法，壓縮模造法，及其類似者。例如，可使用部份箝制中介物(視需要有隔離膜)之正面的封膠模具設計(mold chase design)以便讓上墊露出。若需要，在烤爐中可進行模塑後固化(post mold cure)。視需要，去膠製程(deflash process)可用來清除墊上的溢膠(mold flash)。
第4圖的流程圖根據本發明之一不同實施例圖示製造微電子封裝體的方法。例如，與方法300類似，方法400可導致形成與第1圖之微電子封裝體100類似的微電子封裝體。方法300及400不同的地方部份在於晶粒黏附製程的時序(例如，在中介物黏附之前或之後)。
方法400的步驟410是要提供一微電子晶粒。例如，該微電子晶粒可與第1圖的微電子晶粒130類似。
方法400的步驟420是要黏附該微電子晶粒至一基板。例如，該基板可與第1圖之基板110類似。在一具體實施例中，步驟420包括造成一下填材料形成於該微電子晶粒之一部份的周圍。例如，該下填材料可與第1圖之下填材料170類似。
在使用第二微電子晶粒的具體實施例中，步驟420或另一步驟更包括：實體黏附該第二晶粒至上述晶粒，亦即，被簡稱為微電子晶粒者，以及使該第二晶粒電氣式連接至該中介物與該基板中之至少一者。在一具體實施例中，一或更多焊線用來使該中介物及/或該基板和第二晶粒相互電氣式連接。
方法400的步驟430是要黏附一中介物至該基板。例如，該中介物可與第1圖之中介物120類似。在一具體實施例中，步驟430包括使用黏著劑，其形式可能為膏或膜，以及步驟430或另一步驟視需要包括：在電氣式連接該中介物與該基板之前，固化該黏著劑。
方法400的步驟440是要用焊線使該中介物電氣式連接至該基板。例如，該焊線可與第1圖之焊線150類似。
方法400的步驟450是要囊封該焊線，該中介物之一部份，以及該微電子晶粒之至少一部份於一模化合物中。例如，該模化合物可與第1圖的模化合物140類似。在某些實施例中，該微電子晶粒被該模化合物完全囊封。可使用各種模造製程，包括轉移模造法，壓縮模造法，及其類似者。例如，可使用部份箝制中介物(視需要有隔離膜)之正面的封膠模具設計以便讓上墊露出。若需要，在烤爐中可進行模塑後固化。視需要，去膠製程可用來清除墊上的溢膠。
儘管本發明已參考特定的實施例被描述，熟諳此藝者會了解，各種變化可被作出而沒有脫離本發明之精神或範圍。因此，本發明實施例的揭示內容旨在圖解說明本發明的範疇而非限制。希望本發明範疇應僅限於由隨附申請專利範圍所要求的範圍。例如，本技藝一般技術人員會明白，微電子封裝體及本文論及的相關構造及方法可在多種實施例中實施，而且某些該等具體實施例的以上說明不一定表示所有可能實施例的完整描述。
另外，益處、其他優勢，及問題的解決方案已就特定的實施例加以描述。然而，該等益處、優勢、問題的解決方案、及任何可使任何益處、優勢或解決方案發生或變得更加明顯的(多個)元件，不被解讀為任何或所有該等申請專利範圍之關鍵的、所需的、或必要的特徵或元件。
此外，本文所揭露之實施例及限制根據貢獻原則不被貢獻給公眾，如果該等實施例及限制：(1)未在申請專利範圍中明確地加以請求；及(2)根據均等原則，是或可能是表達該等申請專利範圍中之元件及/或限制的等效物。
100．．．微電子封裝體
110、210．．．基板
120、220a、220b．．．中介物
121、122．．．表面
125．．．金屬層
126．．．導電接觸部
127．．．附加導電接觸部
130．．．微電子晶粒
131、132．．．微電子晶粒
135．．．覆晶互連
140．．．模化合物
150、151、152、153、154．．．焊線
160、161．．．黏著層
170．．．下填材料
200．．．微電子封裝體
221b．．．矩形中介物部份
230．．．晶粒
300、400．．．方法
310-340、410-450．．．步驟
第1圖根據本發明之一具體實施例圖示微電子封裝體的橫截面圖；
第2a及2b圖的平面圖根據本發明實施例圖示微電子封裝體的中介物及其他部份；以及
第3及4圖的流程圖根據本發明實施例圖示製造微電子封裝體的方法。
100．．．微電子封裝體
110．．．基板
120．．．中介物
121、122．．．表面
125．．．金屬層
126．．．導電接觸部
127．．．附加導電接觸部
130、131、132．．．微電子晶粒
35．．．覆晶互連
140．．．模化合物
150、151、152、153、154．．．焊線
160．．．黏著劑
161．．．黏著層
170．．．下填材料

Claims (14)

  1. 一種微電子封裝體，其包含：一基板；一中介物，其具有一第一表面與相對的一第二表面，其中，該中介物包含僅一層的金屬層，該金屬層係位於該中介物之該第二表面，且該中介物藉由一焊線電氣式連接至該基板，該第一表面以一黏著劑實體連接至該基板，並且該第二表面有形成在內的一導電接觸部而使得該導電接觸部係形成於該金屬層中；藉由數個覆晶互連而黏附至該基板的一微電子晶粒；以及在該基板上方的一模化合物，該模化合物完全囊封該焊線並部份囊封該中介物，以使得在該中介物之該第二表面中的該導電接觸部維持不被該模化合物覆蓋。
  2. 如申請專利範圍第1項之微電子封裝體，其中：該模化合物完全囊封該微電子晶粒。
  3. 如申請專利範圍第1項之微電子封裝體，其進一步包含：堆疊於該微電子晶粒上方的一第二微電子晶粒。
  4. 如申請專利範圍第3項之微電子封裝體，其中：該第二微電子晶粒藉由一第二焊線電氣式連接至該基板。
  5. 如申請專利範圍第1項之微電子封裝體，其中：該中介物為形成在該晶粒周圍之一框體的單一個連續件體。
  6. 如申請專利範圍第1項之微電子封裝體，其中：該中介物係由在該基板上被配置成在該晶粒周圍形成一框體的複數個件體構成。
  7. 一種用於製造微電子封裝體的方法，該方法包含下列步驟：提供一微電子晶粒；藉由數個覆晶互連而將該微電子晶粒黏附至一基板；將一中介物黏附至該基板，該中介物具有形成在內的一導電接觸部；利用一焊線使該中介物電氣式連接至該基板；以及將該焊線、該中介物之一部份、及該微電子晶粒之至少一部份囊封於一模化合物中，但該導電接觸部並不被該模化合物覆蓋，其中：將該中介物黏附至該基板之步驟包含：利用一黏著劑；並且該方法進一步包含下列步驟：在將該中介物電氣式連接至該基板之前固化該黏著劑。
  8. 如申請專利範圍第7項之方法，其中：黏附該微電子晶粒之步驟包含：使得一下填材料形成於該微電子晶粒之一部分周圍。
  9. 如申請專利範圍第7項之方法，其進一步包含下列步驟：將一第二微電子晶粒實體黏附至該微電子晶粒；以 及將該第二微電子晶粒電氣式連接至該中介物和該基板中之至少一者。
  10. 如申請專利範圍第9項之方法，其中：將該第二微電子晶粒電氣式連接至該中介物和該基板中之至少一者之步驟包含：利用一焊線使該第二微電子晶粒與該中介物和該基板中之至少一者相互連接。
  11. 如申請專利範圍第7項之方法，其中：囊封該微電子晶粒之至少一部份之步驟包括：將該微電子晶粒完全囊封於該模化合物中。
  12. 一種微電子封裝體，其包含：一基板；藉由數個覆晶互連而黏附至該基板的一微電子晶粒；以及一中介物，其具有一第一表面與相對的一第二表面，其中，該中介物為形成在該晶粒周圍之一框體的單一個連續件體，並且該中介物藉由一焊線電氣式連接至該基板，其中，該第一表面以一黏著劑實體連接至該基板，並且其中，該第二表面具有形成在內的一導電接觸部；在該基板上方的一模化合物，該模化合物完全囊封該焊線並部份囊封該中介物，以使得在該中介物之該第二表面中的該導電接觸部維持不被該模化合物覆蓋。
  13. 如申請專利範圍第12項之微電子封裝體，其進一步包 含：堆疊於該微電子晶粒上方的一第二微電子晶粒。
  14. 如申請專利範圍第13項之方法，其中：該第二微電子晶粒藉由一第二焊線電氣式連接至該基板。
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