TWI544532B - 切割晶片接合薄膜 - Google Patents

切割晶片接合薄膜 Download PDF

Info

Publication number
TWI544532B
TWI544532B TW100132425A TW100132425A TWI544532B TW I544532 B TWI544532 B TW I544532B TW 100132425 A TW100132425 A TW 100132425A TW 100132425 A TW100132425 A TW 100132425A TW I544532 B TWI544532 B TW I544532B
Authority
TW
Taiwan
Prior art keywords
bonding film
wafer bonding
wafer
dicing
film
Prior art date
Application number
TW100132425A
Other languages
English (en)
Other versions
TW201212117A (en
Inventor
天野康弘
盛田美希
木村雄大
Original Assignee
日東電工股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日東電工股份有限公司 filed Critical 日東電工股份有限公司
Publication of TW201212117A publication Critical patent/TW201212117A/zh
Application granted granted Critical
Publication of TWI544532B publication Critical patent/TWI544532B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35Heat-activated
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02Electrically-conducting adhesives
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K7/00Use of ingredients characterised by shape
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/312Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier parameters being the characterizing feature
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/40Additional features of adhesives in the form of films or foils characterized by the presence of essential components
    • C09J2301/408Additional features of adhesives in the form of films or foils characterized by the presence of essential components additives as essential feature of the adhesive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29324Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/2939Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/294Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01045Rhodium [Rh]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01051Antimony [Sb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/0665Epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788Glasses, e.g. amorphous oxides, nitrides or fluorides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/25Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/28Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/28Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2813Heat or solvent activated or sealable
    • Y10T428/2817Heat sealable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)

Description

切割晶片接合薄膜
本發明關於切割晶片接合薄膜。
以往,在半導體裝置的製造步驟中,使用在切割薄膜上積層有熱固型晶片接合薄膜的切割晶片接合薄膜(例如,參考專利文獻1)。在使用該切割晶片接合薄膜的半導體裝置的製造步驟中,首先將半導體晶圓黏貼到切割晶片接合薄膜上並且固定,並在該狀態下進行切割。由此,半導體晶圓被小片化為規定的尺寸,成為半導體晶片。然後,為了從切割薄膜上將固定在切割晶片接合薄膜上的半導體晶片剝離,進行半導體晶片的拾取。
在上述拾取步驟中,將帶有晶片接合薄膜的半導體晶片從切割薄膜上剝離時,在晶片接合薄膜與切割薄膜之間會產生剝離帶電。因此,存在半導體晶片上的電路被產生的靜電破壞的問題。
因此,迫切希望開發出具有接著性、作業性等以往的作為晶片接合薄膜的功能、並且也具有防靜電功能的晶片接合薄膜。
[先前技術文獻] [專利文獻]
專利文獻1:日本專利特開2008-218571號公報
本發明鑒於所述問題點而創立,其目的在於提供具有 不易引起剝離帶電並且接著性、作業性良好的晶片接合薄膜的切割晶片接合薄膜。
本申請發明人等為了解決所述現有問題點,對在晶片接合薄膜上積層有切割薄膜的切割晶片接合薄膜進行了研究。結果發現,藉由使熱固型晶片接合薄膜含有導電性粒子,將所述熱固型晶片接合薄膜的體積電阻率調節為1×10-6Ω.cm以上且1×10-3Ω.cm以下,並且,將所述熱固型晶片接合薄膜熱固化前在-20℃下的拉伸儲藏彈性係數調節為0.1GPa~10GPa,不易引起剝離帶電,且晶片接合薄膜的接著性、作業性良好,從而完成了本發明。
即,本發明的切割晶片接合薄膜是在切割薄膜上設置有熱固型晶片接合薄膜的切割晶片接合薄膜,其特徵在於,所述熱固型晶片接合薄膜含有導電性粒子,所述熱固型晶片接合薄膜的體積電阻率為1×10-6Ω.cm以上且1×10-3Ω.cm以下,並且,所述熱固型晶片接合薄膜熱固化前在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa。
根據所述構成,由於熱固型晶片接合薄膜的體積電阻率為1×10-3Ω.cm以下,因而,可以發揮高的防靜電效果。因此,可以防止因拾取時的剝離帶電而破壞半導體晶片,並且可以防止將帶有晶片接合薄膜的半導體晶圓積層到被黏物上時的帶電。結果,可以提高作為元件的可靠性。
另外,所述熱固型晶片接合薄膜的熱固化前的在-20℃下的拉伸儲藏彈性係數為10GPa以下,因此,可以使與被黏物的接著性、以及作業性良好。另外,上述拉伸儲藏彈 性係數為0.1GPa以上,具有比較高的彈性係數,因此在擴張時可以容易地傳遞應力。
另外,本發明中的“體積電阻率”是根據JIS K 7194,並藉由四點探針法測定的值。
另外,所述構成中,所述導電性粒子為平均粒徑不同的兩種以上導電性粒子,並且兩種以上的所述導電性粒子各自的平均粒徑為0.01μm以上10μm以下而較佳。藉由將所述導電性粒子的平均粒徑設定為0.01μm以上,可以確保對被黏物的潤濕性從而發揮良好的接著性。另外,藉由將所述導電性粒子的平均粒徑設定為10μm以下,可以使導電性粒子的添加所帶來的導電性和熱電導性的提高效果更加良好。另外,可以使熱固型晶片接合薄膜的厚度變薄,可以進行高積層化,可以防止由於導電性粒子從熱固型晶片接合薄膜突出而產生晶片破裂。另外,藉由將導電性粒子設定為平均粒徑不同的兩種以上導電性粒子,可以容易地提高填充率。
另外,所述構成中,較佳為相對於所述熱固型晶片接合薄膜的有機成分100重量份,所述導電性粒子的含量為20重量份~90重量份。藉由將所述導電性粒子的含量設定為20重量份以上,可以形成導電路徑,並抑制體積電阻率變高,以及導電功能下降。另外,藉由將所述導電性粒子的含量設定為90重量份以下,可以良好地保持熱固型晶片接合薄膜的韌性,從而防止在操作熱固型晶片接合薄膜時產生破裂或缺損。
另外,所述構成較佳在下述方法中使用:對半導體晶圓照射雷射光形成改質區域,之後,將所述半導體晶圓黏貼到該切割晶片接合薄膜上,對該切割晶片接合薄膜施加拉伸張力,由此將所述半導體晶圓在所述改質區域破斷,並且將構成該切割晶片接合薄膜的熱固型晶片接合薄膜在對應於所述改質區域的位置破斷,從而形成帶有晶片接合薄膜的半導體晶片,從所述切割薄膜上將所得到的所述帶有晶片接合薄膜的半導體晶圓剝離,並通過該晶片接合薄膜將剝離後的所述帶有晶片接合薄膜的半導體晶圓固定到被黏物上的方法。上述方法為特別是在半導體晶圓的厚度薄的情況下能夠減少破裂等不良的產生的方法。在此,熱固型晶片接合薄膜的體積電阻率為1×10-3Ω.cm以下。因此,即使在用於上述方法的情況下,也可以發揮高的防靜電效果。另外,熱固型晶片接合薄膜的熱固化前的在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa,因此可以防止在改質區域將半導體晶圓破斷時碎片的產生。另外,可以防止拾取半導體晶片時的晶片飛散或半導體晶片的位置偏移。
另外,所述構成較佳為在下述方法中使用:在半導體晶圓的表面形成溝,然後,藉由進行背面磨削使所述溝露出,將該切割晶片接合薄膜黏貼到所述溝露出的所述半導體晶圓的表面上,對該切割晶片接合薄膜施加拉伸張力,由此將構成該切割晶片接合薄膜的所述熱固型晶片接合薄膜在與所述溝對應的位置破斷,從而形成帶有晶片接合薄 膜的半導體晶片,從所述切割薄膜上將所得到的所述帶有晶片接合薄膜的半導體晶片剝離,並通過該晶片接合薄膜將剝離後的所述帶有晶片接合薄膜的半導體晶圓固定到被黏物上的方法。上述方法為特別是在半導體晶圓的厚度薄的情況下能夠減少破裂等不良的產生的方法。在此,熱固型晶片接合薄膜的體積電阻率為1×10-3Ω.cm以下。因此,即使在用於上述方法的情況下,也可以發揮高的防靜電效果。另外,熱固型晶片接合薄膜的熱固化前的在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa,因此可以防止拾取半導體晶片時的晶片飛散或半導體晶片的位置偏移。
另外,所述構成中,較佳為所述導電性粒子為選自由鎳粒子、銅粒子、銀粒子、鋁粒子、金粒子、不銹鋼粒子、碳黑、奈米碳管、用金屬鍍敷金屬的表面的金屬粒子、以及表面被金屬包覆的樹脂粒子組成的族群中的至少一種以上粒子。
另外,所述構成中,較佳為所述熱固型晶片接合薄膜含有作為熱塑性樹脂的丙烯酸樹脂。
(切割晶片接合薄膜)
關於本發明的一個實施方式的切割晶片接合薄膜,以下進行說明。圖1是表示本發明的一個實施方式的切割晶片接合薄膜的剖面示意圖。圖2是表示本發明的另一個實施方式的另一個切割晶片接合薄膜的剖面示意圖。
如圖1所示,切割晶片接合薄膜10具有在切割薄膜11上積層有晶片接合薄膜3的構成。切割薄膜11具有在 基材1上積層有黏合劑層2的構成,並且晶片接合薄膜3設置在該黏合劑層2上。另外,本發明中,如圖2所示的切割晶片接合薄膜所示,亦可以是僅在工件黏貼部分形成有晶片接合薄膜3’的構成。
所述基材1具有紫外線透射性,並且作為切割晶片接合薄膜10、12的強度母體。例如可以列舉:低密度聚乙烯、直鏈狀聚乙烯、中密度聚乙烯、高密度聚乙烯、超低密度聚乙烯、無規共聚聚丙烯、嵌段共聚聚丙烯、均聚丙烯、聚丁烯、聚甲基戊烯等聚烯烴、乙烯-乙酸乙烯酯共聚物、離聚物樹脂、乙烯-(甲基)丙烯酸共聚物、乙烯-(甲基)丙烯酸酯(無規、交替)共聚物、乙烯-丁烯共聚物、乙烯-己烯共聚物、聚胺胺酯、聚對苯二甲酸乙二醇酯、聚萘二甲酸乙二醇酯等聚酯、聚碳酸酯、聚醯亞胺、聚醚醚酮、聚醯亞胺、聚醚醯亞胺、聚醯胺、全芳香族聚醯胺、聚苯硫醚、芳族聚醯胺(紙)、玻璃、玻璃布、含氟樹脂、聚氯乙烯、聚偏二氯乙烯、纖維素類樹脂、有機矽樹脂、金屬(箔)、紙等。
另外,作為基材1的材料,可以列舉所述樹脂的交聯物等聚合物。所述塑膠薄膜可以不拉伸使用,也可以根據需要進行單軸或雙軸拉伸處理後使用。根據藉由拉伸處理等而具有熱收縮性的樹脂片,切割後藉由使該基材1熱收縮,能夠降低黏合劑層2與晶片接合薄膜3、3’的接著面積,從而容易地回收半導體晶圓(半導體元件)。
為了提高與鄰接層的密合性和保持性等,基材1的表 面可以進行慣用的表面處理,例如鉻酸處理、臭氧暴露、火焰暴露、高壓電擊暴露、離子化放射線處理等化學或物理處理、利用底塗劑(例如,後述的黏合物質)的塗布處理。所述基材1,可以適當選擇使用同種或異種材料,根據需要也可以將多種混合使用。
基材1的厚度沒有特別限制,可以適當設定,一般為約5μm~約200μm。
用於黏合劑層2的形成的黏合劑沒有特別限制,例如,可以使用丙烯酸系黏合劑、橡膠系黏合劑等一般的壓敏黏合劑。作為所述壓敏黏合劑,從半導體晶圓或玻璃等避忌污染的電子部件利用超純水或醇等有機溶劑的清潔洗滌性等方面考慮,較佳以丙烯酸系聚合物為基礎聚合物的丙烯酸系黏合劑。
作為所述丙烯酸系聚合物,可以列舉例如:使用(甲基)丙烯酸烷基酯(例如,甲酯、乙酯、丙酯、異丙酯、丁酯、異丁酯、第二丁酯、第三丁酯、戊酯、異戊酯、己酯、庚酯、辛酯、2-乙基己酯、異辛酯、壬酯、癸酯、異癸酯、十一烷酯、十二烷酯、十三烷酯、十四烷酯、十六烷酯、十八烷酯、二十烷酯等烷基的碳原子數1~30、特別是碳原子數4~18的直鏈或支鏈烷基酯等)以及(甲基)丙烯酸環烷酯(例如,環戊酯、環己酯等)中的一種或兩種以上作為單體成分的丙烯酸系聚合物等。另外,(甲基)丙烯酸酯是指丙烯酸酯和/或甲基丙烯酸酯,本發明的“(甲基)”全部具有同樣的含義。
所述丙烯酸系聚合物,為了凝聚力和耐熱性等的改質,根據需要可以含有與能夠與所述(甲基)丙烯酸烷基酯或環烷酯共聚的其他單體成分對應的單元。作為這樣的單體成分,可以列舉例如:丙烯酸、甲基丙烯酸、(甲基)丙烯酸羧乙酯、(甲基)丙烯酸羧戊酯、衣康酸、馬來酸、富馬酸、巴豆酸等含羧基單體;馬來酸酐、衣康酸酐等酸酐單體;(甲基)丙烯酸-2-羥基乙酯、(甲基)丙烯酸-2-羥基丙酯、(甲基)丙烯酸-4-羥基丁酯、(甲基)丙烯酸-6-羥基己酯、(甲基)丙烯酸-8-羥基辛酯、(甲基)丙烯酸-10-羥基癸酯、(甲基)丙烯酸-12-羥基十二烷酯、(甲基)丙烯酸-(4-羥甲基環己基)甲酯等含羥基單體;苯乙烯磺酸、烯丙磺酸、2-(甲基)丙烯醯胺基-2-甲基丙磺酸、(甲基)丙烯醯胺基丙磺酸、(甲基)丙烯酸磺丙酯、(甲基)丙烯醯氧基萘磺酸等含磺酸基單體;丙烯醯磷酸-2-羥基乙酯等含磷酸基單體;丙烯醯胺;丙烯腈等。這些可共聚單體成分可以使用一種或兩種以上。這些可共聚單體的使用量較佳為全部單體成分的40重量%以下。
另外,為了進行交聯,所述丙烯酸系聚合物根據需要也可以含有多官能性單體等作為共聚用單體成分。作為這樣的多官能性單體,可以列舉例如:己二醇二(甲基)丙烯酸酯、(聚)乙二醇二(甲基)丙烯酸酯、(聚)丙二醇二(甲基)丙烯酸酯、新戊二醇二(甲基)丙烯酸酯、季戊四醇二(甲基)丙烯酸酯、三羥甲基丙烷三(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、二季戊四醇六(甲基)丙烯酸酯、環氧(甲 基)丙烯酸酯、聚酯(甲基)丙烯酸酯、胺胺基甲酸酯(甲基)丙烯酸酯等。這些多官能性單體也可以使用一種或者兩種以上。從黏合特性等觀點考慮,多官能性單體的使用量較佳為全部單體成分的30重量%以下。
所述丙烯酸系聚合物可以藉由將單一單體或者兩種以上單體混合物聚合而得到。聚合可以藉由溶液聚合、乳化聚合、塊狀聚合、懸浮聚合等任意方式進行。從防止污染潔淨的被黏物等方面考慮,較佳為低分子量物質的含量小。從該觀點考慮,丙烯酸系聚合物的數量平均分子量較佳為約30萬以上,更佳為約40萬~約300萬。
另外,為了提高作為基礎聚合物的丙烯酸系聚合物等的數量平均分子量,所述黏合劑中可以適當使用外部交聯劑。作為外部交聯方法的具體方法,可以列舉:添加聚異氰酸酯化合物、環氧化合物、氮丙啶化合物、三聚氰胺型交聯劑等所謂的交聯劑進行反應的方法。在使用外部交聯劑的情況下,其使用量可以根據與應交聯的基礎聚合物的平衡、以及作為黏合劑的使用用途進行適當確定。一般而言,相對於所述基礎聚合物100重量份,較佳為調配約5重量份以下,更佳為調配0.1重量份~5重量份。另外,根據需要,除所述成分之外,在黏合劑中還可以使用現有公知的各種增黏劑、抗老化劑等添加劑。
黏合劑層2可以由輻射線固化型黏合劑形成。輻射線固化型黏合劑可以藉由照射紫外線等輻射線使交聯度增大,從而容易地使其黏合力下降,藉由僅對圖2所示的黏 合劑層2的與工件黏貼部分對應的部分2a照射輻射線,可以設置與其他部分2b的黏合力的差。
另外,藉由按照圖2所示的晶片接合薄膜3’使輻射線固化型的黏合劑層2固化,可以容易地形成黏合力顯著下降的所述部分2a。由於晶片接合薄膜3’黏貼在固化而黏合力下降的所述部分2a上,因此黏合劑層2的所述部分2a與晶片接合薄膜3’的界面具有在拾取時容易剝離的性質。另一方面,未照射輻射線的部分具有充分的黏合力,而形成所述部分2b。
如前所述,圖1所示的切割晶片接合薄膜10的黏合劑層2中,由未固化的輻射線固化型黏合劑形成的所述部分2b與晶片接合薄膜3黏合,從而能夠確保切割時的保持力。如上所述地輻射線固化型黏合劑能夠以良好的接著-剝離平衡來支撐用於將晶片狀工件(半導體晶圓等)固著到基板等被黏物上的晶片接合薄膜3。圖2所示的切割晶片接合薄膜12的黏合劑層2中,所述部分2b可以固定晶圓環(wafer ring)。
輻射線固化型黏合劑可以沒有特別限制地使用具有碳-碳雙鍵等輻射線固化性官能基、並且顯示黏合性的黏合劑。作為輻射線固化型黏合劑,例如,可以例示:在所述丙烯酸系黏合劑、橡膠系黏合劑等通常的壓敏黏合劑中調配有輻射線固化性單體成分或低聚物成分的添加型的輻射線固化型黏合劑。
作為用於調配的輻射線固化性的單體成分,可以列舉 例如:胺胺基甲酸酯低聚物、胺胺基甲酸酯(甲基)丙烯酸酯、三羥甲基丙烷三(甲基)丙烯酸酯、四羥甲基甲烷四(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、季戊四醇四(甲基)丙烯酸酯、二季戊四醇單羥基五(甲基)丙烯酸酯、二季戊四醇六(甲基)丙烯酸酯、1,4-丁二醇二(甲基)丙烯酸酯等。另外,輻射線固化性的低聚物成分可以列舉:聚胺胺酯類、聚醚類、聚酯類、聚碳酸酯類、聚丁二烯類等各種低聚物,其分子量在約100~約30000的範圍內是適當的。輻射線固化性的單體成分或低聚物成分的調配量,可以根據所述黏合劑層的種類來適當確定能夠使黏合劑層的黏合力下降的量。一般而言,相對於構成黏合劑的丙烯酸系聚合物等基礎聚合物100重量份,例如為約5重量份~約500重量份、較佳為約40重量份~約150重量份。
另外,作為輻射線固化型黏合劑,除上述說明過的添加型的輻射線固化型黏合劑以外,還可以列舉:使用在聚合物側鏈或主鏈中或者主鏈末端具有碳-碳雙鍵的聚合物作為基礎聚合物的內在型的輻射線固化型黏合劑。內在型的輻射線固化型黏合劑不需要含有或者大部分不含有作為低分子量成分的低聚物成分等,因此低聚物成分等在黏合劑層中不會隨時間移動,可以形成具有穩定的層結構的黏合劑層,因此較佳。
所述具有碳-碳雙鍵的基礎聚合物,可以沒有特別限制地使用具有碳-碳雙鍵並且具有黏合性的基礎聚合物。作為這樣的基礎聚合物,較佳以丙烯酸系聚合物作為基本骨 架的基礎聚合物。作為丙烯酸系聚合物的基本骨架,可以列舉所述例示的丙烯酸系聚合物。
在所述丙烯酸系聚合物中引入碳-碳雙鍵的方法沒有特別限制,可以採用各種方法,從分子設計方面考慮,在聚合物側鏈上引入碳-碳雙鍵是比較容易的。例如可以列舉下述方法:預先將具有官能基的單體與丙烯酸系聚合物共聚後,使具有能夠與該官能基反應的官能基及碳-碳雙鍵的化合物在保持碳-碳雙鍵的輻射線固化性的狀態下進行縮合或加成反應。
作為這些官能基的組合例,可以列舉:羧基與環氧基、羧基與氮丙啶基、羥基與異氰酸酯基等。這些官能基的組合中,從容易跟蹤反應的觀點考慮,較佳為羥基與異氰酸酯基的組合。另外,只要是藉由這些官能基的組合生成所述具有碳-碳雙鍵的丙烯酸系聚合物的組合,則官能基可以在丙烯酸系聚合物和所述化合物的任意一個上,所述較佳組合中,較佳為丙烯酸系聚合物具有羥基、所述化合物具有異氰酸酯基的情況。此時,作為具有碳-碳雙鍵的異氰酸酯化合物,例如可以列舉:甲基丙烯醯異氰酸酯、2-甲基丙烯醯氧乙基異氰酸酯、間異丙烯基-α,α-二甲基苄基異氰酸酯等。另外,作為丙烯酸系聚合物,可以使用將所述例示的含羥基單體或2-羥基乙基乙烯基醚、4-羥基丁基乙烯基醚、二乙二醇單乙烯基醚這樣的醚類化合物等共聚合而得到的丙烯酸系聚合物。
所述內在型的輻射線固化型黏合劑,可以單獨使用所 述具有碳-碳雙鍵的基礎聚合物(特別是丙烯酸系聚合物),也可以在不損害特性的範圍內調配所述輻射線固化性的單體成分或低聚物成分。輻射線固化性的低聚物成分等,通常相對於基礎聚合物100重量份在30重量份的範圍內,較佳為0重量份~10重量份的範圍。
所述輻射線固化型黏合劑在藉由紫外線等使其固化時含有光聚合起始劑。作為光聚合起始劑,可以列舉例如:4-(2-羥基乙氧基)苯基(2-羥基-2-丙基)酮、α-羥基-α,α’-二甲基苯乙酮、2-甲基-2-羥基苯丙酮、1-羥基環己基苯基酮等α-酮醇類化合物;甲氧基苯乙酮、2,2’-二甲氧基-2-苯基苯乙酮、2,2’-二乙氧基苯乙酮、2-甲基-1-[4-(甲硫基)苯基]-2-嗎啉基丙烷-1等苯乙酮類化合物;苯偶姻乙醚、苯偶姻異丙醚、茴香偶姻甲醚等苯偶姻醚類化合物;苯偶醯二甲基縮酮等縮酮類化合物;2-萘磺醯氯等芳香族磺醯氯類化合物;1-苯基-1,2-丙二酮-2-(O-乙氧基羰基)肟等光活性肟類化合物;二苯甲酮、苯甲醯基苯甲酸、3,3’-二甲基-4-甲氧基二苯甲酮等二苯甲酮類化合物;噻噸酮、2-氯噻噸酮、2-甲基噻噸酮、2,4-二甲基噻噸酮、異丙基噻噸酮、2,4-二氯噻噸酮、2,4-二乙基噻噸酮、2,4-二異丙基噻噸酮等噻噸酮類化合物;樟腦醌;鹵代酮;醯基氧化膦;醯基膦酸酯等。相對於用於構成黏合劑的丙烯酸系聚合物等基礎聚合物100重量份,光聚合起始劑的調配量例如為約0.05重量份~約20重量份。
另外,作為輻射線固化型黏合劑,可以列舉例如:日 本專利特開昭60-196956號公報中公開的、包含具有兩個以上不飽和鍵的加聚性化合物、具有環氧基的烷氧基矽烷等光聚合性化合物和羰基化合物、有機硫化合物、過氧化物、胺、鎓鹽類化合物等光聚合起始劑的橡膠系黏合劑或丙烯酸系黏合劑等。
所述輻射線固化型的黏合劑層2中,根據需要可以含有經輻射線照射會著色的化合物。藉由在黏合劑層2中含有經輻射線照射會著色的化合物,可以僅使輻射線照射後的部分著色。即,可以使圖1所示的與工件黏貼部分3a對應的部分2a著色。因此,藉由目視立即可以判斷黏合劑層2是否照射過輻射線,可以容易地識別工件黏貼部分3a,從而容易進行工件的黏貼。另外,藉由光感測器等檢測半導體元件時,其檢測精度提高,在半導體元件的拾取時不會產生誤動作。
經輻射線照射會著色的化合物,是在輻射線照射前為無色或淺色,經紫外線照射後變為有色的化合物。作為所述化合物的較佳具體例,可以列舉無色染料(leuco dye)。作為無色染料,可以較佳地使用慣用的三苯基甲烷類、熒烷類、吩噻嗪類、金胺類、螺吡喃類的染料。具體而言,可以列舉:3-[N-(對甲苯胺基)]-7-苯胺基熒烷、3-[N-(對甲苯基)-N-甲基胺基]-7-苯胺基熒烷、3-[N-(對甲苯基)-N-乙基胺基]-7-苯胺基熒烷、3-二乙胺基-6-甲基-7-苯胺基熒烷、結晶紫內酯、4,4’,4”-三(二甲胺基)三苯基甲醇、4,4’,4”-三(二甲胺基)三苯基甲烷等。
作為較佳與這些無色染料一起使用的顯色劑,可以列舉一直以來使用的酚-甲醛(phenol formaldehyde)樹脂的預聚物、芳香族羧酸衍生物、活性白土等電子受體,另外,在使色調變化的情況下也可以組合使用各種公知的發色劑。
如此經輻射線照射會著色的化合物,可以先溶解於有機溶劑等中後再添加到輻射線固化型接著劑中,或者也可以製成微粉末狀後添加到該接著劑中。該化合物的使用比例在黏合劑層2中期望為10重量%以下,較佳為0.01重量%~10重量%,更較佳0.5重量%~5重量%。該化合物的比例超過10重量%時,照射到黏合劑層2上的輻射線被該化合物過度地吸收,因此黏合劑層2的所述部分2a的固化變得不充分,有時黏合力不能充分下降。另一方面,為了充分地著色,較佳為將該化合物的比例設定為0.01重量%以上。
藉由輻射線固化型黏合劑形成黏合劑層2時,可以對黏合劑層2的一部分進行輻射線照射使得黏合劑層2中所述部分2a的黏合力<其他部分2b的黏合力。
作為在所述黏合劑層2中形成所述部分2a的方法,可以列舉:在支撐基材1上形成輻射線固化型的黏合劑層2後對所述部分2a局部地照射輻射線而使其固化的方法。局部的輻射線照射可以藉由形成有與工件黏貼部分3a以外的部分3b等對應的圖案的光罩來進行。另外,可以列舉點狀地照射紫外線使其固化的方法等。輻射線固化型的黏 合劑層2的形成可以藉由將設置在隔片上的黏合劑層轉印到基材1上來進行。局部的輻射線固化也可以對設置於隔片上的輻射線固化型的黏合劑層2進行。
另外,藉由輻射線固化型黏合劑形成黏合劑層2時,可以使用將支撐基材1的至少單面的、與工件黏貼部分3a對應的部分以外的部分的全部或者一部分進行遮光的基材,在其上形成輻射線固化型的黏合劑層2後進行輻射線照射,使與工件黏貼部分3a對應的部分固化,從而形成黏合力下降的所述部分2a。作為遮光材料,可以藉由印刷或蒸鍍等在支撐薄膜上製作能夠形成光罩的材料。藉由該製造方法,可以高效率地製造本發明的切割晶片接合薄膜10。
另外,照射輻射線時因氧而產生固化障礙時,期望藉由任意方法從輻射線固化型的黏合劑層2的表面隔絕氧(空氣)。可以列舉例如:用隔片將所述黏合劑層2的表面覆蓋的方法或者在氮氣氣氛中進行紫外線等輻射線照射的方法等。
黏合劑層2的厚度沒有特別限制,從兼具晶片切割面的缺損防止和接著層的固定保持的功能等方面考慮,較佳為約1μm~約50μm。更佳為2μm~30μm、進而佳為5μm~25μm。
晶片接合薄膜3、3’中,含有導電性粒子。所述導電性粒子較佳為選自由鎳粒子、銅粒子、銀粒子、鋁粒子、 金粒子、不銹鋼粒子、碳黑、奈米碳管、用金等金屬鍍敷金屬的表面而得到的金屬粒子、以及表面被金屬包覆的樹脂粒子組成的族群中的至少一種以上粒子。
作為所述用金屬鍍敷金屬的表面而得到的金屬粒子,沒有特別限制,可以使用以鎳粒子或銅粒子為芯、並被金、銀等貴金屬包覆的粒子。另外,作為所述表面被金屬包覆的樹脂粒子,沒有特別限制,可以使用藉由用鎳、金等金屬對樹脂、無機化合物等非導電性粒子進行鍍敷而得到的粒子等。
作為所述導電性粒子的形狀,沒有特別限制,可以使用例如:薄片狀、針狀、絲狀、球狀、鱗片狀的粒子,從提高分散性、填充率的觀點考慮,較佳使用球狀導電性粒子。
所述導電性粒子的平均粒徑較佳為0.01μm以上且10μm以下,更佳為0.1μm以上且10μm以下。原因在於:藉由將所述導電性粒子的平均粒徑設定為0.01μm以上,可以確保對被黏物的潤濕性,從而可以發揮良好的接著性;藉由將所述導電性粒子的平均粒徑設定為10μm以下,可以使導電性粒子的添加所產生的導電性和熱電導性的提高效果更加良好。另外,導電性粒子的平均粒徑為例如藉由光度式粒度分佈計(HORIBA製造,裝置名:LA-910)求得的值。
另外,所述導電性粒子較佳為平均粒徑不同的兩種以上導電性粒子。原因在於藉由使用平均粒徑不同的兩種以上導電性粒子,可以容易地提高填充率。在含有平均粒徑 不同的兩種導電性粒子的情況下,較佳為將平均粒徑為0.01μm以上,小於5μm的導電性粒子A與平均粒徑為1μm以上10μm以下的導電性粒子B混合而成的體系。此時,上述導電性粒子A與導電性粒子B的混合比例以重量比計較佳為1:9~4:6。
相對於晶片接合薄膜3、3’的有機成分100重量份,所述導電性粒子的含量較佳為20重量份~90重量份,更佳為40重量份~90重量份。藉由將所述導電性粒子的含量設定為20重量份以上,可以形成導電路徑,並抑制體積電阻率變高,以及導電功能下降。另外,藉由將所述導電性粒子的含量設定為90重量份以下,可以良好地保持熱固型晶片接合薄膜的韌性,從而防止在操作熱固型晶片接合薄膜時產生破裂或缺損。
在此,晶片接合薄膜3、3’的體積電阻率為1×10-6Ω.cm以上且1×10-3Ω.cm以下。上述體積電阻率較佳為1×10-6Ω.cm以上且1×10-5Ω.cm以下,更佳為1×10-6Ω.cm以上且1×10-4Ω.cm以下。晶片接合薄膜3、3’的體積電阻率為1×10-3Ω.cm以下,因此可以發揮高的防靜電效果。結果,可以防止由於拾取時的剝離帶電而破壞半導體晶片,從而提高作為元件的可靠性。
另外,晶片接合薄膜3、3’,熱固化前的在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa,較佳為1GPa~10GPa,更佳為4GPa~10GPa。晶片接合薄膜3、3’,熱固化前的在-20℃下的拉伸儲藏彈性係數為10GPa以 下,因此可以使對被黏物的接著性、以及作業性良好。另外,上述拉伸儲藏彈性係數為0.1GPa以上,具有比較高的彈性係數,因此在擴張時可以容易地傳遞應力,可以將相鄰的半導體晶片良好地進行破斷。
另外,晶片接合薄膜3、3’,藉由加熱進行熱固化後在175℃下的拉伸儲藏彈性係數較佳為0.01MPa~50MPa,更佳為0.1MPa~50MPa的範圍內。藉由將加熱進行熱固化後在175℃下的拉伸儲藏彈性係數調節到0.01MPa~50MPa的範圍內,即使進行絲焊步驟時,也可以防止由於超音波振動或加熱而在晶片接合薄膜3、3’與被黏物的接著面上產生剪切變形。結果,可以提高絲焊的成功率。另外,關於使晶片接合薄膜3、3’熱固化時的加熱條件,如後段所述。
熱固化前晶片接合薄膜3、3’對黏合劑層2的90°剝離黏合力較佳為0.03N/25mm~0.25N/25mm帶寬,更佳為0.04N/25mm~0.15N/25mm帶寬。上述剝離黏合力的測定條件是:拉伸速度300mm/分鐘、黏貼溫度40℃、剝離溫度25℃(室溫)。
晶片接合薄膜3、3’的積層結構沒有特別限制,例如可以列舉:僅由接著劑層單層構成的晶片接合薄膜;或者在芯材的單面或雙面形成有接著劑層的多層結構的晶片接合薄膜等。作為所述芯材,可以列舉:薄膜(例如聚醯亞胺薄膜、聚酯薄膜、聚對苯二甲酸乙二醇酯薄膜、聚萘二甲酸乙二醇酯薄膜、聚碳酸酯薄膜等)、用玻璃纖維或塑膠制 無紡纖維增強的樹脂基板、矽基板或玻璃基板等。
作為構成所述晶片接合薄膜3、3’的接著劑組合物,可以列舉:組合使用熱塑性樹脂與熱固性樹脂的組合物。
作為所述熱固性樹脂,可以列舉:酚醛樹脂、胺胺基樹脂、不飽和聚酯樹脂、環氧樹脂、聚胺胺酯樹脂、聚矽氧烷樹脂或熱固性聚醯亞胺樹脂等。這些樹脂可以單獨使用或者兩種以上組合使用。特佳為使半導體元件腐蝕的離子性雜質等的含量少的環氧樹脂。另外,作為環氧樹脂的固化劑,較佳為酚醛樹脂。
所述環氧樹脂,只要是通常作為接著劑組合物使用的環氧樹脂,則沒有特別限制,可以使用例如:雙酚A型、雙酚F型、雙酚S型、溴化雙酚A型、氫化雙酚A型、雙酚AF型、聯苯型、萘型、茀型、苯酚酚醛清漆型、鄰甲酚酚醛清漆型、三羥苯基甲烷型、四羥苯基乙烷型等雙官能環氧樹脂或多官能環氧樹脂、或者乙內醯脲型、異三聚氰酸三縮水甘油酯型或者縮水甘油胺型等環氧樹脂。這些環氧樹脂可以單獨使用或者兩種以上組合使用。這些環氧樹脂中,特別較佳酚醛清漆型環氧樹脂、聯苯型環氧樹脂、三羥苯基甲烷型環氧樹脂或四羥苯基乙烷型環氧樹脂。這是因為:這些環氧樹脂與作為固化劑的酚醛樹脂的反應性好,並且耐熱性等優良。
另外,所述酚醛樹脂作為所述環氧樹脂的固化劑起作用,可以列舉例如:苯酚酚醛清漆樹脂、苯酚芳烷基樹脂、甲酚酚醛清漆樹脂、第三丁基苯酚酚醛清漆樹脂、壬基苯 酚酚醛清漆樹脂等酚醛清漆型酚醛樹脂、甲階酚醛樹脂型酚醛樹脂、聚對羥基苯乙烯等聚羥基苯乙烯等。這些酚醛樹脂可以單獨使用或者兩種以上組合使用。這些酚醛樹脂中特佳為苯酚酚醛清漆樹脂、苯酚芳烷基樹脂。原因在於可以提高半導體裝置的連接可靠性。
所述環氧樹脂與酚醛樹脂的調配比例,例如相對於所述環氧樹脂成分中的環氧基每1當量,酚醛樹脂中的羥基為0.5當量~2.0當量的方式進行調配是適當的。更適當的是0.8當量~1.2當量。即,原因在於:兩者的調配比例如果在所述範圍以外,則固化反應不充分,環氧樹脂固化物的特性容易變差。
作為所述熱塑性樹脂,可以列舉:天然橡膠、丁基橡膠、異戊二烯橡膠、氯丁橡膠、乙烯-乙酸乙烯酯共聚物、乙烯-丙烯酸共聚物、乙烯-丙烯酸酯共聚物、聚丁二烯樹脂、聚碳酸酯樹脂、熱塑性聚醯亞胺樹脂、尼龍6或尼龍6,6等聚醯胺樹脂、苯氧基樹脂、丙烯酸樹脂、PET或PBT等飽和聚酯樹脂、聚醯胺醯亞胺樹脂、或者含氟樹脂等。這些熱塑性樹脂可以單獨使用或者兩種以上組合使用。這些熱塑性樹脂中,特佳為離子性雜質少、耐熱性高、能夠確保半導體元件的可靠性的丙烯酸樹脂。
作為所述丙烯酸樹脂,沒有特別限制,可以列舉:以一種或兩種以上具有碳原子數30以下、特別是碳原子數4~18的直鏈或支鏈烷基的丙烯酸酯或甲基丙烯酸酯為成分的聚合物(丙烯酸類共聚物)等。作為所述烷基,可以列 舉例如:甲基、乙基、丙基、異丙基、正丁基、第三丁基、異丁基、戊基、異戊基、己基、庚基、環己基、2-乙基己基、辛基、異辛基、壬基、異壬基、癸基、異癸基、十一烷基、月桂基、十三烷基、十四烷基、硬脂基、十八烷基或者十二烷基等。
另外,作為形成所述聚合物的其他單體,沒有特別限制,可以列舉例如:丙烯酸、甲基丙烯酸、丙烯酸羧乙酯、丙烯酸羧戊酯、衣康酸、馬來酸、富馬酸或巴豆酸等含羧基單體;馬來酸酐或衣康酸酐等酸酐單體;(甲基)丙烯酸-2-羥基乙酯、(甲基)丙烯酸-2-羥基丙酯、(甲基)丙烯酸-4-羥基丁酯、(甲基)丙烯酸-6-羥基己酯、(甲基)丙烯酸-8-羥基辛酯、(甲基)丙烯酸-10-羥基癸酯、(甲基)丙烯酸-12-羥基十二烷酯或丙烯酸(4-羥甲基環己基)甲酯等含羥基單體;苯乙烯磺酸、烯丙基磺酸、2-(甲基)丙烯醯胺-2-甲基丙磺酸、(甲基)丙烯醯胺丙磺酸、(甲基)丙烯酸磺丙酯或(甲基)丙烯醯氧基萘磺酸等含磺酸基單體;或者丙烯醯磷酸-2-羥基乙酯等含磷酸基單體。
作為所述熱固性樹脂的調配比例,只要是在規定條件下加熱時晶片接合薄膜3、3’會發揮作為熱固型的作用的程度即可,則沒有特別限制,較佳為在5重量%~60重量%的範圍內,更佳為10重量%~50重量%的範圍內。
預先使本發明的晶片接合薄膜3、3’進行某種程度地交聯的情況下,在製作時,可以添加與聚合物的分子鏈末端的官能基等反應的多官能性化合物作為交聯劑。由此, 可以提高高溫下的接著特性,改善耐熱性。
作為所述交聯劑,可以使用現有公知的交聯劑。特別是更較佳為甲苯二異氰酸酯、二苯基甲烷二異氰酸酯、對苯二異氰酸酯、1,5-萘二異氰酸酯、多元醇與二異氰酸酯的加成產物等多異氰酸酯化合物。作為交聯劑的添加量,相對於所述聚合物100重量份通常較佳設定為0.05重量份~7重量份。交聯劑的量超過7重量份時,接著力下降,因此不較佳。另一方面,低於0.05重量份時,凝聚力不足,因此不較佳。另外,根據需要可以與這樣的多異氰酸酯化合物一起含有環氧樹脂等其他多官能性化合物。
另外,晶片接合薄膜3、3’中根據其用途可以適當調配除所述導電性粒子以外的填料。所述填料的調配可以調節彈性係數等。作為所述填料,可以列舉無機填料和有機填料。作為所述無機填料,沒有特別限制,可以列舉例如:氫氧化鋁、氫氧化鎂、碳酸鈣、碳酸鎂、矽酸鈣、矽酸鎂、氧化鈣、氧化鎂、氧化鋁、氮化鋁、硼酸鋁鬚晶、氮化硼、結晶二氧化矽、非晶二氧化矽等。這些填料可以單獨使用或者兩種以上組合使用。
另外,晶片接合薄膜3、3’中除所述導電性粒子、以及所述填料以外根據需要可以適當調配其他添加劑。作為其他添加劑,可以列舉例如:阻燃劑、矽烷偶聯劑或離子捕獲劑等。作為所述阻燃劑,可以列舉例如:三氧化二銻、五氧化二銻、溴化環氧樹脂等。這些物質可以單獨使用或者兩種以上組合使用。作為所述矽烷偶聯劑,例如可以列 舉:β-(3,4-環氧環己基)乙基三甲氧基矽烷、γ-環氧丙氧基丙基三甲氧基矽烷、γ-環氧丙氧基丙基甲基二乙氧基矽烷等。這些化合物可以單獨使用或者兩種以上組合使用。作為所述離子捕獲劑,可以列舉例如:水滑石類、氫氧化鉍等。這些物質可以單獨使用或者兩種以上組合使用。
晶片接合薄膜3、3’的厚度(在積層體的情況下為總厚度)沒有特別限制,從晶片切割面缺損防止和接著層的固定保持的兼具性的觀點考慮,較佳為5μm~100μm,更佳為5μm~60μm,進而佳為5μm~30μm。
為了防止在對基材1或黏合劑層進行接著時或剝離時等產生靜電、或防止由此引起的半導體晶圓等的帶電而破壞電路等,所述切割晶片接合薄膜10、12可以具有防靜電功能。防靜電功能的賦予,可以藉由在基材1或黏合劑層2中添加防靜電劑或導電性物質的方法、在基材1上設置包含電荷遷移絡合物或金屬膜等的導電層等適當的方式進行。這些方式中,較佳為不易產生有可能使半導體晶圓變質的雜質離子的方式。以賦予導電性、提高導熱性等為目的而調配的導電性物質(導電填料)可以列舉銀、鋁、金、銅、鎳、導電性合金等的球狀、針狀、薄片狀的金屬粉、氧化鋁等金屬氧化物、非晶質碳黑、石墨等。
所述切割晶片接合薄膜10、12的晶片接合薄膜3、3’較佳由隔片保護(未圖示)。隔片具有在供給實際應用之前作為保護晶片接合薄膜3、3’的保護材料的功能。另外,隔片還可以作為向黏合劑層2上轉印晶片接合薄膜3、3’ 時的支撐基材使用。隔片在向切割晶片接合薄膜的晶片接合膜3、3’上黏貼工件時剝離。作為隔片,可以使用聚對苯二甲酸乙二醇酯(PET)、聚乙烯、聚丙烯、或由含氟剝離劑、長鏈烷基丙烯酸酯類剝離劑等剝離劑進行了表面塗布後的塑膠薄膜或紙等。
本實施方式的切割晶片接合薄膜10、12例如如下製作。
首先,基材1可以藉由以往公知的製膜方法成膜。作為該製膜方法,可以列舉例如:壓延製膜法、有機溶劑中的澆鑄法、密閉體系中的擠壓吹塑法、T形模具擠出法、共擠出法、乾式層壓法等。
然後,在基材1上塗布黏合劑組合物溶液形成塗膜後,在規定條件下使該塗膜乾燥(根據需要進行加熱交聯),形成黏合劑層2。作為塗布方法,沒有特別限制,可以列舉例如:輥塗、網版塗布、凹版塗布等。另外,作為乾燥條件,例如,在乾燥溫度80℃~150℃、乾燥時間0.5分鐘~5分鐘的範圍內進行。另外,將黏合劑組合物塗布到隔片上形成塗膜後,在所述乾燥條件下將塗膜乾燥可以形成黏合劑層2。之後,將黏合劑層2與隔片一起黏貼到基材1上。由此,製作切割薄膜11。
晶片接合薄膜3、3’例如以如下製作。
首先,製作作為切割晶片接合薄膜3、3’的形成材料的接著劑組合物溶液。在該接著劑組合物溶液中,如前所述,調配有所述接著劑組合物和填料、其他各種添加劑等。
然後,在基材隔片上以達到規定厚度的方式塗布接著劑組合物溶液而形成塗膜後,在規定條件下使該塗膜乾燥形成接著劑層。作為塗布方法,沒有特別限制,可以列舉例如:輥塗、網版塗布、凹版塗布等。另外,作為乾燥條件,例如在乾燥溫度70℃~160℃、乾燥時間1分鐘~5分鐘的範圍內進行。另外,亦可以將接著劑組合物溶液塗布到隔片上形成塗膜後,在所述乾燥條件下將塗膜乾燥而形成接著劑層。之後,將接著劑層與隔片一起黏貼到基材隔片上。
接著,從切割薄膜11和接著劑層上分別將隔片剝離,以接著劑層與黏合劑層成為黏貼面的方式將二者黏貼。黏貼例如可以藉由壓接來進行。此時,層壓溫度沒有特別限制,例如,較佳為30℃~50℃,更佳為35℃~45℃。另外,線壓沒有特別限制,例如,較佳為0.1kgf/cm~20kgf/cm,更佳為1kgf/cm~10kgf/cm。然後,將接著劑層上的基材隔片剝離,得到本實施方式的切割晶片接合薄膜。
(半導體裝置的製造方法)
以下,參照圖3~圖6對使用切割晶片接合薄膜12的半導體裝置的製造方法進行說明。
圖3~圖6是用於說明本實施方式的半導體裝置的一種製造方法的剖面示意圖。首先,如圖3所示,實施對半導體晶圓4照射雷射光而在分割預定線4L上形成改質區域的預處理(預處理步驟)。本方法是將焦點對準半導體晶圓的內部,沿格子狀的分割預定線照射雷射光,從而藉由利 用多光子吸收的侵蝕在半導體晶圓內部形成改質區域的方法。作為半導體晶圓,例如,可以使用厚度1μm~500μm的半導體晶圓。作為雷射光照射條件,可以在如下條件的範圍內適當調節。
<雷射光照射條件>
(A)雷射光
(B)聚焦用透鏡
(C)載置有半導體基板的載置台的移動速度280mm/秒以下
另外,關於照射雷射光而在分割預定線4L上形成改質區域的方法,由於在日本專利第3408805號公報或日本 專利特開2003-338567號公報中有詳細記載,因此,在此省略詳細說明。
然後,如圖4所示,將實施預處理後的半導體晶圓4壓接在切割晶片接合薄膜12的晶片接合薄膜3’上,並將其接著保持而固定(安裝步驟)。本步驟在用壓接輥等按壓工具進行按壓的同時進行。安裝時的黏貼溫度沒有特別限制,較佳在40℃~80℃的範圍內。原因在於:可以有效防止半導體晶圓4的翹曲,並且可以減少切割晶片接合薄膜伸縮產生的影響。
然後,藉由對切割晶片接合薄膜12施加拉伸張力,使半導體晶圓4和晶片接合薄膜3’破斷,從而形成半導體晶片5(擴張步驟)。本步驟中,可以使用例如市售的擴晶裝置。具體而言,如圖5(a)所示,在黏貼有半導體晶圓4的切割晶片接合薄膜12的黏合劑層2的周邊部黏貼切割環31後,固定到擴晶裝置32上。然後,如圖5(b)所示,使上推部33上升,而對切割晶片接合薄膜12施加張力。
此時,擴張速度(上推部上升的速度)較佳為1mm/秒~400mm/秒,更佳50mm/秒~400mm/秒。原因在於:藉由將擴張速度設定為1mm/秒以上,可以容易地將半導體晶圓4和晶片接合薄膜3’基本上同時破斷。另外,藉由將擴張速度設定為400mm/秒以下,可以防止切割薄膜11破斷。
另外,擴張量(上推部的上升量)較佳為5mm~50mm,更佳為5mm~40mm,特佳5mm~30mm。原因在於:藉由 將擴張量設定為5mm以上,可以使半導體晶圓4和晶片接合薄膜3的破斷變得容易。另外,藉由將擴張量設定為50mm以下,可以防止切割薄膜11破斷。
另外,擴張溫度根據需要在-50℃~100℃之間調節即可,本發明中,較佳為-20℃~30℃,更佳為-10℃~25℃。另外,晶片接合薄膜在低溫時,破斷伸長少並且容易破斷,因此可以防止由晶片接合薄膜的破斷不良引起的成品率下降,從該觀點考慮,擴張溫度較佳為更低溫度。
如此一來,藉由對切割晶片接合薄膜12施加拉伸張力,以半導體晶圓4的改質區域為起點沿半導體晶圓4的厚度方向產生破裂,並且可以使與半導體晶圓4緊貼的晶片接合薄膜3’破斷,從而可以得到帶有晶片接合薄膜3’的半導體晶片5。特別地,晶片接合薄膜3’的熱固化前的在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa,因此可以防止在改質區域將半導體晶圓4破斷時產生破裂。
然後,為了將接著固定在切割晶片接合薄膜12上的半導體晶片5剝離,進行半導體晶片5的拾取(拾取步驟)。作為拾取的方法沒有特別限制,可以使用現有公知的各種方法。例如可以列舉:用針從切割晶片接合薄膜12側將各個半導體晶片5向上推,藉由拾取裝置拾取被上推的半導體晶片5的方法等。晶片接合薄膜3’的熱固化前在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa,因此可以防止在拾取半導體晶圓時產生晶片飛散或半導體晶片5的位置偏移。
作為拾取條件,較佳為將針上推速度設定為5mm/秒~100mm/秒,更佳為5mm/秒~10mm/秒。原因在於:藉由設定為5mm/秒以上,可以防止靜電放電量增多,藉由設定為100mm/秒以下,可以防止靜電量增多。
拾取時,從切割薄膜11上將帶有晶片接合薄膜3的半導體晶片5剝離,因此會產生剝離帶電。但是,本實施方式的切割晶片接合薄膜12,由於體積電阻率為1×10-3Ω/cm以下,因此比較難以引起剝離帶電。結果,可以防止由於產生的靜電而破壞半導體晶片5,從而可以提高半導體晶片5的可靠性。
在此,由於黏合劑層2為紫外線固化型,因此在對該黏合劑層2照射紫外線之後進行拾取。由此,黏合劑層2對晶片接合薄膜3’的黏合力降低,使半導體晶片5容易剝離。結果,可以在不損傷半導體晶片5的情況下進行拾取。紫外線照射時的照射強度、照射時間等條件沒有特別限制,可以根據需要適當設定。另外,作為紫外線照射時使用的光源,可以使用所述的光源。
然後,如圖6所示,將拾取的半導體晶片5通過晶片接合薄膜3’暫時固著到被黏物6上(固定步驟)。作為被黏物6,可以列舉:引線框、TAB薄膜、基板或者另外製作的半導體晶片等。被黏物6例如可以是容易變形的變形型被黏物,也可以是難以變形的非變形型被黏物(半導體晶圓等)。
作為所述基板,可以使用現有公知的基板。另外,作 為所述引線框,可以使用Cu引線框、42合金引線框等金屬引線框、或者包括玻璃環氧、BT(雙馬來醯亞胺-三嗪)、聚醯亞胺等的有機基板。但是,本發明不限於這些,也包括安裝半導體元件、並與半導體元件電性連接後可以使用的電路基板。
在晶片接合薄膜3’的暫時固著時25℃下的剪切接著力,對於被黏物6而言較佳為0.2MPa以上,更佳為0.2MPa~10MPa。晶片接合薄膜3’的剪切接著力為至少0.2MPa以上時,在進行絲焊步驟時,藉由該步驟中的超音波振動或加熱而在晶片接合薄膜3’與半導體晶片5或被黏物6的接著面上產生剪切變形的情況少。即,半導體元件受到絲焊時的超音波振動而移動的情況少,由此可以防止絲焊的成功率下降。另外,在晶片接合薄膜3’進行暫時固著時175℃下的剪切接著力,對於被黏物6而言較佳為0.01MPa以上,更佳為0.01MPa~5MPa。
然後,進行用接合線7將被黏物6的端子部(內部引線)的前端與半導體晶片5上的電極焊墊(未圖示)電性連接的絲焊(絲焊步驟)。作為所述接合線7,可以使用例如金線、鋁線或銅線等。進行絲焊時的溫度在80℃~250℃,較佳為80℃~220℃的範圍內進行。另外,其加熱時間為數秒~數分鐘。接線在加熱達到所述溫度範圍的狀態下藉由超音波的振動能與加壓的壓接能組合來進行。本步驟可以在不進行晶片接合薄膜3a的熱固化的情況下實施。另外,在本步驟的過程中半導體晶片5與被黏物6不會藉由晶片接合薄 膜3a固著。
然後,利用密封樹脂8將半導體晶片5密封(密封步驟)。本步驟為了保護搭載在被黏物6上的半導體晶片5和接合線7而進行。本步驟藉由用模具將密封用樹脂成形來進行。作為密封樹脂8,例如可以使用環氧樹脂。在樹脂密封時的加熱溫度通常為175℃下進行60秒~90秒,但是,本發明不限於此,也可以例如在165℃~185℃下進行數分鐘固化。由此,使密封樹脂固化,並且藉由晶片接合薄膜3將半導體晶片5與被黏物6固著。即,本發明中,即使在不進行後述的後固化步驟的情況下,本步驟中也可以進行利用晶片接合薄膜3的固著,從而可以有助於減少製造步驟數以及縮短半導體裝置的製造時間。
所述後固化步驟中,使在所述密封步驟中固化不充分的密封樹脂8完全固化。即使在密封步驟中晶片接合薄膜3a未完全熱固化的情況下,在本步驟中也可以與密封樹脂8一起實現晶片接合薄膜3a的完全熱固化。本步驟中的加熱溫度根據密封樹脂的種類而不同,例如在165℃~185℃的範圍內,加熱時間為約0.5小時~約8小時。
在上述實施方式中,對於將帶有晶片接合薄膜3’的半導體晶片5暫時固著到被黏物6上後在不使晶片接合薄膜3’完全熱固化的情況下進行絲焊步驟的情況進行了說明。但是,本發明中,也可以進行將帶有晶片接合薄膜3’的半導體晶片5暫時固著到被黏物6上後,使晶片接合薄膜3’熱固化,之後進行絲焊步驟的通常的晶片接合步 驟。此時,熱固化後的晶片接合薄膜3’在175℃下較佳為具有0.01MPa以上的剪切接著力,更佳為0.01MPa~5MPa。原因在於,藉由使熱固化後的175℃下的剪切接著力為0.01MPa以上,可以防止由絲焊步驟時的超音波振動或加熱引起在晶片接合薄膜3’與半導體晶片5或被黏物6的接著面上產生剪切變形。
另外,本發明的切割晶片接合薄膜,也可以適合用於將多個半導體晶片積層進行三維安裝的情況。此時,在半導體晶片之間可以積層晶片接合薄膜和墊片,也可以在半導體晶圓之間不積層墊片僅積層晶片接合薄膜,可以根據製造條件或用途等適當變更。
以下參考圖7、圖8對使用切割晶片接合薄膜12的另一種導體裝置的製造方法進行說明。
圖7和圖8是用於說明本實施方式的半導體裝置的另一種製造方法的剖面示意圖。首先,如圖7(a)所示,利用旋轉刀片41在半導體晶圓4的表面4F上形成不達到背面4R的溝槽4S(溝槽形成步驟)。另外,形成溝槽4S時,半導體晶圓4由未圖示的支撐基材支撐。溝槽4S的深度可以根據半導體晶圓4的厚度或擴張條件適當設定。
然後,如圖7(b)所示,以表面4F接觸保護構件42的方式支撐半導體晶圓4。保護構件42具有:在中央具有開口部的環狀框架43、和黏貼到框架43的背面並且堵塞框架43的開口部的保護膠帶44。保護膠帶44藉由其黏合力支撐半導體晶圓4。
然後,將溝槽4S形成時使用的支撐基材剝離。之後,如圖7(c)所示,利用磨削磨石45進行背面磨削,使溝槽4S從背面4R露出(溝槽露出步驟)。然後,在溝槽4S露出的半導體晶圓4的表面4F上黏貼切割晶片接合薄膜12(黏貼步驟)。另外,往半導體晶圓4上黏貼保護膠帶44或切割晶片接合薄膜12,可以使用現有公知的膠帶黏貼裝置,背面磨削也可以使用現有公知的磨削裝置。
然後,如圖8所示,在切割晶片接合薄膜12的晶片接合薄膜3’上壓接溝槽4S露出的半導體晶圓4,將其接著保持而固定(安裝步驟)。之後,將保護片剝離,進行擴張步驟。該擴張步驟與藉由照射雷射光而在分割預定線4L上形成改質區域的情況同樣即可。
藉由對切割晶片接合薄膜12施加拉伸張力,可以將晶片接合薄膜3’在與溝槽4S對應的位置破斷,從而可以得到帶有晶片接合薄膜3’的半導體晶片5。
另外,後面的步驟也與藉由照射雷射光而在分割預定線4L上形成改質區域的情況同樣,因此在此省略說明。
本發明中,半導體晶片的切割方法不限於上述的實施方式,例如,也可以採用借由刀片進行切入到切割晶片接合薄膜10的稱為全切(full-cut)的切割方式。即,本申請發明的切割晶片接合薄膜,也可以用於藉由全切方式製造半導體裝置的方法
實例
以下,對本發明的較佳實例進行詳細的例示說明。但 是,該實例中所述的材料或調配量等只要沒有特別限定性的記載,則本發明的主旨不限定於此。另外,下文中,出現“份”時表示“重量份”。
(實例1)
使下述(a)~(g)溶解於甲基乙基酮中,得到濃度23重量%的接著劑組合物溶液。
(a)以丙烯酸乙酯-甲基丙烯酸甲酯為主成分的丙烯酸酯系聚合物(根上工業股份有限公司製造,Paracro W-197CM) 100份
(b)環氧樹脂1(JER股份有限公司製造,Epicoat 1004)228份
(c)環氧樹脂2(JER股份有限公司製造,Epicoat 827)206份
(d)酚醛樹脂(三井化学股份有限公司製造,milex XLC-4L)466份
(e)球状銅粉1(日本atomize加工股份有限公司製造,SF-Cu,平均粒径10μm) 400份
(f)球状銅粉2(日本atomize加工股份有限公司製造,SF-Cu,平均粒径6μm) 267份
(g)固化催化劑(四國化成股份有限公司製造,C11-Z)3份
將該接著劑組合物溶液塗布到包括經聚矽氧烷脫模處理後的厚度38μm的聚對苯二甲酸乙二醇酯薄膜的脫模處理薄膜(剝離襯墊)上之後,在130℃乾燥2分鐘。由此, 製作厚度20μm的晶片接合薄膜A。
(實例2)
在本實例2中,將上述(e)的球狀銅粉1和上述(f)的球狀銅粉2變更為球狀銀粉1(德力化學研究所股份有限公司製造,SFR-AG,平均粒徑5μm)367份和球狀銀粉2(福田金屬股份有限公司製造,AgC-156I,平均粒徑3μm)300份,除此以外,與所述實例1同樣操作,製作本實例的晶片接合薄膜B。
(實例3)
在本實例3中,將上述(e)的球狀銅粉1和上述(f)的球狀銅粉2變更為球狀銅粉1(福田金屬箔粉股份有限公司製造,Cu-HWQ,平均粒徑5μm)2502份和球狀銅粉2(福田金屬箔粉股份有限公司製造,Cu-HWQ,平均粒徑1.5μm)1500份,除此以外,與所述實例1同樣操作,製作本實例的晶片接合薄膜C。
(比較例1)
在比較例1中,將上述(e)的球狀銅粉1變更為球狀銅粉(日本atomize加工股份有限公司製造,SF-Cu,平均粒径6μm)667份,並且不添加上述(f)的球狀銅粉2,除此以外,與所述實施例1同樣操作,製作本比較例的晶片接合薄膜D。
(比較例2)
在比較例2中,將上述(e)的球狀銅粉1的添加量變更為61份,將上述(f)的球狀銅粉2的添加量變更為50份, 除此以外,與所述實例1同樣操作,製作本比較例的晶片接合薄膜E。
(比較例3)
在比較例3中,將上述(e)的球狀銅粉1的添加量變更為5004份,將上述(f)的球狀銅粉2的添加量變更為4000份,除此以外,與所述實例1同樣操作,製作本比較例的晶片接合薄膜F。
(體積電阻率的測定)
對於晶片接合薄膜A~F,使用電阻率計(三菱化學股份有限公司製造,Loresta MP MCP-T350),藉由基於JIS K 7194四探針法進行體積電阻率的測定。結果如表1所示。
(剝離帶電量的測定)
在晶片接合薄膜A~F上分別黏貼切割薄膜,將所得物分別設定為切割晶片接合薄膜A~F。切割薄膜使用在基材(聚烯烴薄膜,膜厚100μm)上積層有黏合劑層(丙烯酸系黏合劑層,膜厚5μm)的切割薄膜(日東電工股份有限公司製造:DU-400SE)。然後,在40℃的條件下在切割晶片接合薄膜A~F上黏貼厚度75μm的矽晶圓,並在以下的條件下以成為5mm×5mm的尺寸的方式進行切割,。接著,拾取半導體晶圓,並使用帶電量測定裝置(ELECTRO STATICVOLTMETER MODEL 520,TREK JAPAN股份有限公司製造)測定剛剝離後的晶片帶電量。具體而言,在室溫(25℃)、濕度50%的環境中進行10次測定,將其平均值作為帶電量。測定的結果中,將帶電量為1.0kV以下的評 價為○、超過1.0kV的評價為×。測定結果以及評價如表1所示。拾取條件如下所述。
<切割條件>
切割装置:DISCO公司製造,DFD-6361
切割速度:50mm/秒
切割刀片:Z1:DISCO公司製造,“NBC-ZH203O-SE27HDD”
Z2:DISCO公司製造,“NBC-ZH103O-SE27HBB”
切割刀片轉速:Z1:40,000rpm,Z2:45,000rpm
切割方式:階段式切割(step-cut)
切割帶切入深度:20μm
晶片尺寸:5mm×5mm
<拾取條件>
拾取裝置:新川股份有限公司製造,SPA-300
針根數:5根
針上推速度:10mm/秒
擴張:擴張量(下拉量)3mm
針上推量:400μm
(熱固化前的-20℃下的拉伸儲藏彈性係數的測定)
對於晶片接合薄膜A~F,將其進行切割分別得到厚度200μm、寬度10mm的條狀測定片。然後,使用固定黏彈性測定裝置(RSA-III,Rheometric Scientific公司製造),在頻率1Hz、升溫速度10℃/分鐘的條件下測定-50℃~300℃下的拉伸儲藏彈性係數。此時的-20℃下的測定值如表1 所示。
(熱固化後的175℃下的拉伸儲藏彈性係數的測定)
對於晶片接合薄膜A~F,在120℃的條件下加熱處理1小時。然後,將其進行切割分別得到厚度200μm、寬度10mm的條狀測定片。然後,使用固定黏彈性測定裝置(RSA-III,Rheometric Scientific公司製造),在頻率1Hz、升溫速度10℃/分鐘的條件下測定-50℃~300℃下的拉伸儲藏彈性係數。此時的175℃下的測定值如表1所示。
(破斷的確認) <採用藉由照射雷射光而在分割預定線上形成改質區域的步驟(步驟1)的情況>
作為雷射光加工裝置,使用東京精密股份有限公司製造的ML300-Integration,將焦點對準半導體晶圓內部,沿格子狀(10mm×10mm)的分割預定線從半導體晶圓的表面側照射雷射光,在半導體晶圓的內部形成改質區域。半導體晶圓使用矽晶片(厚度75μm、外徑12英寸)。另外,雷射光照射條件如下進行。
(A)雷射光
(B)聚焦用透鏡
(C)載置有半導體基板的載置台的移動速度100mm/秒
在晶片接合薄膜A~F上分別黏貼進行了雷射光預處理的半導體晶圓後,進行破斷試驗。破斷試驗中的擴張條件是:室溫(25℃)、擴張速度300mm/秒、擴張量30mm。破斷試驗的結果中,將無破斷不良部位的情況評價為○、有破斷不良部位的情況評價為×。結果如表1所示。
<採用在半導體晶圓的表面形成溝槽、然後進行背面磨削的步驟(步驟2)的情況>
在半導體晶圓(厚度500μm)上藉由刀片切割加工形成格子狀(10mm×10mm)的切槽。切槽的深度為100μm。
然後,用保護膠帶保護該半導體晶圓的表面,並進行背面磨削直到厚度為75μm,得到分割後的各個半導體晶片(10mm×10mm×75μm)。將其分別與晶片接合薄膜A~F黏貼後,進行破斷試驗。破斷試驗中的擴張條件是:室溫(25℃)、擴張速度300mm/秒、擴張量30mm。破斷試驗的結 果中,與上述步驟1的情況同樣,將無破斷不良部位的情況評價為○、有破斷不良部位的情況評價為×。結果如表1所示。
(吸濕可靠性)
將晶片接合薄膜A~F分別在40℃的條件下黏貼到5mm見方的半導體晶片上,在120℃、0.1MPa、1秒的條件下安裝到BGA(球柵陣列)基板上。將這樣的試樣對晶片接合薄膜A~F分別製作9個。然後,在100℃進行10小時熱處理,使用密封樹脂(GE-100,日東電工股份有限公司製造)進行密封。然後,在60℃、80%RH的環境下放置168小時。然後,藉由以將260℃以上的溫度保持30秒的方式進行溫度設定後的IR回流爐,利用超音波顯微鏡觀察在半導體晶片與BGA基板的界面處是否產生剝離。觀察的結果,產生剝離的個數如果為3個以下則評價為○、如果為4個以上則評價為×。結果如表1所示。
1‧‧‧基材
2‧‧‧黏合劑層
2a、2b、3a、3b‧‧‧部分
3、3’‧‧‧晶片接合薄膜(熱固型晶片接合薄膜)
4‧‧‧半導體晶圓
4F‧‧‧表面
4L‧‧‧分割預定線
4R‧‧‧背面
4S‧‧‧溝槽
5‧‧‧半導體晶片
6‧‧‧被黏物
7‧‧‧接合線
8‧‧‧密封樹脂
10、12‧‧‧切割晶片接合薄膜
11‧‧‧切割薄膜
31‧‧‧切割環
32‧‧‧擴晶裝置
33‧‧‧上推部
41‧‧‧旋轉刀片
42‧‧‧保護構件
43‧‧‧框架
44‧‧‧保護膠帶
45‧‧‧磨削磨石
圖1是表示本發明的一個實施方式的切割晶片接合薄膜的剖面示意圖。
圖2是表示本發明的另一個實施方式的切割晶片接合薄膜的剖面示意圖。
圖3是用於說明本實施方式的半導體裝置的一種製造方法的剖面示意圖。
圖4是用於說明本實施方式的半導體裝置的一種製造方法的剖面示意圖。
圖5的(a)、(b)是用於說明本實施方式的半導體裝置的一種製造方法的剖面示意圖。
圖6是用於說明本實施方式的半導體裝置的一種製造方法的剖面示意圖。
圖7的(a)、(b)和(c)是用於說明本實施方式的半導體裝置的另一種製造方法的剖面示意圖。
圖8是用於說明本實施方式的半導體裝置的另一種製造方法的剖面示意圖。
1‧‧‧基材
2‧‧‧黏合劑層
2a、2b、3a、3b‧‧‧部分
3‧‧‧晶片接合薄膜(熱固型晶片接合薄膜)
4‧‧‧半導體晶圓
10‧‧‧切割晶片接合薄膜
11‧‧‧切割薄膜

Claims (7)

  1. 一種切割晶片接合薄膜,其中,在切割薄膜上設置有熱固型晶片接合薄膜,所述切割晶片接合薄膜特徵在於,所述熱固型晶片接合薄膜含有導電性粒子,所述熱固型晶片接合薄膜的體積電阻率為1×10-6Ω.cm以上且1×10-3Ω.cm以下,並且,所述熱固型晶片接合薄膜熱固化前的在-20℃下的拉伸儲藏彈性係數為0.1GPa~10GPa。
  2. 如申請專利範圍第1項所述的切割晶片接合薄膜,其中,所述導電性粒子為平均粒徑不同的兩種以上導電性粒子,兩種以上的所述導電性粒子各自的平均粒徑為0.01μm以上且10μm以下。
  3. 如申請專利範圍第1項所述的切割晶片接合薄膜,其中,相對於所述熱固型晶片接合薄膜的有機成分100重量份,所述導電性粒子的含量為20重量份~90重量份。
  4. 如申請專利範圍第1項所述的切割晶片接合薄膜,其使用於:對半導體晶圓照射雷射光而形成改質區域,之後,將所述半導體晶圓黏貼到該切割晶片接合薄膜上,對該切割晶片接合薄膜施加拉伸張力,藉此將所述半導體晶圓在所述改質區域破斷,並且將構成該切割晶片接合薄膜的熱固 型晶片接合薄膜在與所述改質區域對應的位置破斷,從而形成帶有晶片接合薄膜的半導體晶片,從所述切割薄膜上將所得到的所述帶有晶片接合薄膜的半導體晶片剝離,並通過該晶片接合薄膜將剝離後的所述帶有晶片接合薄膜的半導體晶片固定到被黏物上的方法。
  5. 如申請專利範圍第1項所述的切割晶片接合薄膜,其使用於:在半導體晶圓的表面形成溝之後,藉由進行背面磨削使所述溝露出,將該切割晶片接合薄膜黏貼到所述溝露出的所述半導體晶圓的表面上,對該切割晶片接合薄膜施加拉伸張力,由此將構成該切割晶片接合薄膜的所述熱固型晶片接合薄膜在與所述溝對應的位置破斷,從而形成帶有晶片接合薄膜的半導體晶片,從所述切割薄膜上將所得到的所述帶有晶片接合薄膜的半導體晶片剝離,並通過該晶片接合薄膜將剝離後的所述帶有晶片接合薄膜的半導體晶片固定到被黏物上的方法。
  6. 如申請專利範圍第1項所述的切割晶片接合薄膜,其中,所述導電性粒子為選自由鎳粒子、銅粒子、銀粒子、鋁粒子、金粒子、不銹鋼粒子、碳黑、奈米碳管、用金屬鍍敷金屬的表面而得到的金屬粒子、以及表面被金屬包覆的樹脂粒子組成的族群中的至少一種以上粒子。
  7. 如申請專利範圍第1項所述的切割晶片接合薄膜,其中,所述熱固型晶片接合薄膜含有作為熱塑性樹脂的丙烯酸樹脂。
TW100132425A 2010-09-13 2011-09-08 切割晶片接合薄膜 TWI544532B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010204487A JP5580701B2 (ja) 2010-09-13 2010-09-13 ダイシング・ダイボンドフィルム

Publications (2)

Publication Number Publication Date
TW201212117A TW201212117A (en) 2012-03-16
TWI544532B true TWI544532B (zh) 2016-08-01

Family

ID=45805836

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100132425A TWI544532B (zh) 2010-09-13 2011-09-08 切割晶片接合薄膜

Country Status (5)

Country Link
US (2) US20120061805A1 (zh)
JP (1) JP5580701B2 (zh)
KR (1) KR101846025B1 (zh)
CN (1) CN102399505B (zh)
TW (1) TWI544532B (zh)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013197557A (ja) * 2012-03-23 2013-09-30 Sumitomo Bakelite Co Ltd 半導体素子の電位測定方法
JP6143164B2 (ja) * 2012-03-30 2017-06-07 日立金属株式会社 シンチレータアレイの製造方法
JP6071041B2 (ja) * 2012-03-30 2017-02-01 日立金属株式会社 シンチレータアレイの製造方法及び放射線検出器の製造方法
JP5770677B2 (ja) * 2012-05-08 2015-08-26 株式会社ディスコ ウェーハの加工方法
DE202012102188U1 (de) * 2012-06-14 2013-09-26 Polifilm Protection Gmbh Partikelhaltige Klebefolie zum temporären Schutz einer Werkstückoberfläche, insbesondere bei Laserbearbeitung, und Verbund mit einer derartigen Folie
US9484260B2 (en) * 2012-11-07 2016-11-01 Semiconductor Components Industries, Llc Heated carrier substrate semiconductor die singulation method
US9136173B2 (en) * 2012-11-07 2015-09-15 Semiconductor Components Industries, Llc Singulation method for semiconductor die having a layer of material along one major surface
JP6542504B2 (ja) * 2013-02-20 2019-07-10 日東電工株式会社 フィルム状接着剤、フィルム状接着剤付きダイシングテープ、半導体装置の製造方法、及び半導体装置
JP6214192B2 (ja) * 2013-04-11 2017-10-18 株式会社ディスコ 加工方法
KR102265643B1 (ko) * 2013-05-21 2021-06-17 네덜란제 오르가니자티에 포오르 토에게파스트-나투우르베텐샤펠리즈크 온데르조에크 테엔오 화학 변환 공정
JP6190671B2 (ja) * 2013-09-05 2017-08-30 古河電気工業株式会社 ダイシング用粘着テープおよび半導体装置の製造方法
US9171749B2 (en) * 2013-11-13 2015-10-27 Globalfoundries U.S.2 Llc Handler wafer removal facilitated by the addition of an amorphous carbon layer on the handler wafer
JP2015129226A (ja) * 2014-01-08 2015-07-16 日東電工株式会社 フィルム状接着剤、フィルム状接着剤付きダイシングテープ、半導体装置の製造方法、及び半導体装置
WO2015178369A1 (ja) * 2014-05-23 2015-11-26 日立化成株式会社 ダイボンドダイシングシート
JPWO2016027888A1 (ja) * 2014-08-22 2017-06-01 リンテック株式会社 保護膜形成用シートおよび保護膜付き半導体チップの製造方法
JP6500906B2 (ja) * 2014-08-28 2019-04-17 リンテック株式会社 導電性粘着シート
JP6356582B2 (ja) * 2014-11-25 2018-07-11 日東電工株式会社 接着シート、ダイシングシート付き接着シート及び半導体装置の製造方法
JP6399923B2 (ja) * 2014-12-24 2018-10-03 株式会社ディスコ 板状物のレーザー加工方法
JP6401043B2 (ja) * 2014-12-24 2018-10-03 株式会社きもと レーザーダイシング用補助シート
DE102015100512A1 (de) * 2015-01-14 2016-07-14 Infineon Technologies Austria Ag Versprödungsvorrichtung, Aufnahmesystem und Verfahren zum Aufnehmen von Chips
SG11201706655VA (en) * 2015-08-03 2017-09-28 Furukawa Electric Co Ltd Electrically conductive composition
JP2017162855A (ja) * 2016-03-07 2017-09-14 株式会社ディスコ ウエーハの加工方法
JP2018125479A (ja) * 2017-02-03 2018-08-09 株式会社ディスコ ウェーハの加工方法
JP6504194B2 (ja) * 2017-03-31 2019-04-24 日亜化学工業株式会社 発光素子の製造方法
JP6961387B2 (ja) * 2017-05-19 2021-11-05 日東電工株式会社 ダイシングダイボンドフィルム
US10373869B2 (en) 2017-05-24 2019-08-06 Semiconductor Components Industries, Llc Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus
JP2020072139A (ja) * 2018-10-30 2020-05-07 株式会社ディスコ ウエーハの拡張方法およびウエーハの拡張装置
JP7221649B2 (ja) * 2018-10-30 2023-02-14 株式会社ディスコ ウエーハの拡張方法およびウエーハの拡張装置
KR102554028B1 (ko) * 2019-02-07 2023-07-11 (주)이녹스첨단소재 폴더블 디스플레이용 점착제 조성물
KR102554029B1 (ko) * 2019-02-07 2023-07-11 (주)이녹스첨단소재 폴더블 디스플레이용 점착제 조성물
JP7217175B2 (ja) * 2019-03-01 2023-02-02 日東電工株式会社 半導体背面密着フィルムおよびダイシングテープ一体型半導体背面密着フィルム
TWI690710B (zh) * 2019-03-11 2020-04-11 旺矽科技股份有限公司 探針之製造方法
KR20200143259A (ko) 2019-06-13 2020-12-23 닛토덴코 가부시키가이샤 다이싱 테이프 및 다이싱 다이 본드 필름
SG10202006305VA (en) * 2019-07-01 2021-02-25 Innox Advanced Materials Co Ltd FOD adhesive film and semiconductor package including the same
CN113831865A (zh) * 2020-06-24 2021-12-24 日东电工株式会社 热固性片及切割芯片接合薄膜
KR20220006155A (ko) * 2020-07-07 2022-01-17 삼성디스플레이 주식회사 디스플레이 장치의 제조 방법
TWI821679B (zh) * 2020-08-25 2023-11-11 南韓商杰宜斯科技有限公司 基板處理裝置及基板處理方法
US20240222182A1 (en) * 2022-12-28 2024-07-04 Intel Corporation Method and apparatus for a silicon die preparation including auxetic and electrostatic dissipatative features

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5043102A (en) * 1989-11-29 1991-08-27 Advanced Products, Inc. Conductive adhesive useful for bonding a semiconductor die to a conductive support base
US5250228A (en) * 1991-11-06 1993-10-05 Raychem Corporation Conductive polymer composition
US5252694A (en) * 1992-01-22 1993-10-12 Minnesota Mining And Manufacturing Company Energy-polymerization adhesive, coating, film and process for making the same
US5667899A (en) * 1992-09-16 1997-09-16 Hitachi Chemical Co. Ltd. Electrically conductive bonding films
JPH0748461A (ja) * 1993-08-05 1995-02-21 Kobe Steel Ltd 固定パレット用繊維強化複合樹脂材およびその製法
US5863970A (en) * 1995-12-06 1999-01-26 Polyset Company, Inc. Epoxy resin composition with cycloaliphatic epoxy-functional siloxane
US6406988B1 (en) * 1998-04-24 2002-06-18 Amerasia International Technology, Inc. Method of forming fine pitch interconnections employing magnetic masks
US6057402A (en) * 1998-08-12 2000-05-02 Johnson Matthey, Inc. Long and short-chain cycloaliphatic epoxy resins with cyanate ester
JP3410371B2 (ja) * 1998-08-18 2003-05-26 リンテック株式会社 ウエハ裏面研削時の表面保護シートおよびその利用方法
US6548175B2 (en) * 2001-01-11 2003-04-15 International Business Machines Corporation Epoxy-siloxanes based electrically conductive adhesives for semiconductor assembly and process for use thereof
JP4684439B2 (ja) * 2001-03-06 2011-05-18 富士通株式会社 伝導性粒子、伝導性組成物および、電子機器の製造方法
JP3854103B2 (ja) * 2001-06-28 2006-12-06 住友ベークライト株式会社 導電性ペースト及び該ペーストを用いてなる半導体装置
US7083850B2 (en) * 2001-10-18 2006-08-01 Honeywell International Inc. Electrically conductive thermal interface
JP4019254B2 (ja) * 2002-04-24 2007-12-12 信越化学工業株式会社 導電性樹脂組成物
US7329462B2 (en) * 2002-08-23 2008-02-12 General Electric Company Reflective article and method for the preparation thereof
WO2004090942A2 (en) * 2003-04-01 2004-10-21 Aguila Technologies, Inc. Thermally conductive adhesive composition and process for device attachment
CN100454493C (zh) * 2003-06-06 2009-01-21 日立化成工业株式会社 粘合片、与切割胶带一体化粘合片以及半导体的制造方法
KR101215728B1 (ko) 2003-06-06 2012-12-26 히다치 가세고교 가부시끼가이샤 반도체 장치의 제조방법
JP4406300B2 (ja) * 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4137827B2 (ja) * 2004-03-23 2008-08-20 住友ベークライト株式会社 導電性接着フィルムおよびこれを用いた半導体装置
JP4839628B2 (ja) * 2005-02-18 2011-12-21 日立化成工業株式会社 フィルム状接着剤、接着シート及びそれを使用した半導体装置
JP4630692B2 (ja) * 2005-03-07 2011-02-09 株式会社ディスコ レーザー加工方法
TW200707468A (en) * 2005-04-06 2007-02-16 Toagosei Co Ltd Conductive paste, circuit board, circuit article and method for manufacturing such circuit article
JP4809632B2 (ja) * 2005-06-01 2011-11-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN101528828A (zh) * 2006-08-10 2009-09-09 陶氏环球技术公司 填充有高倍膨胀石墨的聚合物
US7422707B2 (en) * 2007-01-10 2008-09-09 National Starch And Chemical Investment Holding Corporation Highly conductive composition for wafer coating
JP4430085B2 (ja) * 2007-03-01 2010-03-10 日東電工株式会社 ダイシング・ダイボンドフィルム
CN101617395B (zh) * 2007-03-01 2011-08-17 日东电工株式会社 热固化型芯片接合薄膜
KR101176431B1 (ko) * 2007-10-09 2012-08-30 히다치 가세고교 가부시끼가이샤 접착 필름이 부착된 반도체칩의 제조 방법, 이 제조 방법에 사용되는 반도체용 접착 필름, 및 반도체 장치의 제조 방법
CN101821833B (zh) * 2007-10-09 2012-04-04 日立化成工业株式会社 半导体用粘接膜、以及半导体芯片、半导体装置的制造方法
JP2009212290A (ja) * 2008-03-04 2009-09-17 Disco Abrasive Syst Ltd デバイスの製造方法
JP5252698B2 (ja) * 2008-06-18 2013-07-31 信越化学工業株式会社 樹脂バンプ用組成物
JP5221279B2 (ja) * 2008-10-22 2013-06-26 株式会社ディスコ 積層デバイスの製造方法
JP5437111B2 (ja) * 2010-03-01 2014-03-12 日東電工株式会社 ダイボンドフィルム、ダイシング・ダイボンドフィルム及び半導体装置
US20110315916A1 (en) * 2010-06-29 2011-12-29 Dow Global Technologies Inc. Curable composition
JP6144868B2 (ja) * 2010-11-18 2017-06-07 日東電工株式会社 フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、及び、フリップチップ型半導体裏面用フィルムの製造方法
JP2012241063A (ja) * 2011-05-17 2012-12-10 Nitto Denko Corp 半導体装置製造用の接着シート

Also Published As

Publication number Publication date
KR101846025B1 (ko) 2018-04-05
KR20120028253A (ko) 2012-03-22
US9123794B2 (en) 2015-09-01
CN102399505A (zh) 2012-04-04
US20120061805A1 (en) 2012-03-15
US20140057100A1 (en) 2014-02-27
JP2012060068A (ja) 2012-03-22
JP5580701B2 (ja) 2014-08-27
TW201212117A (en) 2012-03-16
CN102399505B (zh) 2015-11-25

Similar Documents

Publication Publication Date Title
TWI544532B (zh) 切割晶片接合薄膜
TWI632625B (zh) Tape for electronic device packaging
TWI441894B (zh) 熱固型晶片接合薄膜、切割/晶片接合薄膜及半導體裝置的製造方法
JP4801127B2 (ja) ダイシング・ダイボンドフィルムの製造方法
CN104946152B (zh) 切割薄膜、切割/芯片接合薄膜及半导体装置的制造方法
JP2011187571A (ja) ダイシング・ダイボンドフィルム
JP4927187B2 (ja) ダイシング・ダイボンドフィルム
JP2011174042A (ja) 半導体装置製造用フィルム及び半導体装置の製造方法
JP2012079936A (ja) ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法
JP2011023607A (ja) 放熱性ダイボンドフィルム
JP5580730B2 (ja) ダイシング・ダイボンドフィルム及び半導体素子
JP2006303472A (ja) ダイシング・ダイボンドフィルム
KR20170113152A (ko) 다이싱 다이 본드 필름, 및 반도체 장치의 제조 방법
JP6073263B2 (ja) ダイシングシート付きダイボンドフィルム、及び、半導体装置の製造方法
JP2012142368A (ja) ダイシング・ダイボンドフィルム及び半導体素子
JP2008135448A (ja) ダイシング・ダイボンドフィルム
JP2014082498A (ja) ダイシング・ダイボンドフィルムの製造方法
JP2012186361A (ja) ダイシング・ダイボンドフィルム及び半導体素子
TW201540809A (zh) 黏晶(die bond)薄膜、附有切割片之黏晶薄膜、半導體裝置、及半導體裝置之製造方法
TW201313869A (zh) 切割/晶片接合薄膜
JP2014068020A (ja) 放熱性ダイボンドフィルム
JP5656741B2 (ja) ダイシング・ダイボンドフィルムの製造方法
JP4931125B2 (ja) ダイシング・ダイボンドフィルム
JP2015103580A (ja) 熱硬化型ダイボンドフィルム、ダイシングシート付きダイボンドフィルム、熱硬化型ダイボンドフィルムの製造方法、及び、半導体装置の製造方法
JP2015103573A (ja) 熱硬化型ダイボンドフィルム、ダイシングシート付きダイボンドフィルム、及び、半導体装置の製造方法