TWI530096B - Transmission and semiconductor devices - Google Patents

Transmission and semiconductor devices Download PDF

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Publication number
TWI530096B
TWI530096B TW100103453A TW100103453A TWI530096B TW I530096 B TWI530096 B TW I530096B TW 100103453 A TW100103453 A TW 100103453A TW 100103453 A TW100103453 A TW 100103453A TW I530096 B TWI530096 B TW I530096B
Authority
TW
Taiwan
Prior art keywords
voltage
gate
input
output terminal
pmos transistor
Prior art date
Application number
TW100103453A
Other languages
English (en)
Chinese (zh)
Other versions
TW201212537A (en
Inventor
Takashi Ono
Original Assignee
Seiko Instr Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instr Inc filed Critical Seiko Instr Inc
Publication of TW201212537A publication Critical patent/TW201212537A/zh
Application granted granted Critical
Publication of TWI530096B publication Critical patent/TWI530096B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H03K17/164—Soft switching using parallel switching arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0054—Gating switches, e.g. pass gates

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
TW100103453A 2010-02-09 2011-01-28 Transmission and semiconductor devices TWI530096B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010026931A JP5431992B2 (ja) 2010-02-09 2010-02-09 トランスミッションゲート及び半導体装置

Publications (2)

Publication Number Publication Date
TW201212537A TW201212537A (en) 2012-03-16
TWI530096B true TWI530096B (zh) 2016-04-11

Family

ID=44353216

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100103453A TWI530096B (zh) 2010-02-09 2011-01-28 Transmission and semiconductor devices

Country Status (5)

Country Link
US (1) US8354873B2 (enExample)
JP (1) JP5431992B2 (enExample)
KR (1) KR101727752B1 (enExample)
CN (1) CN102195637B (enExample)
TW (1) TWI530096B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010080889A1 (en) * 2009-01-07 2010-07-15 Zentrum Mikroelektronik Dresden Ag Adaptive bootstrap circuit for controlling cmos switch(es)
JP5923919B2 (ja) * 2011-10-11 2016-05-25 株式会社ソシオネクスト 半導体装置及びアナログスイッチの制御方法
TWI473072B (zh) * 2013-06-24 2015-02-11 Orise Technology Co Ltd 減少閂鎖元件數量的源極驅動裝置
CN104426528B (zh) * 2013-09-11 2019-05-07 台湾积体电路制造股份有限公司 多电压输入缓冲器及其相关方法
JP2016139390A (ja) * 2015-01-23 2016-08-04 エスアイアイ・セミコンダクタ株式会社 検出回路
US9843322B2 (en) * 2016-03-11 2017-12-12 Texas Instruments Incorporated Integrated high-side driver for P-N bimodal power device
KR101675573B1 (ko) * 2016-03-21 2016-11-11 주식회사 이노액시스 레벨 시프터, 디지털 아날로그 변환기, 버퍼 증폭기 및 이를 포함하는 소스 드라이버와 전자 장치
TWI653732B (zh) 2017-09-19 2019-03-11 世界先進積體電路股份有限公司 控制電路及操作電路
CN109560536B (zh) * 2017-09-26 2021-01-05 世界先进积体电路股份有限公司 控制电路及操作电路
US10818653B2 (en) 2017-12-12 2020-10-27 Vanguard International Semiconductor Corporation Control circuit and operating circuit utilizing the same
CN108199701B (zh) * 2017-12-28 2021-05-07 清华大学 一种高速的cmos传输门开关电路
US10763846B1 (en) * 2019-08-23 2020-09-01 Nxp Usa, Inc. High voltage tolerant analog switch
EP3799309A1 (en) * 2019-09-26 2021-03-31 Ams Ag Electric circuitry for signal transmission
US20220311439A1 (en) * 2021-03-24 2022-09-29 Stmicroelectronics International N.V. Multiplexer circuit using a transmission gate circuit with a selectively boosted switch control signal
CN120825157B (zh) * 2025-09-18 2025-11-21 苏州锴威特半导体股份有限公司 一种低导通电阻平坦度的模拟开关结构

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
US4740717A (en) * 1986-11-25 1988-04-26 North American Philips Corporation, Signetics Division Switching device with dynamic hysteresis
JPH01175410A (ja) * 1987-12-29 1989-07-11 Sharp Corp 半導体アナログ・スイッチ
JPH0595262A (ja) * 1991-03-30 1993-04-16 Nec Corp アナログ入力回路
US5194768A (en) * 1992-03-27 1993-03-16 Advanced Micro Devices, Inc. Apparatus for filtering noise from a periodic signal
JPH06208423A (ja) * 1993-01-12 1994-07-26 Mitsubishi Electric Corp 電源回路
JPH07169292A (ja) 1993-12-13 1995-07-04 Matsushita Electron Corp Ｃｍｏｓサンプルホールド回路
JPH07221642A (ja) * 1994-02-02 1995-08-18 Hitachi Ltd 半導体集積回路
US6433613B1 (en) * 2000-12-15 2002-08-13 Fairchild Semiconductor Corporation Translating switch circuit with disabling option
US6693479B1 (en) * 2002-06-06 2004-02-17 Analog Devices, Inc. Boost structures for switched-capacitor systems
JP3949027B2 (ja) * 2002-08-06 2007-07-25 富士通株式会社 アナログスイッチ回路
FR2894373B1 (fr) * 2005-12-07 2008-01-04 Atmel Corp Cellule anti-fusible autonome
JP4828343B2 (ja) * 2006-07-28 2011-11-30 三菱電機株式会社 アナログスイッチ回路
JP5018245B2 (ja) * 2007-05-31 2012-09-05 株式会社日立製作所 アナログスイッチ
JP2009017276A (ja) * 2007-07-05 2009-01-22 Nec Electronics Corp 半導体装置
JP2009108911A (ja) * 2007-10-29 2009-05-21 Akira Koyama ネジ固定機構およびネジ固定方法

Also Published As

Publication number Publication date
CN102195637B (zh) 2015-07-01
US8354873B2 (en) 2013-01-15
TW201212537A (en) 2012-03-16
JP2011166449A (ja) 2011-08-25
US20110193615A1 (en) 2011-08-11
JP5431992B2 (ja) 2014-03-05
KR101727752B1 (ko) 2017-04-17
CN102195637A (zh) 2011-09-21
KR20110093661A (ko) 2011-08-18

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MM4A Annulment or lapse of patent due to non-payment of fees