TWI525997B - 用於補償數位延遲線之時序延遲的處理，電壓及溫度變化之裝置及方法 - Google Patents
用於補償數位延遲線之時序延遲的處理，電壓及溫度變化之裝置及方法 Download PDFInfo
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- TWI525997B TWI525997B TW099103608A TW99103608A TWI525997B TW I525997 B TWI525997 B TW I525997B TW 099103608 A TW099103608 A TW 099103608A TW 99103608 A TW99103608 A TW 99103608A TW I525997 B TWI525997 B TW I525997B
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/022—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/023—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1066—Output synchronization
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00097—Avoiding variations of delay using feedback, e.g. controlled by a PLL
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00123—Avoiding variations of delay due to integration tolerances
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/0013—Avoiding variations of delay due to power supply
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00143—Avoiding variations of delay due to temperature
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Dram (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/418,981 US8390352B2 (en) | 2009-04-06 | 2009-04-06 | Apparatus and method for compensating for process, voltage, and temperature variation of the time delay of a digital delay line |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201136171A TW201136171A (en) | 2011-10-16 |
| TWI525997B true TWI525997B (zh) | 2016-03-11 |
Family
ID=42537943
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099103608A TWI525997B (zh) | 2009-04-06 | 2010-02-05 | 用於補償數位延遲線之時序延遲的處理，電壓及溫度變化之裝置及方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8390352B2 (enExample) |
| EP (1) | EP2239849B1 (enExample) |
| JP (1) | JP5421142B2 (enExample) |
| TW (1) | TWI525997B (enExample) |
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| US8390356B2 (en) * | 2008-05-08 | 2013-03-05 | Kpit Cummins Infosystems, Ltd. | Method and system for open loop compensation of delay variations in a delay line |
| US20130015837A1 (en) * | 2011-07-13 | 2013-01-17 | International Business Machines Corporation | On-chip signal waveform measurement circuit |
| US8850155B2 (en) * | 2011-12-19 | 2014-09-30 | Advanced Micro Devices, Inc. | DDR 2D Vref training |
| CN107092383B (zh) * | 2012-03-29 | 2020-09-11 | 禾瑞亚科技股份有限公司 | 触摸处理器 |
| US8742815B2 (en) * | 2012-06-20 | 2014-06-03 | Qualcomm Incorporated | Temperature-independent oscillators and delay elements |
| US8867595B1 (en) | 2012-06-25 | 2014-10-21 | Rambus Inc. | Reference voltage generation and calibration for single-ended signaling |
| US9503088B2 (en) | 2013-01-10 | 2016-11-22 | Freescale Semiconductor, Inc. | Method and control device for recovering NBTI/PBTI related parameter degradation in MOSFET devices |
| WO2014210192A1 (en) * | 2013-06-25 | 2014-12-31 | Ess Technology, Inc. | Delay circuit independent of supply voltage |
| KR20160009429A (ko) * | 2014-07-16 | 2016-01-26 | 삼성전자주식회사 | Ｐｖｔ 변동에 둔감한 딜레이 컨트롤 시스템 및 그 제어 방법 |
| CN105049043B (zh) * | 2015-06-30 | 2018-05-08 | 北京时代民芯科技有限公司 | 一种带有失调校正功能的高速比较器 |
| KR102424896B1 (ko) * | 2016-02-25 | 2022-07-26 | 에스케이하이닉스 주식회사 | 데이터 트레이닝 장치 및 이를 포함하는 반도체 장치 |
| US9792964B1 (en) * | 2016-09-20 | 2017-10-17 | Micron Technology, Inc. | Apparatus of offset voltage adjustment in input buffer |
| CN106847319B (zh) * | 2016-12-23 | 2021-06-29 | 深圳市紫光同创电子有限公司 | 一种fpga电路及窗口信号调整方法 |
| CN108806744B (zh) * | 2017-05-05 | 2020-11-27 | 中芯国际集成电路制造(上海)有限公司 | 一种延时产生电路及非易失性存储器读时序产生电路 |
| CN107315442B (zh) | 2017-06-30 | 2019-04-30 | 上海兆芯集成电路有限公司 | 控制器与参考电压产生方法 |
| CN107342766B (zh) * | 2017-09-02 | 2023-08-11 | 合肥学院 | 一种近阈值电压全数字逐次逼近寄存器延时锁定环系统 |
| CN109900971B (zh) * | 2017-12-11 | 2023-01-24 | 长鑫存储技术有限公司 | 脉冲信号的处理方法、装置以及半导体存储器 |
| CN112152596B (zh) * | 2019-06-27 | 2024-03-08 | 台湾积体电路制造股份有限公司 | 用于产生脉冲输出的电路及方法 |
| CN111327298B (zh) * | 2020-03-12 | 2021-03-30 | 湖南毂梁微电子有限公司 | 一种超高精度数字脉冲信号产生电路及方法 |
| US10911035B1 (en) | 2020-05-04 | 2021-02-02 | Nxp Usa, Inc. | Fixed-width pulse generator |
| US20230141595A1 (en) * | 2021-11-08 | 2023-05-11 | Advanced Micro Devices, Inc. | Compensation methods for voltage and temperature (vt) drift of memory interfaces |
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| JP5451012B2 (ja) * | 2008-09-04 | 2014-03-26 | ピーエスフォー ルクスコ エスエイアールエル | Ｄｌｌ回路及びその制御方法 |
| KR100985413B1 (ko) * | 2008-10-14 | 2010-10-06 | 주식회사 하이닉스반도체 | 지연회로 및 그를 포함하는 지연고정루프회로 |
-
2009
- 2009-04-06 US US12/418,981 patent/US8390352B2/en not_active Expired - Fee Related
-
2010
- 2010-01-28 EP EP10152009.6A patent/EP2239849B1/en not_active Not-in-force
- 2010-02-05 TW TW099103608A patent/TWI525997B/zh not_active IP Right Cessation
- 2010-02-05 JP JP2010024183A patent/JP5421142B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010246092A (ja) | 2010-10-28 |
| EP2239849A2 (en) | 2010-10-13 |
| JP5421142B2 (ja) | 2014-02-19 |
| US20100253406A1 (en) | 2010-10-07 |
| TW201136171A (en) | 2011-10-16 |
| EP2239849A3 (en) | 2013-12-18 |
| EP2239849B1 (en) | 2018-03-14 |
| US8390352B2 (en) | 2013-03-05 |
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