TWI522980B - Driving method of display device and display device - Google Patents

Driving method of display device and display device Download PDF

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TWI522980B
TWI522980B TW099130329A TW99130329A TWI522980B TW I522980 B TWI522980 B TW I522980B TW 099130329 A TW099130329 A TW 099130329A TW 99130329 A TW99130329 A TW 99130329A TW I522980 B TWI522980 B TW I522980B
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potential
period
gray scale
display device
signal
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TW099130329A
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TW201124967A (en
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梅崎敦司
今藤敏和
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半導體能源研究所股份有限公司
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/344Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on particles moving in a fluid or in a gas, e.g. electrophoretic devices
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms

Description

顯示裝置之驅動方法及顯示裝置Display device driving method and display device

本發明係有關包含灰階儲存顯示元件之顯示裝置之驅動方法。本發明又有關顯示裝置。The present invention relates to a driving method for a display device including a gray scale storage display element. The invention is further related to display devices.

包含諸如電泳元件之灰階儲存顯示元件之顯示裝置業已受青睞來作為可低電力消耗驅動之顯示裝置之一。該裝置之優點在於可無需電源來保持影像,因此,預期該顯示裝置可適用於電子書閱讀機、海報等。A display device including a gray scale storage display element such as an electrophoretic element has been favored as one of display devices that can be driven with low power consumption. The advantage of this device is that it is possible to maintain an image without a power source, and therefore, the display device is expected to be applicable to an e-book reader, a poster, or the like.

業已提議包含多種灰階儲存顯示元件之顯示裝置。例如,業已提議如在液晶顯示裝置等中使用電晶體作為像素之開關元件所形成之主動矩陣顯示裝置(例如參考專利文獻1)。Display devices including a plurality of gray scale storage display elements have been proposed. For example, an active matrix display device formed by using a transistor as a switching element of a pixel in a liquid crystal display device or the like has been proposed (for example, refer to Patent Document 1).

又,業已提議多種顯示裝置之驅動方法。例如,業已提議以下影像切換方法:在顯示待獲得之影像前,將整個顯示部轉換成第一灰階(例如白),當切換影像時,其接著轉換成第二灰階(例如黑)(例如參考專利文獻2)。Further, various methods of driving a display device have been proposed. For example, the following image switching method has been proposed: before displaying the image to be obtained, converting the entire display portion into a first gray level (for example, white), and when switching the image, it is then converted into a second gray level (for example, black) ( For example, refer to Patent Document 2).

[參考案][Reference case]

[專利文獻1]日本公告專利申請案2002-169190[Patent Document 1] Japanese Patent Application No. 2002-169190

[專利文獻2]日本公告專利申請案2007-206471[Patent Document 2] Japanese Patent Application No. 2007-206471

本發明之一實施例之目的在於提供一種可進行多重灰階顯示之顯示裝置之驅動方法。It is an object of an embodiment of the present invention to provide a driving method of a display device capable of performing multiple gray scale display.

替代地,本發明之一實施例之目的在於提供一種壓縮殘留影像之顯示裝置之驅動方法。Alternatively, it is an object of an embodiment of the present invention to provide a driving method of a display device for compressing residual images.

替代地,本發明之一實施例之目的在於提供一種達到低電力消耗之顯示裝置之驅動方法。Alternatively, it is an object of an embodiment of the present invention to provide a driving method of a display device that achieves low power consumption.

替代地,本發明之一實施例之目的在於提供一種可抑制顯示裝置中所含元件之劣化之顯示裝置之驅動方法。Alternatively, it is an object of an embodiment of the present invention to provide a driving method of a display device capable of suppressing deterioration of components included in a display device.

替代地,本發明之一實施例之目的在於提供藉由以上驅動方法操作之顯示裝置。Alternatively, it is an object of an embodiment of the present invention to provide a display device that operates by the above driving method.

本發明之一實施例係一種顯示裝置之驅動方法,該顯示裝置包括複數個像素,其每一者包含灰階儲存顯示元件,其中信號被輸入諸端子之一,且共用電位被供至其他端子。於第一初始化期間,藉由對像素部掃描信號複數次,顯示第一灰階顯示位準於該像素部所含複數個灰階儲存顯示元件。在該第一初始化期間後的第二初始化期間,藉由對該像素部掃描信號至少一次,顯示第二灰階顯示位準於該像素部所含複數個灰階儲存顯示元件。在該第二初始化期間後的寫入期間,藉由對該像素部掃描信號複數次,形成影像於該像素部。於該第一初始化期間中,輸入至灰階儲存顯示元件之諸端子之一之複數個信號之保持期間不同。An embodiment of the present invention is a driving method of a display device, the display device comprising a plurality of pixels each of which includes a gray scale storage display element, wherein a signal is input to one of the terminals, and a common potential is supplied to the other terminal . During the first initialization period, the first gray scale display level is displayed on the plurality of gray scale storage display elements included in the pixel portion by scanning the signal for the pixel portion a plurality of times. During the second initializing period after the first initializing period, the second gray scale display level is displayed by the pixel portion scanning signal at least once, and the plurality of gray scale storage display elements included in the pixel portion are displayed. In the address period after the second initializing period, the image is scanned in the pixel portion by a plurality of times to form an image on the pixel portion. During the first initialization period, the plurality of signals input to one of the terminals of the gray scale storage display element have different sustain periods.

又,除了以上驅動方法外,在第二初始化期間內於像素部上進行信號掃描一次之顯示裝置之驅動方法亦為本發明之一實施例。Further, in addition to the above driving method, the driving method of the display device that performs signal scanning once on the pixel portion in the second initializing period is also an embodiment of the present invention.

又,除了以上驅動方法外,以下顯示裝置之驅動方法亦為本發明之一實施例:於第一初始化期間內輸入至灰階儲存顯示元件之端子之一之複數個信號之每一者係共用電位,或異於該共用電位之第一電位;其中,於該第二初始化期間內輸入至灰階儲存顯示元件之端子之一之至少一信號之每一者係第二電位,其產生第二電場於該第二電位與該共用電位間,其朝著異於該第一電位與該共用電位間所產生電場之相反方向;且於寫入期間內輸入至灰階儲存顯示元件之端子之一之信號之每一者係共用電位、第一電位或第二電位。Moreover, in addition to the above driving method, the driving method of the following display device is also an embodiment of the present invention: each of a plurality of signals input to one of the terminals of the grayscale storage display element during the first initializing period is shared. a potential, or a first potential different from the common potential; wherein each of the at least one signal input to one of the terminals of the gray scale storage display element during the second initializing period is a second potential, which produces a second And an electric field between the second potential and the common potential, which is opposite to an electric field generated by the difference between the first potential and the common potential; and is input to one of the terminals of the gray scale storage display element during the writing period Each of the signals is a common potential, a first potential or a second potential.

而且,除了以上驅動方法外,以下顯示裝置之驅動方法亦為本發明之一實施例:於第一初始化期間內輸入至灰階儲存顯示元件之端子之一之複數個信號之每一者係共用電位或異於共用電位之第一電位;於第二初始化期間內對灰階儲存顯示元件之端子之一輸入之至少一信號之每一者係共用電位或第二電位,該第二電位產生電場於該第二電位與該共用電位間,其朝著異於第一電位與共用電位間所產生電場之相反方向;於寫入期間內輸入至灰階儲存顯示元件之端子之一之複數個信號之每一者係共用電位、第一電位或第二電位。Moreover, in addition to the above driving method, the driving method of the following display device is also an embodiment of the present invention: each of a plurality of signals input to one of the terminals of the grayscale storage display element during the first initializing period is shared The potential is different from the first potential of the common potential; each of the at least one signal input to one of the terminals of the gray scale storage display element during the second initializing period is a common potential or a second potential, the second potential generating an electric field Between the second potential and the common potential, the direction is opposite to the electric field generated between the first potential and the common potential; and the plurality of signals input to one of the terminals of the gray scale storage display element during the writing period Each of them is a common potential, a first potential or a second potential.

而且,除了以上驅動方法,於寫入期間內最後掃描中輸入至灰階儲存顯示元件之端子之一之共用電位之顯示裝置之驅動方法亦為本發明之一實施例。Further, in addition to the above driving method, the driving method of the display device which inputs the common potential to one of the terminals of the gray scale storage display element in the last scan in the writing period is also an embodiment of the present invention.

而且,除了以上驅動方法外,在第一初始化期間複數個信號掃描x次(x係2或更大之自然數),且最短信號保持期間之長度為t時,複數個信號之保持期間之每一者之長度為2y-lt(y為x或更小自然數之顯示裝置之驅動方法亦為本發明之一實施例。Moreover, in addition to the above driving method, during the first initialization period, the plurality of signals are scanned x times (x is a natural number of 2 or more), and when the length of the shortest signal holding period is t, each of the plurality of signals is held. A driving method of a display device having a length of 2 yl t (y is a natural number of x or less) is also an embodiment of the present invention.

又,除了以上驅動方法,於寫入期間內輸入至灰階儲存顯示元件之端子之一之複數個信號之保持期間之長度相同之顯示裝置之驅動方法亦為本發明之一實施例。Further, in addition to the above driving method, the driving method of the display device having the same length of the plurality of signals input to one of the terminals of the gray scale storage display element during the writing period is also an embodiment of the present invention.

而且,一種顯示裝置亦為本發明之一實施例,其包括:控制部,用以控制以上驅動方法;源極驅動部及閘極驅動部,電連接於該控制部;電晶體,其閘極端子電連接至該閘極驅動部,其第一端子電連接至該源極驅動部,且其第二端子電極電連接至電泳元件之端子之一;以及電容器,具有端子,其一端子電連接至該電晶體之第二端子,其他端子電連接至供應共用電位之配線。Moreover, a display device is also an embodiment of the present invention, comprising: a control unit for controlling the above driving method; a source driving portion and a gate driving portion electrically connected to the control portion; a transistor, a gate terminal thereof a sub-electrode is connected to the gate driving portion, a first terminal thereof is electrically connected to the source driving portion, and a second terminal electrode thereof is electrically connected to one of terminals of the electrophoresis element; and a capacitor has a terminal, and one terminal is electrically connected To the second terminal of the transistor, the other terminals are electrically connected to the wiring supplying the common potential.

此外,使用氧氣半導體於電晶體之半導體層之顯示裝置亦為本發明之一實施例。Further, a display device using an oxygen semiconductor in a semiconductor layer of a transistor is also an embodiment of the present invention.

須知,於本說明書中,灰階儲存顯示元件係可藉由電壓施加控制顯示灰階並於無電壓施加下,保持顯示灰階之元件。以下元件被提供來作為灰階儲存顯示元件之例子:使用電泳之元件(電泳元件)、使用扭轉球(twisting ball)之粒子旋轉元件、荷電著色劑或Electronic Liquid Powder(註冊商標)之粒子運動元件、藉由磁性顯示灰階之磁泳元件、移動液體元件、光散射元件、相變元件等。It should be noted that in the present specification, the gray scale storage display element can display the gray scale by the voltage application control and maintain the gray scale component under no voltage application. The following elements are provided as examples of gray scale storage display elements: an element using electrophoresis (electrophoresis element), a particle rotating element using a twisting ball, a charged coloring agent, or a particle moving element of Electronic Liquid Powder (registered trademark) A magnetic swimming element, a moving liquid element, a light scattering element, a phase change element, or the like, which displays gray scale by magnetic.

須知,由於電晶體之源極端子及汲極端子依電晶體之構造、操作條件等而改變,因此,難以界定哪一個是源極端子或汲極端子。因此,於本文獻(說明書、申請專利範圍、圖式等)中,為加以區別,源極端子及汲極端子之一稱為第一端子,另一者稱為第二端子。 It should be noted that since the source terminal and the 汲 terminal of the transistor vary depending on the structure, operating conditions, and the like of the transistor, it is difficult to define which one is the source terminal or the 汲 terminal. Therefore, in this document (the specification, the patent application, the drawings, etc.), in order to distinguish, one of the source terminal and the terminal terminal is referred to as a first terminal, and the other is referred to as a second terminal.

於本發明一實施例之顯示裝置之驅動方法中,電壓施加時間等之控制可控制灰階儲存顯示元件之多重灰階顯示。 In the driving method of the display device according to an embodiment of the present invention, the control of the voltage application time or the like can control the multiple gray scale display of the gray scale storage display element.

又,本發明一實施例之顯示裝置之驅動方法包含初始化處理,其中當切換影像時,將像素部所含複數個灰階儲存顯示元件之灰階位準轉換成第一灰階位準,接著,轉換成第二灰階位準。因此,可顯示具有較少殘留先前影像之影像。 Moreover, the driving method of the display device according to an embodiment of the present invention includes an initialization process, wherein when the image is switched, the gray level of the plurality of grayscale storage display elements included in the pixel portion is converted into the first gray level, and then , converted to the second gray level. Therefore, an image with less residual previous images can be displayed.

而且,於本發明一實施例之顯示裝置之驅動方法中,在第一初始化處理期間輸入灰階儲存顯示元件之端子之一之複數個信號保持期間之長度不同。因此,可減少適當時間內施加電壓於顯示不同灰階位準之複數個電泳元件所需信號掃描次數。亦即,可抑制顯示裝置中所含元件之劣化,並減少顯示裝置之電力消耗。 Further, in the driving method of the display device according to the embodiment of the present invention, the lengths of the plurality of signal holding periods in which one of the terminals of the gray scale storage display element is input during the first initialization processing are different. Therefore, the number of signal scans required to apply a voltage to a plurality of electrophoretic elements displaying different gray scale levels in an appropriate time can be reduced. That is, deterioration of components included in the display device can be suppressed, and power consumption of the display device can be reduced.

後文將參考圖式,詳細說明本發明之許多實施例。須知,本發明不限於以下說明,熟於本技藝之人士當知,在不悖離本發明之精神及範疇下,可作多種變化及修改。因此,本發明理應不限於以下諸實施例之說明。 Many embodiments of the invention are described in detail below with reference to the drawings. It is to be understood that the invention is not limited to the following description, and it is obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be limited to the description of the following examples.

(實施例1) (Example 1)

茲參考第1A至1C圖、第2圖、第3圖、第4圖及第5圖,說明於本實施例中,包含灰階儲存顯示元件及其操作之顯示裝置之構造及操作之一例子。須知,於本實施例中說明使用電泳元件作為灰階儲存顯示元件之例子。 Referring to FIGS. 1A to 1C, 2, 3, 4, and 5, an example of the construction and operation of a display device including a gray scale storage display element and its operation will be described in the present embodiment. . It should be noted that an example in which an electrophoretic element is used as a gray scale storage display element is described in the present embodiment.

[顯示裝置之構造例] [Configuration Example of Display Device]

第1A圖圖示本實施例之顯示裝置之構造之方塊圖。顯示裝置100包含像素部101、源極驅動器102、閘極驅動器103、控制部104、設成相互平行之m(m係正整數)條源極線1051至105m以及設成相互平行之n(n係正整數)條閘極線1061至106n。須知,源極驅動器102經由m條源極線1051至105m電連接於像素部101。閘極驅動器103經由n條閘極線1061至106n電連接於像素部101。又,控制部104電連接於源極驅動器102及閘極驅動器103。 Fig. 1A is a block diagram showing the configuration of the display device of the embodiment. The display device 100 includes a pixel portion 101, a source driver 102, a gate driver 103, a control portion 104, m (m-type positive integer) source lines 105 1 to 105 m which are arranged in parallel with each other, and n which are arranged in parallel with each other. (n is a positive integer) strip gate lines 106 1 to 106 n . It is to be noted that the source driver 102 is electrically connected to the pixel portion 101 via m source lines 105 1 to 105 m . The gate driver 103 is electrically connected to the pixel portion 101 via n gate lines 106 1 to 106 n . Further, the control unit 104 is electrically connected to the source driver 102 and the gate driver 103.

又,像素部101包含n×m像素10711至107nm。須知,n×m像素10711至107nm配置成n列m行。此外,m條源極線1051至105m之每一者電連接於n個像素,此等像素配置於任一行。n條閘極線1061至106n之每一者電連接於m個像素,此等像素配置於任一行。換言之,配置於第i列及第j行(i及j係正整數)(1≦i≦n及1≦j≦m)之像素107ij電連接於源極線105j及閘極線106iFurther, the pixel portion 101 includes n × m pixels 107 11 to 107 nm . It should be noted that n × m pixels 107 11 to 107 nm are arranged in n columns and m rows. Further, each of the m source lines 105 1 to 105 m is electrically connected to n pixels, and the pixels are arranged in any one of the rows. Each of the n gate lines 106 1 to 106 n is electrically connected to m pixels, and the pixels are arranged in any of the rows. In other words, the pixels 107 ij disposed in the i-th column and the j-th row (i and j are positive integers) (1≦i≦n and 1≦j≦m) are electrically connected to the source line 105 j and the gate line 106 i .

第1B圖顯示配置於第i列及第j行之像素107ij之電 路圖。像素107ij包括:電晶體111,其閘極端子電連接於第i列閘極線106i,且其第一端子電連接於第j行源極線105j;電容器112,具有諸端子,其一者電連接於電晶體111之第二端子,且其他端子電連接於供應共用電位(Vcom)之配線(亦稱為共用電位線);電泳元件113,具有諸端子,其一者電連接於電晶體111之第二端子,且電容器112之端子之一及其他端子電連接於共用電位線。須知,於本實施例中,可給與接地電位OV等作為共用電位(Vcom)。 Fig. 1B shows a circuit diagram of the pixels 107 ij arranged in the i-th column and the j-th row. The pixel 107 ij includes: a transistor 111 having a gate terminal electrically connected to the ith column gate line 106 i and a first terminal electrically connected to the jth row source line 105 j ; and a capacitor 112 having terminals One is electrically connected to the second terminal of the transistor 111, and the other terminals are electrically connected to the wiring (also referred to as a common potential line) for supplying the common potential (V com ); the electrophoretic element 113 has terminals, one of which is electrically connected The second terminal of the transistor 111, and one of the terminals of the capacitor 112 and other terminals are electrically connected to the common potential line. It should be noted that in the present embodiment, the ground potential OV or the like can be given as the common potential (V com ).

第1C圖顯示電泳元件113之具體構造例。第1C圖所示電泳元件113包含電極121、電極122以及包含充電粒子且設在電極121與電極122間之層123。在此,須知,電極121對應第1B圖中電泳元件113之端子之一,電極122對應第1B圖中電泳元件113之其他端子。又,電極121及電極122之至少一者使用光傳輸材料形成。在此,僅電極122使用光傳輸材料形成。又,包含充電粒子之層123具有複數個微囊126,充以負電之複數個白粒子124及充以正電之複數個黑粒子125密封於該等微囊126之每一者中。須知,微囊126充填液體,俾充以負電之白粒子124及充以正電之黑粒子125可藉包含充電粒子之層123中所產生之電場,於微囊126中移動。而且,於電泳元件113中,絕緣層可設在包含充電粒子之層123與電極121或電極122間。 Fig. 1C shows a specific configuration example of the electrophoretic element 113. The electrophoretic element 113 shown in Fig. 1C includes an electrode 121, an electrode 122, and a layer 123 including charged particles and disposed between the electrode 121 and the electrode 122. Here, it is to be noted that the electrode 121 corresponds to one of the terminals of the electrophoretic element 113 in Fig. 1B, and the electrode 122 corresponds to the other terminal of the electrophoretic element 113 in Fig. 1B. Further, at least one of the electrode 121 and the electrode 122 is formed using a light transmitting material. Here, only the electrode 122 is formed using a light transmitting material. Further, the layer 123 containing the charged particles has a plurality of microcapsules 126, and a plurality of negatively charged white particles 124 and a plurality of positively charged black particles 125 are sealed in each of the microcapsules 126. It should be noted that the microcapsules 126 are filled with liquid, and the negatively charged white particles 124 and the positively charged black particles 125 can be moved in the microcapsules 126 by the electric field generated in the layer 123 containing the charged particles. Further, in the electrophoretic element 113, an insulating layer may be provided between the layer 123 containing the charged particles and the electrode 121 or the electrode 122.

於本實施例之顯示裝置100中,可藉由控制施加於電 泳元件113之電壓(包含充電粒子之層123之電場),將白色粒子124聚集至諸電極之一,並將黑色粒子125聚集至其他電極。亦即,可將從光傳輸材料製電極122觀察到之電泳元件113之顏色(在此,亦稱為電泳元件113之顯示)控制為白與黑間之顏色。因此,影像可顯示於包含複數個像素之像素部中,各像素具有電泳元件113。具體而言,於本實施例之顯示裝置100中,將高於電泳元件113之其他端子(電極122)者的電位施加於電泳元件113之端子之一(電極121),使電泳元件113之顯示為黑。將低於電泳元件113之其他端子者的電位施加於電泳元件113之端子之一,使電泳元件113之顯示為白。 In the display device 100 of the embodiment, it can be applied to electricity by control. The voltage of the swimming element 113 (including the electric field of the layer 123 of charged particles) concentrates the white particles 124 to one of the electrodes and concentrates the black particles 125 to the other electrodes. That is, the color of the electrophoretic element 113 (herein also referred to as the display of the electrophoretic element 113) observed from the electrode 122 of the optical transmission material can be controlled to be a color between white and black. Therefore, the image can be displayed in a pixel portion including a plurality of pixels, each of which has an electrophoretic element 113. Specifically, in the display device 100 of the present embodiment, a potential higher than the other terminals (electrodes 122) of the electrophoretic element 113 is applied to one of the terminals (electrode 121) of the electrophoretic element 113, so that the display of the electrophoretic element 113 is performed. It is black. A potential lower than the other terminals of the electrophoretic element 113 is applied to one of the terminals of the electrophoretic element 113, so that the display of the electrophoretic element 113 is white.

而且,電泳元件113於本實施例之顯示裝置100中之顯示不限於白及黑(無須二值化),且可顯示多重灰階顯示。例如,可顯示白與黑間之至少一中間顏色(灰色)。亦即,可藉由以諸如施加電壓及時間值之函數控制在電泳元件113中移動之白色粒子124及黑色粒子125的量,進行多重灰階顯示。須知,控制函數之重要性在於,可在顯示裝置中進行多重灰階顯示,抑制顯示裝置之顯示影像之歷時變化。 Moreover, the display of the electrophoretic element 113 in the display device 100 of the present embodiment is not limited to white and black (no need for binarization), and multiple gray scale displays can be displayed. For example, at least one intermediate color (gray) between white and black can be displayed. That is, multiple gray scale display can be performed by controlling the amount of white particles 124 and black particles 125 moving in the electrophoretic element 113 as a function of applied voltage and time value. It should be noted that the importance of the control function is that multiple gray scale displays can be performed in the display device to suppress temporal changes in the display image of the display device.

[顯示裝置之操作例] [Example of operation of display device]

以下將說明本實施例之顯示裝置100於顯示影像中之操作。在此,為方便,將顯示裝置之最純白色界定為灰階位準1(白),將顯示裝置之最深黑色界定為灰階位準8(黑),並將白與黑間之中間色界定為灰階位準2至7。The operation of the display device 100 of the present embodiment in displaying an image will be described below. Here, for convenience, the purest white of the display device is defined as gray level 1 (white), the darkest black of the display device is defined as gray level 8 (black), and the intermediate color between white and black is defined. The gray level is 2 to 7.

本實施例之顯示裝置100中所含電泳元件113之其他端子電連接於共用電位線。因此,電泳元件113之顯示可藉供至電泳元件113之端子之一的電位控制。又,電泳元件113之端子之一的電位藉自源極驅動器102經由電晶體111輸入之電線控制。在此,須知,源極驅動器102可將源極線105j之電位設定為高於共用電位(Vcom)之電位(VH)、共用電位(Vcom)之相同電位或低於共用電位(Vcom)之電位(VL)。The other terminals of the electrophoretic element 113 included in the display device 100 of the present embodiment are electrically connected to a common potential line. Therefore, the display of the electrophoretic element 113 can be controlled by the potential supplied to one of the terminals of the electrophoretic element 113. Further, the potential of one of the terminals of the electrophoretic element 113 is controlled by the electric wire input from the source driver 102 via the transistor 111. Here, it should be noted that the source driver 102 can set the potential of the source line 105 j to be higher than the potential of the common potential (V com ) (V H ), the same potential of the common potential (V com ), or lower than the common potential ( Potential of V com ) (V L ).

亦即,源極驅動器102將電位(VH)供至電泳元件113之端子之一(電極121),俾於包含充電粒子之層123中產生自電極121至電極122之方向之電場。因此,電泳元件113所顯示之灰階位準可為灰階位準8(黑)或接近灰階位準8(黑)之灰階位準。類似地,電位(VL)被供至電泳元件113之端子之一(電極121),俾於包含充電粒子之層123中產生自電極122至電極121之方向之電場。因此,電泳元件113所顯示之灰階位準可為灰階位準1(白)或接近灰階位準1(白)之灰階位準。須知,電泳元件113所顯示之灰階位準可藉電場強度及電場產生之時間長度控制。That is, the source driver 102 supplies the potential (V H ) to one of the terminals (electrode 121) of the electrophoretic element 113, and generates an electric field in the direction from the electrode 121 to the electrode 122 in the layer 123 containing the charged particles. Therefore, the gray level level displayed by the electrophoretic element 113 can be gray level level 8 (black) or gray level level close to gray level level 8 (black). Similarly, the potential (V L ) is supplied to one of the terminals (electrode 121) of the electrophoretic element 113, and the electric field generated in the direction from the electrode 122 to the electrode 121 in the layer 123 containing the charged particles. Therefore, the gray level level displayed by the electrophoretic element 113 can be gray level level 1 (white) or gray level level close to the gray level level 1 (white). It should be noted that the gray level level displayed by the electrophoretic element 113 can be controlled by the electric field strength and the length of time generated by the electric field.

在此,為方便,說明如下:在對像素部101所作信號掃描之時間界定為t情況下,當期間t內電位(VH)被供至電泳元件113之端子之一時,灰階位準增加1,且當期間t內電位(VL)被供至電泳元件113之端子之一時,灰階位準減少1。Here, for convenience, the following is explained: in the case where the timing of the signal scanning performed on the pixel portion 101 is defined as t, when the potential (V H ) in the period t is supplied to one of the terminals of the electrophoretic element 113, the gray level is increased. 1, and when the potential (V L ) in the period t is supplied to one of the terminals of the electrophoretic element 113, the gray scale level is decreased by one.

又,將共用電位(Vcom)之相同電位供至電泳元件113之端子之一(電極121),俾於包含充電粒子之層中不產生電場。因此,可保持在供應相同電位前電泳元件113顯示之灰階位準。Further, the same potential of the common potential (V com ) is supplied to one of the terminals (electrode 121) of the electrophoretic element 113, and no electric field is generated in the layer containing the charged particles. Therefore, the gray scale level displayed by the electrophoretic element 113 before the supply of the same potential can be maintained.

其次,將參考第2及3圖,說明本實施例之顯示裝置100之各期間。Next, each period of the display device 100 of the present embodiment will be described with reference to FIGS. 2 and 3.

其次,參考第2圖及第3圖說明本實施例之顯示裝置100之每一期間。Next, each period of the display device 100 of the present embodiment will be described with reference to FIGS. 2 and 3.

本實施例之顯示裝置100之使用包含用以改寫影像之切換期間及用以顯示影像之顯示期間。須知,於顯示裝置100中,切換期間內,對像素部101進行複數次的信號掃描,惟在顯示期間內不對像素部101進行信號掃描。The use of the display device 100 of the present embodiment includes a switching period for rewriting an image and a display period for displaying an image. It is to be noted that, in the display device 100, the pixel portion 101 is scanned for a plurality of times during the switching period, but the pixel portion 101 is not scanned for signals during the display period.

須知,於本實施例之顯示裝置100中,例如,信號掃描對應於從選擇第一列中的閘極線1061及配置於第一列之像素10711至1071m之每一者所含電晶體111導通,俾信號自源極驅動器102輸入至第一列及第一行之10711中所含電泳元件113之端子(電極121)之一時,至選擇第n列中的閘極線106n及配置於第n列之像素107n1至107nm之每一者所含電晶體111導通,俾信號自源極驅動器102輸入至第n列及第m行之107nm中所含電泳元件113之端子(電極121)之一時的操作。此操作可稱為一信號掃描。It should be noted that, in the display device 100 of the present embodiment, for example, the signal scanning corresponds to the electric power contained in each of the gate line 106 1 selected from the first column and the pixels 107 11 to 107 1 m disposed in the first column. The crystal 111 is turned on, and the chirp signal is input from the source driver 102 to one of the terminals (electrodes 121) of the electrophoretic element 113 contained in the first column and the first row 107 11 to the gate line 106 n in the nth column. And the transistor 111 included in each of the pixels 107 n1 to 107 nm disposed in the nth column is turned on, and the chirp signal is input from the source driver 102 to the electrophoretic element 113 contained in 107 nm of the nth column and the mth row. Operation at one of the terminals (electrodes 121). This operation can be referred to as a signal scan.

又,切換期間分成用於像素部101之初始化處理之初始化期間及用以將影像資料輸入至像素部101之寫入期間。而且,初始化期間分成使電泳元件113顯示灰階位準8(黑)之第一初始化期間及使電泳元件113顯示顯示灰階位準1(白)之第二初始化期間。Further, the switching period is divided into an initializing period for the initialization processing of the pixel portion 101 and a writing period for inputting the image data to the pixel portion 101. Further, the initializing period is divided into a first initializing period in which the electrophoretic element 113 displays the gray scale level 8 (black) and a second initializing period in which the electrophoretic element 113 is displayed to display the gray scale level 1 (white).

於本說明書中,顯示灰階位準8(黑)(第一初始化處理)及接著顯示灰階位準1(白)(第二初始化處理)之處理稱為初始化處理。須知,初始化處理使顯示裝置100可減少殘留影像。因此,初始化處理對顯示裝置100之顯示品質之提高很重要。In the present specification, a process of displaying gray scale level 8 (black) (first initialization processing) and then displaying gray scale level 1 (white) (second initialization processing) is referred to as initialization processing. It should be noted that the initialization process enables the display device 100 to reduce residual images. Therefore, the initialization process is important for improving the display quality of the display device 100.

[第一初始化處理][First initialization processing]

於本實施例之顯示裝置100中,可在第一初始化處理期間內控制電泳元件113之端子之一,對其供應電位(VH)。因此,將顯示種種灰階位準之電泳元件113之顯示轉換成灰階位準8(黑)。In the display device 100 of the present embodiment, one of the terminals of the electrophoretic element 113 can be controlled during the first initialization process to supply a potential (V H ) thereto . Therefore, the display of the electrophoretic element 113 showing various gray scale levels is converted into gray scale level 8 (black).

須知,在同樣供應電位(VH)於像素部101所含電泳元件113之端子之一時會發生問題。換言之,於相同期間,在設於像素部101之所有複數個電泳元件113產生特定電場時,會發生問題。It is to be noted that a problem occurs when the potential (V H ) is also supplied to one of the terminals of the electrophoretic element 113 included in the pixel portion 101. In other words, in the same period, when a specific electric field is generated in all of the plurality of electrophoretic elements 113 provided in the pixel portion 101, a problem occurs.

茲說明理由於下。影像業已顯示於像素部101上。亦即,於像素部101中隨意存在有顯示灰階位準1(白)之電泳元件113、顯示灰階位準8(黑)之電泳元件113以及顯示灰階位準2至7之電泳元件113。無須於其間顯示灰階位準1(白)之電泳元件113及顯示灰階位準8(黑)之電泳元件113上同樣進行第一初始化處理。換言之,將多餘電位(VH)供至顯示灰階位準8(黑)之電泳元件113係一種電浪費。在此,比較顯示灰階位準1(白)之電泳元件113與顯示灰階位準8(黑)之電泳元件113。然而,當於顯示不同灰階位準之電泳元件113上均勻地進行第一初始化處理時,亦會發生問題。因此,較佳係考慮電泳元件113在前一顯示期間顯示之灰階位準,於複數個電泳元件113之每一者上個別進行第一初始化處理。具體而言,較佳係如以下控制顯示裝置:將電位(VH)施加於短暫顯示接近灰階位準8(黑)之灰階位準之電泳元件113之端子之一,以及將電位(VH)施加於短暫顯示灰階位準1(白)或接近灰階位準1(白)之灰階位準之電泳元件113之端子之一。I will explain the reasons below. The image has been displayed on the pixel portion 101. That is, the electrophoretic element 113 displaying the gray level 1 (white), the electrophoretic element 113 displaying the gray level 8 (black), and the electrophoretic element displaying the gray level 2 to 7 are arbitrarily present in the pixel portion 101. 113. The first initialization process is also performed on the electrophoretic element 113 in which the gray scale level 1 (white) is displayed and the electrophoretic element 113 which displays the gray level level 8 (black). In other words, supplying the excess potential (V H ) to the electrophoretic element 113 displaying the gray level 8 (black) is an electrical waste. Here, the electrophoretic element 113 showing the gray level 1 (white) and the electrophoretic element 113 displaying the gray level 8 (black) are compared. However, a problem also occurs when the first initialization process is performed uniformly on the electrophoretic element 113 displaying different gray scale levels. Therefore, it is preferable to consider the gray scale level displayed by the electrophoretic element 113 during the previous display period, and perform the first initialization processing individually on each of the plurality of electrophoretic elements 113. Specifically, it is preferable to control the display device such that the potential (V H ) is applied to one of the terminals of the electrophoretic element 113 that briefly displays the gray level level close to the gray level level 8 (black), and the potential ( V H ) is applied to one of the terminals of the electrophoretic element 113 which briefly displays the gray level level 1 (white) or the gray level level close to the gray level level 1 (white).

第2圖顯示電泳元件113於初始化處理期間內的信號掃描。於本實施例之顯示裝置100中,電泳元件113之每一者之電位藉由時間灰階方法,在第一初始化處理期間內控制。須知,時間灰階方法係藉由控制電壓施加於電泳元件113之每一者之時間予以控制:係於第一初始化處理期之進一步分割所形成之每一期間內控制施加於電泳元件113之每一者之電壓的方法。Figure 2 shows the signal scanning of the electrophoresis element 113 during the initialization process. In the display device 100 of the present embodiment, the potential of each of the electrophoretic elements 113 is controlled by the time gray scale method during the first initialization processing period. It should be noted that the time gray scale method is controlled by controlling the time during which the voltage is applied to each of the electrophoretic elements 113: each of the periods applied to the electrophoretic element 113 during each period formed by the further division of the first initialization processing period The method of voltage of one.

又,於本實施例中,除了第一初始化期間之分割外,如第2圖所示,進行每一期間之加權(期間之時間變化)。第2圖顯示第一初始化期間分割成第一期間(T1)、第二期間(T2)及第三期間(T3),並進行加權,以滿足例如T1:T2:T3=1:2:4。須知,於本實施例中,t代表本實施例之顯示裝置100之一次信號掃描所需時間。如於第2圖中所示,適當電壓之施加時間可藉由各信號之保持期間(自信號輸入至電泳元件113之端子之一時到次一信號輸入時的期間)之加權,以8個方式(包括電壓施加時間為0之情形),經過三次信號掃描,予以控制。Further, in the present embodiment, in addition to the division in the first initializing period, as shown in Fig. 2, the weighting of each period (time change of the period) is performed. Fig. 2 shows that the first initialization period is divided into a first period (T1), a second period (T2), and a third period (T3), and weighting is performed to satisfy, for example, T1:T2:T3=1:2:4. It should be noted that in the present embodiment, t represents the time required for one signal scanning of the display device 100 of the present embodiment. As shown in Fig. 2, the application time of the appropriate voltage can be weighted by the holding period of each signal (the period from when the signal is input to one of the terminals of the electrophoretic element 113 to the time when the next signal is input) in eight ways. (Including the case where the voltage application time is 0), it is controlled after three signal scans.

如所說明,可將電壓施加於電泳元件113之每一者,其透過進行加權,控制於第一初始化期間內施加至電泳元件113之電壓,藉此,進行多重灰階顯示達適當時間。此外,減少信號掃描次數,俾可減少電力消耗。尤佳者係如第2圖所示,進行信號保持期間之加權。亦即,較佳者係,當信號掃描進行x(x為2或更大之自然數)次時,實施加權,使保持期間如t,2t,4t,...2x-1t變化。此乃因為,藉由如此進行加權,可藉信號掃描之最小數目控制最小單元為t之電壓施加時間。As illustrated, a voltage can be applied to each of the electrophoretic elements 113, which is weighted to control the voltage applied to the electrophoretic element 113 during the first initialization period, thereby performing multiple gray scale display for an appropriate time. In addition, reducing the number of signal scans reduces power consumption. The better one is as shown in Fig. 2, and the weighting of the signal holding period is performed. That is, preferably, when the signal scanning is performed x (x is a natural number of 2 or more), weighting is performed to change the holding period as t, 2t, 4t, ... 2 x - 1 t. This is because, by weighting in this way, the voltage application time of the minimum unit t can be controlled by the minimum number of signal scans.

[第二初始化處理][Second initialization processing]

控制本實施例之顯示裝置100,俾在第二初始化處理期間內,將電位(VL)供至電泳元件113之端子之一。因此,將進行灰階位準8(黑)顯示之所顯示之灰階位準轉換成灰階位準1(白)。Examples of the display control apparatus 100 according to the present embodiment, to serve during the second initialization process, the electric potential (V L) supplied to the electrophoretic element 113 of one of the terminals. Therefore, the gray scale level displayed by the gray scale level 8 (black) display is converted into gray scale level 1 (white).

須知,在第二初始化處理期間內,可將相同電位供至像素部101中複數個電泳元件113。亦即,由於在第一初始化處理期間內,因此,像素部101中所含所有複數個電泳元件113之灰階位準被轉換成灰階位準8(黑)。It is to be noted that the same potential can be supplied to the plurality of electrophoretic elements 113 in the pixel portion 101 during the second initialization processing. That is, since the gray scale level of all of the plurality of electrophoretic elements 113 included in the pixel portion 101 is converted to the gray scale level 8 (black) during the first initialization processing period.

第2圖顯示於初始化期間內電泳元件113之信號掃描。於本實施例之顯示裝置100中,在期間的開始時僅進行一次如第二初始化處理之信號掃描。將電位(VL)供至像素部101中電泳元件113之端子之一,俾電泳元件113之每一者所顯示之灰階位準歷時從灰階位準8(黑)轉換成灰階位準1(白)。須知,由於灰階位準8(黑)轉換成灰階位準1(白),因此,第二初始化處理期間之長度須至少為7t或更長。Figure 2 shows the signal scan of the electrophoretic element 113 during the initialization period. In the display device 100 of the present embodiment, the signal scanning such as the second initialization processing is performed only once at the beginning of the period. The potential (V L ) is supplied to one of the terminals of the electrophoretic element 113 in the pixel portion 101, and the gray level level duration displayed by each of the electrophoretic elements 113 is converted from the gray level level 8 (black) to the gray level position. Standard 1 (white). It should be noted that since the gray level level 8 (black) is converted to the gray level level 1 (white), the length of the second initialization processing period must be at least 7 t or longer.

又,當第二初始化處理期間之長度如第2圖所示為8t且期間如圖示為第4期間(T4)時,可進行整個初始化處理期間之加權以滿足T1:T2:T3:T4=1:2:4:8。Further, when the length of the second initialization processing period is 8t as shown in FIG. 2 and the period is as shown in the fourth period (T4), the weighting of the entire initialization processing period can be performed to satisfy T1: T2: T3: T4 = 1:2:4:8.

如上述,發生於顯示影像之殘留影像可藉由初始化處理減少。此外,於以上初始化處理中,可藉由信號保持期間之加權減少信號掃描次數。As described above, the residual image occurring in the display image can be reduced by the initialization process. Further, in the above initialization processing, the number of signal scans can be reduced by the weighting of the signal holding period.

須知,於顯示裝置100中,為像素107而設之電容器112之電容須很大,俾顯示期間可更長。因此,為像素107而設之電晶體111之電流供應能力須很大。具體而言,電晶體之尺寸須很大。結果,對電容器112供應電荷之源極驅動器102之負荷及控制電晶體111之開關之閘極驅動器103之負荷增加。因此,形成源極驅動器及閘極驅動器103之諸如電晶體之元件劣化,從而問題重重。與其成對比,可藉由如上述,減少初始化期間內信號掃描次數,抑制諸如電晶體之元件之劣化。It should be noted that in the display device 100, the capacitance of the capacitor 112 provided for the pixel 107 must be large, and the display period can be longer. Therefore, the current supply capability of the transistor 111 provided for the pixel 107 must be large. In particular, the size of the transistor must be large. As a result, the load of the source driver 102 that supplies the electric charge to the capacitor 112 and the load of the gate driver 103 that controls the switch of the transistor 111 increase. Therefore, an element such as a transistor which forms the source driver and the gate driver 103 is deteriorated, so that the problem is heavy. In contrast, deterioration of components such as transistors can be suppressed by reducing the number of signal scans during the initialization period as described above.

[形成影像][formation of images]

於本實施例之顯示裝置100中,在寫入期間內,將電位(VH)、電位(VL)及電位(Vcom)選擇性供至電泳元件113之端子之一,以控制電泳元件113之顯示灰階。在此,為了方便,將電位(VH)供至電泳元件113之端子之一達t(信號掃描所需時間),俾電泳元件113之顯示灰階轉換1位準(例如灰階位準1(白)轉換成灰階2)。因此,藉由寫入期間具有7t之時間灰階方法,電泳元件113之顯示灰階位準可適當地設定為灰階位準1(白)至灰階位準8(黑)。又,控制各像素107中所含電泳元件113之顯示灰階,俾影像可形成於像素部101上。 In the display device 100 of the present embodiment, a potential (V H ), a potential (V L ), and a potential (V com ) are selectively supplied to one of the terminals of the electrophoretic element 113 during the writing period to control the electrophoretic element. 113 shows the gray scale. Here, for convenience, the potential (V H ) is supplied to one of the terminals of the electrophoretic element 113 to t (the time required for signal scanning), and the display gray scale of the electrophoretic element 113 is converted to 1 level (for example, gray scale level 1) (white) converted to grayscale 2). Therefore, by having a gray scale method of 7 t in the writing period, the display gray scale level of the electrophoretic element 113 can be appropriately set to gray scale level 1 (white) to gray scale level 8 (black). Further, the display gray scale of the electrophoretic element 113 included in each of the pixels 107 is controlled, and the 俾 image can be formed on the pixel portion 101.

須知,較佳係在寫入期間內不對信號保持期間加權,雖則可如於初始化期間內進行加權。此乃因為電泳元件113之顯示灰階位準可藉由不僅考慮電壓施加於電泳元件113之時間,亦考慮在寫入期間內電壓施加順序,精確顯示。 It should be noted that it is preferable not to weight the signal holding period during the writing period, although the weighting may be performed as in the initializing period. This is because the gray scale level of the display of the electrophoretic element 113 can be accurately displayed by considering not only the time when the voltage is applied to the electrophoresis element 113 but also the voltage application sequence during the writing period.

又,在寫入期間後的顯示期間內不對像素部101進行信號掃描。亦即,在寫入期間結束時輸入至像素部101之信號決定顯示期間內的狀態。因此,較佳係在寫入期間結束時,共用電位(Vcom)供至像素部101中電泳元件113之端子之一,並控制在顯示期間內不施加至電泳元件113。此乃因為,較佳顯示灰階位準轉換成電壓施加於電泳元件113之狀態,或者電泳元件113可能因長時間施加恆定電壓而劣化。 Moreover, the signal scanning is not performed on the pixel portion 101 in the display period after the writing period. That is, the signal input to the pixel portion 101 at the end of the writing period determines the state during the display period. Therefore, it is preferable that the common potential (V com ) is supplied to one of the terminals of the electrophoretic element 113 in the pixel portion 101 at the end of the writing period, and the control is not applied to the electrophoretic element 113 during the display period. This is because it is preferable to display that the gray scale level is converted into a state in which a voltage is applied to the electrophoretic element 113, or the electrophoretic element 113 may be deteriorated by applying a constant voltage for a long time.

考慮到以上說明,第3圖顯示寫入期間分成第5期間(T5)至第12期間(T12),又此一期間如顯示為t。須知, 其亦解釋,寫入期間包含使用7t期間之灰階控制期間,使用t期間之共用電位(Vcom)輸入期間。 In view of the above description, FIG. 3 shows that the writing period is divided into the fifth period (T5) to the twelfth period (T12), and this period is shown as t. It should be noted that it also explains that the write period includes the use of the common potential (V com ) input period during t during the gray scale control period of 7t period.

[具體例] [Specific example]

參考第4圖及第5圖,說明切換期間中顯示裝置之操作。具體而言,解釋以下情形:將在此以灰階位準5顯示之圓圈及以灰階位準8(黑)顯示之圓圈之影像(第一影像),其上以灰階位準1(白)顯示背景者改變成自左側移至中央之此等圓圈之影像(第二影像),並進一步將第二影像改變成自中央移至右側之此等圓圈之影像(第三影像)。 Referring to Figures 4 and 5, the operation of the display device during the switching period will be described. Specifically, the following case is explained: an image (a first image) of a circle displayed by the gray level level 5 and a circle displayed by a gray level level 8 (black), on which the gray level is 1 ( White) The display background is changed to an image of the circle (second image) moved from the left to the center, and the second image is further changed to an image of the circle (third image) moved from the center to the right side.

須知,第一影像改變成第二影像之切換期間為1,且第二影像改變成第三影像之切換期間為2。又,第一影像中以灰階位準5顯示之圓圈之中心上的像素為像素A,第三影像中以灰階位準5顯示之圓圈之中心上的像素為像素B。 It should be noted that the switching period of the first image changed to the second image is 1, and the switching period of the second image to the third image is 2. Moreover, the pixel on the center of the circle displayed by the gray level level 5 in the first image is the pixel A, and the pixel on the center of the circle displayed by the gray level level 5 in the third image is the pixel B.

此外,可從源極驅動器,將共用電位(Vcom),高於共用電位(Vcom)以及低於共用電位(Vcom)之電位(VL)輸入至各像素所含電泳元件113之端子之一。 Further, from the source driver, a common potential (V com ), a potential higher than the common potential (V com ), and a potential lower than the common potential (V com ) (V L ) can be input to the terminals of the electrophoretic element 113 included in each pixel. one.

首先,參考第4圖,說明切換期間中之信號掃描及輸入至像素A及像素B之信號。 First, referring to Fig. 4, the signal scanning during the switching period and the signals input to the pixels A and B will be described.

當用以從第一影像切換成第二影像之切換信號自控制部輸入至源極驅動器和閘極驅動器時,根據顯示於各像素上之灰階位準,進行第一初始化期間。在此,於第一初始化期間內進行三次信號掃描。信號之第一次掃描與信號之第二次掃描間之間隔(第一信號之保持期間)為t。信號之第二次掃描與信號之第三次掃描間之間隔(第二信號之保持期間)為2t。信號之第三次掃描與第一初始化期間結束間之間隔(第三信號之保持期間)為4t。亦即,第一初始化期間藉由信號之保持期間加權。因此,於像素上進行三次信號掃描,此等像素隨意地設來用於像素部,並以8個灰階位準顯示,俾像素部中所有像素之灰階位準可藉由電壓施加適當時間轉換成灰階位準8(黑)。具體而言,供至顯示灰階位準8(黑)之像素A之第一至第三信號之所有信號係共用電位(Vcom),且供至顯示灰階位準1(白)之像素B之第一至第三信號之所有信號係共用電位(VH),俾像素A及像素B之顯示可為灰階位準8(黑)。When the switching signal for switching from the first image to the second image is input from the control unit to the source driver and the gate driver, the first initialization period is performed in accordance with the gray level level displayed on each pixel. Here, three signal scans are performed during the first initialization period. The interval between the first scan of the signal and the second scan of the signal (the duration of the hold of the first signal) is t. The interval between the second scan of the signal and the third scan of the signal (the period during which the second signal is held) is 2t. The interval between the third scan of the signal and the end of the first initialization period (the period during which the third signal is held) is 4t. That is, the first initialization period is weighted by the hold period of the signal. Therefore, three signal scans are performed on the pixels, and the pixels are arbitrarily set for the pixel portion and displayed in eight gray scale levels, and the gray scale levels of all the pixels in the pixel portion can be applied by voltage for an appropriate time. Convert to gray level level 8 (black). Specifically, all of the signals supplied to the first to third signals of the pixel A displaying the gray level 8 (black) share the potential (V com ) and are supplied to the pixel displaying the gray level 1 (white). All signals of the first to third signals of B share the potential (V H ), and the display of the pixels A and B can be gray level 8 (black).

接著,進行第二初始化處理。在此,於第二初始化處理中進行一次信號掃描。同樣將電位(VL)輸入至各像素。又,第二初始化處理之時間長度設定為7t或更長,以將所有像素之顯示改變成灰階位準1(白)。Next, a second initialization process is performed. Here, a signal scan is performed in the second initialization process. The potential (V L ) is also input to each pixel. Also, the length of time of the second initialization process is set to 7t or longer to change the display of all pixels to grayscale level 1 (white).

其次,形成第二影像。在此,於寫入期間內進行八次信號掃描。將輸入信號個別輸入至所有像素。須知,不進行各信號之保持期間之加權,且信號掃描之間隔同樣為t。第二影像中之像素A及像素B以灰階位準5進行顯示。因此,於寫入期間內,可適當地控制輸入信號,使(輸入電位(VH)之期間)-(輸入電位(VL)之期間)=4t。較佳係適當設定為了顯示待獲得之灰階位準而輸入之特定種類信號,此乃因為信號根據於寫入期間內電泳元件中的充電粒子或所施加電壓之級數來判定。例如,較佳係在輸入多餘電位(VH)作為對像素B之輸入信號之後,輸入電位(VL),此乃因為其可抑制電泳元件中所含具有充電粒子之層之電荷的局部化。又,較佳係於寫入期間內最後信號之掃描中,對所有像素輸入共用電位(Vcom),並在第二影像之顯示期間內不施加電壓於電泳元件。Second, a second image is formed. Here, eight signal scans are performed during the writing period. Input the input signal individually to all pixels. It should be noted that the weighting of the holding period of each signal is not performed, and the interval of signal scanning is also t. The pixels A and B in the second image are displayed in gray level 5 . Therefore, during the writing period, the input signal can be appropriately controlled so that (the period of the input potential (V H )) - (the period of the input potential (V L )) = 4t. Preferably, the specific type of signal input for displaying the gray level level to be obtained is appropriately set because the signal is determined based on the number of charged particles or the applied voltage in the electrophoretic element during the writing period. For example, it is preferable to input the potential (V L ) after inputting the excess potential (V H ) as the input signal to the pixel B, because it can suppress the localization of the charge of the layer containing the charged particles in the electrophoretic element. . Further, it is preferable that a common potential (V com ) is input to all the pixels in the scanning of the last signal in the writing period, and no voltage is applied to the electrophoretic element during the display period of the second image.

以此方式,完成自第一影像至第二影像之切換。在此,於第二影像之顯示期間內,將信號輸入像素A及像素B。又,像素A及像素B所含電泳元件之端子之一的電位保持為與共用電位(Vcom)相同之電位,且施加電壓於電泳元件(於包含充電粒子之層中不產生電場)。因此,可保持第二影像之顯示。須知,可保持第二影像,直到供切換至後續第三影像之切換信號從控制部輸入至源極驅動器和汲極驅動器為止。In this way, switching from the first image to the second image is completed. Here, a signal is input to the pixel A and the pixel B during the display period of the second image. Further, the potential of one of the terminals of the electrophoretic element included in the pixel A and the pixel B is maintained at the same potential as the common potential (V com ), and a voltage is applied to the electrophoretic element (the electric field is not generated in the layer containing the charged particles). Therefore, the display of the second image can be maintained. It is to be noted that the second image can be held until the switching signal for switching to the subsequent third image is input from the control unit to the source driver and the gate driver.

接著,參考第5圖說明切換期間2中信號之掃描及輸入至像素A及像素B之信號。Next, the scanning of the signal and the signals input to the pixels A and B in the switching period 2 will be described with reference to FIG.

當用以從第二影像切換成第三影像之切換信號自控制部輸入至源極驅動器和閘極驅動器時,根據顯示於各像素上之灰階位準,進行第一初始化期間。在此,於第一初始化期間內進行三次信號掃描。信號之第一次掃描與信號之第二次掃描間之間隔(第一信號之保持期間)為t。信號之第二次掃描與信號之第三次掃描間之間隔(第二信號之保持期間)為2t。信號之第三次掃描與第一初始化期間結束間之間隔(第三信號之保持期間)為4t。亦即,第一初始化期間藉由信號之保持期間加權。因此,於像素上進行三次信號掃描,此等像素隨意地設來用於像素部,並以8個灰階位準顯示,俾像素部中所有像素之灰階位準可藉由電壓施加適當時間轉換成灰階位準8(黑)。具體而言,將作為第一及第三信號之電位(VH)及作為第三信號之供至顯示灰階位準5之像素A及像素B作為第三信號之共用電位(Vcom)供至顯示灰階位準5之像素A及像素B,使像素A及像素B之顯示可為灰階位準8(黑)。When the switching signal for switching from the second image to the third image is input from the control unit to the source driver and the gate driver, the first initialization period is performed in accordance with the gray scale level displayed on each pixel. Here, three signal scans are performed during the first initialization period. The interval between the first scan of the signal and the second scan of the signal (the duration of the hold of the first signal) is t. The interval between the second scan of the signal and the third scan of the signal (the period during which the second signal is held) is 2t. The interval between the third scan of the signal and the end of the first initialization period (the period during which the third signal is held) is 4t. That is, the first initialization period is weighted by the hold period of the signal. Therefore, three signal scans are performed on the pixels, and the pixels are arbitrarily set for the pixel portion and displayed in eight gray scale levels, and the gray scale levels of all the pixels in the pixel portion can be applied by voltage for an appropriate time. Convert to gray level level 8 (black). Specifically, the potentials (V H ) as the first and third signals and the pixel A and the pixel B supplied to the gray scale level 5 as the third signal are used as the common potential (V com ) of the third signal. To display the pixel A and the pixel B of the gray level level 5, the display of the pixel A and the pixel B can be gray level 8 (black).

接著,進行第二初始化處理。在此,於第二初始化處理中進行一次信號掃描。同樣將電位(VL)輸入至各像素。又,第二初始化處理之時間長度設定為7t或更長,以將所有像素之顯示改變成灰階位準1(白)。Next, a second initialization process is performed. Here, a signal scan is performed in the second initialization process. The potential (V L ) is also input to each pixel. Also, the length of time of the second initialization process is set to 7t or longer to change the display of all pixels to grayscale level 1 (white).

其次,形成第三影像。在此,於寫入期間進行8次信號掃描。輸入信號被個別輸入所有像素。須知,不進行各信號之保持期間之加權,且信號掃描之時間間隔同樣為t。第3影像中之像素A進行灰階位準1(白)之顯示。因此,於寫入期間內,可適當地控制輸入信號,使(輸入電位(VH)之期間)-(輸入電位(VL)之期間)=0。須知,在此說明例如輸入至像素A之所有8個信號係共用電位(Vcom)之情形。第3影像中之像素B進行灰階位準8(黑)之顯示。因此,於寫入期間內,可適當地控制輸入信號,使(輸入電位(VH)之期間)-(輸入電位(VL)之期間)=7t。須知,在此由於在此寫入期間為8t,因此,無法自由顯示灰階位準8(黑)。然而,由於可適當選擇用以顯示灰階位準8(黑),因此,較佳係寫入期間更長。又,較佳係於寫入期間之最後信號掃描中,共用電位(Vcom)被輸入至所有像素,在第三影像之顯示期間內,電壓不輸入至電泳元件。Second, a third image is formed. Here, 8 signal scans are performed during the writing period. The input signal is individually input to all pixels. It should be noted that the weighting of the holding period of each signal is not performed, and the time interval of the signal scanning is also t. The pixel A in the third image is displayed in gray level 1 (white). Therefore, during the writing period, the input signal can be appropriately controlled so that (the period of the input potential (V H )) - (the period of the input potential (V L )) = 0. It should be noted that, for example, the case where all eight signal systems input to the pixel A share the potential (V com ) will be described. The pixel B in the third image is displayed in gray level 8 (black). Therefore, during the writing period, the input signal can be appropriately controlled so that (the period of the input potential (V H )) - (the period of the input potential (V L )) = 7t. It should be noted that since the writing period is 8t here, the gray level level 8 (black) cannot be freely displayed. However, since it is appropriately selected to display the gray scale level 8 (black), it is preferable that the writing period is longer. Further, it is preferable that the common potential (V com ) is input to all the pixels during the last signal scanning in the writing period, and the voltage is not input to the electrophoresis element during the display period of the third image.

以此方式,完成自第二影像至第三影像之切換。In this way, switching from the second image to the third image is completed.

[修改例][Modification]

以上顯示裝置係實施例之一例子。該實施例包含具有以上未說明特點之顯示裝置。The above display device is an example of an embodiment. This embodiment includes a display device having the features not described above.

以上雖說明例如,可顯示8灰階位準(灰階位準1(白)至灰階位準8(黑))之具有電泳元件之顯示裝置,惟亦可使用能顯示更高灰階或更低灰階之顯示裝置。又,使用充以負電之白粒子及充以正電之黑粒子作為電泳元件中所含充電粒子之例子,惟亦可接受,白粒子充以正電及黑粒子充以負電,或此二顏色(白與黑)以外的顏色粒子。而且,亦可使用一種充電粒子及染色粒子密封於微囊內,藉由帶電粒子之運動顯示之灰階。Although the above description shows, for example, a display device having an electrophoretic element of 8 gray scale levels (gray level 1 (white) to gray level 8 (black)) can be used, but can also display higher gray scale or Lower grayscale display device. Further, the use of negatively charged white particles and positively charged black particles as an example of charged particles contained in the electrophoretic element is acceptable, and the white particles are positively charged and the black particles are negatively charged, or the two colors are Particles other than (white and black). Moreover, a charged particle and a dyed particle may be sealed in the microcapsule, and the gray scale is displayed by the movement of the charged particle.

而且,於以上裝置中,為方便而簡化電壓施加時間與電泳元件所顯示灰階位準之關係,惟關係亦可依顯示裝置而複雜化。換言之,假設電壓施加時間與電泳元件所顯示灰階位準間為線性關係,惟關係可為非線性關係。於此情況下,可適當判定信號保持期間之加權,且不判定保持期間為2之倍數。Further, in the above device, the relationship between the voltage application time and the gray level level displayed by the electrophoretic element is simplified for convenience, but the relationship may be complicated by the display device. In other words, it is assumed that the voltage application time is linear with the gray level level displayed by the electrophoretic element, but the relationship may be a nonlinear relationship. In this case, the weighting of the signal holding period can be appropriately determined, and the holding period is not determined to be a multiple of 2.

又,於以上顯示裝置中,假設在顯示期間內,未轉換而保持電泳元件之灰階位準。然而,當影像之保持期間變長時,顯示影像可能歷時劣化。例如,甚至當電壓未施加於顯示灰階位準8(黑)之電泳元件之一對電極間時,充以正電之黑色粒子及充以負電之白色粒子不同時設在顯示灰階位準8(黑)之電泳元件之中所含微囊內。因此,在影像寫入期間內,電場不產生於微囊中,且顯示灰階位準從輸入之灰階位準轉換。於此情況下,在第一初始化期間內,電位(VH)可輸入至電泳元件,為進行灰階位準8(黑)之顯示,在前一寫入期間內,將信號輸入至該電泳元件。Further, in the above display device, it is assumed that the gray scale level of the electrophoretic element is maintained without being converted during the display period. However, when the image retention period becomes long, the display image may deteriorate over time. For example, even when a voltage is not applied between the pair of electrodes of the electrophoretic element showing the gray level 8 (black), the positively charged black particles and the negatively charged white particles are not set at the display gray level. 8 (black) in the microcapsules contained in the electrophoresis element. Therefore, during the image writing period, the electric field is not generated in the microcapsule, and the gray scale level is displayed to be converted from the gray level of the input. In this case, during the first initialization period, the potential (V H ) can be input to the electrophoresis element for the display of the gray scale level 8 (black), and the signal is input to the electrophoresis during the previous writing period. element.

此外,於以上顯示裝置中,進行加權,使得在第一初始化期間內,信號保持期間依續較長。惟,可進行加權,使得在第一初始化期間內,信號保持期間依續較短,或進行加權,使信號保持期間隨意改變。Further, in the above display device, weighting is performed such that the signal holding period continues to be longer during the first initializing period. However, weighting may be performed such that during the first initialization period, the signal holding period is continued to be shorter, or weighting is performed, so that the signal holding period is arbitrarily changed.

又,於以上顯示裝置中,在第二初始化期間內,僅進行一次信號掃描。惟,當第二初始化期間變長或顯示裝置之像素部具有高解析度時,電泳元件之灰階位準可能無法轉換成灰階位準1(白)。例如,於完成電泳元件之灰階位準之顯示前,在第二初始化期間開始時輸入之第一信號可能會經由電晶體洩漏。而且,當電容器之尺寸因高解析度而很小時,此種洩漏變得嚴重。於此情況下,在第二初始化期間內,電位(VL)可輸入至電泳元件複數次。須知,在第二初始化期間內進行複數次信號掃描情況下,可如第一初始化期間進行保持期間之加權,或者信號之各保持期間之長度可相同。又,可以接受輸入複數次之信號之至少一信號係共用電位(Vcom)。Further, in the above display device, only one signal scanning is performed in the second initializing period. However, when the second initialization period becomes longer or the pixel portion of the display device has a high resolution, the gray scale level of the electrophoretic element may not be converted to gray scale level 1 (white). For example, the first signal input at the beginning of the second initialization period may leak through the transistor before the display of the gray level of the electrophoretic element is completed. Moreover, when the size of the capacitor is small due to high resolution, such leakage becomes severe. In which case, during the second initialization potential (V L) may be input to the electrophoretic element multiple times. It should be noted that in the case of performing a plurality of signal scans in the second initializing period, the weighting of the holding period may be performed as in the first initializing period, or the length of each holding period of the signal may be the same. Further, at least one of the signals input to the plurality of signals may be subjected to a common potential (V com ).

此外,於本實施例中,使用電泳元件作為灰階儲存顯示元件之例子。然而,本實施例中所說明之驅動方法不限於包含電泳元件之顯示裝置。換言之,本實施例中所說明之驅動方法可用於包含一元件(灰階儲存顯示元件)之顯示裝置,該元件可控制顯示灰階位準,並可在無電壓施加下,保持顯示灰階位準。例如,本實施例之驅動方法可用於透過施加電壓,控制著以黑色及白色之扭轉球之位向,藉此,進行顯示之顯示裝置,及藉由使用Electronic Liquid Powder(註冊商標)等進行顯示之顯示裝置。Further, in the present embodiment, an electrophoretic element is used as an example of a gray scale storage display element. However, the driving method explained in the embodiment is not limited to the display device including the electrophoretic element. In other words, the driving method described in this embodiment can be applied to a display device including an element (gray scale storage display element) that can control the display of gray scale levels and can maintain the display gray scale position without voltage application. quasi. For example, the driving method of the present embodiment can be used to display a display device that performs display by using a voltage and a black and white twisting ball, and display by using Electronic Liquid Powder (registered trademark) or the like. Display device.

須知,本實施例中所說明內容之全部或一部分可與其他實施例之任一者中所說明內容之全部或一部分併合。It is to be understood that all or a part of the contents described in the embodiments may be combined with all or a part of the contents described in any of the other embodiments.

(實施例2)(Example 2)

於本實施例中將說明實施例1中顯示裝置之一例子。具體而言,將參考第6A及6B圖,說明像素部中像素之構造。須知,於本實施例中例如使用電泳元件作為灰階儲存顯示元件。An example of the display device in the first embodiment will be described in the present embodiment. Specifically, the configuration of the pixels in the pixel portion will be described with reference to FIGS. 6A and 6B. It should be noted that in the present embodiment, for example, an electrophoretic element is used as a gray scale storage display element.

(實施例2)(Example 2)

第6A圖係本實施例之像素之俯視圖,且第6B圖係沿第6A圖之A-B線所取之剖視圖。第6A圖及第6B圖中之顯示裝置包含基板600、設於基板600上方之薄膜電晶體601和電容器602、設於薄膜電晶體601和電容器602上方之電泳元件603以及設於電泳元件603上方之基板604。須知,於第6A圖中省略電泳元件603。Fig. 6A is a plan view of the pixel of the present embodiment, and Fig. 6B is a cross-sectional view taken along line A-B of Fig. 6A. The display device in FIGS. 6A and 6B includes a substrate 600, a thin film transistor 601 and a capacitor 602 disposed above the substrate 600, an electrophoretic element 603 disposed above the thin film transistor 601 and the capacitor 602, and disposed above the electrophoretic element 603. Substrate 604. It is to be noted that the electrophoretic element 603 is omitted in Fig. 6A.

薄膜電晶體601包含電連接於閘極線630之導電層610、設於導電層610上方之絕緣層611、設於絕緣層611上方之半導體層612、設於半導體層612上方及源極線631之導電層610用來作為薄膜電晶體601之閘極端子,導電層613、以及導電層614。須知,導電層610用來作為薄膜電晶體601之閘極端子,導電層613用來作為薄膜電晶體601之第一端子,以及導電層614用來作為薄膜電晶體601之第二端子。此外,可表達成導電層610係閘極線630之一部分,導電層613係源極線631之一部分。The thin film transistor 601 includes a conductive layer 610 electrically connected to the gate line 630, an insulating layer 611 disposed over the conductive layer 610, a semiconductor layer 612 disposed over the insulating layer 611, over the semiconductor layer 612, and a source line 631. The conductive layer 610 is used as a gate terminal of the thin film transistor 601, a conductive layer 613, and a conductive layer 614. It should be noted that the conductive layer 610 is used as the gate terminal of the thin film transistor 601, the conductive layer 613 is used as the first terminal of the thin film transistor 601, and the conductive layer 614 is used as the second terminal of the thin film transistor 601. Further, it can be expressed as a portion of the conductive layer 610 that is a gate line 630, and the conductive layer 613 is a portion of the source line 631.

電容器602包含導電層614、絕緣層611以及電連接於共用電位線632之導電層615。須知,導電層614用來作為電容器602之端子之一,絕緣層611用來作為電介質,且導電層615用來作為電容器602之其他端子。又可表達成導電層615係共用電位線632之一部分。The capacitor 602 includes a conductive layer 614, an insulating layer 611, and a conductive layer 615 electrically connected to the common potential line 632. It should be noted that the conductive layer 614 is used as one of the terminals of the capacitor 602, the insulating layer 611 is used as a dielectric, and the conductive layer 615 is used as the other terminal of the capacitor 602. It can also be expressed that the conductive layer 615 is part of the common potential line 632.

電泳元件603包含:像素電極616,電連接於設在絕緣層620之開口部之導電層614;反電極617,對其施加與導電層615相同的電位;以及層618,其包含充電粒子,且設在像素電極616與反電極617之間。須知,像素電極616用來作為電泳元件603之端子之一,反電極617用來作為電泳元件603之其他端子。The electrophoretic element 603 includes: a pixel electrode 616 electrically connected to the conductive layer 614 provided at the opening of the insulating layer 620; a counter electrode 617 to which the same potential as the conductive layer 615 is applied; and a layer 618 containing charged particles, and It is provided between the pixel electrode 616 and the counter electrode 617. It should be noted that the pixel electrode 616 is used as one of the terminals of the electrophoretic element 603, and the counter electrode 617 is used as the other terminal of the electrophoretic element 603.

如於實施例1中所說明,本實施例之顯示裝置可藉由控制施加於包含充電粒子之層618之電壓,對擴散於包含充電粒子之層618之充電粒子之運動加以控制。此外,於本實施例之顯示裝置中,反電極617及基板604具有光傳輸性質。亦即,本實施例之顯示裝置係反射顯示裝置,其中顯示表面在基板604側上。As illustrated in Embodiment 1, the display device of the present embodiment can control the movement of the charged particles diffused on the layer 618 containing the charged particles by controlling the voltage applied to the layer 618 containing the charged particles. Further, in the display device of the present embodiment, the counter electrode 617 and the substrate 604 have optical transmission properties. That is, the display device of this embodiment is a reflective display device in which the display surface is on the side of the substrate 604.

以下提供適用於本實施例之顯示裝置之各組件之材料。Materials for the respective components of the display device of the present embodiment are provided below.

以半導體基板(例如單晶基板及矽基板)、SOI基板、玻璃基板、石英基板、在表面上設有絕緣層之導電基板、或諸如塑膠基板之撓性基板、附着膜、包含纖維材料之紙及基材膜作為基板600。可舉鋇硼矽酸鹽玻璃基板、鋁硼矽酸鹽玻璃基板、碱石灰玻璃基板等為玻璃基板之例子。可例如使用諸如聚对苯二甲酸乙酯(PET)、聚萘二甲酸乙二醇酯(PEN)、聚苯碸(PES)或丙烯酸於撓性基板。a semiconductor substrate (for example, a single crystal substrate and a germanium substrate), an SOI substrate, a glass substrate, a quartz substrate, a conductive substrate provided with an insulating layer on the surface, or a flexible substrate such as a plastic substrate, an adhesive film, a paper containing a fibrous material And a substrate film as the substrate 600. Examples of the glass substrate include a borosilicate glass substrate, an aluminoborosilicate glass substrate, and a soda lime glass substrate. For example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyphenyl hydrazine (PES) or acrylic acid can be used for the flexible substrate.

可使用選自鋁(Al)、銅(Cu)、鈦(Ti)、鉭(Ta)、鎢(W)、鉬(Mo)、鉻(Cr)、鈮(Nd)及鈧(Sc)、含此等元素之任一者的合金、或此等元素之任一者的氮化物,作為導電層610、導電層615。亦可使用此等材料之堆疊構造。It can be selected from aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), niobium (Nd) and antimony (Sc), including An alloy of any of these elements, or a nitride of any of these elements, serves as the conductive layer 610 and the conductive layer 615. Stacked constructions of these materials can also be used.

可使用諸如氧化矽、氮化矽、氮氧化矽、氮化氧化矽、氧化鋁或氧化鉭之絕緣體,作為閘極絕緣體611。亦可使用此等材料之堆疊構造。須知,氮化矽係指含比氮還多的氧,並在總原子百分比為100原子百分比下,分別以自55原子百分比至65原子百分比、自1原子百分比至20原子百分比、自25原子百分比至35原子百分比及自0.1原子百分比至10原子百分比之既定濃度範圍含氧、氮、矽及氫之物質。又,氮化氧化矽膜係指含比氧還多的氮,並在總原子百分比為100原子百分比下,分別以自15原子百分比至30原子百分比、自20原子百分比至35原子百分比、自25原子百分比至35原子百分比及自15原子百分比至25原子百分比之既定濃度範圍含氧、氮、矽及氫之膜。As the gate insulator 611, an insulator such as hafnium oxide, tantalum nitride, hafnium oxynitride, tantalum nitride oxide, aluminum oxide or tantalum oxide can be used. Stacked constructions of these materials can also be used. It should be noted that tantalum nitride refers to more oxygen than nitrogen, and is from 55 atomic percent to 65 atomic percent, from 1 atomic percent to 20 atomic percent, and from 25 atomic percent, respectively, at a total atomic percentage of 100 atomic percent. A substance containing oxygen, nitrogen, helium, and hydrogen in a predetermined concentration range of 35 atomic percent and from 0.1 atomic percent to 10 atomic percent. Further, the tantalum nitride film refers to nitrogen containing more than oxygen, and at a total atomic percentage of 100 atomic percent, respectively, from 15 atomic percent to 30 atomic percent, from 20 atomic percent to 35 atomic percent, from 25 A film containing oxygen, nitrogen, helium and hydrogen in a predetermined concentration range from atomic percentage to 35 atomic percent and from 15 atomic percent to 25 atomic percent.

可使用主成份元素屬於周期表之族14,諸如矽(Si)及鍺(Ge),化合物諸如矽鍺(SiGe)及鎵砷(GaAs),氧化物諸如氧化鋅(ZnO)及包含銦(In)及鎵(Ga)之氧化鋅之材料,或諸如具有半導體特徵之有機化合物之半導體材料,作為半導體層612。又,亦可使用以此等半導體材料形成之堆疊層。It is possible to use a group 14 whose main component belongs to the periodic table, such as germanium (Si) and germanium (Ge), compounds such as germanium (SiGe) and gallium arsenide (GaAs), oxides such as zinc oxide (ZnO), and indium (In) And a material of zinc oxide of gallium (Ga), or a semiconductor material such as an organic compound having semiconductor characteristics, as the semiconductor layer 612. Further, a stacked layer formed of such a semiconductor material may also be used.

可使用選自鋁(Al)、銅(Cu)、鈦(Ti)、鉭(Ta)、鎢(W)、鉬(Mo)、鉻(Cr)、鈮(Nd)及鈧(Sc)、含此等元素之任一者的合金、或此等元素之任一者的氮化物,作為導電層613及源極線631。亦可使用此等材料之堆疊構造。It can be selected from aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), niobium (Nd) and antimony (Sc), including An alloy of any of these elements, or a nitride of any of these elements, serves as the conductive layer 613 and the source line 631. Stacked constructions of these materials can also be used.

可使用氧化矽層、氮化矽層、氮氧化矽層或氮化氧化矽層、諸如氧化鋁、氧化鉭等之絕緣體,作為閘極絕緣層620。替代地,亦可應用諸如聚醯胺、聚乙烯酚、苯環丁烯、丙烯酸或環氧樹脂之有機材料;諸如硅氧烷樹脂之硅氧烷材料;噁唑等。硅氧烷包含由矽(Si)及氧(O)之鍵形成之化學結構。可使用有機基(例如烴基或芳香烴)或氟基。有機基可包含氟基。As the gate insulating layer 620, a ruthenium oxide layer, a tantalum nitride layer, a hafnium oxynitride layer or a tantalum nitride oxide layer, an insulator such as aluminum oxide or tantalum oxide may be used. Alternatively, an organic material such as polyamide, polyvinylphenol, benzocyclobutene, acrylic or epoxy resin; a silicone material such as a silicone resin; oxazole or the like can also be applied. The siloxane contains a chemical structure formed by the bond of cerium (Si) and oxygen (O). An organic group such as a hydrocarbon group or an aromatic hydrocarbon or a fluorine group can be used. The organic group may contain a fluorine group.

可使用選自鋁(Al)、銅(Cu)、鈦(Ti)、鉭(Ta)、鎢(W)、鉬(Mo)、鉻(Cr)、鈮(Nd)及鈧(Sc)、含此等元素之任一者的合金、或此等元素之任一者的氮化物,作為像素電極616。亦可使用此等材料之堆疊構造。又,可使用諸如含氧化鎢之氧化銦、含氧化鎢之氧化銦鋅、含氧化鈦之氧化銦、含氧化鈦之氧化銦錫、氧化銦錫、氧化銦鋅、添加氧化矽之氧化銦錫等。It can be selected from aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), niobium (Nd) and antimony (Sc), including An alloy of any of these elements, or a nitride of any of these elements, serves as the pixel electrode 616. Stacked constructions of these materials can also be used. Further, for example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, and indium tin oxide added with antimony oxide can be used. Wait.

氧化鈦可用於充以正電之粒子,碳黑可用於充以負電之粒子,作為包含充電粒子之層618中所含充電粒子。須知,可使用選自導電材料、絕緣材料、半導體材料、磁性材料、液晶材料、鐵電材料、電致變色材料或電泳材料之單一材料,或此等材料之任一者的複合材料。Titanium oxide can be used to charge positively charged particles, and carbon black can be used to charge negatively charged particles as charged particles contained in layer 618 containing charged particles. It is to be noted that a single material selected from a conductive material, an insulating material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electrochromic material, or an electrophoretic material, or a composite material of any of these materials may be used.

可使用具有光傳輸性質之導電材料,諸如含氧化鎢之氧化銦、含氧化鎢之氧化銦鋅、含氧化鈦之氧化銦、含氧化鈦之氧化銦錫、銦錫氧化物、銦鋅氧化物或添加例如氧化矽之銦錫氧化物。Conductive materials having optical transmission properties such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide Or add indium tin oxide such as yttrium oxide.

基板604可使用玻璃基板所代表之光傳輸基板,諸如鋇硼矽酸鹽玻璃基板、鋁硼矽酸鹽玻璃基板、碱石灰玻璃基板或使用聚对苯二甲酸乙酯(PET)等形成。The substrate 604 can be formed using a light-transmitting substrate represented by a glass substrate, such as a bismuth borate glass substrate, an aluminoborosilicate glass substrate, a soda-lime glass substrate, or using polyethylene terephthalate (PET) or the like.

須知,本實施例中所說明內容之全部或一部分可與其他實施例之任一者中所說明內容之全部或一部分併合。It is to be understood that all or a part of the contents described in the embodiments may be combined with all or a part of the contents described in any of the other embodiments.

(實施例3)(Example 3)

於本實施例中將參考第7A至7D圖說明異於實施例2中顯示裝置所含電晶體之薄膜電晶體例子。第7A至7D圖顯示可適用於實施例2中之薄膜電晶體的薄膜電晶體例子。An example of a thin film transistor different from the transistor contained in the display device of Embodiment 2 will be described with reference to Figs. 7A to 7D in this embodiment. 7A to 7D show an example of a thin film transistor which can be applied to the thin film transistor of Example 2.

於第7A至7D圖中,薄膜電晶體700設在基板701上方。此外,絕緣層702及絕緣層707設在薄膜電晶體700上方。In FIGS. 7A to 7D, the thin film transistor 700 is disposed above the substrate 701. Further, an insulating layer 702 and an insulating layer 707 are disposed over the thin film transistor 700.

第7A圖中之薄膜電晶體700具有低電阻半導體層706a及706b設在作為第一端子及第二端子之導電層703a及703b和半導體層704間之構造。藉低電阻半導體層706a及706b,導電層703a及703b與半導體層704歐姆接觸。須知,低電阻半導體層706a及706b係電阻較半導體層704低之半導體層。The thin film transistor 700 in Fig. 7A has a structure in which the low-resistance semiconductor layers 706a and 706b are provided between the conductive layers 703a and 703b as the first and second terminals and the semiconductor layer 704. The conductive layers 703a and 703b are in ohmic contact with the semiconductor layer 704 by the low resistance semiconductor layers 706a and 706b. It should be noted that the low-resistance semiconductor layers 706a and 706b are semiconductor layers having a lower resistance than the semiconductor layer 704.

第7B圖中之薄膜電晶體700係底部閘極薄膜電晶體,其具有半導體層704設在導電層703a及703b上方之構造。The thin film transistor 700 in Fig. 7B is a bottom gate thin film transistor having a structure in which a semiconductor layer 704 is provided over the conductive layers 703a and 703b.

第7C圖中之薄膜電晶體700係底部閘極薄膜電晶體,其具有半導體層704設在導電層703a及703b上方之構造。又係低電阻半導體層706a及706b設在作為第一端子及第二端子之導電層703a及703b和半導體層704間之構造。The thin film transistor 700 in Fig. 7C is a bottom gate thin film transistor having a structure in which a semiconductor layer 704 is provided over the conductive layers 703a and 703b. Further, the low-resistance semiconductor layers 706a and 706b are provided between the conductive layers 703a and 703b as the first and second terminals and the semiconductor layer 704.

第7D圖中之薄膜電晶體700係頂部閘極薄膜電晶體。於基板701上方設置包含作為源極區及汲極區之低電阻半導體層706a及706b之半導體層704。絕緣層708設在半導體層704上方。用來作為閘極端子之導電層705設在絕緣層708上方。而且,設置作為第一端子及第二端子而與分別低電阻半導體層706a及706b接觸之導電層703a及703b。The thin film transistor 700 in Fig. 7D is a top gate thin film transistor. A semiconductor layer 704 including low-resistance semiconductor layers 706a and 706b as a source region and a drain region is provided over the substrate 701. An insulating layer 708 is disposed over the semiconductor layer 704. A conductive layer 705 for use as a gate terminal is disposed over the insulating layer 708. Further, conductive layers 703a and 703b which are in contact with the respective low-resistance semiconductor layers 706a and 706b as the first terminal and the second terminal are provided.

於本實施例中說明具有單一閘極構造之薄膜電晶體。然而,薄膜電晶體可具有雙閘極構造等。於此情況下,可於半導體層上方及下方設置閘極電極層,或者複數個閘極電極層可僅設在半導體層之一側(上方或下方)。A thin film transistor having a single gate structure is described in this embodiment. However, the thin film transistor may have a double gate structure or the like. In this case, a gate electrode layer may be provided above and below the semiconductor layer, or a plurality of gate electrode layers may be provided only on one side (upper or lower side) of the semiconductor layer.

又,用於薄膜電晶體之半導體層之材料並未特別限制。將說明可用於薄膜電晶體之半導體層之材料例子。Further, the material for the semiconductor layer of the thin film transistor is not particularly limited. An example of a material that can be used for a semiconductor layer of a thin film transistor will be described.

半導體元件所含半導體層可使用以下材料形成:使用以硅烷或鍺烷代表之半導體材料氣體,藉由濺射方法或氣相成長方法製造之非晶半導體;藉由使用光能或熱能將非晶半導體結晶所形成之多晶半導體;單晶半導體(亦稱為半非晶或微晶)等。半導體層可藉由濺射方法、LPCVD方法、CVD方法等形成。The semiconductor layer included in the semiconductor element can be formed using a semiconductor material gas represented by silane or decane, an amorphous semiconductor fabricated by a sputtering method or a vapor phase growth method, and amorphous by using light energy or thermal energy. A polycrystalline semiconductor formed by semiconductor crystallization; a single crystal semiconductor (also referred to as semi-amorphous or microcrystalline). The semiconductor layer can be formed by a sputtering method, an LPCVD method, a CVD method, or the like.

在考慮到吉斯自由能下,微晶半導體屬於非晶與單晶間之中間的亞穩狀態。亦即,微晶半導體膜係就自由能而言具有穩定的第三狀態,並具有短程序及晶格扭曲效應。柱狀或針狀晶體在與基板表面正交之方向中成長。屬於微晶半導體之典型例子之微晶矽雷曼光譜位在低於520cm-1之波數,該波數代表單晶矽之雷曼光譜之峰值。亦即,微晶矽雷曼光譜之峰值存在於代表單晶矽之520cm-1與代表非晶矽之480cm-1之間。此外,為終結懸浮鍵,微晶矽含有至少1原子百分比或更多的氫或鹵素。而且,微晶矽包含諸如氦、氬、氪或氖以進一步促進晶格扭曲效應,俾增加穩定性,並可獲得有利的微晶半導體。Considering the Giss free energy, the microcrystalline semiconductor belongs to the metastable state between the amorphous and the single crystal. That is, the microcrystalline semiconductor film has a stable third state in terms of free energy, and has a short program and a lattice distortion effect. The columnar or needle crystal grows in a direction orthogonal to the surface of the substrate. A typical example of a microcrystalline semiconductor has a microcrystalline germany Rayman spectrum at a wave number below 520 cm -1 , which represents the peak of the Lehman spectrum of a single crystal germanium. That is, the peak of the microcrystalline Raman spectrum exists between 520 cm -1 representing a single crystal germanium and 480 cm -1 representing an amorphous germanium. Further, in order to terminate the levitation bond, the microcrystalline cerium contains at least 1 atomic percent or more of hydrogen or halogen. Moreover, the microcrystalline germanium contains, for example, helium, argon, neon or krypton to further promote the lattice distortion effect, increase the stability, and obtain a favorable microcrystalline semiconductor.

微晶半導體膜可藉由高頻電漿CVD方法,以數十至數百仟赫,或藉微波電漿CVD設備,以1GHz或更高頻率形成。微晶半導體膜通常可使用具有氫的諸如SiH4、Si2H6、SiH2Cl2、SiHCl3、SiCl3、SiCl4或SiF4氫化矽稀釋液形成。微晶半導體膜可藉除了氫化矽及氫外,具有一或複數種氦、氬、氪及氖之稀有氣體元素之稀釋液形成。於此情況下,氫對氫化物之流速比設定為5:1至200:1,較佳為50:1至150:1,尤佳為100:1。The microcrystalline semiconductor film can be formed by a high frequency plasma CVD method at a frequency of tens to hundreds of kHz or by a microwave plasma CVD apparatus at a frequency of 1 GHz or higher. The microcrystalline semiconductor film can be generally formed using a dilute solution of hydrogen hydride such as SiH 4 , Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiCl 3 , SiCl 4 or SiF 4 . The microcrystalline semiconductor film can be formed by a diluent of one or more rare gas elements of cerium, argon, krypton and neon, in addition to hydrogen hydride and hydrogen. In this case, the flow ratio of hydrogen to hydride is set to 5:1 to 200:1, preferably 50:1 to 150:1, and more preferably 100:1.

非晶半導體之典型例子係氫化非晶矽,而晶態半導體之典型例子係聚矽等。聚矽(聚晶矽)之例子包含:所謂的高溫聚矽,其包含作為主要成份的聚矽,並在大於或等於800℃的處理溫度下形成;所謂的低溫聚矽,其包含作為主要成份的聚矽,並在大於或等於600℃的處理溫度下形成;藉由使用促進結晶之元素等結晶化非晶矽而獲得之聚矽等。無庸贅言,亦可如上述使用微晶半導體或局部包含晶相之半導體。A typical example of an amorphous semiconductor is hydrogenated amorphous germanium, and a typical example of a crystalline semiconductor is polyfluorene or the like. Examples of polyfluorene (polycrystalline germanium) include: a so-called high-temperature polyfluorene which contains polyfluorene as a main component and is formed at a treatment temperature of 800 ° C or higher; so-called low-temperature polyfluorene, which contains as a main component The polyfluorene is formed at a treatment temperature of 600 ° C or higher; a polyfluorene obtained by crystallizing an amorphous crucible such as an element which promotes crystallization, or the like. Needless to say, a microcrystalline semiconductor or a semiconductor partially containing a crystal phase may also be used as described above.

替代地,不但諸如矽(Si)或鍺(Ge)之簡單基板,且諸如砷化鉀GaAs、磷化銦InP、碳化矽SiC、硒化鋅ZnSe、氮化鉀GaN或鍺化矽SiGe可用來作為半導體層之材料。Alternatively, not only simple substrates such as germanium (Si) or germanium (Ge), but also such as potassium arsenide GaAs, indium phosphide InP, tantalum carbide SiC, zinc selenide ZnSe, potassium nitride GaN or germanium telluride SiGe can be used. As a material of the semiconductor layer.

在使用晶態半導體於半導體層情況下,可藉由多種方法(例如雷射結晶方法、熱結晶方法或使用促進結晶之如鎳之元素之熱結晶方法)製造晶態半導體膜。又,當屬於SAS之微晶半導體藉由雷射輻射結晶時,可增進結晶。在不導入促進結晶之元素情況下,藉由在以雷射輻射非晶矽層前,於氮氛圍中,以500℃將非晶矽層加熱1小時,釋放氫,直到非晶矽膜中所含氫濃度變成1×1020原子/cm3為止。此乃因為富含氫之非晶矽膜可藉由雷射輻射破壞。In the case of using a crystalline semiconductor in a semiconductor layer, a crystalline semiconductor film can be produced by various methods such as a laser crystallization method, a thermal crystallization method, or a thermal crystallization method using an element such as nickel which promotes crystallization. Further, when the microcrystalline semiconductor belonging to the SAS is crystallized by laser irradiation, crystallization can be enhanced. The amorphous germanium layer is heated at 500 ° C for 1 hour in a nitrogen atmosphere before introduction of the element which promotes crystallization, and the hydrogen is released until it is in the amorphous germanium film. The hydrogen concentration is changed to 1 × 10 20 atoms/cm 3 . This is because the hydrogen-rich amorphous germanium film can be destroyed by laser radiation.

對添加金屬元素於非晶半導體膜之方法並無特別限制,只要金屬元素可存在於非晶半導體膜之表面或內部即可。例如,可使用濺射方法、CVD方法、電漿處理方法(例如電漿CVD方法)、吸收方法或塗覆金屬鹽溶液之方法。其中,使用溶液之方法簡單,且有利之處在於,可容易控制金屬元素之濃度。又,此時,較佳地,藉由於氧氛圍中的UV光輻射、熱氧化、以包含氫氧游離基之臭氧水或雙氧水進行之處理等,沉積氧化物膜,以改進非晶半導體膜表面之水溼性,並塗佈含水溶液於非晶半導體膜的整個表面上。The method of adding the metal element to the amorphous semiconductor film is not particularly limited as long as the metal element may exist on the surface or inside of the amorphous semiconductor film. For example, a sputtering method, a CVD method, a plasma processing method (for example, a plasma CVD method), an absorption method, or a method of coating a metal salt solution may be used. Among them, the method of using the solution is simple, and it is advantageous in that the concentration of the metal element can be easily controlled. Further, at this time, preferably, an oxide film is deposited to improve the surface of the amorphous semiconductor film by UV light irradiation in an oxygen atmosphere, thermal oxidation, treatment with ozone water containing hydrogen radicals or hydrogen peroxide, or the like. The water is wet and coated with an aqueous solution on the entire surface of the amorphous semiconductor film.

而且,於非晶半導體膜結晶以形成晶態半導體膜的結晶步驟中,可添加促進結晶之元素(亦稱為觸媒元素)於非晶半導體膜,並可藉由熱處理(於500℃至750℃下3分鐘或24小時),進行結晶。可使用鐵(Fe)、鎳(Ni)、鈷(Co)、銣(Ru)、銠(Rh)、鈀(Pd)、鋨(Os)、銥(Ir)、鉑(Pt)、銅(Cu)及金(Au)等作為促進(加速)結晶之元素。Further, in the crystallization step of crystallizing the amorphous semiconductor film to form the crystalline semiconductor film, an element (also referred to as a catalyst element) which promotes crystallization may be added to the amorphous semiconductor film, and may be heat-treated (at 500 ° C to 750 Crystallization was carried out at 3 ° or 24 hours at °C. Iron (Fe), nickel (Ni), cobalt (Co), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), copper (Cu) ) and gold (Au), etc. as elements that promote (accelerate) crystallization.

為從晶態半導體膜移除或減少促進結晶之元素,含雜質元素之半導體膜與晶態半導體膜接觸,以用來作為去疵域。可使用賦與n型導電性之雜質元素、賦與p型導電性之雜質元素、稀有氣體元素等作為雜質元素。例如,可使用從磷(P)、氮(N)、砷(As)、銻(Sb)、鉍(Bi)、硼(B)、氦(He)、氖(Ne)、氬(Ar)、氪(Kr)及氙(Xe)選擇之一或更多元素。形成含稀有氣體元素之半導體膜,使其與促進結晶之元素之晶態半導體膜,接著,進行熱處理(自550℃至750℃達3分鐘至24小時)。晶態半導體膜中所含促進結晶之元素移入含稀有氣體元素之半導體膜,從而,移除或減少晶態半導體膜中所含促進結晶之元素。此後,移除用來作為去疵域之含稀有氣體元素之半導體膜。In order to remove or reduce an element which promotes crystallization from the crystalline semiconductor film, the semiconductor film containing the impurity element is brought into contact with the crystalline semiconductor film to serve as a deuterium region. As the impurity element, an impurity element imparting n-type conductivity, an impurity element imparting p-type conductivity, a rare gas element or the like can be used. For example, phosphorus (P), nitrogen (N), arsenic (As), antimony (Sb), antimony (Bi), boron (B), antimony (He), neon (Ne), argon (Ar),氪 (Kr) and 氙 (Xe) select one or more elements. A semiconductor film containing a rare gas element is formed to be in a crystalline semiconductor film with an element which promotes crystallization, followed by heat treatment (from 550 ° C to 750 ° C for 3 minutes to 24 hours). The element for promoting crystallization contained in the crystalline semiconductor film is transferred into the semiconductor film containing the rare gas element, thereby removing or reducing the element which promotes crystallization contained in the crystalline semiconductor film. Thereafter, the semiconductor film containing the rare gas element used as the deuterium region is removed.

可藉由熱處理及雷射光輻射之應用,或若干次之熱處理或雷射光輻射,將非晶半導體結晶。The amorphous semiconductor can be crystallized by heat treatment and application of laser light radiation, or several times of heat treatment or laser light irradiation.

晶態半導體膜亦可直接藉由電漿方法,形成於基板上方。替代地,晶態半導體膜亦可選擇性藉由電漿方法,直接形成於基板上方。The crystalline semiconductor film can also be formed directly on the substrate by a plasma method. Alternatively, the crystalline semiconductor film may be selectively formed directly on the substrate by a plasma method.

又,可使用氧化物半導體作為半導體層之材料。例如,可使用氧化鋅(ZnO)、氧化錫(SnO2)等。於使用氧化鋅(ZnO)於半導體層情況下,可使用Y2O3,Al2O3,TiO2之堆疊層等於閘極絕緣層,可使用ITO,Au,Ti等於閘極電極層、源極電極層和汲極電極層。此外,可施加銦In、鎵Ga等添加於氧化鋅(ZnO)。Further, an oxide semiconductor can be used as the material of the semiconductor layer. For example, zinc oxide (ZnO), tin oxide (SnO 2 ), or the like can be used. In the case of using zinc oxide (ZnO) in the semiconductor layer, a stacked layer of Y 2 O 3 , Al 2 O 3 , and TiO 2 may be used, which is equal to the gate insulating layer, and ITO, Au, and Ti may be used to be equal to the gate electrode layer and source. a pole electrode layer and a drain electrode layer. Further, indium In, gallium Ga or the like may be applied to zinc oxide (ZnO).

可使用以InMO3(ZnO)m(m>0)表示之薄膜。在此,M代表選自鎵Ga、鋁Al、錳Mn及鈷Co之一或更多金屬元素。例如,M可為鎵Ga、鎵Ga和鋁Al、鎵Ga和錳Mn、鎵Ga和鈷Co等。於具有以InMO3(ZnO)m(m大於0)表示之組成化學式間,含作為M之鎵Ga之氧化物半導體膜稱為銦In-Ga-Zn-O(銦-鎵-鋅-氧)系氧化物半導體,In-Ga-Zn-O系氧化物半導體亦稱為In-Ga-Zn-O系非單晶膜。A film expressed by InMO 3 (ZnO) m (m>0) can be used. Here, M represents one or more metal elements selected from the group consisting of gallium Ga, aluminum Al, manganese Mn, and cobalt Co. For example, M may be gallium Ga, gallium Ga, and aluminum Al, gallium Ga, and manganese Mn, gallium Ga, cobalt Co, and the like. An oxide semiconductor film containing gallium Ga as M is called indium In-Ga-Zn-O (indium-gallium-zinc-oxygen) between the compositional formulas represented by InMO 3 (ZnO) m (m is greater than 0). An oxide semiconductor, an In-Ga-Zn-O-based oxide semiconductor is also called an In-Ga-Zn-O-based non-single-crystal film.

異於以上所提供,作為塗怖於氧化物半導體層之氧化物半導體有諸如In-Sn-Ga-Zn-O(銦-錫-鎵-鋅-氧)膜之四金屬成份之氧化物、諸如In-Ga-Zn-O(銦-鎵-鋅-氧)膜、In-Sn-Zn-O(銦-Sn-鋅-氧)膜、In-Al-Zn-O(銦-鋁-鋅-氧)膜、Sn-Ga-Zn-O(錫-鎵-鋅-氧)膜及Al-Ga-Zn-O(鋁-鎵-鋅-氧)膜之三金屬成份之氧化物、及Sn-Al-Zn-O(錫-鋁-鋅-氧)系膜、或諸如In-Ga-O(銦-鎵-氧)膜、In-Zn-O(銦-鋅-氧)膜、Sn-Zn-O(錫-鋅-氧)膜、Al-Zn-O(鋁-鋅-氧)膜、Zn-Mg-O(鋅-鎂-氧)膜、Zn-Mg-O(鋅-鎂-氧)膜、Sn-Mg-O(錫-鎂-氧)膜、In-Mg-O(銦-鎂-氧)膜、In-O(銦-氧)膜、Sn-O(錫-氧)膜及Zn-O(鋅-氧)膜之二金屬成份之氧化物。又可於氧化物半導體膜中包含SiO2An oxide semiconductor coated as an oxide semiconductor layer is an oxide of a tetrametal component such as an In-Sn-Ga-Zn-O (indium-tin-gallium-zinc-oxygen) film, such as the one provided above. In-Ga-Zn-O (indium-gallium-zinc-oxygen) film, In-Sn-Zn-O (indium-Sn-zinc-oxygen) film, In-Al-Zn-O (indium-aluminum-zinc- Oxygen) film, Sn-Ga-Zn-O (tin-gallium-zinc-oxygen) film and oxide of three metal components of Al-Ga-Zn-O (aluminum-gallium-zinc-oxygen) film, and Sn- Al-Zn-O (tin-aluminum-zinc-oxygen) film, or such as In-Ga-O (indium-gallium-oxygen) film, In-Zn-O (indium-zinc-oxygen) film, Sn-Zn -O (tin-zinc-oxygen) film, Al-Zn-O (aluminum-zinc-oxygen) film, Zn-Mg-O (zinc-magnesium-oxygen) film, Zn-Mg-O (zinc-magnesium-oxygen) Film, Sn-Mg-O (tin-magnesium-oxygen) film, In-Mg-O (indium-magnesium-oxygen) film, In-O (indium-oxygen) film, Sn-O (tin-oxygen) film And an oxide of the two metal components of the Zn-O (zinc-oxygen) film. Further, SiO 2 may be contained in the oxide semiconductor film.

使用此等氧化物半導體作為半導體層之薄膜電晶體具有高場效移動率。因此,薄膜電晶體不僅可用來作為像素部中的電晶體,亦可用來作為形成閘極驅動器或源極驅動器之電晶體。亦即,像素部及閘極驅動器或源極驅動器可形成於相同基板上方。結果,較佳地,顯示裝置之製造成本可減低。A thin film transistor using such an oxide semiconductor as a semiconductor layer has a high field effect mobility. Therefore, the thin film transistor can be used not only as a transistor in the pixel portion but also as a transistor for forming a gate driver or a source driver. That is, the pixel portion and the gate driver or the source driver may be formed over the same substrate. As a result, preferably, the manufacturing cost of the display device can be reduced.

須知,本實施例中所說明內容之全部或一部分可與其他實施例之任一者中所說明內容之全部或一部分併合。It is to be understood that all or a part of the contents described in the embodiments may be combined with all or a part of the contents described in any of the other embodiments.

(實施例4)(Example 4)

於本實施例中將以第8A至8D圖所顯示之具體例子說明以上實施例中所說明顯示裝置之應用例。In the present embodiment, an application example of the display device described in the above embodiment will be described with reference to specific examples shown in Figs. 8A to 8D.

第8A圖顯示可攜式資訊終端機,其包含殼體3001、像素部3002、操作鈕3003等。以上實施例所說明之顯示裝置可適用於包含像素部3002之顯示裝置。FIG. 8A shows a portable information terminal including a housing 3001, a pixel portion 3002, an operation button 3003, and the like. The display device described in the above embodiments can be applied to a display device including the pixel portion 3002.

第8B圖顯示電子書閱讀機之例子,在以上實施例中其包含顯示裝置。第一殼體3101具有第一像素部3102。第二殼體3104具有第二像素部3105。第一殼體3101以及第二殼體3104與支撐部3106組合,使電子書閱讀機可藉支撐部3106啟閉。藉此一構造,可達到像紙製書般的操作。Fig. 8B shows an example of an e-book reader, which in the above embodiment includes a display device. The first housing 3101 has a first pixel portion 3102. The second housing 3104 has a second pixel portion 3105. The first housing 3101 and the second housing 3104 are combined with the support portion 3106 so that the e-book reader can be opened and closed by the support portion 3106. With this configuration, a paper-like operation can be achieved.

第8C圖顯示用於諸如火車之車輛之廣告的顯示裝置3200。於廣告媒介物係印刷紙情況下,廣告由人力更換,惟藉由使用以灰階儲存顯示元件顯示之顯示裝置來進行,廣告顯示可在短時間內無需大量人力下進行。而且,可獲得穩定的影像而無顯示缺點。Figure 8C shows a display device 3200 for an advertisement for a vehicle such as a train. In the case of an advertising medium printing paper, the advertisement is replaced by a human hand, but by using a display device that displays the display element in a gray scale, the advertisement display can be performed in a short time without a large amount of manpower. Moreover, a stable image can be obtained without display defects.

第8D圖顯示用於戶外廣告的顯示裝置3300。使用撓性基板形成之顯示裝置受到歡迎,且可增進廣告效果。一般而言,廣告由人力更換,惟藉由使用以灰階儲存顯示元件顯示之顯示裝置來進行,廣告顯示可在短時間內進行。而且,可獲得穩定的影像而無顯示缺點。Figure 8D shows a display device 3300 for outdoor advertising. A display device formed using a flexible substrate is popular and can enhance the advertising effect. In general, the advertisement is replaced by a human hand, but by using a display device that displays the display element in a gray scale, the advertisement display can be performed in a short time. Moreover, a stable image can be obtained without display defects.

須知,本實施例中所說明內容之全部或一部分可與其他實施例之任一者中所說明內容之全部或一部分併合。It is to be understood that all or a part of the contents described in the embodiments may be combined with all or a part of the contents described in any of the other embodiments.

本申請案根據2009年9月16日對日本特許廳提出之日本專利申請案2009-214961號,在此藉由參考併提其全文。The present application is based on Japanese Patent Application No. 2009-214961, filed on Sep.

100...顯示裝置100. . . Display device

101...像素元件101. . . Pixel component

102...源極驅動器102. . . Source driver

103...閘極驅動器103. . . Gate driver

104...控制部104. . . Control department

1051 to 105m...源極線105 1 to 105 m . . . Source line

1061 to 106n...閘極線106 1 to 106 n . . . Gate line

10711 to 107nm...像素107 11 to 107 nm . . . Pixel

111...電晶體111. . . Transistor

112...電容器112. . . Capacitor

113...電泳元件113. . . Electrophoresis element

121...電極121. . . electrode

122...電極122. . . electrode

123...層123. . . Floor

124...白粒子124. . . White particle

125...黑粒子125. . . Black particle

126...微囊126. . . Microcapsule

600...基板600. . . Substrate

601...薄膜電晶體601. . . Thin film transistor

602...電容器602. . . Capacitor

603...電泳元件603. . . Electrophoresis element

604...基板604. . . Substrate

610...導電層610. . . Conductive layer

611...絕緣層611. . . Insulation

612...半導體層612. . . Semiconductor layer

613,614,615...導電層613,614,615. . . Conductive layer

616...像素電極616. . . Pixel electrode

617...反電極617. . . Counter electrode

618...層618. . . Floor

620...絕緣層620. . . Insulation

630...閘極線630. . . Gate line

631...源極線631. . . Source line

632...共用電位線632. . . Shared potential line

700...薄膜電晶體700. . . Thin film transistor

701...基板701. . . Substrate

702,707,708...絕緣層702,707,708. . . Insulation

703a,703b,705...導電層703a, 703b, 705. . . Conductive layer

704...半導體層704. . . Semiconductor layer

706a,706b...低電阻半導體層706a, 706b. . . Low resistance semiconductor layer

707,708...絕緣層707,708. . . Insulation

3001...殼體3001. . . case

3002...像素部3002. . . Pixel section

3003...操作鈕3003. . . Operation button

3101...第一殼體3101. . . First housing

3102...第一像素部3102. . . First pixel

3104...第二殼體3104. . . Second housing

3105...第二像素部3105. . . Second pixel portion

3106...支撐部3106. . . Support

3200,3300...顯示裝置3200, 3300. . . Display device

於附圖中:In the drawing:

第1A圖圖示顯示裝置之一例子,第1B圖顯示像素之一例子,第1C圖顯示灰階儲存顯示元件之一例子。Fig. 1A illustrates an example of a display device, and Fig. 1B shows an example of a pixel, and Fig. 1C shows an example of a grayscale storage display element.

第2圖顯示於初始化期間掃描信號之一例子。Figure 2 shows an example of a scan signal during initialization.

第3圖顯示於寫入期間掃描信號之一例子。Figure 3 shows an example of a scan signal during writing.

第4圖顯示於切換期間輸入像素之信號之一具體例子。Figure 4 shows a specific example of a signal input to a pixel during switching.

第5圖顯示於切換期間輸入像素之信號之一具體例子。Figure 5 shows a specific example of a signal input to a pixel during switching.

第6A圖圖示顯示裝置之像素之俯視圖之一例子,且第6B圖係顯示裝置之像素之剖視圖之一例子6A is a diagram showing an example of a top view of a pixel of a display device, and FIG. 6B is an example of a cross-sectional view of a pixel of the display device.

第7A至7D圖各顯示薄膜電晶體之一例子。Figures 7A through 7D each show an example of a thin film transistor.

第8A至8D圖各圖示顯示裝置之一應用例。8A to 8D are diagrams each showing an application example of the display device.

Claims (35)

一種顯示裝置的驅動方法,該顯示裝置包括複數個像素,其每一者包含灰階儲存顯示元件,該驅動方法包括以下步驟:根據在第一初始化期間之前的先前灰階位準,藉由於該第一初始化期間對該等灰階儲存顯示元件之第一端子掃描及輸入信號複數次之步驟,顯示第一灰階顯示位準,其中各信號的保持期間的長度係加權的,且其中共用電位被輸入至該等灰階儲存顯示元件之第二端子;藉由在該第一初始化期間後的第二初始化期間對該等第一端子掃描及輸入信號至少一次之步驟,顯示第二灰階顯示位準;以及藉由在該第二初始化期間後的寫入期間對該等第一端子掃描及輸入信號複數次之步驟,顯示該第一灰階顯示位準、該第二灰階顯示位準或在該第一灰階顯示位準及該第二灰階顯示位準之間的第三灰階顯示位準。 A driving method of a display device, the display device comprising a plurality of pixels each of which includes a grayscale storage display element, the driving method comprising the steps of: according to a previous grayscale level before the first initialization period, by The step of scanning and inputting the first terminal of the grayscale storage display element in the first initialization period to display the first gray scale display level, wherein the length of the holding period of each signal is weighted, and wherein the potential is shared And being input to the second terminal of the gray scale storage display element; displaying the second gray scale display by the step of scanning and inputting the first terminal to the first terminal at least once during the second initializing period after the first initializing period And displaying the first gray scale display level and the second gray scale display level by the step of scanning and inputting the first terminal to the first terminal during the writing period after the second initializing period Or a third gray scale display level between the first gray scale display level and the second gray scale display level. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,在該第二初始化期間內,執行對該等第一端子進行信號掃描及輸入之步驟一次。 The driving method of the display device according to claim 1, wherein the step of performing signal scanning and inputting to the first terminals is performed once during the second initializing period. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之 至少一信號係第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有異於該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The driving method of the display device of claim 1, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the a common potential, wherein the first terminal is input during the second initializing period The at least one signal is a second potential that generates a second electric field between the second potential and the common potential, the second electric field having a direction different from a first electric field generated between the first potential and the common potential, And wherein the signal input to the first terminals during the writing period includes at least one of the common potential, the first potential or the second potential. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係該共用電位或第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The driving method of the display device of claim 1, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the a common potential, wherein at least one signal input to the first terminals during the second initializing period is the common potential or the second potential, which generates a second electric field between the second potential and the common potential, the first The two electric fields have opposite directions of the first electric field generated between the first potential and the common potential, and wherein the signal input to the first terminals during the writing period includes the common potential, the first potential or the At least one of the second potentials. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,於該寫入期間之末尾信號的最後掃描中對該等第一端子輸入該共用電位。 The driving method of the display device of claim 1, wherein the common potential is input to the first terminals in the last scan of the signal at the end of the writing period. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,執行在該第一初始化期間掃描及輸入信號之步驟x次(x係2或更大之自然數),且信號之最短保持期間之長度為t,輸入信號後保持期間之每一者之長度為2y-1t(y為x或更小自然數之任一者)。 The driving method of the display device of claim 1, wherein the step of scanning and inputting the signal during the first initializing is performed x times (x is a natural number of 2 or more), and the shortest holding period of the signal is The length is t, and the length of each of the input signal hold periods is 2 y-1 t (y is any of x or less natural numbers). 如申請專利範圍第1項之顯示裝置的驅動方法,其 中,於該寫入期間輸入信號後保持期間之之長度相同。 A driving method of a display device according to claim 1 of the patent scope, In the middle of the write period, the length of the hold period is the same. 如申請專利範圍第1項之顯示裝置的驅動方法,其中,該灰階儲存顯示元件係電泳元件。 The driving method of the display device according to claim 1, wherein the gray scale storage display element is an electrophoretic element. 一種顯示裝置,具有像素部,該顯示裝置包括:源極驅動部;閘極驅動部;複數個像素,各像素包含:灰階儲存顯示元件;電晶體,其閘端子電極電連接至該閘極驅動部,該電晶體之第一端子電極電連接至該源極驅動部,且該電晶體之第二端子電極電連接至該灰階儲存顯示元件之第一端子;以及電容器,具有:該電容器的第一電極端子,電連接至該電晶體之第二端子,以及該電容器的第二電極端子,電連接至供應共用電位之配線,其中,根據在第一初始化期間之前的先前灰階位準,藉由該第一初始化期間內對該等灰階儲存顯示元件之第一端子掃描及輸入信號複數次之步驟,顯示第一灰階顯示位準,其中各信號的保持期間的長度係加權的,且其中共用電位被輸入至該等灰階儲存顯示元件之第二端子,其中,藉由在該第一初始化期間後的第二初始化期間對該等第一端子掃描及輸入信號至少一次之步驟,顯示第二灰階顯示位準,以及其中,藉由在該第二初始化期間後的寫入期間對該等 第一端子掃描及輸入信號複數次之步驟,顯示在該第一灰階顯示位準及該第二灰階顯示位準之間的第三灰階顯示位準、該第一灰階顯示位準或該第二灰階顯示位準。 A display device having a pixel portion, the display device comprising: a source driving portion; a gate driving portion; a plurality of pixels, each pixel comprising: a gray scale storage display element; and a transistor having a gate terminal electrode electrically connected to the gate a driving portion, a first terminal electrode of the transistor is electrically connected to the source driving portion, and a second terminal electrode of the transistor is electrically connected to the first terminal of the gray scale storage display element; and a capacitor having: the capacitor a first electrode terminal electrically connected to the second terminal of the transistor, and a second electrode terminal of the capacitor electrically connected to the wiring supplying the common potential, wherein according to the previous gray level level before the first initialization period And displaying, by the plurality of steps of scanning and inputting the first terminal of the gray scale storage display element in the first initializing period, the first gray scale display level, wherein the length of the holding period of each signal is weighted And wherein the common potential is input to the second terminal of the gray scale storage display element, wherein the second initialization period after the first initialization period At least one of the step of scanning and the like of the first input signal terminals, a second display level gray scale display, and wherein, the other by the second writing period after the initialization period The step of scanning and inputting the first terminal a plurality of times, displaying a third gray scale display level between the first gray scale display level and the second gray scale display level, the first gray scale display level Or the second gray scale displays the level. 如申請專利範圍第9項之顯示裝置,其中,在該第二初始化期間內,執行對該等第一端子進行信號掃描及輸入之步驟一次。 The display device of claim 9, wherein the step of performing signal scanning and input on the first terminals is performed once during the second initializing period. 如申請專利範圍第9項之顯示裝置,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有異於該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The display device of claim 9, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the common potential, The at least one signal input to the first terminals is a second potential during the second initializing period, and the second electric field is generated between the second potential and the common potential, the second electric field having a different a direction opposite to a first electric field generated between the potential and the common potential, and wherein the signal input to the first terminals during the writing period includes the common potential, the first potential, or the second potential One. 如申請專利範圍第9項之顯示裝置,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係該共用電位或第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有該第一電位與該共用電位間所產生之第一電場之相反方向,且 其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The display device of claim 9, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the common potential, The at least one signal input to the first terminals during the second initializing period is the common potential or the second potential, which generates a second electric field between the second potential and the common potential, the second electric field having The first potential is opposite to the first electric field generated between the common potentials, and The signal input to the first terminals during the writing period includes at least one of the common potential, the first potential, or the second potential. 如申請專利範圍第9項之顯示裝置,其中,於該寫入期間之末尾信號的最後掃描中對該等第一端子輸入該共用電位。 The display device of claim 9, wherein the common potential is input to the first terminals in a last scan of the signal at the end of the writing period. 如申請專利範圍第9項之顯示裝置,其中,執行在該第一初始化期間掃描及輸入信號之步驟x次(x係2或更大之自然數),且信號之最短保持期間之長度為t,輸入信號後保持期間之每一者之長度為2y-1t(y為x或更小自然數之任一者)。 The display device of claim 9, wherein the step of scanning and inputting the signal during the first initialization is performed x times (x is a natural number of 2 or more), and the length of the shortest holding period of the signal is t The length of each of the holding periods after the input signal is 2 y-1 t (y is any of x or less natural numbers). 如申請專利範圍第9項之顯示裝置,其中,於該寫入期間輸入信號後保持期間之長度相同。 The display device of claim 9, wherein the length of the holding period after the signal is input during the writing is the same. 如申請專利範圍第9項之顯示裝置,其中,該灰階儲存顯示元件係電泳元件。 The display device of claim 9, wherein the gray scale storage display element is an electrophoretic element. 如申請專利範圍第9項之顯示裝置,其中,該電晶體包括氧化物半導體。 The display device of claim 9, wherein the transistor comprises an oxide semiconductor. 一種顯示裝置的驅動方法,該顯示裝置包括複數個像素,其每一者包含灰階儲存顯示元件,該驅動方法包括以下步驟:根據在第一初始化期間之前的先前灰階位準,藉由對該等灰階儲存顯示元件之第一端子掃描及輸入信號通過電晶體複數次之步驟,顯示第一灰階顯示位準,直至該等灰階儲存顯示元件之每一者於該第一初始化期間顯示該第一灰階顯示位準時為止,其中各信號的保持期間的長度係加 權的,且其中共用電位被輸入至該等灰階儲存顯示元件之第二端子;藉由在該第一初始化期間後的第二初始化期間對該等第一端子掃描及輸入信號至少一次之步驟,顯示第二灰階顯示位準;以及藉由在對該等第一端子掃描及輸入信號複數次之步驟,顯示該第一灰階顯示位準、該第二灰階顯示位準或在該第一灰階顯示位準及該第二灰階顯示位準之間的第三灰階顯示位準,直至該等灰階儲存顯示元件之每一者於該第二初始化期間後的寫入期間顯示該第三灰階顯示位準時為止。 A driving method of a display device, the display device comprising a plurality of pixels each of which includes a grayscale storage display element, the driving method comprising the steps of: according to a previous grayscale level before the first initialization period, by The first terminal scanning and input signals of the gray scale storage display elements pass through the plurality of transistors to display the first gray scale display level until each of the gray scale storage display elements is in the first initialization period When the first gray scale display level is displayed, the length of the holding period of each signal is added And wherein the common potential is input to the second terminal of the gray scale storage display element; and the step of scanning and inputting the signal to the first terminal at least once during the second initialization period after the first initialization period Displaying a second gray scale display level; and displaying the first gray scale display level, the second gray scale display level, or at the step of scanning and inputting the signal to the first terminal a third gray scale display level between the first gray scale display level and the second gray scale display level until each of the gray scale storage display elements is written during the second initialization period The third gray scale display level is displayed. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,在該第二初始化期間內,執行對該等第一端子進行信號掃描及輸入之步驟一次。 The driving method of the display device of claim 18, wherein the step of performing signal scanning and inputting on the first terminals is performed once during the second initializing period. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The driving method of the display device of claim 18, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the a common potential, wherein at least one signal input to the first terminals is a second potential during the second initializing period, which generates a second electric field between the second potential and the common potential, the second electric field having the a direction opposite to a first electric field generated between the first potential and the common potential, and wherein a signal input to the first terminals during the writing period includes the common potential, the first potential, or the second potential At least one. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係該共用電位或第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The driving method of the display device of claim 18, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the a common potential, wherein at least one signal input to the first terminals during the second initializing period is the common potential or the second potential, which generates a second electric field between the second potential and the common potential, the first The two electric fields have opposite directions of the first electric field generated between the first potential and the common potential, and wherein the signal input to the first terminals during the writing period includes the common potential, the first potential or the At least one of the second potentials. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,於該寫入期間之末尾信號的最後掃描中對該等第一端子輸入該共用電位。 The driving method of the display device of claim 18, wherein the common potential is input to the first terminals in the last scan of the signal at the end of the writing period. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,執行在該第一初始化期間掃描及輸入信號之步驟x次(x係2或更大之自然數),且信號之最短保持期間之長度為t,輸入信號後保持期間之每一者之長度為2y-1t(y為x或更小自然數之任一者)。 The driving method of the display device of claim 18, wherein the step of scanning and inputting the signal during the first initializing is performed x times (x is a natural number of 2 or more), and the shortest holding period of the signal is The length is t, and the length of each of the input signal hold periods is 2 y-1 t (y is any of x or less natural numbers). 如申請專利範圍第18項之顯示裝置的驅動方法,其中,於該寫入期間輸入信號後保持期間之長度相同。 The driving method of the display device of claim 18, wherein the length of the holding period after inputting the signal during the writing is the same. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,該灰階儲存顯示元件係電泳元件。 The driving method of the display device of claim 18, wherein the gray scale storage display element is an electrophoretic element. 如申請專利範圍第18項之顯示裝置的驅動方法,其中,該電晶體包含氧化物半導體。 A driving method of a display device according to claim 18, wherein the transistor comprises an oxide semiconductor. 一種顯示裝置,具有像素部,該顯示裝置包括:源極驅動部;閘極驅動部;複數個像素,各像素包含:灰階儲存顯示元件;電晶體,其閘端子電極電連接至該閘極驅動部,該電晶體之第一端子電極電連接至該源極驅動部,且該電晶體之第二端子電極電連接至該灰階儲存顯示元件之第一端子;以及電容器,具有:該電容器的第一電極端子,電連接至該電晶體之第二端子,以及該電容器的第二電極端子,電連接至供應共用電位之配線,其中,根據在第一初始化期間之前的先前灰階位準,藉由對該等灰階儲存顯示元件之第一端子掃描及輸入信號通過電晶體複數次之步驟,顯示第一灰階顯示位準,直至該等灰階儲存顯示元件之每一者於該第一初始化期間顯示該第一灰階顯示位準時為止,其中各信號的保持期間的長度係加權的,且其中共用電位被輸入至該等灰階儲存顯示元件之第二端子,其中,藉由在該第一初始化期間後的第二初始化期間對該等第一端子掃描及輸入信號至少一次之步驟,顯示第二灰階顯示位準,且其中,藉由在對該等第一端子掃描及輸入信號複數次之步驟,顯示在該第一灰階顯示位準及該第二灰階顯示位 準之間的第三灰階顯示位準、該第一灰階顯示位準或該第二灰階顯示位準,直至該等灰階儲存顯示元件之每一者於該第二初始化期間後的寫入期間顯示該第三灰階顯示位準時為止。 A display device having a pixel portion, the display device comprising: a source driving portion; a gate driving portion; a plurality of pixels, each pixel comprising: a gray scale storage display element; and a transistor having a gate terminal electrode electrically connected to the gate a driving portion, a first terminal electrode of the transistor is electrically connected to the source driving portion, and a second terminal electrode of the transistor is electrically connected to the first terminal of the gray scale storage display element; and a capacitor having: the capacitor a first electrode terminal electrically connected to the second terminal of the transistor, and a second electrode terminal of the capacitor electrically connected to the wiring supplying the common potential, wherein according to the previous gray level level before the first initialization period Displaying the first gray scale display level by the step of scanning and inputting the first terminal of the gray scale storage display element through the transistor multiple times until each of the gray scale storage display elements is The first gray scale display level is displayed during the first initialization period, wherein the length of the hold period of each signal is weighted, and wherein the common potential is input to the first The second storage terminal of the display element, wherein the second gray scale display level is displayed by the step of scanning and inputting the first terminal at least once during the second initializing period after the first initializing period, and The step of displaying the first gray scale display level and the second gray scale display position by the step of scanning and inputting the signal to the first terminal a third gray scale display level, the first gray scale display level, or the second gray scale display level, until each of the gray scale storage display elements is after the second initialization period The third gray scale display level is displayed during the writing period. 如申請專利範圍第27項之顯示裝置,其中,在該第二初始化期間內,執行對該等第一端子進行信號掃描及輸入之步驟一次。 The display device of claim 27, wherein the step of performing signal scanning and inputting on the first terminals is performed once during the second initializing period. 如申請專利範圍第27項之顯示裝置,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有該第一電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The display device of claim 27, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the common potential, The at least one signal input to the first terminals is a second potential during the second initializing period, which generates a second electric field between the second potential and the common potential, the second electric field having the first potential a direction opposite to the first electric field generated between the common potentials, and wherein the signal input to the first terminals during the writing period includes at least one of the common potential, the first potential, or the second potential . 如申請專利範圍第27項之顯示裝置,其中,於該第一初始化期間內輸入至該等第一端子之信號之每一者係第一電位,其等於該共用電位或異於該共用電位,其中,於該第二初始化期間內輸入至該等第一端子之至少一信號係該共用電位或第二電位,其產生第二電場於該第二電位與該共用電位間,該第二電場具有異於該第一 電位與該共用電位間所產生之第一電場之相反方向,且其中,於該寫入期間輸入至該等第一端子之信號包含該共用電位、該第一電位或該第二電位之至少一者。 The display device of claim 27, wherein each of the signals input to the first terminals during the first initializing period is a first potential equal to the common potential or different from the common potential, The at least one signal input to the first terminals during the second initializing period is the common potential or the second potential, which generates a second electric field between the second potential and the common potential, the second electric field having Different from the first a direction opposite to a first electric field generated between the potential and the common potential, and wherein the signal input to the first terminals during the writing period includes at least one of the common potential, the first potential, or the second potential By. 如申請專利範圍第27項之顯示裝置,其中,於該寫入期間之末尾信號的最後掃描中對該等第一端子輸入該共用電位。 The display device of claim 27, wherein the common potential is input to the first terminals in a last scan of the signal at the end of the writing period. 如申請專利範圍第27項之顯示裝置,其中,執行在該第一初始化期間掃描及輸入信號之步驟x次(x係2或更大之自然數),且信號之最短保持期間之長度為t,輸入信號後保持期間之每一者之長度為2y-1t(y為x或更小自然數之任一者)。 The display device of claim 27, wherein the step of scanning and inputting signals during the first initialization is performed x times (x is a natural number of 2 or more), and the length of the shortest holding period of the signal is t The length of each of the holding periods after the input signal is 2 y-1 t (y is any of x or less natural numbers). 如申請專利範圍第27項之顯示裝置,其中,於該寫入期間輸入信號後保持期間之長度相同。 The display device of claim 27, wherein the length of the holding period after the input of the signal during the writing is the same. 如申請專利範圍第27項之顯示裝置,其中,該灰階儲存顯示元件係電泳元件。 The display device of claim 27, wherein the gray scale storage display element is an electrophoretic element. 如申請專利範圍第27項之顯示裝置,其中,該電晶體包含氧化物半導體。 The display device of claim 27, wherein the transistor comprises an oxide semiconductor.
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JP2011085908A (en) 2011-04-28
TW201124967A (en) 2011-07-16
KR101709749B1 (en) 2017-03-08
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JP5713610B2 (en) 2015-05-07
WO2011033914A1 (en) 2011-03-24

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