TWI512847B - 製造半導體元件和結構的方法 - Google Patents

製造半導體元件和結構的方法 Download PDF

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Publication number
TWI512847B
TWI512847B TW099124753A TW99124753A TWI512847B TW I512847 B TWI512847 B TW I512847B TW 099124753 A TW099124753 A TW 099124753A TW 99124753 A TW99124753 A TW 99124753A TW I512847 B TWI512847 B TW I512847B
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Taiwan
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layer
conductive
photoresist layer
conductive material
photoresist
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TW099124753A
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English (en)
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TW201133652A (en
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Michael J Seddon
Francis J Carney
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Semiconductor Components Ind
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Publication of TW201133652A publication Critical patent/TW201133652A/zh
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    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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Description

製造半導體元件和結構的方法
本發明通常涉及半導體元件，尤其是涉及半導體元件中的金屬化系統。
半導體元件包括從半導體基板製造的一個或多個半導體器件。一般來說，金屬互連在半導體基板上形成以將半導體器件彼此電連接或將其與用於將電信號傳輸到其他器件的電接頭電連接。圖1是從矽基板12形成的先前技術半導體組件10的橫截面視圖。雖然沒有示出，半導體器件從矽基板12形成。鋁層14在矽基板12上形成，而電介質鈍化層16在鋁層14的一部分上和矽基板12上形成。晶種金屬層(seed metal layer)18在鋁層14的未被電介質鈍化層16保護的部分上以及在電介質鈍化層16的一部分上形成。具有頂表面26和側表面28的銅互連件20使用電鍍技術在晶種金屬層18上形成。無電鍍鎳金(Ni/Au)保護結構22在銅互連件20的被暴露表面上形成，其中保護結構22包括在銅互連件20上形成的鎳層23和在鎳層23上形成的金層25。鋁層14、晶種金屬層18和銅互連件20形成金屬化系統24。這種方法的缺點是，當晶種金屬層18被蝕刻掉時，它可能被過蝕刻或底切(undercut)，形成底切區域19。引起腐蝕並使半導體元件10的可靠性降低的酸或其他污染物可被捕獲在底切區域19中。另一缺點是製造流程包括兩個單獨和昂貴的電鍍過程。
圖2是另一先前技術半導體組件50的橫截面視圖。半導體元件50類似於半導體組件10，只是頂表面26和側表面28缺少保護結構22，以及電鍍金屬結構52在銅互連件20的頂表面26上形成但側表面28缺少電鍍金屬結構52。金屬結構52可為與銅互連件20接觸的電鍍金屬層53和與鎳層53接觸的電鍍層金屬層55。金屬層53可為鎳而金屬層55可為鈀，或者金屬層53可為鎳而金屬層55可為金或類似物。金層54在鎳鈀層52上形成。半導體元件50的缺點是，側表面28未被保護且對腐蝕和電遷移敏感。
因此，具有一種用於保護金屬化系統的方法和一種防止電遷移和腐蝕的金屬化系統將是有利的。該方法和結構實現起來有成本效益是進一步有利的。
結合附圖，從下面的詳細描述的閱讀中，將更好地理解本發明，在附圖中相似的參考符號表示相似的元件。
在下面的描述和申請專利範圍中，術語「在…上面」、「覆蓋在…上面」和「在…的上方」可用於表示兩個或多個元件彼此直接物理接觸。然而，「在…的上方」也可意指兩個或多個元件彼此不直接接觸。例如，「在…的上方」可意指一個元件在另一元件之上，但這些元件彼此不接觸且在這兩個元件之間可以有另一個或多個元件。
通常，本發明提供了半導體元件和用於製造半導體元件的方法，該方法通過例如電遷移來保護半導體元件的金屬化系統免遭損壞。根據本發明的實施方式，在銅保護層的形成期間使用光敏材料例如光阻劑(photoresist)層的雙曝光來製造半導體組件。在雙曝光中，光阻劑層在導電層上形成，且光阻劑層的一部分被暴露於紫外輻射例如第一劑量的光中，並被顯影(develop)來形成暴露導電層的一部分的開口。在光阻劑層被硬烤(hard bake)時之前，光阻劑層的另一部分被暴露於第二劑量的光中，且電互連材料例如銅在導電層的被光阻劑層中的開口顯露的部分上形成。接著，光阻劑層的以前暴露於第二劑量的光中的部分被顯影，來顯露導電層的額外部分。保護層在電互連材料的被暴露部分上和在導電層的在第二暴露之後被光阻劑的顯影顯露的部分上形成。
圖3是根據本發明的實施方式的在製造期間半導體組件100的一部分的橫截面視圖。在圖3中示出的是具有相對的表面104和106的材料102。表面104稱為前或頂表面，而表面106稱為底或後表面。材料102可為半導體材料，例如在半導體基板上形成的外延層、半導體基板、基板例如印刷電路板等。根據材料102是半導體材料的實施方式，一個或多個半導體器件可在半導體材料102中或從半導體材料102形成。當單個半導體器件在半導體材料102中或從半導體材料102形成時，它一般稱為分立器件，而當多個半導體器件在半導體材料102中或從半導體材料102形成時，它們一般稱為積體電路。
具有邊緣120和122的導電結構或材料108在半導體材料102上面或上方形成。作為例子，導電結構108是鋁。用於導電結構108的其他適當的材料包括銅、鋁銅、鋁矽、鋁矽銅等。導電結構108可用作焊盤、電互連件、功率匯流排等。包括電介質材料的鈍化層124在半導體材料102上面或上方形成，且開口126在鈍化層124中形成，該開口暴露導電結構108的一部分。
現在參考圖4，導電結構或材料129在鈍化層124上和在導電結構108的被暴露部分上形成。根據本發明的實施方式，導電結構129包括在導電層130上形成的導電材料層132，導電層130較佳地與導電結構108接觸。作為例子，導電層130是通過噴射沉積形成的鈦鎢(TiW)層，而導電層132是也通過噴射沉積形成的銅(Cu)層。導電層130和132可稱為晶種金屬層或凸點下金屬化層。光敏材料例如光阻劑的層134在導電結構129上形成，即，光阻劑的層134在導電層132上形成。根據本發明的實施方式，光阻劑層134是正光阻劑。
光阻劑層134的部分136通過電鍍掩模140被暴露於光138，例如紫外(UV)輻射中。尺寸DP1 表示被暴露部分136的尺寸，而尺寸DM 表示導電結構108的尺寸。作為例子，尺寸DP1 是部分136的寬度，而尺寸DM 是導電結構108的寬度。雖然部分136的尺寸DP1 被示為小於導電結構108的尺寸DM ，但這不是本發明的限制。尺寸DP1 可大於尺寸DM 或等於尺寸DM 。
現在參考圖5，光阻劑層134的被暴露部分被顯影，這移除了光阻劑層134的部分136。移除部分136留下側壁142和144，並顯露導電層132的一部分，在側壁142和144之間留下間隙143。
現在參考圖6，光阻劑層134的部分146和148通過電鍍掩模150被暴露於光138中。應注意，在部分136移除之前或在第二次暴露光阻劑層134之前，可以或可以不執行硬烤，即，硬烤是可選的步驟。尺寸DP2 可表示光阻劑層134的被電鍍掩模150暴露的部分的尺寸。尺寸DP2 大於尺寸DP1 ，並可小於尺寸DM ，大於尺寸DM ，或等於尺寸DM 。在圖5所示的例子中，尺寸DP2 大於尺寸DM 。
現在參考圖7，在使光阻劑層134的被暴露部分146和148顯影之前，導電結構152在導電層132的被暴露部分上形成。導電結構152被側壁142和144橫向限制。作為例子，導電結構152是使用電鍍工藝形成的銅。用於導電結構152的其他適當的材料包括鎳或類似物。
現在參考圖8，光阻劑層134的部分146和148被顯影並移除。可選地，在移除之後，光阻劑層134的其餘部分可被硬烤。部分146和148的移除暴露了導電結構152的側壁或邊緣154和156以及導電層132的部分158和160。應注意，圖6所示的尺寸DP2 大於側壁或邊緣154和156之間的距離。
現在參考圖9，導電結構或材料162沿著側壁154和156在導電結構152上並在導電層132的被顯露部分158和160上形成。導電結構162可稱為保護結構，並可包括一層或多層。較佳地，導電結構162是使用電鍍技術形成的並保護導電結構152的多層結構。例如，導電結構162可為兩層結構，其包括與導電結構152接觸形成的導電層163和與導電層163接觸形成的導電層165。根據本發明的實施方式，導電層163是鎳，而導電層165是金。可選地，導電材料163可為鎳，而導電層165可為錫；或導電材料163可為鎳，而導電材料165可為鈀；或導電材料163可為錫，而導電材料165可為鈀；或導電材料163可為銅，而導電材料165可為金；或導電材料163可為銅，而導電材料165可為錫；或導電材料163可為鎳，而導電層165可為焊料；或導電材料163可為焊料，而導電層165可為錫；等等。
應進一步注意，用於覆蓋銅的適當材料是保護銅免遭氧化的材料。雖然結構162被描述為導電結構，但這不是本發明的限制。結構162可從非導電材料例如環氧樹脂、聚醯亞胺等形成。
現在參考圖10，光阻劑層134使用本領域技術人員已知的技術被移除。
現在參考圖11，導電結構129的被暴露部分使用例如濕化學蝕刻工藝來移除。用於移除導電結構129的技術不是本發明的限制。
圖12是根據本發明的另一實施方式的在製造期間半導體組件200的一部分的橫截面視圖。應注意，在製造半導體元件200中的開始步驟類似於用於製造半導體元件100的步驟。因此，在圖3-5中對半導體元件100示出的製造步驟可用於製造半導體組件200。因此，圖11的描述從圖5的描述繼續，其中參考符號100由參考符號200代替。導電結構152在導電層132的被暴露部分上形成。導電結構152由側壁142和144橫向限制。作為例子，導電結構152是使用電鍍工藝形成的銅。用於導電結構152的其他適當的材料包括鎳或類似物。
光敏材料例如光阻劑的層202在導電結構152上並在光阻劑層134的其餘部分上形成。根據本發明的實施方式，光阻劑層是正光阻劑。
光阻劑層202的部分204通過電鍍掩模208被暴露於光206，例如紫外(UV)輻射中。此外，在光阻劑層202的未被電鍍掩模208保護的部分下面的光阻劑層134的部分210和212也被暴露於光206中。
現在參考圖13，被暴露於光206中的光阻劑層202的部分以及光阻劑層134的部分210和212(圖12所示)被顯影並移除。可選地，在移除之後，光阻劑層134和202的其餘部分可被硬烤。部分210和212的移除暴露導電結構152的側壁或邊緣154和156以及導電層132的部分158和160。
現在參考圖14，導電結構或材料162沿著側壁154和156在導電結構152上並在導電層132的被顯露部分158和160上形成。較佳地，導電結構162是使用電鍍技術形成。導電結構162保護導電結構152。參考圖9描述了用於導電結構162的適當材料。
現在參考圖15，光阻劑層134和202的其餘部分使用本領域技術人員已知的技術被移除。移除光阻劑層134和202的其餘部分暴露導電結構129的部分，其可使用例如本領域技術人員已知的濕化學蝕刻技術或其他技術來移除。
為了完整起見，圖16被包括以示出半導體元件250包括導電層162的實施方式，導電層162是三金屬層結構或系統，其包括與導電結構152接觸形成的導電層163、與導電層163接觸形成的導電層165和與導電層165接觸形成的導電層167。例如，導電層163可為鎳，導電層165可為鈀，而導電層167可為金。可選地，導電層163可為銅，導電層165可為鎳，而導電層167可為金；導電層163可為銅，導電層165可為鎳，而導電層167可為錫；或導電層163可為銅，導電層165可為鎳，而導電層167可為鈀；或導電層163可為銅，導電層165可為錫，而導電層167可為鈀；等等。應注意，包括導電結構162的導電層的數量不是本發明的限制，即，導電結構162可包括單層、兩層、三層、四層等。
圖17被包括以示出半導體元件260包括導電層162的實施方式，導電層162是四金屬層結構或系統，其包括與導電結構152接觸形成的導電層163、與導電層163接觸形成的導電層165、與導電層165接觸形成的導電層167和與導電層167接觸形成的導電層169。例如，導電層163可為銅，導電層165可為鎳，導電層167可為鈀，而導電層169可為金。如上所述，層162不限於包括導電材料，而是可包括非導電材料例如環氧樹脂、聚醯亞胺等。
到現在為止應認識到，提供了具有銅保護層的半導體元件和用於製造半導體元件的方法。本發明的實施方式的優點包括，相鄰於銅側壁的保護結構162保護它們不被蝕刻劑或其他腐蝕材料損壞，防止銅遷移，以及消除昂貴的無電鍍噴鍍工藝。此外，保護結構162形成保護導電結構152的密封，同時允許保護結構162的過蝕刻，而不顯露導電結構152的銅側壁或邊緣。
雖然這裏描述了確定的優選實施方式和方法，但對本領域技術人員來說，從前述公開將明顯的是，可進行這樣的實施方式和方法的變化和更改，而不偏離本發明的精神和範圍。意圖是本發明應僅被限制到所附申請專利範圍以及適用法律的法則和原則所要求的程度。
100．．．半導體組件
102．．．材料
104．．．表面
106．．．表面
108．．．導電結構或材料
120．．．邊緣
122．．．邊緣
124．．．鈍化層
126．．．開口
129．．．導電結構或材料
130．．．導電層
132．．．導電材料層
134．．．光阻劑層
136．．．光阻劑層134的部分
138．．．光
140．．．電鍍掩模
142．．．側壁
143．．．間隙
144．．．側壁
146．．．光阻劑層134的被暴露部分
148．．．光阻劑層134的被暴露部分
150．．．電鍍掩模
152．．．導電結構
154．．．側壁或邊緣
156．．．側壁或邊緣
158．．．導電層132的部分
160．．．導電層132的部分
162．．．導電結構
163．．．導電層
165．．．導電層
167．．．導電層
169．．．導電層
200．．．半導體組件
202．．．光阻劑層
204．．．光阻劑層202的部分
206．．．光
208．．．電鍍掩模
210．．．光阻劑層134的部分
212．．．光阻劑層134的部分
250．．．半導體元件
260．．．半導體元件
圖1是具有在半導體基板上形成的金屬化系統的先前技術半導體組件的橫截面視圖；
圖2是具有在半導體基板上形成的金屬化系統的另一先前技術半導體組件的橫截面視圖；
圖3是根據本發明的實施方式的具有在半導體基板上形成的金屬化系統的在早期製造階段時的半導體組件的橫截面視圖；
圖4是在後期製造階段時的圖3的半導體組件的橫截面視圖；
圖5是在後期製造階段時的圖4的半導體組件的橫截面視圖；
圖6是在後期製造階段時的圖5的半導體組件的橫截面視圖；
圖7是在後期製造階段時的圖6的半導體組件的橫截面視圖；
圖8是在後期製造階段時的圖7的半導體組件的橫截面視圖；
圖9是在後期製造階段時的圖8的半導體組件的橫截面視圖；
圖10是在後期製造階段時的圖9的半導體組件的橫截面視圖；
圖11是在後期製造階段時的圖10的半導體組件的橫截面視圖；
圖12是根據本發明的另一實施方式的在後期製造階段的圖5的半導體組件的橫截面視圖；
圖13是在後期製造階段時的圖12的半導體組件的橫截面視圖；
圖14是在後期製造階段時的圖13的半導體組件的橫截面視圖；
圖15是在後期製造階段時的圖14的半導體組件的橫截面視圖；
圖16是根據本發明的另一實施方式的半導體組件的橫截面視圖；以及
圖17是根據本發明的另一實施方式的半導體組件的橫截面視圖。
100．．．半導體組件
102．．．材料
104．．．表面
106．．．表面
108．．．導電結構或材料
120．．．邊緣
122．．．邊緣
124．．．鈍化層
129．．．導電結構或材料
130．．．導電層
132．．．導電材料層
134．．．光阻劑層
136．．．光阻劑層134的部分
138．．．光
140．．．電鍍掩模

Claims (10)

  1. 一種用於製造一半導體元件的方法，包括：提供具有一主表面的一材料；在該主表面上形成一第一導電結構；在該第一導電結構上形成一光阻劑層；使該光阻劑層的一第一部分暴露於輻射中，該第一部分具有一第一尺寸；以及使該光阻劑層的一第二部分暴露於輻射中，該第二部分具有大於該第一尺寸的一第二尺寸。
  2. 如請求項1的方法，其中該光阻劑是一正光阻劑。
  3. 如請求項1的方法，其中使該光阻劑層的該第二部分暴露包括在硬烤該光阻劑層之前使該第二部分暴露於輻射中。
  4. 如請求項1的方法，還包括在使該光阻劑層的第二部分暴露於輻射中之前，移除該光阻劑層的該第一部分以顯露該第一導電結構的一第一部分。
  5. 如請求項4的方法，還包括：在該第一導電結構的該第一部分上形成一第二導電結構，該第二導電結構具有第一邊緣和第二邊緣；在使該光阻劑層的該第二部分暴露於輻射中之後，顯露至少該第二導電結構的該第一邊緣和該第二邊緣；以及在該第二導電結構的該第一邊緣和第二邊緣上形成一保護結構，其中該保護結構是一導電材料或一非導電材 料中的一個。
  6. 一種用於製造一半導體元件的方法，包括：提供具有一主表面的一基板；在該主表面上形成一第一導電材料，該第一導電材料具有第一邊緣和第二邊緣；在該第一導電材料層上形成一第一光阻劑層；移除該第一光阻劑層的一第一部分，留下來自該第一光阻劑層的一剩餘部分的第一側壁和第二側壁以及該第一側壁和第二側壁之間的一間隙；在該第一光阻劑層的該第一側壁和第二側壁之間的該間隙中形成一第二導電材料，該第二導電材料具有第一邊緣和第二邊緣；在該第一光阻劑層上和在該第二導電材料上形成一第二光阻劑層；移除該第二光阻劑層的一部分和該第一光阻劑層的一第二部分，以顯露該第二導電材料的該第一邊緣和第二邊緣；以及在該第二導電材料的該第一邊緣和第二邊緣上形成一保護結構。
  7. 如請求項6的方法，其中該保護結構是一導電材料。
  8. 如請求項6的方法，其中移除該第一光阻劑層的該第一部分和第二部分以及該第二光阻劑層的該部分包括使該第一光阻劑層的該第一部分和第二部分以及該第二光阻劑層的該部分暴露於紫外輻射中，以及使該第一光阻劑 層和第二光阻劑層的被暴露部分顯影。
  9. 如請求項8的方法，還包括在該基板和第一導電材料層之間形成一第三導電材料層，其中該保護結構包括一非導電材料。
  10. 一種半導體元件，包括：具有一主表面的一半導體材料；在該主表面的一部分上的一導電結構；具有與該導電結構接觸的一頂表面和相對的邊緣的一電互連件；以及在該電互連件的該頂表面和該等相對的邊緣上並在該導電結構的一部分上的一保護結構，其中該保護結構包含在該電互連件上之一第一金屬層及在該第一金屬層上之一第二金屬層，且其中該保護結構形成保護該電互連件的一密封。
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