TWI509813B - 延伸源極-汲極金屬氧化物半導體電晶體及其形成方法 - Google Patents

延伸源極-汲極金屬氧化物半導體電晶體及其形成方法 Download PDF

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TWI509813B
TWI509813B TW102131521A TW102131521A TWI509813B TW I509813 B TWI509813 B TW I509813B TW 102131521 A TW102131521 A TW 102131521A TW 102131521 A TW102131521 A TW 102131521A TW I509813 B TWI509813 B TW I509813B
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Chien-Sheng Su
Mandana Tadayoni
Yueh-Hsin Chen
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Silicon Storage Tech Inc
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Description

延伸源極-汲極金屬氧化物半導體電晶體及其形成方法 相關申請案
此申請案請求2012年9月27日申請之美國臨時申請案第61/706,587號的利益,並以參考方式併入本文。
發明領域
本發明係有關用於高功率元件之MOS電晶體。
圖1繪示一傳統MOS電晶體2。MOS電晶體2包括一傳導閘極4配置於基體6上方,且藉一層絕緣材料8與基體6絕緣。源極區域10與汲極區域12形成於此基體中,具有與基體(或基體中的一井)相反的傳導性類型。例如,對於P型基體或N型基體中之P型井,源極與汲極區域具有N型傳導性。絕緣間隔物14形成於閘極4之側邊。源極10與汲極12於其間界定一通道區域16。源極10和汲極12靠通道側邊之邊緣與閘極4之邊緣對齊。
如同圖2中繪示,使用多重摻雜步驟以形成源極與汲極區域亦為已知。特別是,在形成閘極4後但形成間隔物14前,實行第一次植入以形成LD(lightly doped,輕摻雜)區域18(其自我對齊於閘極4)。形成間隔物14後,實行第二次植入以形成 源極與汲極區域10/12(其自我對齊於間隔物14)。LD區域18配置於間隔物14下方,且它們將源極與汲極區域10/12連接到通道區域16。
針對高電壓應用,用於在一MOS電晶體中形成LD區域18之植入能量及劑量並不一定與用於形成在同一晶圓上的低電壓邏輯MOS電晶體相同。植入能量應相對地高以得到足夠高閘極的汲極接面崩潰電壓。通常,植入物不僅進入基體用於形成電晶體LD區域18,還進入電晶體的閘極多晶矽4。在半導體技術邁入65nm幾何尺寸、45nm幾何尺寸及以上,邏輯MOS電晶體多晶矽厚度變得更薄。針對65nm幾何尺寸,一典型邏輯多晶矽閘極厚度為大約1000埃,且針對45nm幾何尺寸為大約800埃。因為高電壓MOS電晶體與低電壓邏輯MOS電晶體共用相同之多晶矽,植入能量必須降低以防止諸如硼、磷或砷之植入摻雜劑穿入位於閘極多晶矽4下方之MOS通道16。然而,降低植入能量將造成較低之閘極的汲極接面崩潰電壓,且一高電壓MOS電晶體可能無法給予足夠高閘極的汲極接面崩潰電壓。
使用延伸汲極MOS電晶體以增加閘極的汲極接面崩潰電壓為已知。圖3繪示一延伸汲極NMOS電晶體(亦即形成於P型基體6中),其中汲極區域12遠隔於閘極4及間隔物14而形成(亦即,汲極區域12未自我對齊於間隔物14,而是設置成橫向偏離閘極4及間隔物14)。在P型基體6中,源極與汲極區域10/12可形成作為N型區域。圖4繪示一延伸PMOS電晶體,其形成於P型基體6之一N型井20中,其中源 極/汲極區域10/12及LD區域18a/18b為P型。
延伸汲極MOS電晶體不是一對稱元件,因為源極並未延伸。此表示源極10對齊於(亦即到達)間隔物14,且其藉由本身配置於間隔物14下方之LD區域18a,與通道區域16連接。相反地,汲極12設置在距間隔物14遠處,且其藉由僅部分配置於間隔物14下方之LD區域18b,與通道區域16連接。當一MOS電晶體之源極與汲極10/12因佈局錯誤而互換時,此元件即變成一延伸源極MOS電晶體。因此,一高閘極的汲極崩潰電壓即可能無法得到。
在現今工業實務中,當延伸源極與汲極MOS電晶體使用作為一對稱元件時,多晶矽閘極材料及部分源極與汲極被阻擋於源極/汲極之N+或P+植入物之外。經常需要一特殊遮罩步驟以進行閘極材料(多晶矽)植入摻雜。若沒有摻雜,閘極多晶矽材料將有一空乏效應,且電晶體臨界電壓將會偏移。原地摻雜的多晶矽材料可替代植入的多晶矽,但此解決方法除非使用一低性能埋入式通道電晶體,否則將僅對一種MOS(諸如NMOS)有效,而不適用於另一種MOS(諸如PMOS)。
因此,需要有解決上述問題的一種MOS元件及其製作方法。
上述問題及需求可藉由一電晶體予以解決,其具有一基體;配置於基體上方且與基體絕緣之一傳導閘極,其中在基體中之一通道區域配置於傳導閘極下方;位於基 體上方且側向鄰近傳導閘極之第一側邊由絕緣材料構成的一第一間隔物;位於基體上方且側向鄰近傳導閘極之相對於第一側邊之第二側邊由絕緣材料構成的一第二間隔物;形成於基體中且鄰近但橫向隔離於傳導閘極之第一側邊及第一間隔物的一源極區域;形成於基體中且鄰近但橫向隔離於傳導閘極之第二側邊及第二間隔物的一汲極區域;形成於基體中且在通道區域與源極區域間橫向延伸之一第一LD區域,其中該第一LD區域具有配置於第一間隔物下方之一第一部分、及未配置於第一及第二間隔物下方且未配置於傳導閘極下方之一第二部分,且其中該第一LD區域之摻雜劑濃度少於源極區域之摻雜劑濃度;形成於基體中且在通道區域與汲極區域間橫向延伸之一第二LD區域,其中該第二LD區域具有配置於第二間隔物下方之一第一部分、以及未配置於第一及第二間隔物下方且未配置於傳導閘極下方之一第二部分,且其中該第二LD區域之摻雜劑濃度少於汲極區域之摻雜劑濃度。
形成一電晶體之方法,包括形成位於基體上方且與其絕緣之傳導閘極,其中基體中之一通道區域配置於傳導閘極下方;實行第一次植入將摻雜劑植入鄰近傳導閘極之相對立第一及第二側邊的基體之部分中,以在基體中分別形成第一及第二LD區域;在基體中形成位於第一LD區域上方且側向鄰近傳導閘極之第一側邊由絕緣材料構成之一第一間隔物;在基體中形成位於第二LD區域上方且側向鄰近傳導閘極之第二側邊由絕緣材料構成之第二間隔物;形 成至少在基體橫向緊鄰第一及第二間隔物之部分上方延伸,但至少讓該基體橫向隔離於第一及第二間隔物之部分保持暴露的遮罩材料;實行第二次植入將摻雜劑植入該基體之暴露部分,以在基體中形成鄰近但橫向隔離於傳導閘極之第一側邊及第一間隔物的一源極區域,且在基體中形成鄰近但橫向隔離於傳導閘極之第二側邊及第二間隔物的一汲極區域,其中第一LD區域在通道區域與源極區域間橫向延伸,且具有配置於第一間隔物下方之第一部分、及未配置於第一及第二間隔物下方且未配置於傳導閘極下方之第二部分,且其中第一LD區域之摻雜劑濃度少於源極區域之摻雜劑濃度;及其中第二LD區域在通道區域與汲極區域間橫向延伸,且具有配置於第二間隔物下方之第一部分、及未配置於第一及第二間隔物下方且未配置於傳導閘極下方之第二部分,且其中第二LD區域之摻雜劑濃度少於汲極區域之摻雜劑濃度。
本發明其他目的及特徵將藉由審視說明書、申請專利範圍及附圖而明顯看出。
2‧‧‧MOS電晶體
4‧‧‧傳導閘極
6、34‧‧‧基體
8、36‧‧‧絕緣材料
10、38‧‧‧源極區域
12、40‧‧‧汲極區域
14、42‧‧‧絕緣間隔物
16、46‧‧‧通道區域
18、18a、18b、44a、44b‧‧‧LD區域
20、54‧‧‧N型井
30‧‧‧延伸源極/汲極MOS電晶體
32‧‧‧傳導閘極/傳導層
50‧‧‧遮罩材料
52‧‧‧光阻
圖1為一傳統MOS電晶體之側視橫截面圖。
圖2為一具有將源極與汲極連接到通道區域之輕摻雜區域的一傳統MOS電晶體之側視橫截面圖。
圖3為一傳統延伸汲極MOS電晶體之側視橫截面圖。
圖4為一傳統延伸汲極PMOS電晶體之側視橫截 面圖。
圖5為一對稱延伸源極/汲極MOS電晶體之側視橫截面圖。
圖6A-6D為繪示形成對稱延伸源極/汲極NMOS電晶體之過程的側視橫截面圖。
圖7為一對稱延伸源極/汲極PMOS電晶體之側視橫截面圖。
本發明為一對稱延伸源極/汲極MOS電晶體,如圖5中繪示者,其中源極與汲極皆延伸遠離閘極與間隔物。此延伸源極/汲極MOS電晶體30包括一傳導閘極32配置於基體34上方,且藉一層絕緣材料36與基體34絕緣。源極區域38與汲極區域40形成於此基體34中,具有與基體(或基體中的一井)相反的傳導類型。例如,對於P型基體或N型基體中之P型井,源極與汲極區域38/40具有N型傳導性。絕緣間隔物42形成於閘極32之橫向側邊上。基體34中之通道區域46位於閘極32下方。基體34中之LD區域44a於間隔物42下方自通道區域46延伸,且超過間隔物42到達源極區域38。基體34中之LD區域44b於間隔物42下方自通道區域46延伸,且超過間隔物42到達汲極區域40。各個LD區域44a及44b有一部分未配置於間隔物42下方。LD區域44a將通道區域46連接到與間隔物42隔開之源極38。LD區域44b將通道區域46連接到亦與間隔物42隔開之汲極40。閘極32控制通道區域46之傳導性(亦即,閘極32上之一相對正電壓使通道區域 46導通,反之通道區域46為不導通)。
圖6A-6D繪示形成對稱延伸源極/汲極MOS電晶體30之步驟序列。製程從積設或形成於基體34之表面上方的一絕緣層36(例如二氧化矽-統稱氧化物)開始。一傳導層32(例如多晶矽-即poly)積設於氧化層36上方(例如藉由積設一非傳導無摻雜的多晶矽層,該多晶矽層而後藉由諸如源極-汲極植入之後續植入使其變成可傳導)。一遮罩材料50積設於多晶矽層32上方,此後接續一光微影製程用於選擇地移除部分遮罩材料,暴露多晶矽層32之選定區域。至此所得之結構顯示於圖6A中。
使用一非等向性多晶矽蝕刻來移除多晶矽層32之暴露部分,而暴露出部分氧化層36。多晶矽層32之剩餘部分構成閘極。使用第一次摻雜劑植入製程在基體34鄰近閘極32之部分中形成LD區域44a及44b。圖6B顯示在遮罩材料50被移除後所得之結構。
絕緣材料製成之間隔物42鄰近閘極32形成。間隔物的形成在業界中為熟知,且涉及絕緣材料或多重材料積設於一結構之輪廓上方,此後接續一非等向性蝕刻製程,藉此,該結構之水平表面上的材料被移除,但在該結構30(有一圓形上表面)之垂直方向表面上的材料則保有大部分的完整。較好地,間隔物42由氧化物及氮化物形成,其中一層氧化物及另一層氮化物積設於該結構上方,此後接續一非等向性蝕刻,其移除鄰近閘極32之垂直側邊的部分以外的氮化物及氧化物。一遮罩光阻52塗佈於該結構上 方,此後接續一光微影製程,以選擇性地移除部分光阻52,而暴露出閘極32及基體34之目標位置,此等目標位置與閘極32及間隔物42隔開。圖6C顯示至此所得之結構。
使用第二次植入製程將摻雜劑植入閘極32及基體34之暴露部分,以形成源極與汲極區域38/40(其與閘極32及間隔物42分開),如同圖6D所示。而後光阻52被移除以得到圖5之結構。
利用此種設計,可得到無錯誤的佈局。此允許於與源極/汲極植入相同的植入步驟中同時摻雜多晶矽閘極32,因而減少一額外的遮罩步驟。一薄的多晶矽層可用於閘極32,且閘極32與基體34(源極/汲極區域38/40)二者中仍可達到想要的摻雜。LD區域44a/44b摻雜得比源極汲極區域38/40更輕微(亦即每單位體積的摻雜劑濃度較小)。藉由延伸較重摻雜之源極/汲極接面遠離閘極邊緣,位於閘極32下方之接面輪廓呈漸進狀且摻雜得較不重,其造成1)尖峰電場降低,及2)改善的閘極二極體崩潰(藉由使高電場移離閘極32)。針對延伸源極/汲極PMOS電晶體及延伸源極/汲極NMOS電晶體二者,可得到較高崩潰電壓。
應了解的是本發明並不限制於上述及本文所說明之諸實施例,而是包含落在後附申請專利範圍之範圍內的任何以及所有變化。例如,在此本發明之參考敘述並不欲限制任何請求項或請求項用語的範圍,而是只要論述可為一或多個請求項涵蓋的一或多個特徵。上述所提之材料、製程及數值實例僅為範例,且不應視為限制申請專利 範圍。此外,如同從申請專利範圍及說明書顯而易見的,不是所有方法步驟均需按所述或請求之精確順序實行,而是可按允許適當形成本發明MOS電晶體之任何順序來實行。單一的材料層可當作此種或相似材料的多重層來形成,且反之亦然。最後,圖5顯示一對稱延伸源極/汲極NMOS電晶體(在P型基體中以N+摻雜劑形成),然而本發明可具現為一對稱延伸源極/汲極PMOS電晶體(在P型基體34之一N型井54中以P+摻雜劑形成),如同圖7中所繪示。
應注意的是,如同本文所使用地,「在……上方」及「在……上」等用語,均包括「直接在……上」(無中間材料、元件或空間配置於其間)及「間接在……上」(有中間材料、元件或空間配置於其間)。同樣地,「鄰近」一詞包括「緊鄰」(無中間材料、元件或空間配置於其間)及「間接相鄰」(有中間材料、元件或空間配置於其間)。例如,形成一元件「於一基體上方」可包括形成該元件直接於該基體上,而無中間材料/元件位於其間;以及形成該元件間接於該基體上,而有一或多個中間材料/元件位於其間。
2‧‧‧MOS電晶體
4‧‧‧傳導閘極
6‧‧‧基體
8‧‧‧絕緣材料
10‧‧‧源極區域
12‧‧‧汲極區域
14‧‧‧絕緣間隔物
16‧‧‧通道區域

Claims (6)

  1. 一種電晶體,包含:一基體;配置於該基體上方且與其絕緣之一傳導閘極,其中在該基體中之一通道區域配置於該傳導閘極下方;位於該基體上方且側向鄰近該傳導閘極之一第一側邊由絕緣材料構成的一第一間隔物;位於該基體上方且側向鄰近該傳導閘極之相對於該第一側邊之一第二側邊由絕緣材料構成的一第二間隔物;形成於該基體中且鄰近但橫向隔離於該傳導閘極之該第一側邊及該第一間隔物的一源極區域;形成於該基體中且鄰近但橫向隔離於該傳導閘極之該第二側邊及該第二間隔物的一汲極區域;形成於該基體中且在該通道區域與該源極區域間橫向延伸之一第一LD區域,其中該第一LD區域具有配置於該第一間隔物下方之一第一部分、及未配置於該等第一及第二間隔物下方且未配置於該傳導閘極下方之一第二部分,且其中該第一LD區域之一摻雜劑濃度少於該源極區域之一摻雜劑濃度;及形成於該基體中且在該通道區域與該汲極區域間橫向延伸之一第二LD區域,其中該第二LD區域具有配置於該第二間隔物下方之一第一部分、及未配置於該等 第一及第二間隔物下方且未配置於該傳導閘極下方之一第二部分,且其中該第二LD區域之一摻雜劑濃度少於該汲極區域之一摻雜劑濃度。
  2. 如請求項1之電晶體,其中:該第一LD區域之一邊緣對齊於該傳導閘極之該第一側邊;及該第二LD區域之一邊緣對齊於該傳導閘極之該第二側邊。
  3. 如請求項1之電晶體,其中該傳導閘極藉由一層絕緣材料與該基體絕緣,且其中該等第一及第二間隔物緊鄰於該層絕緣材料及該傳導閘極。
  4. 一種形成電晶體之方法,包含:形成位於一基體上方且與其絕緣之一傳導閘極,其中該基體中之一通道區域配置於該傳導閘極下方;實行一第一次植入將摻雜劑植入鄰近該傳導閘極之相對立第一及第二側邊的該基體之部分中,以在該基體中分別形成第一及第二LD區域;在該基體中形成位於該第一LD區域上方且側向鄰近該傳導閘極之該第一側邊由絕緣材料構成之一第一間隔物;在該基體中形成位於該第二LD區域上方且側向鄰近該傳導閘極之該第二側邊由絕緣材料構成之一第二間隔物;形成至少在該基體橫向緊鄰該等第一及第二間隔 物之部分上方延伸,但至少讓該基體橫向隔離於該等第一及第二間隔物之部分保持暴露的遮罩材料;實行一第二次植入將摻雜劑植入該基體之暴露部分,以在基體中形成鄰近但橫向隔離於該傳導閘極之該第一側邊及該第一間隔物的一源極區域,且在基體中形成鄰近但橫向隔離於該傳導閘極之該第二側邊及該第二間隔物的一汲極區域;其中該第一LD區域在該通道區域及該源極區域間橫向延伸,且具有配置於該第一間隔物下方之一第一部分、及未配置於該等第一及第二間隔物下方且未配置於該傳導閘極下方之一第二部分,且其中該第一LD區域之一摻雜劑濃度少於該源極區域之一摻雜劑濃度;及其中該第二LD區域在該通道區域及該汲極區域間橫向延伸,且具有配置於該第二間隔物下方之一第一部分、及未配置於該等第一及第二間隔物下方且未配置於該傳導閘極下方之一第二部分,且其中該第二LD區域之一摻雜劑濃度少於該汲極區域之一摻雜劑濃度。
  5. 如請求項4之方法,其中:形成該遮罩材料更包括讓該傳導閘極的至少一部分保持暴露;及實行該第二次植入更包括同時將摻雜劑植入該傳導閘極與該基體之該等暴露部分。
  6. 如請求項4之方法,其中該遮罩材料更於該等第一及第二間隔物上方延伸。
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