TWI509810B - Thin-film transistor,manufacturing method thereof, and liquid crystal display - Google Patents
Thin-film transistor,manufacturing method thereof, and liquid crystal display Download PDFInfo
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- TWI509810B TWI509810B TW099124143A TW99124143A TWI509810B TW I509810 B TWI509810 B TW I509810B TW 099124143 A TW099124143 A TW 099124143A TW 99124143 A TW99124143 A TW 99124143A TW I509810 B TWI509810 B TW I509810B
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- 239000010409 thin film Substances 0.000 title claims description 46
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 18
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000010408 film Substances 0.000 claims description 181
- 229910052732 germanium Inorganic materials 0.000 claims description 78
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 78
- 239000000758 substrate Substances 0.000 claims description 30
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 19
- 229920005591 polysilicon Polymers 0.000 claims description 19
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims description 2
- 238000000137 annealing Methods 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 230000001568 sexual effect Effects 0.000 claims 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 43
- 239000007789 gas Substances 0.000 description 10
- 239000011521 glass Substances 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 7
- DIOQZVSQGTUSAI-UHFFFAOYSA-N decane Chemical compound CCCCCCCCCC DIOQZVSQGTUSAI-UHFFFAOYSA-N 0.000 description 6
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052707 ruthenium Inorganic materials 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910052769 Ytterbium Inorganic materials 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02678—Beam shaping, e.g. using a mask
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78609—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
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- H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Description
本發明係關於一種逆交錯(inversely staggered)構造的薄膜電晶體，特別是關於一種適合應用在液晶顯示裝置的顯示部的畫素電晶體上的薄膜電晶體及其製造方法與液晶顯示裝置。The present invention relates to a thin film transistor of an inversely staggered structure, and more particularly to a thin film transistor suitable for use in a pixel transistor of a display portion of a liquid crystal display device, a method of manufacturing the same, and a liquid crystal display device.
逆交錯構造的薄膜電晶體，係在絶緣性基板上以Cr或Al等的金屬層形成閘電極，接著，在包含該閘電極在內的基板上形成例如SiN膜作為閘絶緣膜，之後，在整個表面上形成氫化非晶矽(以下記載為a-Si:H)膜，製得非晶矽電晶體。該非晶矽電晶體更在a-Si:H膜上形成例如n+ Si膜，並將a-Si:H膜以及n+ Si膜在閘電極上的既定區域以圖案成形方式成形為島狀，然後進一步以金屬層形成源、汲電極，之後，以該源、汲電極作為遮罩對n+ Si膜進行蝕刻，將通道區域預定區域的上方的n+ Si膜除去，以在a-Si:H膜與SiN閘絶緣膜的交界處，形成通道區域，之後，在整個表面上形成保護膜，便告完成。由於該逆交錯構造的非晶矽薄膜電晶體的閉電流IOFF 很小，故可當作例如液晶顯示裝置的畫素電晶體使用。In the reverse-staggered thin film transistor, a gate electrode is formed on a metal substrate such as Cr or Al on an insulating substrate, and then, for example, a SiN film is formed as a gate insulating film on a substrate including the gate electrode, and then A hydrogenated amorphous germanium (hereinafter referred to as a-Si:H) film was formed on the entire surface to obtain an amorphous germanium transistor. The amorphous germanium transistor further forms, for example, an n + Si film on the a-Si:H film, and forms a predetermined region of the a-Si:H film and the n + Si film on the gate electrode into an island shape by pattern forming. then a metal layer is further formed a source, drain electrode, and then, to the source and drain electrode as a mask for the n + Si film is etched, the top of the n-channel region of a predetermined area + Si film is removed, to the a-Si: At the junction of the H film and the SiN gate insulating film, a channel region is formed, and then a protective film is formed on the entire surface, which is completed. Since the amorphous 矽 thin film transistor of the reverse staggered structure has a small closed current I OFF , it can be used as a pixel transistor of, for example, a liquid crystal display device.
然而，非晶矽電晶體由於在通道區域上使用a-Si:H膜，故在通道區域中的電荷移動度很小為其缺點。近來，有文獻提出一種液晶顯示裝置，其在基板的周邊部位形成驅動電路，該基板形成有畫素部，在該液晶顯示裝置中，非晶矽電晶體雖然足以當作畫素部的畫素電晶體使用，但若要當作需要更高速覆寫的周邊驅動電路的構成電晶體，其通道區域的電荷移動度太小，在使用上有其困難。However, since the amorphous germanium transistor uses the a-Si:H film on the channel region, the degree of charge mobility in the channel region is small, which is a disadvantage. Recently, there has been proposed a liquid crystal display device in which a driving circuit is formed at a peripheral portion of a substrate, and the substrate is formed with a pixel portion in which an amorphous germanium transistor is sufficient as a pixel of a pixel portion. The transistor is used, but if it is to constitute a transistor which requires a higher speed overwrite peripheral driving circuit, the charge mobility of the channel region is too small, which is difficult to use.
然後，有文獻提出一種逆交錯構造的低溫多晶矽電晶體，其對a-Si照射雷射使其退火，讓a-Si結晶為多結晶矽(以下稱為多晶矽)，以在通道區域上形成多晶矽膜(專利文獻1)。Then, a low-temperature polycrystalline germanium transistor with an inverse staggered structure is proposed in the literature, which irradiates a-Si with a laser to anneal it, and a-Si crystallizes into a polycrystalline germanium (hereinafter referred to as polycrystalline germanium) to form polycrystalline germanium on the channel region. Film (Patent Document 1).
專利文獻1所記載的低溫多晶矽電晶體以如下方式形成。亦即，如圖7所示的，在玻璃基板101上形成Cr或是Al等的閘電極102，然後，在包含閘電極102在內的基板101的整個表面上形成由SiN所構成的閘絶緣膜103，然後在其上形成厚度10～40nm的a-Si:H膜。然後，對該a-Si:H膜讓以直線狀照射雷射光束的雷射照射構件沿著與該直線垂直的方向掃描，以在a-Si:H膜的整個表面上照射準分子雷射光使其退火，將a-Si:H膜整個重組為多晶矽膜104。然後，在重組後的多晶矽膜104上再度形成a-Si:H膜105，接著，在a-Si:H膜105上形成n+ Si膜106，將該等n+ Si膜106、a-Si:H膜105以及多晶矽膜104，在閘電極102的上方蝕刻加工成島狀。然後，在該3層島狀Si膜上形成源、汲電極107，把該源、汲電極107當作遮罩，除去n+ Si膜106，之後，在整個表面上形成保護膜108。The low-temperature polycrystalline germanium transistor described in Patent Document 1 is formed as follows. That is, as shown in FIG. 7, a gate electrode 102 of Cr or Al is formed on the glass substrate 101, and then a gate insulating layer composed of SiN is formed on the entire surface of the substrate 101 including the gate electrode 102. The film 103 is then formed thereon to form an a-Si:H film having a thickness of 10 to 40 nm. Then, the a-Si:H film is irradiated with a laser beam irradiated with a laser beam in a straight line in a direction perpendicular to the line to irradiate the excimer laser light on the entire surface of the a-Si:H film. It was annealed, and the a-Si:H film was entirely reorganized into a polycrystalline germanium film 104. Then, an a-Si:H film 105 is formed again on the recrystallized polysilicon film 104, and then an n + Si film 106 is formed on the a-Si:H film 105, and the n + Si film 106, a-Si The H film 105 and the polysilicon film 104 are etched into an island shape above the gate electrode 102. Then, a source and germanium electrode 107 are formed on the three-layer island-shaped Si film, and the source and germanium electrodes 107 are used as a mask to remove the n + Si film 106, and then a protective film 108 is formed on the entire surface.
如是形成之低溫多晶矽電晶體，通道區域是以多晶矽膜104與a-Si:H膜105這2層膜層所構成，由於多晶矽膜104與SiN閘絶緣膜103接觸，故通道區域的電荷移動度很快，開電流很高，動作速度變快，因此可當作液晶顯示裝置的周邊驅動電路用的電晶體使用。In the case of the formed low-temperature polycrystalline germanium transistor, the channel region is composed of two layers of a polysilicon film 104 and an a-Si:H film 105. Since the polysilicon film 104 is in contact with the SiN gate insulating film 103, the charge mobility of the channel region is obtained. Very quickly, the on-current is high and the operation speed is fast, so it can be used as a transistor for the peripheral drive circuit of the liquid crystal display device.
專利文獻1：日本特開平5-63196號公報Patent Document 1: Japanese Patent Laid-Open No. Hei 5-63196
然而，上述習知的低溫多晶矽電晶體，開電流很高，閉電流也很高，電位保持特性很低，同時漏洩電流變多，故消耗電力較高是其問題點。However, the above-mentioned conventional low-temperature polycrystalline germanium transistor has a high on-current, a high closed current, a low potential retention characteristic, and a large leakage current, so that high power consumption is a problem.
有鑑於上述問題點，本發明之目的在於提供一種薄膜電晶體，其包含閉電流較小、電位保持特性優異、消耗電力較低且動作速度較快的低溫多晶矽電晶體，更提供該薄膜電晶體的製造方法以及使用該薄膜電晶體的液晶顯示裝置。In view of the above problems, an object of the present invention is to provide a thin film transistor comprising a low-temperature polycrystalline germanium transistor having a small closed current, excellent potential retention characteristics, low power consumption, and fast operation speed, and a thin film transistor. A manufacturing method and a liquid crystal display device using the thin film transistor.
本發明提供一種逆交錯構造的薄膜電晶體，包含：絶緣性基板；閘電極，其形成於該絶緣性基板上；閘絶緣膜，其形成於該閘電極上；島狀的多晶矽膜，其形成於該閘絶緣膜上的對應於該閘電極的位置上；非晶矽膜，其設置成覆蓋該多晶矽膜的頂面以及側面；以及源、汲電極，其設置成與該非晶矽膜的兩端部電性連接。The present invention provides an inversely staggered thin film transistor comprising: an insulating substrate; a gate electrode formed on the insulating substrate; a gate insulating film formed on the gate electrode; and an island-shaped polycrystalline germanium film formed a position corresponding to the gate electrode on the gate insulating film; an amorphous germanium film disposed to cover a top surface and a side surface of the polysilicon film; and a source and a germanium electrode disposed to be opposite to the amorphous germanium film The ends are electrically connected.
該閘絶緣膜為例如SiN膜。The gate insulating film is, for example, a SiN film.
本發明更提供一種逆交錯構造的薄膜電晶體的製造方法，包含：閘電極形成步驟，其在絶緣性基板上形成閘電極；閘絶緣膜形成步驟，其在包含該閘電極在內的該基板上形成閘絶緣膜；第1非晶矽膜形成步驟，其在該閘絶緣膜上形成第1非晶矽膜；重組步驟，對該第1非晶矽膜在對應於該閘電極的島狀區域上照射雷射光將該區域重組為多晶矽膜；第2非晶矽膜形成步驟，其在該重組多晶矽區域以及第1非晶矽區域上形成第2非晶矽膜；除去步驟，其留下覆蓋該重組多晶矽膜的頂面以及側面的非晶矽膜並將其他部分的非晶矽膜除去；以及源、汲電極形成步驟，其形成與所殘留之非晶矽膜的兩端部電性連接的源、汲電極。另外，上述非晶矽膜，除了不包含氫的膜層(a-Si膜)之外，亦有包含氫的氫化非晶矽膜(a-Si:H膜)等膜層。The present invention further provides a method for fabricating a thin film transistor of an inversely staggered structure, comprising: a gate electrode forming step of forming a gate electrode on an insulating substrate; and a gate insulating film forming step of the substrate including the gate electrode Forming a gate insulating film; forming a first amorphous germanium film forming a first amorphous germanium film on the gate insulating film; and recomposing the first amorphous germanium film in an island shape corresponding to the gate electrode The region irradiates the laser light to recombine the region into a polycrystalline germanium film; the second amorphous germanium film forming step forms a second amorphous germanium film on the recombined polycrystalline germanium region and the first amorphous germanium region; and the removing step leaves Covering the top and side amorphous ruthenium film of the recombined polycrystalline ruthenium film and removing other portions of the amorphous ruthenium film; and forming a source and a ruthenium electrode, forming and electrically connecting the two ends of the remaining amorphous ruthenium film Connected source, 汲 electrode. Further, the amorphous germanium film includes a film layer (a-Si film) containing no hydrogen, and a film layer such as a hydrogenated amorphous germanium film (a-Si:H film) containing hydrogen.
在該雷射光的照射步驟中，利用配置複數個微透鏡的微透鏡陣列集中雷射光得到複數雷射光束，配置成矩陣狀的複數個薄膜電晶體的該島狀區域受各雷射光束照射，便可形成複數個薄膜電晶體的多晶矽區域。In the step of irradiating the laser light, the laser beam is concentrated by using a microlens array in which a plurality of microlenses are arranged to obtain a plurality of laser beams, and the island regions of the plurality of thin film transistors arranged in a matrix are irradiated by the respective laser beams. A polycrystalline germanium region of a plurality of thin film transistors can be formed.
另外，本發明之液晶顯示裝置將該薄膜電晶體當作顯示部的畫素電晶體以及周邊驅動電路的驅動電晶體使用。Further, the liquid crystal display device of the present invention uses the thin film transistor as a pixel transistor of a display portion and a driving transistor of a peripheral driving circuit.
若利用本發明之薄膜電晶體，由於在SiN膜等的閘絶緣膜與多晶矽膜的分界處形成通道區域，故電荷的移動速度較快，開電流較高，寫入速度較快，因此動作速度也較快。然後，由於多晶矽膜的側面被非晶矽膜覆蓋，該非晶矽膜的電荷移動速度很慢，故比起非晶矽膜不存在的情況更能降低漏洩電流，電位的保持特性優異，且可減少消耗電力。According to the thin film transistor of the present invention, since a channel region is formed at a boundary between a gate insulating film of a SiN film or the like and a polysilicon film, the charge movement speed is fast, the on current is high, and the writing speed is fast, so the operation speed Also faster. Then, since the side surface of the polycrystalline germanium film is covered by the amorphous germanium film, the charge transport speed of the amorphous germanium film is very slow, so that the leakage current can be reduced more than the case where the amorphous germanium film is not present, and the potential retention property is excellent, and Reduce power consumption.
另外，若利用本發明之薄膜電晶體的製造方法，由於對第1非晶矽膜在對應閘電極的島狀區域上局部照射雷射光，將該區域重組為多晶矽膜，而且在該多晶矽膜以及第1非晶矽膜上於形成第2非晶矽膜之後形成由該多晶矽膜以及覆蓋該多晶矽膜的側面以及頂面的非晶矽膜所構成的通道區域，故可更容易地製造本發明的薄膜電晶體。Further, according to the method for producing a thin film transistor of the present invention, the first amorphous germanium film is partially irradiated with laser light on an island-like region corresponding to the gate electrode, and the region is recombined into a polycrystalline germanium film, and the polycrystalline germanium film and the polycrystalline germanium film are On the first amorphous germanium film, after forming the second amorphous germanium film, a channel region composed of the polycrystalline germanium film and the amorphous germanium film covering the side surface and the top surface of the poly germanium film is formed, so that the present invention can be more easily manufactured. Thin film transistor.
另外，若利用本發明之液晶顯示裝置，則驅動電路的動作較快，漏洩電流較少，且消耗電力較低。Further, according to the liquid crystal display device of the present invention, the driving circuit operates faster, has less leakage current, and consumes less power.
以下，參照附圖具體說明本發明的實施形態。圖1表示本發明之薄膜電晶體的實施態樣，圖2為液晶顯示裝置的顯示部的1個畫素的俯視圖。在液晶顯示裝置中，配置有顯示部，以及位於該顯示部的周邊部位的驅動用周邊電路，在顯示部中，如圖2所示的，複數條的掃描線SL與複數條的信號線DL互相垂直，該掃描線SL與信號線DL所包圍的單位區域形成1個畫素。各畫素形成由ITO(Indium Tin Oxide)所構成的透明電極TE與開關電晶體T，該電晶體T的閘電極與掃描線SL連接，電晶體T的汲電極與信號線DL連接，源電極與由ITO所構成的透明電極TE連接。Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. Fig. 1 shows an embodiment of a thin film transistor of the present invention, and Fig. 2 is a plan view of one pixel of a display portion of a liquid crystal display device. In the liquid crystal display device, a display portion and a peripheral circuit for driving in a peripheral portion of the display portion are disposed. In the display portion, as shown in FIG. 2, a plurality of scanning lines SL and a plurality of signal lines DL are formed. Vertically to each other, the scanning line SL forms a pixel with a unit area surrounded by the signal line DL. Each of the pixels forms a transparent electrode TE composed of ITO (Indium Tin Oxide) and a switching transistor T. The gate electrode of the transistor T is connected to the scanning line SL, and the germanium electrode of the transistor T is connected to the signal line DL. It is connected to a transparent electrode TE composed of ITO.
圖1(a)為電晶體1(T)的俯視圖，圖1(b)為沿著圖1(a)的B-B線段的剖面圖，圖1(c)為沿著圖1(a)的C-C線段的剖面圖。如圖1(a)所示的，在電晶體T之中，該閘電極G與掃描線SL連接，該汲電極D與信號線DL連接，源電極S與透明電極TE連接。構成通道區域的島狀部IL形成於閘電極G的上方，汲電極D以及源電極S在島狀部IL的上方隔著適當長度的間隔互相對向。1(a) is a plan view of the transistor 1 (T), FIG. 1(b) is a cross-sectional view taken along line BB of FIG. 1(a), and FIG. 1(c) is a CC along FIG. 1(a) A section view of the line segment. As shown in FIG. 1(a), in the transistor T, the gate electrode G is connected to the scanning line SL, the germanium electrode D is connected to the signal line DL, and the source electrode S is connected to the transparent electrode TE. The land portion IL constituting the channel region is formed above the gate electrode G, and the ytterbium electrode D and the source electrode S face each other with an interval of an appropriate length above the island portion IL.
如圖1(b)以及圖1(c)所示的，在本實施形態的薄膜電晶體1(T)中，於透明絶緣性的玻璃基板10上，形成與掃描線SL連接的閘電極11(G)，在包含該閘電極11在內的基板10上，形成由SiN所構成的閘絶緣膜12。閘電極11，係Cr或Al等金屬的金屬層，可用濺鍍法形成。在閘絶緣膜12上，於閘電極11上方的位置，形成島狀部(IL)的多晶矽膜13，並以包覆該多晶矽膜13的頂面以及側面的方式，形成氫化非晶矽膜(以下稱為a-Si:H膜)14。以在該a-Si:H膜14的兩端部上重疊的方式，形成與信號線DL連接的汲電極15a(D)以及與畫素的透明電極(TE)連接的源電極15b(S)。然後，在整個表面上形成由SiN所構成的保護膜16。As shown in Fig. 1 (b) and Fig. 1 (c), in the thin film transistor 1 (T) of the present embodiment, the gate electrode 11 connected to the scanning line SL is formed on the transparent insulating glass substrate 10. (G), on the substrate 10 including the gate electrode 11, a gate insulating film 12 made of SiN is formed. The gate electrode 11, which is a metal layer of a metal such as Cr or Al, can be formed by sputtering. On the gate insulating film 12, a polysilicon film 13 of an island portion (IL) is formed at a position above the gate electrode 11, and a hydrogenated amorphous germanium film is formed to cover the top surface and the side surface of the polysilicon film 13 ( Hereinafter referred to as a-Si:H film)14. A germanium electrode 15a (D) connected to the signal line DL and a source electrode 15b (S) connected to the transparent electrode (TE) of the pixel are formed so as to overlap both end portions of the a-Si:H film 14. . Then, a protective film 16 made of SiN is formed on the entire surface.
在如是構成之逆交錯構造的薄膜電晶體中，a-Si:H膜14與汲電極15a以及源電極15b電性連接，該a-Si:H膜14與多晶矽膜13形成通道區域。然後，在電晶體動作時，電荷在多晶矽膜13與SiN閘絶緣膜12的交界處產生，由於該交界處可移動，故本實施形態的薄膜電晶體，電荷移動度較高，開電流也較高。如是，本實施形態的薄膜電晶體，由於開電流較高，故寫入時間較短，可高速動作。In the thin film transistor having the reverse staggered structure, the a-Si:H film 14 is electrically connected to the ytterbium electrode 15a and the source electrode 15b, and the a-Si:H film 14 and the polysilicon film 13 form a channel region. Then, when the transistor operates, electric charges are generated at the boundary between the polysilicon film 13 and the SiN gate insulating film 12, and since the interface is movable, the thin film transistor of the present embodiment has a higher charge mobility and an open current. high. As a result, in the thin film transistor of the present embodiment, since the on-current is high, the writing time is short and the operation can be performed at high speed.
而且，由於在由該多晶矽膜13所構成的島狀部的周圍，亦即，在多晶矽膜13的側面，形成非晶質a-Si:H膜14，故把島狀部的周圍當作路徑的漏洩電流較少，閉電流較低。如是，由於閉電流較低，電位的保持特性較優異，故能夠防止液晶顯示裝置的顯示部的畫素電晶體的電位隨著時間的經過而降低。像這樣，若利用本實施形態，便能夠得到開電流較高、閉電流較低的電晶體。因此，該電晶體可高速動作，而且電位保持特性較優異，消耗電力較小。Further, since the amorphous a-Si:H film 14 is formed around the island portion composed of the polysilicon film 13, that is, on the side surface of the polysilicon film 13, the periphery of the island portion is regarded as a path. The leakage current is less and the closed current is lower. As a result, since the closed current is low and the potential holding property is excellent, it is possible to prevent the potential of the pixel transistor of the display portion of the liquid crystal display device from decreasing with the passage of time. As described above, according to the present embodiment, it is possible to obtain a transistor having a high open current and a low closed current. Therefore, the transistor can operate at a high speed, and the potential holding characteristics are excellent, and the power consumption is small.
接著，說明具備上述構造之薄膜電晶體的製造方法。圖4(a)至(c)、圖5(a)至(c)以及圖6(a)至(c)，係以步驟順序表示本實施形態的製造方法的剖面圖。如圖4(a)所示的，在玻璃基板1上，以濺鍍方式形成厚度為例如2000～3000的由Mo、Cr或Al等金屬膜所構成的閘電極2。該閘電極可與掃描線SL同時以圖案成形方式形成於玻璃基板1上。Next, a method of manufacturing a thin film transistor having the above structure will be described. 4(a) to 4(c), Figs. 5(a) to 5(c), and Figs. 6(a) to 6(c) are cross-sectional views showing the manufacturing method of the present embodiment in order of steps. As shown in FIG. 4(a), a thickness of, for example, 2000 to 3000 is formed on the glass substrate 1 by sputtering. A gate electrode 2 made of a metal film such as Mo, Cr or Al. The gate electrode can be formed on the glass substrate 1 in a pattern forming manner simultaneously with the scanning line SL.
接著，如圖4(b)所示的，以例如矽烷以及H2 氣體作為原料氣體，利用250～300℃的低溫電漿CVD法，在整個表面上形成厚度例如2500～5000且由SiN膜所構成的閘絶緣膜3。之後，如圖4(c)所示的，在閘絶緣膜3上，以例如電漿CVD法，形成厚度例如200～1000的第1 a-Si:H膜4a。該a-Si:H膜4a，係在SiN膜形成之後，在不將基板送出到空氣中的情況下，直接移動到別的處理室連續進行成膜的。a-Si：H膜4a，係以矽烷、氨與H2 氣體作為原料氣體進行成膜，惟H2 氣體是為了改善膜質而混合的物質，故其添加可任意為之。之後，取出基板，對a-Si:H膜4a，藉由使用圖3(a)所示之微透鏡陣列的雷射退火，對通道區域形成預定區域照射雷射光使其退火，將該通道區域形成預定區域多結晶化，形成多晶矽膜4。Next, as shown in FIG. 4(b), a low-temperature plasma CVD method of 250 to 300 ° C is used to form a thickness of, for example, 2,500 to 5,000 over the entire surface, using, for example, decane and H 2 gas as source gases. And a gate insulating film 3 composed of a SiN film. Thereafter, as shown in FIG. 4(c), a thickness of, for example, 200 to 1000 is formed on the gate insulating film 3 by, for example, a plasma CVD method. The first a-Si:H film 4a. The a-Si:H film 4a is formed by continuously moving to another processing chamber to form a film after the SiN film is formed, without sending the substrate into the air. The a-Si:H film 4a is formed by using decane, ammonia, and H 2 gas as a material gas. However, since the H 2 gas is a substance which is mixed for the purpose of improving the film quality, it may be added arbitrarily. Thereafter, the substrate is taken out, and the a-Si:H film 4a is irradiated with laser light by a laser annealing of the microlens array shown in FIG. 3(a) to anneal a predetermined region of the channel region to anneal the channel region. The predetermined region is formed into a polycrystal to form a polycrystalline germanium film 4.
如圖3所示的，使用該微透鏡陣列之雷射退火裝置，利用透鏡群32將光源31射出的雷射光形成為平行光束，並透過微透鏡陣列35照射被照射體36。雷射光源31係例如波長為308nm或是353nm的雷射光以例如50Hz的反覆週期放射的準分子雷射。微透鏡陣列35，係在透明基板34上配置複數個微透鏡35的構件，可使雷射光集中在薄膜電晶體形成區域上，該薄膜電晶體形成區域設定在作為被照射體36的薄膜電晶體基板上。透明基板34設置成與被照射體36平行，微透鏡35以電晶體形成區域的排列節距的2以上的整數倍(例如2)的節距排列。本實施形態的被照射體36係薄膜電晶體1，在圖4(c)所示的通道區域形成預定區域受到由微透鏡35所集中的雷射光照射。另外，被透鏡群32調整為平行光束的雷射光束，在其行進途中配置遮光構件33，該遮光部材33可將微透鏡34所集中的對被照射體36照射的雷射光束的光束形狀調整為例如矩形。因此，如圖1(a)所示的，即使通道區域形成預定區域是矩形，亦可利用微透鏡34選擇性照射該區域。As shown in FIG. 3, the laser annealing device of the microlens array uses the lens group 32 to form the laser beam emitted from the light source 31 into a parallel beam, and irradiates the object 36 through the microlens array 35. The laser light source 31 is, for example, a excimer laser that emits laser light having a wavelength of 308 nm or 353 nm at a repetition period of, for example, 50 Hz. The microlens array 35 is a member in which a plurality of microlenses 35 are disposed on the transparent substrate 34, and the laser light can be concentrated on the thin film transistor formation region, and the thin film transistor formation region is set in the thin film transistor as the irradiated body 36. On the substrate. The transparent substrate 34 is disposed in parallel with the object to be irradiated 36, and the microlenses 35 are arranged at a pitch of an integral multiple of 2 or more (for example, 2) of the arrangement pitch of the transistor formation regions. The irradiated body 36 of the present embodiment is a thin film transistor 1, and is irradiated with laser light concentrated by the microlens 35 in a predetermined region in which the channel region shown in FIG. 4(c) is formed. Further, the laser beam adjusted to be a parallel beam by the lens group 32 is provided with a light shielding member 33 which can adjust the beam shape of the laser beam irradiated to the object 36 by the microlens 34 during the traveling. For example, a rectangle. Therefore, as shown in Fig. 1(a), even if the channel region forming predetermined region is rectangular, the microlens 34 can be used to selectively illuminate the region.
接著，如圖5(a)所示的，在多晶矽膜4以及第1 a-Si:H膜4a的整個表面上形成厚度例如2000～3000的第2 a-Si:H膜5a。該第2 a-Si:H膜5a的成膜條件與第1 a-Si:H膜4a的成膜條件相同。之後，不將基板從處理室取出而連續地如圖5(b)所示的在a-Si:H膜5a之上形成厚度例如500左右的n+ Si膜6a。在矽烷中混合含有磷化氫等之P的氣體，以該氣體作為原料氣體，利用電漿CVD便可形成該n+ Si膜6a。此時，亦可在原料氣體中混合H2 氣體。接著，取出基板，如圖5(c)所示的，a-Si:H膜4a、a-Si:H膜5a以及n+ 膜6a僅留下在多晶矽膜4上方的部分，以及在多晶矽膜4的側面的a-Si:H膜4a，其他部分除去，形成島狀的通道區域。Next, as shown in FIG. 5(a), a thickness of, for example, 2000 to 3000 is formed on the entire surface of the polysilicon film 4 and the first a-Si:H film 4a. The 2nd a-Si:H film 5a. The film formation conditions of the second a-Si:H film 5a are the same as those of the first a-Si:H film 4a. Thereafter, the substrate is not taken out from the processing chamber, and a thickness of, for example, 500 is formed on the a-Si:H film 5a as shown in FIG. 5(b) continuously. The left and right n + Si film 6a. A gas containing P such as phosphine is mixed with decane, and the n + Si film 6a can be formed by plasma CVD using the gas as a material gas. At this time, H 2 gas may be mixed in the material gas. Next, the substrate is taken out, as shown in FIG. 5(c), the a-Si:H film 4a, the a-Si:H film 5a, and the n + film 6a remain only in the portion above the polysilicon film 4, and in the polycrystalline germanium film. The a-Si:H film 4a on the side of 4 is removed, and the other portions are removed to form an island-shaped channel region.
之後，如圖6(a)所示的，以接觸n+ Si膜6a的端部的方式，形成厚度例如2000～5000的汲電極7a以及源電極7b。接著，如圖6(b)所示的，以該等汲電極7a以及源電極7b當作遮罩，將n+ Si膜6a蝕刻除去，只在汲電極7a以及源電極7b與a-Si:H膜5之間殘留n+ 膜6。Thereafter, as shown in FIG. 6(a), a thickness of, for example, 2000 to 5000 is formed so as to contact the end portion of the n + Si film 6a. The tantalum electrode 7a and the source electrode 7b. Next, as shown in FIG. 6(b), the n + Si film 6a is etched away by using the germanium electrode 7a and the source electrode 7b as a mask, and only the germanium electrode 7a and the source electrode 7b and a-Si are: The n + film 6 remains between the H films 5.
之後，如圖6(c)所示的，在整個表面上形成由SiN膜所構成的保護膜8。在圖6(c)中，對應圖1(b)的構造的部分的符號用括弧表示。圖6(c)所示之構造，在源、汲電極與a-Si:H膜之間，設置n+ Si膜6此點，與圖1(b)的構造不同。該n+ Si膜6可使源、汲電極與a-Si:H膜之間的密合性提高，並讓接觸電阻降低。然而，是否要形成該n+ Si膜均可，可如圖1所示的不形成n+ Si膜，或是用其他手段來降低源、汲電極與a-Si:H膜之間的接觸電阻。Thereafter, as shown in FIG. 6(c), a protective film 8 composed of a SiN film is formed on the entire surface. In Fig. 6(c), the symbols corresponding to the portions of the configuration of Fig. 1(b) are indicated by parentheses. In the configuration shown in Fig. 6(c), the n + Si film 6 is provided between the source, the germanium electrode and the a-Si:H film, which is different from the structure of Fig. 1(b). The n + Si film 6 can improve the adhesion between the source, the electrode and the a-Si:H film, and lower the contact resistance. However, if the n + Si to form a film can be formed as shown in the n + Si film is not shown, or by other means to reduce the source, drain electrode and a-Si: H film resistance between the contact .
如是，便可製得圖1所示之薄膜電晶體。在上述製造方法中，使用微透鏡陣列，便可只對薄膜電晶體的通道區域照射雷射光束，照射該雷射光束使a-Si:H膜退火，讓通道區域形成預定區域結晶化而形成島狀的多晶矽膜4。因此，便能夠更容易地製造出具備在多晶矽膜13(4)的側面以及頂面覆蓋a-Si:H膜14(4a)之構造的薄膜電晶體。If so, the thin film transistor shown in Fig. 1 can be obtained. In the above manufacturing method, by using the microlens array, only the channel region of the thin film transistor can be irradiated with the laser beam, and the laser beam is irradiated to anneal the a-Si:H film, and the channel region is formed into a predetermined region to be crystallized. Island-shaped polycrystalline tantalum film 4. Therefore, it is possible to more easily manufacture a thin film transistor having a structure in which the side surface of the polysilicon film 13 (4) and the top surface are covered with the a-Si:H film 14 (4a).
另外，從上述說明可知，將本實施形態的逆交錯構造的薄膜電晶體當作液晶顯示裝置的顯示部的畫素電晶體使用，可使顯示部的畫素電晶體高速化並降低漏洩電流，進而使電位更穩定。另外，亦可將本實施形態的逆交錯構造的薄膜電晶體當作液晶顯示裝置的周邊驅動電路的電晶體使用，本實施形態的薄膜電晶體，由於在通道區域使用多晶矽膜，故可高速動作。無論如何，本實施形態的薄膜電晶體，由於開電流較高，閉電流較低，故適合用來當作液晶顯示裝置的電晶體。In addition, as described above, the thin film transistor of the inverse interlaced structure of the present embodiment is used as a pixel transistor of the display portion of the liquid crystal display device, so that the pixel crystal of the display portion can be speeded up and the leakage current can be reduced. In turn, the potential is more stable. Further, the thin film transistor of the inversely interlaced structure of the present embodiment can be used as a transistor of a peripheral driving circuit of a liquid crystal display device, and the thin film transistor of the present embodiment can be operated at a high speed by using a polysilicon film in a channel region. . In any case, the thin film transistor of the present embodiment is suitable for use as a transistor of a liquid crystal display device because of its high open current and low closed current.
本發明有益於製造使用逆交錯構造之薄膜電晶體的液晶顯示裝置。The present invention is advantageous for manufacturing a liquid crystal display device using a thin film transistor of an inverted staggered configuration.
1、10．．．玻璃基板1,10. . . glass substrate
2、11．．．閘電極2, 11. . . Gate electrode
3、12．．．閘絶緣膜3, 12. . . Gate insulating film
4、13．．．多晶矽膜4, 13. . . Polycrystalline germanium film
4a、5、5a、14‧‧‧a-Si：H膜4a, 5, 5a, 14‧‧‧a-Si: H film
6、6a‧‧‧n+ 膜6, 6a‧‧‧n + film
7‧‧‧源、汲電極7‧‧‧Source, electrode
7a、15a‧‧‧汲電極7a, 15a‧‧‧汲 electrode
7b、15b‧‧‧源電極7b, 15b‧‧‧ source electrode
8、16‧‧‧保護膜8, 16‧‧‧ protective film
31‧‧‧光源31‧‧‧Light source
32‧‧‧透鏡群32‧‧‧Lens Group
33‧‧‧遮光構件33‧‧‧ shading members
34‧‧‧透明基板34‧‧‧Transparent substrate
35‧‧‧微透鏡(微透鏡陣列)35‧‧‧Microlens (microlens array)
36‧‧‧被照射體36‧‧‧ irradiated body
101‧‧‧玻璃基板101‧‧‧ glass substrate
102‧‧‧閘電極102‧‧‧ gate electrode
103‧‧‧閘絶緣膜103‧‧‧Brake insulation film
104‧‧‧多晶矽膜104‧‧‧Polysilicon film
105‧‧‧a-Si：H膜105‧‧‧a-Si:H film
106‧‧‧n+ Si膜106‧‧‧n + Si film
107‧‧‧源、汲電極107‧‧‧Source, electrode
108‧‧‧保護膜108‧‧‧Protective film
B-B、C-C‧‧‧剖面線B-B, C-C‧‧‧ hatching
D‧‧‧汲電極D‧‧‧汲 electrode
DL‧‧‧信號線DL‧‧‧ signal line
G‧‧‧閘電極G‧‧‧ gate electrode
S‧‧‧源電極S‧‧‧ source electrode
SL‧‧‧掃描線SL‧‧‧ scan line
T‧‧‧開關電晶體T‧‧‧Switching transistor
TE‧‧‧透明電極TE‧‧‧ transparent electrode
IL‧‧‧島狀部IL‧‧‧ Island
圖1表示本發明之薄膜電晶體的實施態樣，(a)為俯視圖，(b)為沿著(a)的B-B線段的剖面圖，(c)為沿著(a)的C-C線段的剖面圖。BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows an embodiment of a thin film transistor of the present invention, wherein (a) is a plan view, (b) is a cross-sectional view taken along line BB of (a), and (c) is a section along line CC of (a). Figure.
圖2係表示在本發明實施態樣中的液晶顯示裝置的顯示部的1個畫素的俯視圖。2 is a plan view showing one pixel of a display unit of a liquid crystal display device in an embodiment of the present invention.
圖3表示用於本發明之實施態樣的製造方法中的使用微透鏡陣列的雷射照射裝置，(a)為整體圖，(b)表示微透鏡陣列。Fig. 3 shows a laser irradiation apparatus using a microlens array in a manufacturing method of an embodiment of the present invention, (a) being an overall view, and (b) showing a microlens array.
圖4(a)至(c)係表示本發明之實施態樣的薄膜電晶體的製造方法的步驟順序的剖面圖。4(a) to 4(c) are cross-sectional views showing the procedure of a method of manufacturing a thin film transistor according to an embodiment of the present invention.
圖5(a)至(c)係表示本發明之實施態樣的薄膜電晶體的製造方法的步驟順序的剖面圖，其表示圖4接下來的步驟。5(a) to 5(c) are cross-sectional views showing the procedure of a method of manufacturing a thin film transistor according to an embodiment of the present invention, which shows the next step of Fig. 4.
圖6(a)至(c)係表示本發明之實施態樣的薄膜電晶體的製造方法的步驟順序的剖面圖，其表示圖5接下來的步驟。6(a) to 6(c) are cross-sectional views showing the sequence of steps of a method of manufacturing a thin film transistor according to an embodiment of the present invention, which shows the next step of Fig. 5.
圖7係表示習知逆交錯構造的薄膜電晶體的剖面圖。Fig. 7 is a cross-sectional view showing a thin film transistor of a conventional inversely staggered structure.
1、10．．．玻璃基板1,10. . . glass substrate
11．．．閘電極11. . . Gate electrode
12．．．閘絶緣膜12. . . Gate insulating film
13．．．多晶矽膜13. . . Polycrystalline germanium film
14．．．a-Si:H膜14. . . a-Si:H film
15a．．．汲電極15a. . . Helium electrode
15b．．．源電極15b. . . Source electrode
16．．．保護膜16. . . Protective film
B-B、C-C．．．剖面線B-B, C-C. . . Section line
D．．．汲電極D. . . Helium electrode
DL．．．信號線DL. . . Signal line
G．．．閘電極G. . . Gate electrode
S．．．源電極S. . . Source electrode
SL．．．掃描線SL. . . Scanning line
T．．．開關電晶體T. . . Switching transistor
IL．．．島狀部IL. . . Island
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| KR102094568B1 (en) * | 2012-10-17 | 2020-03-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and method for manufacturing the same |
| WO2016072024A1 (en) * | 2014-11-07 | 2016-05-12 | 堺ディスプレイプロダクト株式会社 | Method for manufacturing thin-film transistor, thin-film transistor, and display panel |
| JP6471379B2 (en) | 2014-11-25 | 2019-02-20 | 株式会社ブイ・テクノロジー | Thin film transistor, thin film transistor manufacturing method, and laser annealing apparatus |
| CN104460165B (en) * | 2014-12-31 | 2017-06-16 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display and liquid crystal panel and array base palte |
| US10243003B2 (en) | 2015-03-27 | 2019-03-26 | Sakai Display Products Corporation | Thin film transistor and display panel |
| JPWO2016157351A1 (en) * | 2015-03-30 | 2018-01-18 | 堺ディスプレイプロダクト株式会社 | Thin film transistor and display panel |
| JP6503458B2 (en) * | 2015-04-20 | 2019-04-17 | 堺ディスプレイプロダクト株式会社 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND DISPLAY PANEL |
| WO2017046932A1 (en) * | 2015-09-17 | 2017-03-23 | 堺ディスプレイプロダクト株式会社 | Thin film transistor and method for manufacturing thin film transistor |
| CN108028283B (en) | 2015-09-18 | 2021-03-02 | 堺显示器制品株式会社 | Method for manufacturing thin film transistor and thin film transistor |
| WO2017072921A1 (en) * | 2015-10-29 | 2017-05-04 | 堺ディスプレイプロダクト株式会社 | Thin film transistor substrate manufacturing method |
| CN109075043A (en) | 2016-03-04 | 2018-12-21 | 堺显示器制品株式会社 | Laser anneal device, exposure mask, thin film transistor (TFT) and laser anneal method |
| CN105633101A (en) * | 2016-04-01 | 2016-06-01 | 京东方科技集团股份有限公司 | TFT array substrate and manufacture method thereof, and display device |
| CN105870203B (en) * | 2016-06-24 | 2019-05-10 | 京东方科技集团股份有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array substrate, display device |
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