TWI497673B - 用於窄互相連接開口之大晶粒尺寸傳導結構 - Google Patents
用於窄互相連接開口之大晶粒尺寸傳導結構 Download PDFInfo
- Publication number
- TWI497673B TWI497673B TW099130515A TW99130515A TWI497673B TW I497673 B TWI497673 B TW I497673B TW 099130515 A TW099130515 A TW 099130515A TW 99130515 A TW99130515 A TW 99130515A TW I497673 B TWI497673 B TW I497673B
- Authority
- TW
- Taiwan
- Prior art keywords
- conductive
- opening
- metal
- layer
- forming
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
- H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/041—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being discontinuous
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
- H10W20/034—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/560,878 US7956463B2 (en) | 2009-09-16 | 2009-09-16 | Large grain size conductive structure for narrow interconnect openings |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201126683A TW201126683A (en) | 2011-08-01 |
| TWI497673B true TWI497673B (zh) | 2015-08-21 |
Family
ID=43064611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099130515A TWI497673B (zh) | 2009-09-16 | 2010-09-09 | 用於窄互相連接開口之大晶粒尺寸傳導結構 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7956463B2 (https=) |
| JP (1) | JP5444471B2 (https=) |
| CN (1) | CN102498560A (https=) |
| DE (1) | DE112010003659T5 (https=) |
| GB (1) | GB2485689B (https=) |
| TW (1) | TWI497673B (https=) |
| WO (1) | WO2011032812A1 (https=) |
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| JP5353109B2 (ja) | 2008-08-15 | 2013-11-27 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP5853351B2 (ja) * | 2010-03-25 | 2016-02-09 | ソニー株式会社 | 半導体装置、半導体装置の製造方法、及び電子機器 |
| US8661664B2 (en) * | 2010-07-19 | 2014-03-04 | International Business Machines Corporation | Techniques for forming narrow copper filled vias having improved conductivity |
| CN102790009B (zh) * | 2011-05-16 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | 降低铜电镀工艺中边缘效应的方法及铜互连结构制造方法 |
| US8637400B2 (en) | 2011-06-21 | 2014-01-28 | International Business Machines Corporation | Interconnect structures and methods for back end of the line integration |
| US8492897B2 (en) * | 2011-09-14 | 2013-07-23 | International Business Machines Corporation | Microstructure modification in copper interconnect structures |
| US8648465B2 (en) | 2011-09-28 | 2014-02-11 | International Business Machines Corporation | Semiconductor interconnect structure having enhanced performance and reliability |
| CN103117245A (zh) * | 2011-11-17 | 2013-05-22 | 盛美半导体设备(上海)有限公司 | 空气隙互联结构的形成方法 |
| US9190323B2 (en) | 2012-01-19 | 2015-11-17 | GlobalFoundries, Inc. | Semiconductor devices with copper interconnects and methods for fabricating same |
| JP6360276B2 (ja) * | 2012-03-08 | 2018-07-18 | 東京エレクトロン株式会社 | 半導体装置、半導体装置の製造方法、半導体製造装置 |
| US8836124B2 (en) * | 2012-03-08 | 2014-09-16 | International Business Machines Corporation | Fuse and integrated conductor |
| CN102664193A (zh) * | 2012-04-01 | 2012-09-12 | 京东方科技集团股份有限公司 | 导电结构及制造方法、薄膜晶体管、阵列基板和显示装置 |
| DE102012210480B4 (de) * | 2012-06-21 | 2024-05-08 | Robert Bosch Gmbh | Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung |
| US8722534B2 (en) | 2012-07-30 | 2014-05-13 | Globalfoundries Inc. | Method for reducing wettability of interconnect material at corner interface and device incorporating same |
| US9514983B2 (en) * | 2012-12-28 | 2016-12-06 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
| US10032712B2 (en) | 2013-03-15 | 2018-07-24 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor structure |
| DE102013104464B4 (de) * | 2013-03-15 | 2019-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleiterstruktur |
| CN104103573B (zh) * | 2013-04-02 | 2017-06-16 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US9997457B2 (en) | 2013-12-20 | 2018-06-12 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
| US9184134B2 (en) * | 2014-01-23 | 2015-11-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device structure |
| CN104952786B (zh) * | 2014-03-25 | 2018-07-10 | 中芯国际集成电路制造(上海)有限公司 | 电互连结构及其形成方法 |
| US10079174B2 (en) | 2014-04-30 | 2018-09-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Composite contact plug structure and method of making same |
| DE102014109352B4 (de) * | 2014-04-30 | 2019-12-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Zusammengesetzte kontaktstöpsel-struktur und verfahren zur herstellung |
| CN105097648B (zh) * | 2014-05-04 | 2018-02-16 | 中芯国际集成电路制造(上海)有限公司 | 互连结构的形成方法 |
| US9613907B2 (en) | 2014-07-29 | 2017-04-04 | Samsung Electronics Co., Ltd. | Low resistivity damascene interconnect |
| US9536826B1 (en) | 2015-06-15 | 2017-01-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (finFET) device structure with interconnect structure |
| US10332790B2 (en) | 2015-06-15 | 2019-06-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (FinFET) device structure with interconnect structure |
| DE102015110437B4 (de) * | 2015-06-29 | 2020-10-08 | Infineon Technologies Ag | Halbleitervorrichtung mit einer Metallstruktur, die mit einer leitfähigen Struktur elektrisch verbunden ist und Verfahren zur Herstellung |
| US9613856B1 (en) | 2015-09-18 | 2017-04-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming metal interconnection |
| US10461026B2 (en) | 2016-06-30 | 2019-10-29 | International Business Machines Corporation | Techniques to improve reliability in Cu interconnects using Cu intermetallics |
| US9748173B1 (en) | 2016-07-06 | 2017-08-29 | International Business Machines Corporation | Hybrid interconnects and method of forming the same |
| KR102680860B1 (ko) * | 2016-09-05 | 2024-07-03 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| KR102624631B1 (ko) | 2016-12-02 | 2024-01-12 | 삼성전자주식회사 | 반도체 장치 |
| US10354969B2 (en) * | 2017-07-31 | 2019-07-16 | Advanced Semiconductor Engineering, Inc. | Substrate structure, semiconductor package including the same, and method for manufacturing the same |
| US10763207B2 (en) | 2017-11-21 | 2020-09-01 | Samsung Electronics Co., Ltd. | Interconnects having long grains and methods of manufacturing the same |
| US10651084B1 (en) * | 2019-07-18 | 2020-05-12 | Micron Technology, Inc. | Microelectronic devices comprising manganese-containing conductive structures, and related electronic systems and methods |
| KR102808645B1 (ko) | 2019-08-23 | 2025-05-16 | 삼성전자주식회사 | 반도체 소자 |
| US11205589B2 (en) | 2019-10-06 | 2021-12-21 | Applied Materials, Inc. | Methods and apparatuses for forming interconnection structures |
| US11551967B2 (en) * | 2020-05-19 | 2023-01-10 | Taiwan Semiconductor Manufacturing Company Limited | Via structure and methods for forming the same |
| CN113871344B (zh) * | 2020-06-30 | 2025-03-28 | 长鑫存储技术有限公司 | 半导体器件及半导体器件的形成方法 |
| US11742290B2 (en) | 2021-03-10 | 2023-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interconnect structure and method of forming thereof |
| US11682675B2 (en) | 2021-03-30 | 2023-06-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field-effect transistor device and method |
| US12374583B2 (en) * | 2021-05-12 | 2025-07-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices and methods of manufacture |
| CN114551399A (zh) * | 2022-02-17 | 2022-05-27 | 华虹半导体(无锡)有限公司 | 半导体结构及其形成方法 |
| DE102023134996A1 (de) * | 2023-12-13 | 2025-06-18 | Infineon Technologies Ag | Metallgefülltes kontaktloch in mikrogefertigter vorrichtung |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006024754A (ja) * | 2004-07-08 | 2006-01-26 | Advanced Lcd Technologies Development Center Co Ltd | 配線層の形成方法、配線層および薄膜トランジスタ |
| TW200629519A (en) * | 2004-10-14 | 2006-08-16 | Ibm | Modified via bottom structure for reliability enhancement |
| TW200910523A (en) * | 2007-07-31 | 2009-03-01 | Ibm | Interconnect structure with grain growth promotion layer and method for forming the same |
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| US6307267B1 (en) * | 1997-12-26 | 2001-10-23 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
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| US6429523B1 (en) | 2001-01-04 | 2002-08-06 | International Business Machines Corp. | Method for forming interconnects on semiconductor substrates and structures formed |
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| AU2003266560A1 (en) * | 2002-12-09 | 2004-06-30 | Yoshihiro Hayashi | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
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| JP4738959B2 (ja) * | 2005-09-28 | 2011-08-03 | 東芝モバイルディスプレイ株式会社 | 配線構造体の形成方法 |
| US7666787B2 (en) | 2006-02-21 | 2010-02-23 | International Business Machines Corporation | Grain growth promotion layer for semiconductor interconnect structures |
| JP5413563B2 (ja) * | 2007-01-10 | 2014-02-12 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| KR100830590B1 (ko) * | 2007-06-01 | 2008-05-21 | 삼성전자주식회사 | 텅스텐막, 그 형성 방법, 이를 포함한 반도체 소자 및 그반도체 소자의 형성 방법 |
| US7843063B2 (en) * | 2008-02-14 | 2010-11-30 | International Business Machines Corporation | Microstructure modification in copper interconnect structure |
| JP2009194195A (ja) * | 2008-02-15 | 2009-08-27 | Panasonic Corp | 半導体装置及びその製造方法 |
-
2009
- 2009-09-16 US US12/560,878 patent/US7956463B2/en active Active
-
2010
- 2010-08-25 GB GB1200519.5A patent/GB2485689B/en not_active Expired - Fee Related
- 2010-08-25 JP JP2012529193A patent/JP5444471B2/ja not_active Expired - Fee Related
- 2010-08-25 WO PCT/EP2010/062407 patent/WO2011032812A1/en not_active Ceased
- 2010-08-25 CN CN2010800407893A patent/CN102498560A/zh active Pending
- 2010-08-25 DE DE112010003659T patent/DE112010003659T5/de not_active Ceased
- 2010-09-09 TW TW099130515A patent/TWI497673B/zh not_active IP Right Cessation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006024754A (ja) * | 2004-07-08 | 2006-01-26 | Advanced Lcd Technologies Development Center Co Ltd | 配線層の形成方法、配線層および薄膜トランジスタ |
| TW200629519A (en) * | 2004-10-14 | 2006-08-16 | Ibm | Modified via bottom structure for reliability enhancement |
| TW200910523A (en) * | 2007-07-31 | 2009-03-01 | Ibm | Interconnect structure with grain growth promotion layer and method for forming the same |
Also Published As
| Publication number | Publication date |
|---|---|
| US7956463B2 (en) | 2011-06-07 |
| JP5444471B2 (ja) | 2014-03-19 |
| WO2011032812A1 (en) | 2011-03-24 |
| JP2013504886A (ja) | 2013-02-07 |
| US20110062587A1 (en) | 2011-03-17 |
| GB2485689A (en) | 2012-05-23 |
| CN102498560A (zh) | 2012-06-13 |
| TW201126683A (en) | 2011-08-01 |
| GB2485689B (en) | 2013-06-12 |
| GB201200519D0 (en) | 2012-02-29 |
| DE112010003659T5 (de) | 2012-10-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |