TWI412306B - 電容／電阻裝置及併有該裝置之印刷線路板，及其製造方法 - Google Patents

電容／電阻裝置及併有該裝置之印刷線路板，及其製造方法 Download PDF

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TWI412306B
TWI412306B TW094134607A TW94134607A TWI412306B TW I412306 B TWI412306 B TW I412306B TW 094134607 A TW094134607 A TW 094134607A TW 94134607 A TW94134607 A TW 94134607A TW I412306 B TWI412306 B TW I412306B
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dielectric
capacitor
metal foil
foil electrode
resistor
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David Ross Mcgregor
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
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    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1453—Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
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    • Y10T29/49082—Resistor making
    • Y10T29/49101—Applying terminal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T29/49—Method of mechanical manufacture
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

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Description

電容/電阻裝置及併有該裝置之印刷線路板，及其製造方法
本發明之技術領域係關於具有電容與電阻功能之裝置，及一種併入該裝置於有機介電層壓物及印刷線路板之方法。
電容器與電阻器可以串聯用於延伸在積體電路(IC)裝置間之信號追蹤器之傳輸線終端。電容器與電阻器用以匹配IC裝置之阻抗至線路，或減少或消除信號反射。有些電路為連續性負載並使用與線路平行之電阻器。非連續性負載電路具有串聯之電阻器與電容器並可用於低電力ICs。圖1概略例示一種先行技藝的IC裝置10與20之非連續性負載終端。
在圖1中，a至b之距離通常很短。選擇電阻器R之值以匹配線路阻抗，通常為約45-80歐姆。選擇電容器C之值，使串聯之電阻器R與電容器C之RC時間常數大於信號之上升時間並低於信號脈沖之全部時間。典型電容值為約30微微法拉。
傳統RC終端通常由表面安裝技術(SMT)電阻器與電容器構成。圖2為一部分印刷電路板25之截面圖，其具有SMT電阻 器40及SMT電容器50，連接至IC裝置30以形成傳統SMT RC傳輸線終端供IC 30用。負載信號至IC 30之信號線路連接至連接IC裝置30至電阻器40之電路追蹤器60。電容器50係由一對焊接墊52與焊接接口58之一耦合至電路追蹤器70。電阻器40係由焊接墊42與焊接接口48耦合至電路追蹤器70。電容器50係由其他焊接墊58與電路追蹤器59耦合至通路孔80。此排列放置電阻器40及電容器50與信號線路串聯並透過電鍍貫穿孔通路80連接至地面。此傳統表面安裝方式需要使用昂貴表面實際狀況。此外，焊接接口之需要條件會降低可靠性並增加製造成本。
根據第一具體例中，電容/電阻裝置包含第一電極、配置在第一電極上方之介電質、形成在介電質上方並鄰接介電質之電阻器元件、導電追蹤器及配置在介電質上方並與電阻器元件電接觸之第二電極。電容/電阻裝置可埋入有機介電層壓物內並且併入印刷線路板內。
根據上述具體例，電阻器與電容器功能可合併於單一埋藏層壓物內，降低產生電阻器與電容器功能之成本及困難度。當電容/電阻裝置併入印刷線路板內時，埋入電容/電阻裝置亦可省略昂貴實際狀況。此外，亦可消除與SMT裝置相關之焊接接口，藉此改善可靠性。電容/電阻裝置可使用傳統蝕刻法加工，進一步降低製造成本。
熟悉此技藝者讀取以下具體例之細節時當可明白上述優 點及其他優點及本發明各種附加具體例之益處。
本發明之具體例針對電容/電阻裝置，其可埋入印刷線路板(PWB)之基材內。所提供在PWB基材內之電容與電阻功能可在印刷線路板上保存昂貴表面實際狀況。本發明之具體例亦需要較傳統SMT終端排列更少焊接接口。
圖3為一部分印刷線路板1000之第一具體例之截面圖。印刷線路板1000包括RC傳輸線終端，其中電阻器功能與電容器功能合併成單一電容/電阻裝置100。該裝置100係埋入印刷線路板部分1000。此裝置100包含底部電極110、介電質120、頂部電極或頂片130、電阻器元件140及導電追蹤器145。此裝置100在單一層壓物結構內提供一種電阻與電容功能，通常由托架101示出。
此裝置100係由延伸過介電層180、182之電鍍貫穿孔通路150及導電電路追蹤器160耦合至IC裝置170。此IC裝置170可藉焊接墊172及焊接接口174連接至導電電路追蹤器160。然而，亦可使用其他連接技術。底部電極110亦可作為印刷線路板內之導電地面，並可耦合至連接其他電路裝置之導電電路追蹤器111。
圖4A-4F例示一種製造電容器層壓物包括裝置100之方法。
圖4A為製造之第一階段之正面截面圖，其中設有第一與第二金屬箔112,132。箔112,132可自例如銅、以銅為主材 料及其他金屬製得。淤漿材料或溶液可被鑄造或塗佈在第一箔112、乾燥並固化，形成第一介電層124。固化可藉乾燥，例如，在150℃下進行，若淤漿具有熱塑性質。若淤漿為熱固性材料時，可使用較高固化溫度。類似第二介電層126係以類似方式形成在第二箔132上。
用以形成介電層124,126之溶液可包含，例如，溶解於溶劑內之聚合物。淤漿材料可包含，例如，具有高介電常數("高K")填充料或功能期之聚合物-溶劑溶液。淤漿或溶液用之適當聚合物可包括，例如，環氧化物或聚亞胺樹脂。高K功能期可界定為具有介電常數大於500之材料並可包括具有通式ABO3之鈣鈦礦。適當填充料包括，例如，結晶鈦酸鋇(BT)、鈦酸鍶鋇(BST)、鈦酸鋯酸鉛(PZT)、鈦酸鑭鉛、鈦酸鋯酸鑭鉛(PLZT)、鈮酸鎂鉛(PMN)及鈦酸銅鈣。填充料可為粉末形式。
薄黏著劑層127可塗覆至任一介電層124,126(圖4A顯示在介電層126上)之一表面或二表面。黏著劑層127可自熱塑性聚合物形成並可填充高介電相以防止介電常數之稀釋。然後，二個結構係以圖4A所示之方向在熱與壓力下層壓一起。
參照圖4B，層壓自層124,126及127形成單一介電質120。黏著劑層127便利在層壓過程中介電層124與126之結合。然而，若介電層124與126在層壓前僅局部固化或具有熱塑性質時，黏著劑層127可省略，使得在層壓時，適當溫度及壓力可充分軟化樹脂，使得層124與126不用黏著劑而結合。所 得介電質120可為，例如，在層壓後約4-25微米之薄層。
一種形成介電質120之替代方法可為鑄造填充或未填充熱塑性聚合物在箔112,132之一上而直接層壓另一箔至經填充熱塑性聚合物。此法可排除黏著劑之需求。另一替代製造方法包括形成介電層120，分開作為單一膜並使用熱及壓力層壓至第一箔112及第二箔132。
未填充聚合物如聚亞胺介電質INTERRATM HK 04(可得自DuPont Electronic Technologies,Wilmington,DE)可用以形成介電質120。
在層壓後，光阻劑(未示於圖4B)塗覆至箔112而將箔112成像及顯像。然後，將箔112蝕刻，使用標準印刷線路板加工條件汽提其餘光阻劑。圖4C為在圖4D之線4C-4C採取之所得物件在蝕刻後之底截面圖。參照圖4C，蝕刻產生裝置100之底部電極110。導電電路追蹤器111亦可自箔112形成以連接底部電極110至地面或其他電路裝置。
圖4D為圖4C之線4D-4D採取之正面截面圖。參照圖4D，所得物件之底部電極110側層壓至介電層壓材料182。層壓可使用，例如，FR4預浸料或其他預浸料於標準印刷線路板過程內進行。
光阻劑(未示於圖4D)塗覆至箔132而將箔132成像及蝕刻，將其餘光阻劑汽提。圖4E為圖4F之線4E-4E採取之所得物件在蝕刻後之截面圖。圖4F為圖4E之線4F-4F採取之所得物 件之正面截面圖。參照圖4E，蝕刻產生裝置100之頂電極130、溝134及導電電路追蹤器145。
參照參照圖4F，光阻器元件140係由沉積光阻器材料在介電質120上並進入溝134內形成。例如，光阻器元件140可由沉積聚合物厚膜電阻器膏狀物並固化電阻器膏狀物形成。頂電極130及導電電路追蹤器145作為光阻器元件140之終端。聚合物厚膜電阻器膏狀物可自材料如分散於篩網印刷媒液內之碳粉製得。篩網印刷媒液可包含，例如，分散於適當溶劑內之環氧樹脂。亦可加入其他添加劑如介面活性劑以改善所得光阻劑元件140之介電特性。
在固化光阻劑元件140後，介電層180層壓至介電層182之件側，形成層壓物結構101。然後，由上述方法獲得之層壓物結構101可使用傳統層壓與通路形成法併入，例如，圖3所示之印刷線路板內。
10‧‧‧IC裝置
20‧‧‧IC裝置
25‧‧‧印刷電路板
40‧‧‧SMT電阻器
50‧‧‧SMT電容器
30‧‧‧IC裝置
60‧‧‧電路追蹤器
52‧‧‧焊接墊
58‧‧‧焊接接口
70‧‧‧電路追蹤器
42‧‧‧焊接墊
48‧‧‧焊接接口
59‧‧‧電路追蹤器
80‧‧‧通路孔
1000‧‧‧印刷線路板
100‧‧‧單一電容/電阻裝置
101‧‧‧托架
110‧‧‧底部電極
120‧‧‧介電質
140‧‧‧電阻器元件
130‧‧‧頂部電極或頂片
111‧‧‧導電追蹤器
180,182‧‧‧介電層
150‧‧‧電鍍貫穿孔通路
160‧‧‧導電電路追蹤器
170‧‧‧IC裝置
172‧‧‧焊接墊
174‧‧‧焊接接口
112‧‧‧第一金屬箔
132‧‧‧第二金屬箔
232‧‧‧電阻器材料
124‧‧‧第一介電層
126‧‧‧第二介電層
127‧‧‧黏著劑層
145‧‧‧導電電路追蹤器
182‧‧‧介電層
細節說明參照以下附圖，其中相同數值意指相同元件，及其中：圖1為傳統(先行技藝)具有串聯電阻器與電容器之非連續性負載終端之概略圖示；圖2為具有傳統(先行技藝)SMT RC傳輸線終端供積體電路裝置之印刷線路板之橫截面圖；圖3為根據第一具體例一部分具有埋入電容/電阻裝置之印刷線路板之截面圖。
圖4A-4F例示一種製造圖3例示之電容/電阻裝置之方法。
實例1：此裝置100之實例參照圖3說明。在此例中，電極110,130係自銅箔形成而介電質120為未填充聚亞胺介電質(INTERRATM HK 04，可得自DuPont Electronic Technologies,Wilmington,DE)，具有25微米厚，具有介電常數(Dk)為3.5，藉此提供電容密度為800微微法拉/平方寸。
傳輸線終端為30微微法拉所需之電容器之大小(當自俯平面透視圖觀看時)為24.2平方毫米，其相當於略低於5毫米x5毫米。經沉積電阻器材料為可篩網印刷的100歐姆/平方聚合物厚膜電阻器膏狀物(可獲自DuPont Electronics)。
在此例中，對標稱60歐姆電阻之電阻器之大小可改變，較佳保持長對寬比率範圍為約0.6至1.0。若IC需要相當少終端電阻器時，上述電容器大小則可接受。在需要許多終端之情況下，當電容器可製得較小時，具有較高電容密度之層壓物較適合。
實例2：此裝置100之實例參照圖3說明。在此例中，層壓物係由鑄造填充鈦酸鋇熱塑性聚亞胺在一銅箔上而層壓第二銅箔在填充鈦酸鋇熱塑性聚亞胺塗膜之表面上形成。鈦酸鋇最為填充料很有利，因為其容易取得且無鉛。
層壓係在適當溫度及壓力下進行，俾可不用分開的黏著 劑材料結合物件一起。電極110,130係由銅箔形成而介電質120為經填充聚亞胺介電質(INTERRATM HK 11，可得自DuPont Electronic Technologies)，具有14微米厚，具有介電常數(Dk)為11，藉此提供電容密度為4.5微微法拉/平方寸。
上述傳輸線終端所需之電容器之大小約為4.3平方毫米，或約為2毫米x2毫米。經沉積電阻器為可篩網印刷的100歐姆/平方聚合物厚膜電阻器膏狀物(可獲自DuPont Electronics)。
此實例中，電阻器之較佳大小對標稱60歐姆電阻為1.2毫米長及2毫米寬，具有長寬比為0.6至1.0。
實例3：此裝置100之實例參照圖3說明。在此例中，層壓物係由鑄造填充鈦酸鋇熱塑性聚亞胺(可得自DuPont Electronic Technologies)在二銅箔上並在適當溫度及壓力下層壓一起以結合之。未曾使用分開的黏著劑材料。電極110,130係由銅箔形成。所得介電質120為填充鈦酸鋇聚亞胺介電質，具有8微米厚，具有電容密度為6.2毫微法拉/平方寸。
上述傳輸線終端所需之電容器之大小約為3.1平方毫米，或約為1.77毫米x1.77毫米。經沉積電阻器可自篩網印刷的100歐姆/平方聚合物厚膜電阻器膏狀物(可獲自DuPont Electronics)形成。
此實例中，電阻器之較佳大小對標稱60歐姆電阻為1.06毫米長及1.77毫米寬，具有長寬比為0.6至1.0。
根據上述具體例，薄電容器層壓物結構與電阻器之結合可用以減少埋設電容器功能之尺寸，並更有效地埋設RC傳輸線終端。埋入電容與電阻功能可清除昂貴實際狀況並可消除與SMT裝置相關之焊接接口，藉此改善可靠性。此外，在層壓物內結合電阻與電容之層壓物可使用傳統蝕刻法加工，其可降低製造成本。
上述具體例亦可其他選擇供電路設計者及PWB製造商用。例如，一片層壓物可用以埋設離散電阻器及離散電容器，其可降低與連接電阻器及電容器相關之電感。
根據上述具體例，薄電容器層壓物結構與電阻器之結合可用以減少經埋設電容器功能，及更有效地埋設RC傳輸線終端。埋入電容與電阻功能可清除昂貴實際狀況並可消除與SMT裝置相關之焊接接口，藉此改善可靠性。此外，在層壓物內結合電阻與電容之層壓物可使用傳統蝕刻法加工，其可降低製造成本。
上述具體例亦可其他選擇供電路設計者及PWB製造商用。例如，一片層壓物可用以埋設許多離散電阻器及許多離散電容器，其可降低與連接電阻器及電容器相關之電感。
電容器具體例俯面圖之形狀通常為長方形。然而，電容器電極、介電質及其他組件及層亦可具有其他長方形或不規 則表面積形狀，例如，圓形、橢圓形、卵形或多角形狀。
單一電容/電阻裝置100以上述層壓物結構101形成。然而，嵌板結構及印刷線路板可包括大量具有不同類型及排列之各個電容/電阻裝置。
在上述具體例中，電阻、電容及電感結合以產生比電路阻抗，通常由字母Z表示。電阻與電容可構成以達成比阻抗。改變電阻、電容或二者會改變電感。所有三種改變可控制以界定最後阻抗。換言之，層壓物之阻抗為可調整者。
前述本發明之說明可例示並說明本發明。此外，揭示物顯示並說明僅選定的本發明之較佳具體例，但須知本發明可使用各種其他結合、改變及環境並可在本文明述與上述教示匹配之本發明概念之範圍內及/或相關技藝之技術或知識內改變或改良。
進一步希望上述具體例解釋實施本發明已知之最佳方式並使其他熟悉此技藝者利用本發明於該具體例或其他具體例以及本發明之特定應用或用途所需之各種改良。因此，不希望細節說明限制本發明至本文所揭示之形式。此外，亦希望所附請求項應說明包括替代具體例，非明確界定於細節說明。
1000‧‧‧印刷線路板
100‧‧‧單一電容/電阻裝置
101‧‧‧托架
110‧‧‧底部電極
120‧‧‧介電質
140‧‧‧電阻器元件
145‧‧‧導電電路追蹤器
130‧‧‧頂部電極或頂片
111‧‧‧導電追蹤器
180,182‧‧‧介電層
150‧‧‧電鍍貫穿孔通路
160‧‧‧導電電路追蹤器
170‧‧‧IC裝置
172‧‧‧焊接墊
174‧‧‧焊接接口

Claims (6)

  1. 一種電容/電阻裝置，包含：第一金屬箔電極；配置在第一金屬箔電極上之介電質，介電質之一厚度為4至25微米；形成於介電質上方並鄰接介電質之電阻器元件；導電跡線；及配置在介電質上並與電阻器元件電接觸之第二金屬箔電極，其中介電質配置在第一金屬箔電極與第二金屬箔電極之間，其中電阻器元件延伸並覆蓋在一部分之第二金屬箔電極與該導電跡線上。
  2. 如請求項1之電容/電阻裝置，其中電阻器元件延伸過第二金屬箔電極與導電跡線間之溝並鄰接介電質。
  3. 如請求項1之電容/電阻裝置，其中介電質包含未填充聚合物。
  4. 如請求項1之電容/電阻裝置，其中介電質包含用介電功能相填充之聚合物。
  5. 一種電容/電阻裝置，包含：第一金屬箔電極；配置在第一金屬箔電極上之介電質；形成於介電質上方並鄰接介電質之電阻器元件；導電跡線；及配置在介電質上並與電阻器元件電接觸之第二金屬箔電極，其中介電質配置在第一金屬箔電極與第二金屬箔電極之間，其中電阻器元件延伸並覆蓋在一部分之第二金屬箔電極與該導電跡線上，其中各該電容/電阻裝置埋設在至少二個有機介電層壓物層內，其中層壓物層與電容/電阻裝置形成層壓物結構。
  6. 一種印刷線路板，包含：一層壓物結構，係藉由如請求項5之電容/電阻裝置及至少二個有機介電層壓物層所形成；及至少一種配置在印刷線路板之頂表面上之IC裝置，其中IC裝置電耦合至電容/電阻裝置。
TW094134607A 2004-10-18 2005-10-04 電容／電阻裝置及併有該裝置之印刷線路板，及其製造方法 TWI412306B (zh)

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KR20060054033A (ko) 2006-05-22
US7571536B2 (en) 2009-08-11
DE602005015657D1 (de) 2009-09-10
US20060082981A1 (en) 2006-04-20
US20070139901A1 (en) 2007-06-21
JP2006121088A (ja) 2006-05-11
EP1648208B1 (en) 2009-07-29
TW200628024A (en) 2006-08-01
KR100812515B1 (ko) 2008-03-11
US7436678B2 (en) 2008-10-14
TW201343017A (zh) 2013-10-16
EP2104407A1 (en) 2009-09-23
CN1783378A (zh) 2006-06-07

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