TWI380422B - - Google Patents

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Publication number
TWI380422B
TWI380422B TW097123918A TW97123918A TWI380422B TW I380422 B TWI380422 B TW I380422B TW 097123918 A TW097123918 A TW 097123918A TW 97123918 A TW97123918 A TW 97123918A TW I380422 B TWI380422 B TW I380422B
Authority
TW
Taiwan
Prior art keywords
layer
package substrate
substrate
present
sectional
Prior art date
Application number
TW097123918A
Other languages
English (en)
Chinese (zh)
Other versions
TW200921876A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of TW200921876A publication Critical patent/TW200921876A/zh
Application granted granted Critical
Publication of TWI380422B publication Critical patent/TWI380422B/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0376—Etching temporary metallic carrier substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7438—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07202—Connecting or disconnecting of bump connectors using auxiliary members
    • H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
TW097123918A 2007-11-15 2008-06-26 Method for making copper-core layer multi-layer encapsulation substrate TW200921876A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/984,263 US20080188037A1 (en) 2007-02-05 2007-11-15 Method of manufacturing semiconductor chip assembly with sacrificial metal-based core carrier

Publications (2)

Publication Number Publication Date
TW200921876A TW200921876A (en) 2009-05-16
TWI380422B true TWI380422B (enExample) 2012-12-21

Family

ID=39675451

Family Applications (9)

Application Number Title Priority Date Filing Date
TW097102733A TW200921884A (en) 2007-11-15 2008-01-24 Method for making copper-core layer multi-layer encapsulation substrate
TW097102734A TW200921816A (en) 2007-11-15 2008-01-24 Method of making multi-layer package board of copper nuclear layer
TW097106965A TW200921817A (en) 2007-11-15 2008-02-29 Method of manufacturing multi-layer package substrate of copper nuclear layer
TW097108810A TW200921818A (en) 2007-11-15 2008-03-13 Method of manufacturing multi-layer package substrate of non-nuclear layer
TW097108808A TW200921875A (en) 2007-11-15 2008-03-13 Manufacturing method of copper-core multilayer package substrate
TW097110927A TW200921881A (en) 2007-11-15 2008-03-27 Manufacturing method of high heat-dissipation multilayer package substrate
TW097110928A TW200921819A (en) 2007-11-15 2008-03-27 Method of producing multi-layer package substrate having a high thermal dissipation capacity
TW097123918A TW200921876A (en) 2007-11-15 2008-06-26 Method for making copper-core layer multi-layer encapsulation substrate
TW097141807A TW200922433A (en) 2007-11-15 2008-10-30 Manufacturing method of copper-core multilayer package substrate

Family Applications Before (7)

Application Number Title Priority Date Filing Date
TW097102733A TW200921884A (en) 2007-11-15 2008-01-24 Method for making copper-core layer multi-layer encapsulation substrate
TW097102734A TW200921816A (en) 2007-11-15 2008-01-24 Method of making multi-layer package board of copper nuclear layer
TW097106965A TW200921817A (en) 2007-11-15 2008-02-29 Method of manufacturing multi-layer package substrate of copper nuclear layer
TW097108810A TW200921818A (en) 2007-11-15 2008-03-13 Method of manufacturing multi-layer package substrate of non-nuclear layer
TW097108808A TW200921875A (en) 2007-11-15 2008-03-13 Manufacturing method of copper-core multilayer package substrate
TW097110927A TW200921881A (en) 2007-11-15 2008-03-27 Manufacturing method of high heat-dissipation multilayer package substrate
TW097110928A TW200921819A (en) 2007-11-15 2008-03-27 Method of producing multi-layer package substrate having a high thermal dissipation capacity

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW097141807A TW200922433A (en) 2007-11-15 2008-10-30 Manufacturing method of copper-core multilayer package substrate

Country Status (3)

Country Link
US (1) US20080188037A1 (enExample)
CN (5) CN101436547B (enExample)
TW (9) TW200921884A (enExample)

Families Citing this family (37)

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Publication number Priority date Publication date Assignee Title
US8183095B2 (en) 2010-03-12 2012-05-22 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
US8456002B2 (en) 2007-12-14 2013-06-04 Stats Chippac Ltd. Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief
US9318441B2 (en) 2007-12-14 2016-04-19 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial adhesive over contact pads of semiconductor die
US8343809B2 (en) 2010-03-15 2013-01-01 Stats Chippac, Ltd. Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die
US7767496B2 (en) * 2007-12-14 2010-08-03 Stats Chippac, Ltd. Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer
US20090166858A1 (en) * 2007-12-28 2009-07-02 Bchir Omar J Lga substrate and method of making same
US8415203B2 (en) * 2008-09-29 2013-04-09 Freescale Semiconductor, Inc. Method of forming a semiconductor package including two devices
TWI421992B (zh) * 2009-08-05 2014-01-01 欣興電子股份有限公司 封裝基板及其製法
US9548240B2 (en) 2010-03-15 2017-01-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package
US8298863B2 (en) 2010-04-29 2012-10-30 Texas Instruments Incorporated TCE compensation for package substrates for reduced die warpage assembly
CN102259544A (zh) * 2010-05-27 2011-11-30 禹辉(上海)转印材料有限公司 一种镭射信息层的制造方法
TWI496258B (zh) * 2010-10-26 2015-08-11 欣興電子股份有限公司 封裝基板之製法
US8698303B2 (en) 2010-11-23 2014-04-15 Ibiden Co., Ltd. Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device
US20120286416A1 (en) * 2011-05-11 2012-11-15 Tessera Research Llc Semiconductor chip package assembly and method for making same
TW201248745A (en) * 2011-05-20 2012-12-01 Subtron Technology Co Ltd Package structure and manufacturing method thereof
JP5762619B2 (ja) * 2011-12-12 2015-08-12 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 個々に符号化された読取りパターンを生成するための方法および装置
CN103681384B (zh) 2012-09-17 2016-06-01 宏启胜精密电子(秦皇岛)有限公司 芯片封装基板和结构及其制作方法
CN103717009A (zh) * 2012-10-08 2014-04-09 苏州卓融水处理科技有限公司 一种无核封装基板种子层附着力的方法
TWI500125B (zh) * 2012-12-21 2015-09-11 欣興電子股份有限公司 電子元件封裝之製法
CN103903990B (zh) * 2012-12-28 2016-12-28 欣兴电子股份有限公司 电子组件封装的制法
US8802504B1 (en) * 2013-03-14 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US9299649B2 (en) 2013-02-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
CN107393899B (zh) 2013-06-11 2020-07-24 龙南骏亚精密电路有限公司 芯片封装基板
CN103887184B (zh) * 2014-03-28 2016-09-07 江阴芯智联电子科技有限公司 新型高密度高性能多层基板内对称结构及制作方法
CN105931997B (zh) * 2015-02-27 2019-02-05 胡迪群 暂时性复合式载板
DE102015116807A1 (de) * 2015-10-02 2017-04-06 Infineon Technologies Austria Ag Funktionalisierte Schnittstellenstruktur
CN108257875B (zh) * 2016-12-28 2021-11-23 碁鼎科技秦皇岛有限公司 芯片封装基板、芯片封装结构及二者的制作方法
TWI643532B (zh) * 2017-05-04 2018-12-01 南亞電路板股份有限公司 電路板結構及其製造方法
JP7046639B2 (ja) * 2018-02-21 2022-04-04 新光電気工業株式会社 配線基板及びその製造方法
US10573572B2 (en) * 2018-07-19 2020-02-25 Advanced Semiconductor Engineering, Inc. Electronic device and method for manufacturing a semiconductor package structure
CN111326494A (zh) * 2020-02-28 2020-06-23 维沃移动通信有限公司 封装结构、制作方法、电路板结构及电子设备
TWI733569B (zh) * 2020-08-27 2021-07-11 矽品精密工業股份有限公司 電子封裝件及其製法
CN112185928A (zh) * 2020-10-22 2021-01-05 上海艾为电子技术股份有限公司 一种芯片封装结构及其制备方法、封装芯片
CN112490234B (zh) * 2020-12-11 2025-11-14 广东汇芯半导体有限公司 智能功率模块和智能功率模块的制造方法
TWI759120B (zh) * 2021-03-04 2022-03-21 恆勁科技股份有限公司 中介基板及其製法
CN119626992A (zh) * 2024-01-29 2025-03-14 芯爱科技(南京)有限公司 封装基板及其制法
CN120221419A (zh) * 2025-05-14 2025-06-27 芯爱科技(南京)有限公司 封装基板的制法

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US6294731B1 (en) * 1999-03-16 2001-09-25 Performance Interconnect, Inc. Apparatus for multichip packaging
US6278618B1 (en) * 1999-07-23 2001-08-21 National Semiconductor Corporation Substrate strips for use in integrated circuit packaging
JP3983146B2 (ja) * 2002-09-17 2007-09-26 Ｎｅｃエレクトロニクス株式会社 多層配線基板の製造方法

Also Published As

Publication number Publication date
TW200921819A (en) 2009-05-16
TW200921881A (en) 2009-05-16
TW200922433A (en) 2009-05-16
TWI364805B (enExample) 2012-05-21
TWI380387B (enExample) 2012-12-21
TWI373115B (enExample) 2012-09-21
TW200921816A (en) 2009-05-16
US20080188037A1 (en) 2008-08-07
TWI348743B (enExample) 2011-09-11
CN101436551B (zh) 2010-12-01
TWI361481B (enExample) 2012-04-01
TW200921884A (en) 2009-05-16
CN101436550B (zh) 2010-09-29
CN101436549A (zh) 2009-05-20
CN101436550A (zh) 2009-05-20
TWI380428B (enExample) 2012-12-21
CN101436548A (zh) 2009-05-20
TW200921875A (en) 2009-05-16
CN101436551A (zh) 2009-05-20
TW200921818A (en) 2009-05-16
CN101436547A (zh) 2009-05-20
CN101436549B (zh) 2010-06-02
TW200921817A (en) 2009-05-16
TW200921876A (en) 2009-05-16
CN101436548B (zh) 2011-06-22
CN101436547B (zh) 2011-06-22

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