TWI346986B - Method of manufacturing a semiconductor device - Google Patents

Method of manufacturing a semiconductor device

Info

Publication number
TWI346986B
TWI346986B TW093126872A TW93126872A TWI346986B TW I346986 B TWI346986 B TW I346986B TW 093126872 A TW093126872 A TW 093126872A TW 93126872 A TW93126872 A TW 93126872A TW I346986 B TWI346986 B TW I346986B
Authority
TW
Taiwan
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
TW093126872A
Other languages
English (en)
Other versions
TW200512850A (en
Inventor
Bunshi Kuratomi
Fukumi Shimizu
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW200512850A publication Critical patent/TW200512850A/zh
Application granted granted Critical
Publication of TWI346986B publication Critical patent/TWI346986B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H01L21/566—Release layers for moulds, e.g. release layers, layers against residue during moulding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
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    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/01005—Boron [B]
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    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
TW093126872A 2003-09-26 2004-09-06 Method of manufacturing a semiconductor device TWI346986B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003334858A JP4094515B2 (ja) 2003-09-26 2003-09-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW200512850A TW200512850A (en) 2005-04-01
TWI346986B true TWI346986B (en) 2011-08-11

Family

ID=34373183

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093126872A TWI346986B (en) 2003-09-26 2004-09-06 Method of manufacturing a semiconductor device

Country Status (5)

Country Link
US (2) US7288440B2 (zh)
JP (1) JP4094515B2 (zh)
KR (1) KR20050030865A (zh)
CN (1) CN100437954C (zh)
TW (1) TWI346986B (zh)

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JP2003243435A (ja) * 2002-02-14 2003-08-29 Hitachi Ltd 半導体集積回路装置の製造方法
JP2004134591A (ja) * 2002-10-10 2004-04-30 Renesas Technology Corp 半導体集積回路装置の製造方法
JP2005150350A (ja) * 2003-11-14 2005-06-09 Renesas Technology Corp 半導体装置の製造方法
JP4647258B2 (ja) * 2004-07-29 2011-03-09 株式会社日立製作所 成形材料転写方法、基板構体
KR100784390B1 (ko) 2006-08-08 2007-12-11 삼성전자주식회사 반도체 패키지 제조 장치 및 패키지 제조 방법
US7525187B2 (en) * 2006-10-13 2009-04-28 Infineon Technologies Ag Apparatus and method for connecting components
KR101273591B1 (ko) * 2007-01-22 2013-06-11 삼성전자주식회사 사출성형장치
JP2008227131A (ja) * 2007-03-13 2008-09-25 Renesas Technology Corp 半導体装置及びその製造方法
JP4348643B2 (ja) * 2007-06-19 2009-10-21 株式会社デンソー 樹脂漏れ検出方法及び樹脂漏れ検出装置
KR100907326B1 (ko) * 2007-09-17 2009-07-13 미크론정공 주식회사 반도체 패키지 몰딩 장치
JP5655406B2 (ja) * 2010-07-20 2015-01-21 セントラル硝子株式会社 モール成形用金型および該金型を用いた装飾モール付きガラスの製造方法
JP5562874B2 (ja) * 2011-01-12 2014-07-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN102756454B (zh) * 2011-04-27 2016-03-09 松下知识产权经营株式会社 树脂密封成形品的制造方法
JP5892683B2 (ja) * 2011-05-31 2016-03-23 アピックヤマダ株式会社 樹脂封止方法
JP5878054B2 (ja) 2012-03-27 2016-03-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法及び半導体装置
CN202856488U (zh) 2012-08-03 2013-04-03 埃塞克科技有限公司 横向磁通发电机
KR101398016B1 (ko) * 2012-08-08 2014-05-30 앰코 테크놀로지 코리아 주식회사 리드 프레임 패키지 및 그 제조 방법
RU2641289C2 (ru) 2012-08-28 2018-01-17 Хэтч Пти Лтд Усовершенствованная система измерения и управления электрическим током для цехов электролиза
CA2827657A1 (en) 2012-09-24 2014-03-24 Eocycle Technologies Inc. Modular transverse flux electrical machine
ITTO20120854A1 (it) * 2012-09-28 2014-03-29 Stmicroelectronics Malta Ltd Contenitore a montaggio superficiale perfezionato per un dispositivo integrato a semiconduttori, relativo assemblaggio e procedimento di fabbricazione
CA2829812A1 (en) 2012-10-17 2014-04-17 Eocycle Technologies Inc. Transverse flux electrical machine rotor
KR101482866B1 (ko) * 2013-07-23 2015-01-14 세메스 주식회사 반도체 소자 몰딩 장치
KR102376487B1 (ko) * 2015-02-12 2022-03-21 삼성전자주식회사 반도체 패키지의 제조 장치 및 그 제조 방법
JP6079925B1 (ja) * 2016-03-30 2017-02-15 第一精工株式会社 樹脂封止装置及び樹脂封止装置の異常検知方法
US10068822B2 (en) * 2016-09-30 2018-09-04 Nanya Technology Corporation Semiconductor package and method for forming the same
TWI629761B (zh) * 2017-10-27 2018-07-11 日月光半導體製造股份有限公司 基板結構及半導體封裝元件之製造方法
KR102337659B1 (ko) * 2018-02-21 2021-12-09 삼성전자주식회사 금형 검사 장치 및 금형 검사 방법
KR102545290B1 (ko) * 2018-08-29 2023-06-16 삼성전자주식회사 반도체 패키지 몰딩 장치
CN111391217B (zh) * 2020-03-20 2021-11-30 东莞市艾尔玛塑件科技有限公司 自动脱模式热转印模具及设备
JP2023083988A (ja) * 2021-12-06 2023-06-16 アピックヤマダ株式会社 樹脂封止装置及び封止金型

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TWI711520B (zh) * 2019-09-11 2020-12-01 日商朝日科技股份有限公司 樹脂密封成形裝置及樹脂密封成形方法

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CN100437954C (zh) 2008-11-26
JP2005101407A (ja) 2005-04-14
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US20050070047A1 (en) 2005-03-31

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