TWI343058B - Data bus inversion apparatus, systems, and methods - Google Patents
Data bus inversion apparatus, systems, and methods Download PDFInfo
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- TWI343058B TWI343058B TW098101701A TW98101701A TWI343058B TW I343058 B TWI343058 B TW I343058B TW 098101701 A TW098101701 A TW 098101701A TW 98101701 A TW98101701 A TW 98101701A TW I343058 B TWI343058 B TW I343058B
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- data bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dc Digital Transmission (AREA)
- Error Detection And Correction (AREA)
Description
、^'之孩等循環期間,根據一最 該第二子集中之該等資料位元。轉變以法而編碼 數目之^之方法’其中傳輪—f料位元群組包括在-%内,將一數目之位元自一 一動態隨機絲』至 輸-數目n M)益件或自一 DRAM器件傳 之位兀至一控制及傳輸器件。 8.如請求項1之方法,進一步包含: ==分地基於由該第—DBI演算法或該第二DBI演算 之在該循環令傳輸之該等資料位元之一狀態, ^對該複數個循環中之每_者產生—具有—值之DBI位 在接“中接收於該等頻道上傳輸之該資料位元群 組之母—子集及該DBI位元;及 =部分地基於該㈣位元之一狀態而反轉或不反轉 接收自該等頻道之該等資料位元。 9. 一種DBI方法,其包含: 在複數個循環内,於平行頻道上傳輸一資料位元群 組’該=#料位元群組之—子㈣在該複數個循環中之-個別循環中於該等平行頻道上傳輸; 根據-最小轉變演算法而編碼待在複數個該等循環期 間傳輸之該資料位元群組之複數個該等子集;及 根據-最小零演算法或一最小一演算法而編碼待在該 等循裒中之選定循環期間傳輪之該資料位元群組之該等 子集中之選定子集。 137704-1010206.doc 1〇.如請求項9之方法,其中: i最小轉變演算法而編碼在複數個該等循環期間 傳輸之該資料位元群组之複數個該等子集包括針對每 一子集: 在2循環卜第-數目或更多之該等資料位元與在 -先前循環中傳輸之對應資料位元相比具有一不同二 進位狀態時,反轉該等資料位元;及 :該循環中少於該第一數目之該等資料位元與在該 先前循環中傳輸之對應資料位元相比具有一不同二進 位狀態時’不反轉該等資料位元; /㈣該最小零演算法或該最小一演算法而編碼 循環中之選定循環期間傳輸之該資料位料組之 集中之選定子集包括’針對每一選定子集中 位元: τ貝科 在根據該最小零演算法而反轉時,於一第三數目或 更多之該等資料位元為二進位零時,反轉該選定子集 中之該等資料位元,且於少於該第二數目之該等資料 位兀為二進位零時,不反轉該等資料位元;或 在根據該最小-演算法而反轉時,於一第三數目 更多之該等資料位元為二進位一時,反轉該選定子集 中之該等資料位元,且於少於該第三數目之該等資料 位兀為二進位一時,不反轉該等資料位元。 11·如请求項10之方法,直中: 該第-數目之該等資料位元為該等資料位元之一半; 137704-1010206.doc -4- 1343058 該第二數目之該等資料 該第三數目之該等資料位元為 ^2.如請求項9之方法 ’料位兀之十 一演I、根據該最小零演算法或該最小 次算法1編韻㈣等 該資料位元群組之料子隼中之=^仏期間傳輸之 ㈣循環—循環;之中:二, 法或該最小-演算法而編碼該等資料=該最小零演算 13.如請求項9之方法,其中: 根據該最小轉變、、宫曾、、t 間傳輸之㈣祖、、碼待在複數個該等循環期 等演算法或該最小—演算法而編碼待在該 =中之選定循環期間傳輸之該資科位元群組之該等 選定子集包括在每N個循環期間,根據該最小 令次异法或該最小-演算法而編 14.如請求項9之方法,進一步包含: 心 至少部分地基於由該最小轉變演算法或該最小零演算 ^該最小-演算法所判定之在該循環t傳輸之該等資 ,4位π之-狀態,針對該複數個循環中之每—者而產生 一具有—值之DBI位元; 在-與該等平行頻道分開之頻道上傳輸該聰位元; -在一接收器中純於該等平行頻道上傳輪之該資料位 凡群組之每一子集及該DBI位元;及 137704-10l0206.doc
UJO 至少部分地基於該DBI位元之一狀態而反轉或不反轉 在該接收器處自該等平行頻道接收之該等資料位元以 復原該資料位元群組。 15. —種DBI裝置,其包含: 平行輸人其用以接收待在平行頻道上傳輸之平行原 始資料位元; 一 DBI電路 據複數個DBI演算法中 資料位元;及 其耦接至該等平行輸入,且經組態以根 之一選定演算法而編瑪該等原始 控制模組,其用於決定該DBI電路應實施該複數個 DBI凟算法中之何者,且用於指示將該經決定之d刖演算 法經由一控制信號傳送至該〇趴電路。 16. 如咐长項15之裝置’其中該DBI電路經組態以根據一最 小轉變演算法、-最小零演算法及/或一最小一演算法而 編碼該等原始資料位元。 17. 如凊求項15之裝置,其中該DBI電路包括: 一第一模組,其經組態以在該等平行頻道上傳輸該等 原始資料位元之前,根據該等DBI演算法中之一者而決 定是否反轉該等原始資料位元;及 一第二模組,其經組態以回應於該第一模組之該決定 而反轉或不反轉該等原始資料位元,且將經反轉或未經 反轉之該等資料位元耦接至該等平行頻道。 18.如請求項17之裝置,其中該第一模組經組態以回應於該 第一模組之該決定而產生一 DBI位元,以指示在該等平 13 7704-101〇206_ doc 19. 仃頻道上傳輪之該等資料位元之一狀態,且在該等平行 頻道中之-者上傳輸該DBI位元。 如請求項17之裝置,其中: 、第模組經耦接以接收該等原始資料位元,且經耦 接乂自該第-模組接收-控制信號,該第二模組經組態 、據來自4多數偵測電路之該控制信號而將該等原始 " 元耦接至該等平行頻道或反轉該等原始資料位 一 將該等經反轉資料位元耦接至該等平行頻道; 且其中該第一模組包括: 次互斥OR邏輯閘,其具有—經輕接以接收該等原始 貝料位το之第_輸人及—輕接至該等平行頻道以接收 在一先前循環中於該等平行頻道上傳輸之資料位元之 ""輸入以比較該等原始資料位元與在該先前循環 中傳輸之4等資料位兀以產生輸出位元,該等輸出位 元指示在該等平行頻道上傳輸該等原始f料位元時將 發生之一數目之信號轉變;及 ,多工器電路,其具有一經耦接以接收該等原始資 料位元之第一輸入、一經耦接以接收該互斥〇r邏輯閘 之該等輸出位元之第二輸人及—經輕接以接收一控制 信號之控制輸入,該多工器經組態以: 在該控制信號選擇一最小零演算法或一最小一演 算法時,將該等原始資料位元耦接至—多數偵測電 路;及 在該控制信號選擇該最小轉變演算法時,將該互 137704-1010206.doc 斥OR邏輯閘之該等輸出位元耦接至該多數偵測電 路;且 該多數偵測電路經組態以偵測該等原始資料位元或該 互斥OR邏輯閘之該等輸出位元中之多數二進位一或二進 位零,且基於該所偵測之多數二進位一或二進位零而產 生輕接至該第二模組之該控制信號。 20. 一種DBI系統,其包含: 多個頻道; 處理器,其耦接至該等頻道以自該等頻道接收資料 位元或將該等資料位元傳輸至該等頻道; 一圮憶體組,其耦接至該等頻道以供應待在該等頻道 上傳輸之該等資料位元,或自該等頻道接收該等資料位 元; DBI模組’其耦接至該等頻道且經組態以根據複數 個DBI决算法中之一選定一者而將該等資料位元編碼成 經編碼貢料位元,且將該等經編碼資料位元傳輸至該等 頻道上;及
一控制模組’其用於決定該DBI模組應實施複數個DBI 廣算法中之何者’且用於指示將該經決定之DBI演算法 傳送至該DBI模組。 21. 如明求項20之系統,其中該DBI模組經組態以根據一最 小轉變演算法、-最小零演算法及/或-最小-演算法而 編碼該等資料位元。 22. 如研求項20之系統,其中該DBI模組包括: 137704-1010206.doc $模組’其經組態以根據該等DBI演算法中之-者而決U否反轉該等f料位元,且產生—指示在該等 頻C上所傳輸之該等經編碍資料位元之—狀態的〇則位 元,該DBI位元係在該等頻道上傳輸;及 第一模組,其經組態以回應於該第一模組之該決定 而反轉或不反轉該等資料位元。 23_如印求項20之系統,其中該DBI模組係在該處理器或該 δ己憶體組中’或在該處理器及該記憶體組兩者中。
137704-1010206.doc
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US12/015,311 US7616133B2 (en) | 2008-01-16 | 2008-01-16 | Data bus inversion apparatus, systems, and methods |
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TW200939241A TW200939241A (en) | 2009-09-16 |
TWI343058B true TWI343058B (en) | 2011-06-01 |
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TW099125177A TWI490880B (zh) | 2008-01-16 | 2009-01-16 | 資料匯流排反轉裝置、系統及方法 |
TW098101701A TWI343058B (en) | 2008-01-16 | 2009-01-16 | Data bus inversion apparatus, systems, and methods |
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US (4) | US7616133B2 (zh) |
EP (1) | EP2248031B1 (zh) |
KR (1) | KR101125975B1 (zh) |
CN (1) | CN101911034B (zh) |
TW (2) | TWI490880B (zh) |
WO (1) | WO2009091577A2 (zh) |
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KR101125975B1 (ko) | 2012-03-20 |
TW200939241A (en) | 2009-09-16 |
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CN101911034B (zh) | 2013-11-06 |
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EP2248031A4 (en) | 2016-04-20 |
TW201042655A (en) | 2010-12-01 |
TWI490880B (zh) | 2015-07-01 |
WO2009091577A3 (en) | 2009-09-11 |
US8766828B2 (en) | 2014-07-01 |
US20140313062A1 (en) | 2014-10-23 |
CN101911034A (zh) | 2010-12-08 |
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