TWI325686B - Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus - Google Patents

Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus Download PDF

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Publication number
TWI325686B
TWI325686B TW095119256A TW95119256A TWI325686B TW I325686 B TWI325686 B TW I325686B TW 095119256 A TW095119256 A TW 095119256A TW 95119256 A TW95119256 A TW 95119256A TW I325686 B TWI325686 B TW I325686B
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Taiwan
Prior art keywords
electrode
electronic component
semiconductor substrate
substrate
semiconductor device
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TW095119256A
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English (en)
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TW200742249A (en
Inventor
Haruki Ito
Nobuaki Hashimoto
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Seiko Epson Corp
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Publication of TW200742249A publication Critical patent/TW200742249A/zh
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Publication of TWI325686B publication Critical patent/TWI325686B/zh

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    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
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    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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Description

1325686 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種半導體裝置、半導體裝置之製造方 法、電子零件、電路基板及電子機器。 【先前技術】 近年，在行動電話或電視接收機等電子機器中，例如作 為諧振器或帶通濾波器等，使用具有彈性表面波元件（以 下適當稱「SAW(Surface Acoustic Wave)元件」）之電子零 件。 特開2002-290184號公報及特開2002-290200號公報揭示 了一例與具備SAW元件之電子零件有關的技術。 特開2002-290184號公報揭示了與把SAW元件和驅動控 制該SAW元件之積體電路配置於同一空間的電子零件封裝 有關的技術。 特開2002-290200號公報揭示了與把SAW元件安裝於第1 基板上，將積體電路安裝於第2基板上的電子零件封裝有 關的技術。 且說隨著安裝具有SAW元件之電子零件的電子機器小型 化的要求，而要求安裝SAW元件等之電子元件的半導體裝 置或安裝電子元件之電子零件的小型化。 然而，在上述特開2002-290184號公報所揭示之結構 上，因為並列配置SAW元件和積體電路，故小型化困難。 同樣，在特開2002-290200號公報所揭示之結構上，因 為要配置成重疊安裝有SAW元件之第1基板和安裝有積體
lllH5.doc 1325686 電路之第2基板，故薄型化（小型化）困難β 此外，不僅要求具備SAW元件之電子零件，也特別要求 具備水晶振子、壓電振子、壓電音又等需要密封之電子元 * 件的電子零件小型化。 . 【發明内容】 本發明係為解決上述之問題所完成者，其目的在於提供 一種可實現小型化、薄型化及高功能化之半導體裝置、半 導體裝置之製造方法、電子零件、電路基板及電子機器。 •為達成上述目的’本發明提供以下之方法。 本發明之半導體裝置具備：具有第1面和與前述第1面相 反側之第2面的半導體基板；形成於前述半導體基板之前 • 述第1面上的外部連接端子；形成於前述半導體基板之前 : 述第1面上’與前述外部連接端子電氣連接之第i電極；形 成於前述半導體基板之前述第2面上或上方之電子元件； 電氣連接在前述電子元件上之第2電極；形成於前述半導 φ 體基板之前述第2面上，具有包括前述第2電極之背面至少 一部分之底面的溝部；及形成於前述溝部之内部，與前述 第2電極之背面電氣連接之導電部。 在本發明之半導體裝置上，因為導電部形成於具有包括 第2電極之背面至少一部分之底面的溝部之内部，故可經 由導電部與第2電極和電子元件電氣連接。 此*外’因為第1電極電氣連接在外部連接端子上，故可 實現能夠與外部機器（例如電路基板）等連接之半導體裝置 整體之小型化、薄型化及高功能化。 111145.doc 1325686 此外，在本發明之半導體裝置中，希望具備：形成於前 述半導體基板之前述第1面上，使前述第丨電極和前述外部 連接端子電氣連接之佈線；及形成於前述半導體基板和前 述外部連接端子之間之應力緩和層。 在本發明之半導體裝置上，藉由經由佈線使第丨電極和 外部連接端子電氣連接，而在半導體裝置上形成佈線，故 而外部連接端子之形狀、配置之自由度擴大。
此外，藉由形成應力緩和層，外部機器等和半導體裝置 之連接可靠性變得很高。 此外，在本發明之半導體裝置中，希望在前述第2電極 之表面形成與前述佈線相同材料的金屬膜。 在本發明之半導體裝置上’作為佈線之材料〜般使用 耐腐截性高之材料。 以防止電氣性 從而’藉由在第2電極之表面形成與佈線相同材料的金 屬膜可以防止第2電極表面之腐钱，並可 不佳之發生。 置中，希望具備形成於前述 並與前述導電部電氣連接之 此外，在本發明之半導體裝 半導體基板之前述第2面上， 連接電極。 在本發明之半導體裝置上 之連接電極，例如形成與電 接電極，可以使設計與電子 高。 ’藉由具備與導電部電氣連接 子元件之電極形狀相對應之連 元件之連接結構時之自由度提 此外 本發明之半導體裝置之製造方法具有：準備具有 111145.doc 1325686 第1面和與前述第1面相反側之第2面之半導體基板之步 驟；在前述半導體基板之前述第1面上形成第1電極之步 驟；在前述半導體基板之前述第丨面上形成第2電極之步 驟；在前述半導體基板之前述第丨面上形成電氣連接在前 述第1電極上之佈線之步驟；藉由在前述半導體基板之前 述第1面上形成電氣連接在前述佈線上之外部連接端子， 而電氣連接前述第1電極和前述佈線之步驟；在前述半導 體基板和前述外部連接端子之間形成應力緩和層之步驟； 在前述半導體基板之前述第2面上形成具有包括前述第2電 極之背面至少-部分之底面的溝部之步驟；在前述溝部之 側壁上形成絕緣膜之步驟；及在前述溝部内形成電氣連接 電子元件和前述第2電極之導電部之步驟。 在本發明之半導體裝置之製造方法中，因為從未形成第 2電極之半導體基板之第2面形成溝部，所以形成電氣連接 在第2電極上之導電部變得容易。
此外，在溝部之側壁形成絕緣膜後，在溝部形成盘第2 電極電氣連接之導電部’故導電部和半導體基板形成可良 好取得絕緣之狀態。 藉此’可從第2電極經由導電部對電子元件正確給與屬 壓’並可良好驅動電子元件。 在本發明之半導體裝置之製造方法中’希望形成 月'J述溝部之步驟使用微影法及蝕刻法。 本發明之半導體裝置之製造方法， ^ T错由使用微影法及 飯刻法’在半導體基板上高精度地形成溝部。 111145.doc 1325686 此外，在本發明之半導體裝置之製造方法中，希望包括 在前述半導體裝置之前述第2面上形成與前述導電部電氣 連接之連接電極之步驟…併形成前述連接電極及前述導 電部。 ，本發明之半導體裝置之製造方法，藉由-併形成連接電 極和導電部，可有效地製造半導體裝置，且可降低半導體 裝置之製造成本。 此外，在本發明之半導體裝置之製造方法中，希望包括 在前述半導體基板上一併形成複數半導體裝置之步驟和每 個前述半導體裝置切斷前述半導體基板之步驟，獲得被單 個化之複數半導體裝置。 本發明之半導體裝置之製造方法，在基板上同時形成複 數半導體裝置，其後每個半導體裝置切斷該基板，藉此可 有效地製造半導體裝置，且可降低半導體裝置之製造成 本。 本發明之電子零件具有：具有第丨面和與前述第丨面相反 侧之第2面的半導體基板；形成於前述半導體基板之前述 第1面上之外部連接端子；形成於前述半導體基板之前述 第1面上，並與前述外部連接端子電氣連接之第丨電極；形 成於前述半導體基板之前述第2面或上方之電子元件；電 氣連接到前述電子元件上之第2電極；形成於前述半導體 基板之前述第2面上，並具有包括前述第2電極背面至少一 4分之底面的溝部；形成於前述溝部之内部，與前述第2 電極之背面電氣連接，並與前述電子元件電氣連接之導電 111145.doc 1325686 部，及密封前述電子元件之密封構件。 本發明t電子零件在半導體基板之第2面上形成電子元 件，藉ώ f氣連接該電子元件#導電冑，可經由導電部使 第2電極和電子元件電氣連接。 此外，由於第1電極與外部連接端子電氣連接，所以可 實現能夠與外部機器等連接之電子零件整體之小型化及薄 型化。 ' 再者，因電子元件由密封構件密封，所以可實現電子零 件整體之小型化及拜型化，並可良好地驅動電子元件。 此外，在本發明之電子零件中，希望前述密封構件離開 前述半導體基板之前述第2面而配置，具有與前述密封構 件之前述半導體基板的前述第2面相對之相對面，前述電 子元件形成於前述相對面上。 本發明之電子70件因在密封構件之相對面形成電子元 件，所以使電子元件和導電部電氣連接，藉此可進行電子 元件之密封。 故而，藉由簡易之結構，可獲得被密封之電子零件。 此外，在本發明之電子零件中，希望包括保持前述電子 元件之支承基板，前述密封構件離開前述半導體基板之前 述第2面而配置，前述支承基板被配置於前述密封構件與 前述半導體基板之間β 本發明之電子零件因在支承基板上形成電子元件，因而 能夠以良好地支持電子元件之狀態使電子元件和導電部電 氣連接。 111145.doc •12· 1325686 從而，可以良好地驅動電子元件。 此外’在本發明之電子零件中，希望包括保持前述電子 元件’離開前述半導體基板之前述第2面而配置之支承基 板’前述密封構件密封由前述支承基板保持之前述電子元 件’並具有電氣連接在前述電子元件上之電子元件電極。 本發明之電子零件因保持於支承基板上之電子元件由密 封構件所密封，故藉由使形成於密封構件上之電子元件電 極和導電部電氣連接，可實現小型化、薄型化，並良好地 驅動電子元件。 此外，在本發明之電子零件中，希望具備形成於前述半 導體基板之前述第2面上，並電氣連接前述導電部和前述 電子元件之連接電極。 本發明之電子零#，例如藉由形成與電子元件之電極形 狀對應之連接電極，可使電子元件和第2電極之導通狀態 良好。
本發明之電路基板安裝有上述之電子零件。 本發明之電路基板可提供安裝有已實現小型化、薄型化 之電子零件之電路基板（印刷佈線板等）。 從而，在將該電路基板安裝於電子機器等上時，亦可防 止電子機器整體之大型化。 本發明之電子機器安裝有上述之電子零件。 薄型化 本發明之電子機器可提供安裝有已實現小型化 之電子零件之電子機器β 從而，可獲得小型化之電子機器 111145.doc 1325686 【實施方式】 [半導體裝置之一實施形態] 以下，參照圖1至圖6就本發明之半導體之一實施形態加 以說明。 本實施形態之半導體裝置1如圖1所示，具備矽基板（半 導體基板）10和連接部20。 連接部20形成於矽基板1〇之第1面i〇a上，並與作為外部 機器之印刷佈線板（電路基板）p和形成於第1面l〇a上之電極 或佈線電氣連接。 如圖1所示，在矽基板10上，在與第1面l〇a相反側之第2 面l〇b上形成溝部11。 溝部11之底面包括第2電極23之背面。 此外，在溝部11之内部形成填充有導電性材料之導電部 12 〇 此外，在溝部11之側壁形成絕緣膜13，導電部12和矽基 板10被電氣絕緣。 此外，在矽基板10之第2面10b之表面，在形成有溝部11 之區域以外之區域形成背面絕緣層14。 在該背面絕緣層14上，作為電子元件，如圖3所示，形 成與例如彈性表面波元件「SAW(Surface Acoustic Wave)」之 電極相對應之背面電極（連接電極）15。 連接部20具有形成於矽基板1〇之第1面10a上之基底層 21、形成於基底層21之複數特定區域各個之第1電極22及 第2電極23、第1絕緣層24及形成於該第1絕緣層24上之佈 111145.doc •14· 1325686 線部30。 於此’基底層21由例如氧化矽（Si02)、氯化矽（Si3N4)等 絕緣性材料形成。 此外’作為第1電極22及第2電極23之材料，可列舉鈦 (Τι)、氣化鈦（TiN)、鋁（A丨）、銅（Cu)或包括此等之合金 等。 此外’除形成有第1電極22及第2電極23之區域外，第1 絕緣層24還形成於>5夕基板1 〇上。 再者’在矽基板10上如圖2所示，即使形成複數電極也 可以°但在本實施形態中，僅就第1電極22及第2電極23加 以說明。 此外’第2電極23即使被第1絕緣層24覆蓋也可以。 再者’在基底層21之下形成例如具有電晶體或及記憶元 件之積體電路。 而且，該積體電路與第i電極22及第2電極23電氣連接。 如圖1及圖2所示，佈線部3〇具備第【佈線（佈線）31、金 屬膜32、第2絕緣層（應力緩和層）33、第2佈線（佈線）34和 第3絕緣層35。 第1佈線（佈線）31與形成於第i絕緣層24上之第i電極22 電氣連接。 金屬膜32形成於第2電極23之表面。 第2絕緣層（應力緩和層）33形成於第丨佈線（佈線）31及金 屬膜32上》 第2佈線（佈線）34形成於第2絕緣層33上，並與第【佈線 111145.doc -15- 1325686 3 1電氣連接。 第3絕緣層35形成於第2佈線34上。 此外’藉由第1佈線31之局部從第2絕緣層33露出，形成 焊接部36。 焊接部36與第2佈線34電氣連接。 再者’在第2佈線34上形成凸起（外部接線端子）37，半 導體裝置1經由該凸起37電氣連接在印刷佈線板p上。 此外，第3絕緣層35除形成有凸起37之區域外，還形成 於第2絕緣層33上及第2佈線34上。 此外’第1電極22經由第1佈線31及第2佈線34與凸起37 電氣連接。 此外，第2電極23形成於在矽基板1〇之第1面1〇3上形成 之基底層21上。 此外’第2電極23之背面之一部分構成溝部之底面。 藉此’在溝部11之内部，第2電極23之背面23 a與導電部 12之第1端部12a被電氣連接。 此外，導電部12之第2端部12b與形成於矽基板10之第2 面10b上之背.面電極15電氣連接。 即，第2電極23可與在矽基板1〇之第2面l〇b上形成之電 子元件電氣連接。 此外，作為第1佈線31及第2佈線34之材料，可列舉金 (Au)、銅（Cu) ' 銀（Ag)、鈦（Ti)、鶴（W)、鈦鎢（TiW)、氮 化鈦（TiN)、鎳（Ni)、鎳釩（NiV)、鉻（Cr)、铭（A1)、鈀（Pd) 等。 111145.doc •16· 〈S ) 1325686 第1佈線3 1及第2佈線34之各個結構可以係上述材料之單 層結構，也可以係組合複數層之層積結構。 此外’第1絕緣層24、第2絕緣層33及第3絕緣層35係由 樹脂（合成樹脂）形成。 作為用於形成此等第i絕緣層24、第2絕緣層33及第3絕 緣層3 5之材料，係聚醯亞胺樹脂、矽變性聚醯亞胺樹脂、 環氧樹騸、矽變性環氧樹脂、丙烯樹脂、酚酚樹脂、 BCB(benzoCyd〇butene ;苯并環 丁烯）及 ρΒ〇(ρ〇ι_ηζ_ζ〇^ ; 聚笨并°惡β坐）等、有絕緣性之材料。 再者，第1絕緣層24也可以由二氧化石夕（Si〇2)、氣化石夕 (S^N4)等絕緣性材料形成。 此外，金屬膜32之材料最好係與第丨佈線31及第2佈線34 相同之材料。 作為金屬膜32之材料，可以你a T J 以使用 Au、TiW、Cu、Cr、
Ni ' Ti、W、NiV、A1 等金屬。 此外，金屬膜32也可以層積此等金屬形成。 再者’金屬膜（在層積結構狀態下，至少Μ )32最好使 用比電極耐腐蝕性還高之材 可才斗，例如使用Au、TiW、Cr形 成》 如此一來，可阻止電極 <腐钱’防止電氣性不佳的發 生。 [半導體裝置之製造方法] 以下，一面參照圖4A〜圖4Γ Β θ 囫4C及圖5Α〜圖5C—面就半導 體裝置1之製造方法加以說明。 H1145.doc •17· (S ) 1325686 於此，在本實施形態中，半導體裝置丨在相同矽基板（半 導體基板）100上一併同時形成複數（參照圖6)。 以下說明之圖4A〜圖4C及圖5A〜圖5C之各圖顯示形成一 個半導體裝置1之情形。 首先，如圖4A所示，在矽基板1〇之第1面1〇3上形成基底 層21。 其後’在基底層21上形成第1電極22及第2電極23 » 而且，在第1電極22及第2電極23上形成第！絕緣層24， 並藉由衆所周知之微影法及蝕刻法，去除覆蓋第1電極22 及第2電極23之絕緣材料。 再者’覆蓋第2電極23之絕緣材料亦可不一定要去除。 接著’在包含第1電極22之第1絕緣層24上形成第1佈線 31 ’並在第2電極23之表面形成金屬膜32。 作為第1佈線3 1之形成方法’例如按Tiw、Cu之順序藉 由濺射法形成後，再藉由以電鍍法形成Cu之方法來進行。 其次，以覆蓋第1佈線31及金屬膜32之方式形成第2絕緣 層33 〇 其後’藉由衆所周知之微影法，去除與第2絕緣層33之 焊接部36對應之區域。 藉此’第1佈線31之一部分露出，形成焊接部36。 其次，為連接在焊接部36上’在第2絕緣層33上形成第2 佈線34。 其後’去除弟2絕緣層33上及第2佈線34上之凸起37形成 之區域，為覆蓋第2絕緣層33及第2佈線34而形成第3絕緣 111145.doc -18. (. 1325686 層35。 接著’如圖4B所示’藉由在矽基板1〇之第2面i〇b上使用 光阻40作為掩模而施以乾式蝕刻法，去除與第2電極23對 應之部分的矽基板1〇及基底層21。 藉此’如圖4C所示，從矽基板1〇之第2面i〇b至形成於第 1面10a上之第2電極23之背面23a露出，進行蝕刻，形成溝 部11。 再者，雖然將光阻4 〇作為掩模，但並不限於此，例如作 為硬掩模，可使用氧化矽膜’也可併用光阻掩模及硬掩 模。 此外，作為蝕刻法，並不限於乾式蝕刻法，還可使用濕 式姓刻、雷射加工或併用此等方法。 接著’如圖5A所示’在矽基板10之第2面i〇b上及溝部^ 之内壁上形成背面絕緣層14及絕緣膜13。 背面絕緣層14及絕緣膜13防止電流洩漏之產生、因氧及 水分等引起之半導體基板1〇之腐蝕等。 .作為背面絕緣層14及絕緣膜13之材料，可使用採用 PECVD(Plasma Enhanced Chemical Vapor Depositi〇n)形成之四 乙基石夕酸醋（Tetra Ethyl Ortho SiUcate:Si(〇C2H5)4 ··以下稱 TEOS)’即PE-TEOS，以及採用臭氧CVD形成之TEOS，即 採用〇3-TEOS或CVD形成之氧化石夕（Si〇2)。 再者，背面絕緣層14及絕緣膜13如果有絕緣性，可以係 其他材料，也可以係樹脂。 然後，藉由乾式蝕刻法或雷射加工去除形成於第2電極 llU45.doc -19- 1325686 23之背面23a之絕緣膜13，如圖5B所示，第2電極23之背面 23a露出。 此外，在溝部11之侧壁上殘留絕緣層13。 其次，使用電化學電鍍法（ECP)，對溝部η之内部進行 電鍍處理，形成為了在溝部11之内側形成導電部12之導電 性材料，導電部12之第1端部12a和露出之第2電極23由第2 電極23之背面23a電氣連接。 作為用於形成導電部12之導電性材料，例如可使用銅 (Cu)。 從而’在溝部11後入銅（Cu)。 在本實施形態中，在形成導電部12之步驟中包括例如用 濺射法形成（層積）TiN、Cu之步驟和用電鍍法形成Cu之步 驟》 再者，也可以包括用濺射法形成（層積）Tiw、Cu之步驟 和用電鍍法形成Cu之步驟。 再者，作為導電部12之形成方法，不限於上述之方法， 也可以埋入導電糊、溶融金屬、金屬線等。 再者，在本實施形態中，雖然藉導電部12將溝部u之内 埋入，但即使不完全埋入，亦可在溝部11之内壁形成導 電部12，並由第2電極23之背面23a電氣連接。 在形成導電部丨2後，如圖5C所示，在矽基板1〇之第2面 1〇1)上形成與導電部12電氣連接之背面電極15。 再者，在形成背面電極15之際，也可同時形成背面電極 15和導電部12。
111145.doc -20· (S 1325686 即’可一併形成背面電極丨5和導電部i 2 β 其次’在形成於矽基板1〇之第1面10&上之第2佈線34上 例如搭載由無鉛焊錫構成之凸起37。 再者’在形成凸起37之際’可以在第2佈線34上搭載焊 錫球，也可以將焊膏印刷到第2佈線34上。 藉由以上之步驟，可在一塊矽基板1〇〇上一併同時形成 複數半導體裝置1。 其次，如圖6所示，藉由切割裝置11〇 ,針對每個半導體 裝置1而將石夕基板1〇〇切割（切斷）。 如此，在矽基板100上幾乎同時形成複數半導體裝置1， 其後’針對每個半導體裝置1而切斷該矽基板1〇〇，使圖1 所示之半導體裝置1單個化，而可得到複數。 如此一來’可有效地製造半導體裝置1，且可降低半導 體裝置1之製造成本。 根據本實施形態之半導體裝置i，藉由在到達第2電極23 之溝。P 11之内部形成導電部丨2 ,可經由導電部12與第2電 極23和電子元件電氣連接。 此外，因為第1電極22和凸起37被電氣連接，故而可以 實現能與外部機器等連接之半導體裝置丨整體的小型化、 薄型化及高功能化。 [電子零件之第1實施形態] 其次，參照圖7就在上述半導體裝置丨上作為電子元件安 裝有SAW元件（電子元件）6〇之電子零件5〇之第！實施形態 加以說明。 llll45.doc -21 - < S -) 1325686 此外，在以下說明之各實施形態中，纟肖上述一實施形 態之半導體裝置1共同結構之處附有相同符號，從而省略 說明》 在用於本實施狀態之電子零件5〇之半導體裝置51中，除 未形成背面電極15之點外，具有與上述半導體裝置丨相同 之結構。 電子零件50如圖8所示，具有壓電薄膜和與壓電薄膜相 接之梳形電極61。 而且，電子零件50如圖7所示，形成於矽基板1〇之第2面 10b 上。 此外’ SAW元件60與導電部12之第2端部12b電氣連接， 並直接形成於第2面l〇b上。 此外’在矽基板1〇之第i面l〇a上形成具有例如電晶體、 記憶體元件之積體電路。 導電部12之第1端部i2a經由該積體電路和第2電極23電 氣連接。 從而’形成於矽基板10之第2面10b上之電子元件60和形 成於石夕基板10之第1面l〇a上之積體電路經由導電部12電氣 連接。 另外’電子零件50具有密封構件52。 在密封構件52和矽基板1〇之第2面l〇b之間藉由配置SAW 元件60，SAW元件60被密封。 在本實施形態中，密封構件52由玻璃基板形成’但也可 以係矽基板。 111145.doc •22· 1325686 密封構件52離開矽基板10之第2面l〇b而配置。 矽基板10之第2面10b之周邊部和密封構件52之内面52a 之周邊部由黏接劑層53所黏接。 作為黏接劑層53之材料，例如可列舉聚醯亞胺樹脂等之 合成樹脂。 而且，由矽基板10之第2面l〇b、密封構件52之内面52a 及黏接劑層53包圍之内部空間55被大致密閉（密封），在其 内部空間55配置SAW元件60。 [電子零件之製造方法] 接著’就電子零件50之製造方法加以說明。 首先，藉由與上述半導體裝置丨之製造方法相同之步 驟，在形成導電部12後，在矽基板1〇之第2面1〇b上形成 SAW元件60。 在形成SAW元件60之步驟中包括形成壓電薄膜之步驟、 為與壓電薄膜相接而形成圖8所示之梳形電極“之步驟和 保護膜之步驟。 再者，在形成SAW元件60之步驟中包括將電漿等照射到 SAW元件60上進行頻率調整之步驟。 作為壓電薄膜之材料，可列舉氧化辞（Zn〇)、氮化紹 (Am)、鈮酸鋰（LiNb〇3)、鈕酸鋰（LiTa〇3)、鈮酸鉀 (KNb03)等。 作為梳形電極61之材料，可列舉包含銘之金屬。 作為保護膜之材料，可列兴 . π 』糾举虱化矽（Sl〇2)、氮化矽 (Si3N4)、氮化鈦（TiN)等。 111145.doc -23· 1325686 而且’所形成之SAW元件60在矽基板10之第2面i〇b上， 與導電部12之第2端部12b電氣連接。 其次’在石夕基板10之第2面l〇b及密封構件52之内面52a 中至少一方形成用於形成黏接劑層53之黏接劑。 作為黏接劑層5 3 ’可使用例如感光性之聚酿亞胺黏接劑 等。 而且，經由該黏接劑層53，以矽基板1〇之第2面1〇b與密 封構件52之内面52a相向之方式接合矽基板1〇和密封構件 52 〇 藉此，可獲得如圖7所示之電子零件5〇。 於此’作為密封SAW元件60之構造，可採用將内部空間 55幵> 成真空之真空密封、用Ν2、αγ、He等之特定氣體置換 内部空間55之氣體置換密封等之構造。 此外’當黏接合矽基板1〇和密封構件52時，也可以沿石夕 基板10之第2面l〇b之周邊部形成金屬突起，在密封構件52 之内面52a形成為與前述金屬突起接合之金屬層，經由金 屬突起及金屬層接合矽基板10和密封構件52。 ®在在封構件52使用透過性之玻璃時，在密封步驟之 後’可藉由使雷射等透過玻璃進行SAW元件60之頻率調 整。 其後’在形成於矽基板1〇之第1面l〇a之第2佈線34上搭 載例如由無鉛焊錫構成之凸起37。 此外’在形成凸起37之際，可以在第2佈線34上搭載焊 錫球’也可將垾錫膏印刷於第2佈線34上。 111145.doc •24· 1325686 在如此之電子零件5〇 _ +忭…之Ik方法中，與半導體裝置1之 製造方法同樣’在同―碎基板（半導體基板）上-併同時形 成半導體裝置50、SAW元件6〇及密封構件52等。 與半導體裝置1之劁衿古、土 π 表知方法相同’藉由使用切割裝置 110，而切割（切斷）成每個電子零件50〇 藉此，可以低成本製造電子零件50。 裝k出來之電子零件50蹲 4凸起37搭载於印刷佈線板P等 上。 在本實施形態之電子裳株s n由 ,^ ^ 茶件50中，在矽基板10之第2面10b 上形成SAW元件60，並連接莫番如1Λ 迷接導電部12之第2端部12b和該 SAW元件60。 在此情况下，先在石夕其故〗n +结， _ 土板10之第1面1〇a上形成驅動控制 SAW元件60之積體電路，可缒由遙 J φ導電部12電氣連接SAW元 件60和積體電路。 從而’可實現電子零件5G整體之小型化、.薄型化，並良 好地驅動SAW元件60。 "因為SAW元件6G在密封構件52與第2面1Gb之間被 ㈣’故而可實現小型化、薄型化’並良好地密封讀元 件60 ’可良好地驅動saw元件60。 〔電子零件之第2實施形態〕 其次’參照圖9，就作為電子元件，saw元件71被安裝 於上述半導體裝置i上之電子零件7〇之第2實施形態加以說 明。 再者，在以下說明之各實施形態中，對與上述第i實施 111145.doc -25- 1325686 形態之電子零件5 0之結構共同之處附有相同符號，故省略 說明。 本實施形態之電子零件70在SAW元件71未形成於矽基板 10之第2面10b上，而形成在離開矽基板1〇之第2面i〇b所配 置之密封構件52上之點，與第1實施形態不同。 SAW元件71形成於與矽基板10之第2面l〇b相向之密封構 件52之内面（相向面）52a上。 此外，在SAW元件71上形成與矽基板1〇之第2面i〇b相向 之端子72。 在半導體裝置73上’背面電極（連接電極）54形成於矽基 板10之第2面10b的溝部11上。 而且，該背面電極54和導電部12之第2端部12b被電氣連 接。 背面電極54形成於與SAW元件71之端子72對應之位置。 即，第2電極23經由導電部12及背面電極54與形成於密 封構件52之内面（相向面）52a之SAW元件71電氣連接。 此外，密封構件52由例如矽基板、水晶基板、包含矽及 金剛石之基板所構成》 說明電子零件70之製造方法。 首先，在密封構件52之内面52a上預先形成SAW元件 71。 其次，在矽基板10之第2面10b上形成背面電極54。 其次，在密封構件52之内面52a上形成SAW元件71。 此外，也形成端子72。 111145.doc •26- 1325686 其次，為了背面電極54和端子72電氣連接，經由黏接劑 層53接合石夕基板1〇和密封構件a。 藉此，可獲得圖9所示之電子零件7〇。 再者，在使背面電極54和端子72黏接合之步驟也可以 藉由黏接劑層53之收縮將背面電極54和端子72壓接起來。 藉由本實施形態之電子零件7〇，在有別於石夕基板1〇之構 件上，即密封構件52上形成SAW元件71，故saw元件”不 易受到給與矽基板10之熱應力和膜應力之影響可以獲得 良好之特性。 [電子零件之第3實施形態] 其次，參照圖ίο，就作為電子元件，SAW元件81被安裝 於上述半導體裝置1上之電子零件8〇之第3實施形態加以說 明。 在本實施形態之電子零件80中，在SAW元件81未形成於 矽基板10之第2面l〇b上，而SAW元件81形成於支承基板82 上之點，與第2實施形態不同。 支承基板82配置於矽基板1〇之第2面i〇b與離開矽基板1〇 之第2面l〇b所配置之密封構件52之間。 此外，SAW元件81形成於與矽基板1〇之第2面i〇b相向之 支承基板82之面82&上。 再者’在SAW元件81上’與電子零件7〇之第2實施形態 同樣，形成有與矽基板10之第2面i〇b相向之端子83。 而且，該端子83與背面電極54被電氣連接》 藉由本實施形態之電子零件8〇，因為在有別於矽基板1〇 111145.doc •27· 1325686 之構件，即支承基板82上形成SAW元件81，故SAW元件81 難以受到給與矽基板10之熱應力或膜應力之影響，因而可 以獲得良好之特性。 此外’藉由支承基板82，在良好地支承saw元件8 1之狀 態下’可以使SAW元件81和導電部12電氣連接。 [電子零件之第4實施形態] 其次，參照圖11，就作為電子元件，在上述半導體裝置 1上安裝AT振子（水晶振子）9 1之電子零件9〇之第4實施形態 .加以說明。 本實施形態之電子零件90在AT振子91被保持於支承基板 92上之狀態下由密封構件93所密封之點，與第2實施形態 不同。 支承基板92離開石夕基板1 〇之第2面1 〇b而配置。 AT振子91形成於與矽基板1〇之第2面i〇b相向之支承基板 92之内面92a。 AT振子91被由形成於支承基板92和矽基板1〇之第2面l〇b 之間之玻璃基板構成的密封構件93密封。 並且’由支承基板92之内面92a和密封構件93之内面93a 包圍之内部空間95被大致密閉（密封）。 此外’在密封構件93上，在與矽基板1〇之第2面i〇b相向 之面上形成有電子元件電極94。 此外’電子元件電極94以覆蓋密封構件93之方式形成。 而且’該電子元件電極94和背面電極54被電氣連接。 即’第2電極23經由形成於矽基板1〇上之導電部12及形
111145.doc -28- i S 1325686 成於石夕基板10之第2面10b上之背面電極54，與at振子91電 氣連接。 此外’矽基板10之第2面10b之周邊部和支承基板92之周 邊部由密封樹脂96所密封。 此外，第2面10b與密封構件93之間由密封樹脂96所密 封。 藉由本實施形態之電子零件90，因為保持於支承基板92 上之AT振子由密封構件93所密封，故可使形成於密封構件 93上之電子元件電極94和導電部12電氣連接。 此外，可實現小型化、薄型化、並可良好地驅動電子元 件。 [電子機器] 圖12係顯示搭載上述電子零件5〇、7〇 ' 8〇、卯之任一個 之電子機器一例之圖，係顯示行動電話3〇〇之圖。 因為搭載有已實現小型化、薄型化及高功能化之本發明 之電子零件’所以可實現小型之行動電話300。 再者，本發明之技術範圍並不限定於上述實施形態，在 不脫離本發明之宗旨的範圍内可賦予種種之變更。 例如，雖然在上述半導體裝置丨之一實施形態形成背面 電極15，但電子零件之電極也可以直接連接在導電部12之 第2端部12b上。 命此外在連接於SAW元件60、71、81或AT振子91之背面 電極15、54之表面或導電部。之第2端部m之表面，為了 容易進行金屬連接，希望形成金等之表面處理，或焊料 111145.doc •29· 1325686 (鍵 SnAg 等）。 此外’在上述各實施形態中，除在最終 外，也可以㈣當之㈣（中途蝴中進行單個化處理。 再者，在错由玻璃基板構成密封構件52、Μ之情况下， 在切割（切斷）由該玻璃基板構成之密封構件&二時，也 可以藉由參照圖6說明之切割裝置m進行切割，但也可以 藉由照射雷射進行㈣、或採用乾式_或濕式㈣之手 法進行切割。 此外，作為本發明之電子元件，在第丨、第2、第3實施 形態採用SAW元件進行說明，但不限於此，也可以係必需 密封結構之元件，例如水晶振子、壓電振子、壓電音又 等。 此外，在第4實施形態雖然利用Ατ振子（水晶振子）加以 說明，但不限於此，也可以係必需密封結構之元件，例如 SAW元件、壓電振子、壓電音又等。 此外，根據需要，也可以在矽基板1〇上形成連接部3〇之 後，進行矽基板10之薄型化。 說明使矽基板10變薄之方法。 首先’使用藉由紫外光（UV光）之照射可剝離之黏接劑， 在石夕基板10之第1面10a側黏貼未圖示之玻璃板。 該玻璃板係稱為WSS(Wafer Support System;晶圓支撑 系統）者之一部分，在玻璃板上支承矽基板1 〇後，在黏貼 該玻璃板之狀態下，針對矽基板10之第2面10b進行研磨處 理、乾式钱刻處理或濕式钱刻處理等之特定處理。 111145.doc •30- 1325686 藉此，石夕基板1 〇可以變薄。 【圖式簡單説明】 圖1係顯示本發明—實施形態之半導體裝置之斷面圖。 圖2係圖1之半導體裝置之Α箭視之平面圖。 圖3係圖1之半導體裝置之b箭視之平面圖。 圖4 A〜圖4C係顯示本發明一實施形態之半導體裝置之 製造方法之斷面圖。 圖5A〜圖5C係顯示本發明一實施形態之半導體裝置之製 造方法之斷面圖。 圖6係顯示本發明一實施形態之半導體裝置之製造方法 之斷面圖。 圖7係顯示第1實施形態之電子零件之斷面圖。 圖8係顯示圖7之電子零件之電極之平面圖。 圖9係顯示本發明第2實施形態之電子零件之斷面圖。 圖10係顯示本發明第3實施形態之電子零件之斷面圖。 圖11係顯示本發明第4實施形態之電子零件之斷面圖。 圖12係顯示搭載有本發明之電子零件之電子機器之圖。 【主要元件符號説明】 半導體裝置 10 10a 10b 11 12 矽基板（半導體基板） 第1面 第2面 溝部 導電部 111145.doc -31 - 1325686
13 絕緣膜 22 第1電極 23 第2電極 23a 背面 31 第1佈線（佈線） 33 第2絕緣層（應力緩和層） 34 第2佈線（佈線） 37 凸起（外部連接端子） 50 ' 70 ' 80 ' 90 電子零件 52 密封構件 52a 内面（相向面） 54 背面電極（連接電極） 60 ' 71、81 SAW元件（電子元件） 82、 92 支承基板 91 AT振子（水晶振子、電子元件） 94 電子元件電極 300 行動電話（電子機器） P 印刷佈線板（電路基板） 111145.doc ·32·

Claims (1)

  1. Γ325686 第095119256號專利申請案 中文申請專利範圍替換本(98年8月） 十、申請專利範園： 1. 一種半導體裝置，其具有： 具有第1面和與前述第i面相反側之第2面的半導體美 板； 形成於前述半導體基板之前述第丨面上之外部連接端 子； 形成於前述半導體基板之前述第丨面上，並與前述外 部連接端子電氣連接之第1電極； 形成於前述半導體基板之前述第2面上或上方之電子 元件； 形成於前述半導體基板之前述第丨面上，且電氣連接 在前述電子元件上，並具有表面和背面之第2電極； 形成於前述半導體基板之前述第2面上，並具有包括 前述第2電極之前述背面至少—部分之底面的溝部；及 形成於前述溝部之内部，並與前述第2電極之前述背 面電氣連接之導電部。 2.如請求項1之半導體裝置，其中具有· 形成於前述半導體基板之前述第1面上，並使前述第丄 電極和前述外部連接端子電氣連接之佈線；及 形成於前述半導體基板與前述外部連接端子之間之應 力緩和層》 ’ 3·如請求項_之半導體裝置’其中在前述第：電極之前 述表面形成有與前述佈線相同材料的金屬膜。 4·如請求項⑷之何體裝置，其中具有形成於前述半導 111145-980814.do< 體基板之則述第2面上，並與前述導電部電氣連接之連 接電極。 如呷求項3之半導體裝置，其中具有形成於前述半導體 基板之刖述第2面上’並與前述導電部電氣連接之連接 電極。 6_ 一種半導體裝置之製造方法，其具有： 準備具有第1面和與前述第丨面相反側之第2面的半導 體基板之步驟； 在則述半導體基板之前述第1面上形成第1電極之步 驟； 在前述半導體基板之前述第〗面上形成具有表面和背 面之第2電極之步驟； 在刚述半導體基板之前述第丨面上形成電氣連接在前 述第1電極上之佈線之步驟； 藉由在前述半導體基板之前述第丨面上形成電氣連接 在前述佈線上之外部連接端子，而電氣連接前述第1電 極和前述佈線之步驟； 在前述半導體基板和前述外部連接端子之間形成應力 緩和層之步驟； 在前述半導体基板之前述第2面上形成具有包括前述 第2電極之前述背面至少一部分之底面的溝部之步驟； 在前述溝部之側壁形成絕緣膜之步驟；及 在前述溝部内形成電氣連接電子元件和前述第2電極 之導電部之步驟。 111145-980814.doc =清求項6之半導體裝置之製造方法其中形成前述溝 I5之步驟使用微影法及兹刻法。 g . 咬 °月求項6或7之半導體裝置之製造方法，其中包括： y / 月述半導體基板之前述第2面上形成與前述導電部 電氣連接之連接電極之步驟； 别述連接電極及前述導電部被一併形成。 9.如清求項6或7之半導體裝置之製造方法，其中包括： 在前述半導體基板上一併形成複數半導體裝置之步 驟；及 藉由切斷前述半導體基板，將前述半導體裝置分割成 各個之步驟； 獲得單個化之複數半導體裝置。 1〇·如請求項8之半導體裝置之製造方法，其中包括： 在前述半導體基板上一併形成複數半導體裝置之步 驟；及 藉由切斷前述半導體基板，將前述半導體裝置分割成 各個之步驟； 獲得單個化之複數半導體裝置。 11. 一種電子零件，其具有： 具有第1面和與前述第1面相反侧之第2面的半導體基 板； 形成於前述半導體基板之前述第1面上之外部連接端 子； 形成於前述半導體基板之前述第1面上，並與前述外 111145-980814.doc 部連接端子電氣連接之第1電極； 形成於前述半導體基板之前述第2面上或上方之電 元件； + 電氣連接在前述電子元件上之第2電極； 形成於前述半導體基板之前述第2面上，並具有包括 别述第2電極之背面至少一部分之底面的溝部； 形成於前述溝部之内部，與前述第2電極之背面電广 連接，並與前述電子元件電氣連接之導電部；及 乳 密封前述電子元件之密封構件。 12. 如請求㈣之電子零件，其中前述密封構件離開前 導體基板之前述第2面而配置，並具有與前述密封構件 上之前述半導體基板之前述第2面相向之相向面； 前述電子元件形成於前述相向面上。 13. 如請求項^之電子零件’其中包括保持前述電子 支承基板； 前職封構件離開前述半導體基板之前述第2面而配 置’則述支承基板被配置於前述密封構件和前 基板之間。 眩 14.如請求項11之電子零件盆 冬仵#中包括保持前述電子元件， 離開前述半導體基板之前述第2面所配置之支承美 前述密封構件密封由前述支承基板保持之前^電子元 :，並具有電氣連接在前述電子元件上之電子元件電 其中具有形成於 15.如請求項^至^卡任一項之電子零件 111145-980814.doc Γ325686 16. 17. 前述半導體基板之前述第2面上，電氣連接前述導電部 和前述電子元件之連接電極。 一種電路基板，其安裝有如請求項11至15中任一項之電 子零件。 一種電子機器，其安裝有如請求項11至15中任一項之電 子零件。 111145-980814.doc
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US20190043786A1 (en) 2019-02-07
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