TWI313755B - Pattern generator and testing device - Google Patents

Pattern generator and testing device Download PDF

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Publication number
TWI313755B
TWI313755B TW093115609A TW93115609A TWI313755B TW I313755 B TWI313755 B TW I313755B TW 093115609 A TW093115609 A TW 093115609A TW 93115609 A TW93115609 A TW 93115609A TW I313755 B TWI313755 B TW I313755B
Authority
TW
Taiwan
Prior art keywords
pattern
sequence
data block
block
test
Prior art date
Application number
TW093115609A
Other languages
English (en)
Chinese (zh)
Other versions
TW200508633A (en
Inventor
Hiroyasu Nakayama
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of TW200508633A publication Critical patent/TW200508633A/zh
Application granted granted Critical
Publication of TWI313755B publication Critical patent/TWI313755B/zh

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/31813Test pattern generators
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
TW093115609A 2003-06-09 2004-06-01 Pattern generator and testing device TWI313755B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003163461 2003-06-09

Publications (2)

Publication Number Publication Date
TW200508633A TW200508633A (en) 2005-03-01
TWI313755B true TWI313755B (en) 2009-08-21

Family

ID=33508753

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093115609A TWI313755B (en) 2003-06-09 2004-06-01 Pattern generator and testing device

Country Status (8)

Country Link
US (1) US7472327B2 (fr)
EP (1) EP1640735B1 (fr)
JP (1) JP4378346B2 (fr)
KR (1) KR100882361B1 (fr)
CN (1) CN100462731C (fr)
DE (1) DE602004011614T2 (fr)
TW (1) TWI313755B (fr)
WO (1) WO2004109307A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005043204A (ja) * 2003-07-22 2005-02-17 Advantest Corp パターン発生器、及び試験装置
WO2008099239A1 (fr) * 2007-02-16 2008-08-21 Freescale Semiconductor, Inc. Ordinateur, produit programme d'ordinateur et procédé pour contrôler un circuit logique
US7743305B2 (en) 2007-03-20 2010-06-22 Advantest Corporation Test apparatus, and electronic device
US7725794B2 (en) * 2007-03-21 2010-05-25 Advantest Corporation Instruction address generation for test apparatus and electrical device
US7716541B2 (en) * 2007-03-21 2010-05-11 Advantest Corporation Test apparatus and electronic device for generating test signal to a device under test
KR102314419B1 (ko) * 2021-07-27 2021-10-19 (주) 에이블리 반도체 테스트 패턴 발생 장치 및 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02284077A (ja) * 1989-04-25 1990-11-21 Nec Corp 論理集積回路の試験装置
JPH0438482A (ja) * 1990-06-04 1992-02-07 Fujitsu Ltd 論理回路試験装置
US5925145A (en) * 1997-04-28 1999-07-20 Credence Systems Corporation Integrated circuit tester with cached vector memories
JPH11237451A (ja) * 1998-02-23 1999-08-31 Advantest Corp 半導体試験装置のパターンジェネレータ
JP2000065904A (ja) 1998-08-21 2000-03-03 Advantest Corp 半導体試験装置
DE19955380C2 (de) * 1998-11-10 2003-10-30 Advantest Corp Prüfmustergenerator, Prüfvorrichtung und Verfahren zum Erzeugen von Prüfmustern
US6092225A (en) * 1999-01-29 2000-07-18 Credence Systems Corporation Algorithmic pattern generator for integrated circuit tester
US6505137B1 (en) * 1999-09-20 2003-01-07 Radiant Technologies, Inc. Method for operating a test system
US6567941B1 (en) * 2000-04-12 2003-05-20 Advantest Corp. Event based test system storing pin calibration data in non-volatile memory
CA2345605A1 (fr) * 2001-04-30 2002-10-30 Robert A. Abbott Methode d'essai d'une matrice memoire integree et controleur de memoire integre connexe

Also Published As

Publication number Publication date
DE602004011614T2 (de) 2009-01-29
CN100462731C (zh) 2009-02-18
CN1802569A (zh) 2006-07-12
KR20060037269A (ko) 2006-05-03
EP1640735A4 (fr) 2006-06-28
JP4378346B2 (ja) 2009-12-02
EP1640735A1 (fr) 2006-03-29
EP1640735B1 (fr) 2008-01-30
DE602004011614D1 (de) 2008-03-20
US20060161372A1 (en) 2006-07-20
JPWO2004109307A1 (ja) 2006-09-21
TW200508633A (en) 2005-03-01
KR100882361B1 (ko) 2009-02-05
US7472327B2 (en) 2008-12-30
WO2004109307A1 (fr) 2004-12-16

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MM4A Annulment or lapse of patent due to non-payment of fees