TWI305674B - - Google Patents

Download PDF

Info

Publication number
TWI305674B
TWI305674B TW91123741A TW91123741A TWI305674B TW I305674 B TWI305674 B TW I305674B TW 91123741 A TW91123741 A TW 91123741A TW 91123741 A TW91123741 A TW 91123741A TW I305674 B TWI305674 B TW I305674B
Authority
TW
Taiwan
Prior art keywords
layer
isolation structure
substrate
surface area
forming
Prior art date
Application number
TW91123741A
Other languages
English (en)
Chinese (zh)
Inventor
Ching Nan Hsiao
Chung Lin Huang
Original Assignee
Nanya Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanya Technology Corp filed Critical Nanya Technology Corp
Priority to TW91123741A priority Critical patent/TWI305674B/zh
Application granted granted Critical
Publication of TWI305674B publication Critical patent/TWI305674B/zh

Links

Landscapes

  • Element Separation (AREA)
TW91123741A 2002-10-15 2002-10-15 TWI305674B (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW91123741A TWI305674B (ja) 2002-10-15 2002-10-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW91123741A TWI305674B (ja) 2002-10-15 2002-10-15

Publications (1)

Publication Number Publication Date
TWI305674B true TWI305674B (ja) 2009-01-21

Family

ID=45071201

Family Applications (1)

Application Number Title Priority Date Filing Date
TW91123741A TWI305674B (ja) 2002-10-15 2002-10-15

Country Status (1)

Country Link
TW (1) TWI305674B (ja)

Similar Documents

Publication Publication Date Title
JP3619597B2 (ja) 半導体装置の絶縁膜形成方法
US6559029B2 (en) Method of fabricating semiconductor device having trench isolation structure
JP2012033952A (ja) 半導体素子分離方法
JP2001160589A (ja) トレンチ素子分離構造とこれを有する半導体素子及びトレンチ素子分離方法
JP2003188251A (ja) トレンチ素子分離構造を有する半導体素子及びその製造方法
JP2000012676A (ja) 半導体装置のトレンチ素子分離方法
US20020127818A1 (en) Recess-free trench isolation structure and method of forming the same
TWI253114B (en) Semiconductor device with trench isolation structure and method for fabricating the same
JP2001267413A (ja) 実質的に平坦なトレンチ分離領域を有する半導体デバイス及びその製造方法
JP3974286B2 (ja) 浅いトレンチアイソレーション方法
US6727150B2 (en) Methods of forming trench isolation within a semiconductor substrate including, Tshaped trench with spacers
JPH09191047A (ja) 半導体素子の素子分離膜及びその形成方法
JP2005328049A (ja) トレンチ素子分離膜を含む半導体素子及びその製造方法
TWI236065B (en) Method for providing an integrated active region on silicon-on-insulator devices
TWI305674B (ja)
CN1893014B (zh) 半导体元件的制作方法
JP2004040117A (ja) ダマシーンゲート及びエピタキシャル工程を利用した半導体メモリー装置及びその製造方法
JP2005191567A (ja) 半導体素子のコンタクト形成方法
US7981802B2 (en) Method for manufacturing shallow trench isolation layer of semiconductor device
KR20040110792A (ko) 반도체 소자의 얕은 트랜치 소자분리막 형성방법
JP2000031489A (ja) 半導体装置の製造方法
KR100653704B1 (ko) 반도체 소자의 트렌치 소자분리 방법 및 그에 의해 제조된트렌치 소자분리 구조
TW513775B (en) Process for device isolation
KR20040103718A (ko) 반도체 소자의 소자 분리막 형성 방법
JP2006351998A (ja) 半導体装置の製造方法及び半導体装置

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent