TWI291179B - Method for defining the initial state of static random access memory - Google Patents
Method for defining the initial state of static random access memory Download PDFInfo
- Publication number
- TWI291179B TWI291179B TW092125647A TW92125647A TWI291179B TW I291179 B TWI291179 B TW I291179B TW 092125647 A TW092125647 A TW 092125647A TW 92125647 A TW92125647 A TW 92125647A TW I291179 B TWI291179 B TW I291179B
- Authority
- TW
- Taiwan
- Prior art keywords
- initial state
- memory
- mosfets
- memory unit
- controlling
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 23
- 230000003068 static effect Effects 0.000 title claims abstract description 10
- 230000015654 memory Effects 0.000 claims abstract description 83
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 230000005669 field effect Effects 0.000 claims description 3
- 230000008859 change Effects 0.000 claims description 2
- 239000007943 implant Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000005036 potential barrier Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 description 1
- 239000006096 absorbing agent Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000006880 cross-coupling reaction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910001922 gold oxide Inorganic materials 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/262,631 US6906962B2 (en) | 2002-09-30 | 2002-09-30 | Method for defining the initial state of static random access memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200414224A TW200414224A (en) | 2004-08-01 |
| TWI291179B true TWI291179B (en) | 2007-12-11 |
Family
ID=28454433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092125647A TWI291179B (en) | 2002-09-30 | 2003-09-17 | Method for defining the initial state of static random access memory |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6906962B2 (https=) |
| JP (1) | JP2004127499A (https=) |
| KR (1) | KR101026335B1 (https=) |
| GB (1) | GB2394338B (https=) |
| TW (1) | TWI291179B (https=) |
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| JP4169592B2 (ja) * | 2002-12-19 | 2008-10-22 | 株式会社NSCore | Cmis型半導体不揮発記憶回路 |
| JP4532951B2 (ja) * | 2004-03-24 | 2010-08-25 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路の使用方法および半導体集積回路 |
| JP2006127737A (ja) * | 2004-09-30 | 2006-05-18 | Nscore:Kk | 不揮発性メモリ回路 |
| US20060139995A1 (en) * | 2004-12-28 | 2006-06-29 | Ali Keshavarzi | One time programmable memory |
| US7149104B1 (en) | 2005-07-13 | 2006-12-12 | Nscore Inc. | Storage and recovery of data based on change in MIS transistor characteristics |
| US7193888B2 (en) * | 2005-07-13 | 2007-03-20 | Nscore Inc. | Nonvolatile memory circuit based on change in MIS transistor characteristics |
| FR2891652A1 (fr) * | 2005-10-03 | 2007-04-06 | St Microelectronics Sa | Cellule de memoire vive sram asymetrique a six transistors. |
| US7835196B2 (en) * | 2005-10-03 | 2010-11-16 | Nscore Inc. | Nonvolatile memory device storing data based on change in transistor characteristics |
| US7321505B2 (en) * | 2006-03-03 | 2008-01-22 | Nscore, Inc. | Nonvolatile memory utilizing asymmetric characteristics of hot-carrier effect |
| US7414903B2 (en) * | 2006-04-28 | 2008-08-19 | Nscore Inc. | Nonvolatile memory device with test mechanism |
| US20080019162A1 (en) * | 2006-07-21 | 2008-01-24 | Taku Ogura | Non-volatile semiconductor storage device |
| US20080037324A1 (en) * | 2006-08-14 | 2008-02-14 | Geoffrey Wen-Tai Shuy | Electrical thin film memory |
| US7342821B1 (en) | 2006-09-08 | 2008-03-11 | Nscore Inc. | Hot-carrier-based nonvolatile memory utilizing differing transistor structures |
| EP2109890A4 (en) * | 2007-01-24 | 2010-02-10 | Keystone Semiconductor Inc | MOSFET CIRCUIT WITH RESIN LAYER AND APPLICATIONS |
| US7483290B2 (en) | 2007-02-02 | 2009-01-27 | Nscore Inc. | Nonvolatile memory utilizing hot-carrier effect with data reversal function |
| US7813158B2 (en) | 2007-05-14 | 2010-10-12 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Recordable electrical memory |
| JP5214328B2 (ja) * | 2007-05-31 | 2013-06-19 | 株式会社東芝 | 半導体集積回路 |
| EP2020658B1 (en) * | 2007-06-29 | 2014-06-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device and semiconductor device |
| US7518917B2 (en) * | 2007-07-11 | 2009-04-14 | Nscore Inc. | Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations |
| US7542341B2 (en) * | 2007-08-20 | 2009-06-02 | Nscore, Inc. | MIS-transistor-based nonvolatile memory device with verify function |
| US7463519B1 (en) | 2007-08-22 | 2008-12-09 | Nscore Inc. | MIS-transistor-based nonvolatile memory device for authentication |
| US7460400B1 (en) | 2007-08-22 | 2008-12-02 | Nscore Inc. | Nonvolatile memory utilizing MIS memory transistors with bit mask function |
| US7511999B1 (en) | 2007-11-06 | 2009-03-31 | Nscore Inc. | MIS-transistor-based nonvolatile memory with reliable data retention capability |
| US7630247B2 (en) * | 2008-02-25 | 2009-12-08 | Nscore Inc. | MIS-transistor-based nonvolatile memory |
| US7639546B2 (en) * | 2008-02-26 | 2009-12-29 | Nscore Inc. | Nonvolatile memory utilizing MIS memory transistors with function to correct data reversal |
| US7733714B2 (en) | 2008-06-16 | 2010-06-08 | Nscore Inc. | MIS-transistor-based nonvolatile memory for multilevel data storage |
| US7821806B2 (en) * | 2008-06-18 | 2010-10-26 | Nscore Inc. | Nonvolatile semiconductor memory circuit utilizing a MIS transistor as a memory cell |
| JP4908471B2 (ja) * | 2008-08-25 | 2012-04-04 | 株式会社東芝 | 半導体記憶装置、及びそれを用いたトリミング方法 |
| JP4908472B2 (ja) | 2008-08-26 | 2012-04-04 | 株式会社東芝 | 半導体集積記憶回路及びラッチ回路のトリミング方法 |
| US20100177556A1 (en) * | 2009-01-09 | 2010-07-15 | Vanguard International Semiconductor Corporation | Asymmetric static random access memory |
| US7791927B1 (en) * | 2009-02-18 | 2010-09-07 | Nscore Inc. | Mis-transistor-based nonvolatile memory circuit with stable and enhanced performance |
| US8213247B2 (en) * | 2009-11-16 | 2012-07-03 | Nscore Inc. | Memory device with test mechanism |
| WO2011148898A1 (ja) * | 2010-05-24 | 2011-12-01 | 国立大学法人東京大学 | 半導体記憶素子の電圧特性調整方法、半導体記憶装置の電圧特性調整方法およびチャージポンプ並びにチャージポンプの電圧調整方法 |
| US8259505B2 (en) | 2010-05-28 | 2012-09-04 | Nscore Inc. | Nonvolatile memory device with reduced current consumption |
| US8451657B2 (en) | 2011-02-14 | 2013-05-28 | Nscore, Inc. | Nonvolatile semiconductor memory device using MIS transistor |
| US9059032B2 (en) * | 2011-04-29 | 2015-06-16 | Texas Instruments Incorporated | SRAM cell parameter optimization |
| US20140119146A1 (en) * | 2012-10-30 | 2014-05-01 | Apple Inc. | Clock Gated Storage Array |
| US9018975B2 (en) | 2013-02-15 | 2015-04-28 | Intel Corporation | Methods and systems to stress-program an integrated circuit |
| US9391617B2 (en) | 2013-03-15 | 2016-07-12 | Intel Corporation | Hardware-embedded key based on random variations of a stress-hardened inegrated circuit |
| US9159404B2 (en) | 2014-02-26 | 2015-10-13 | Nscore, Inc. | Nonvolatile memory device |
| US9515835B2 (en) | 2015-03-24 | 2016-12-06 | Intel Corporation | Stable probing-resilient physically unclonable function (PUF) circuit |
| US9484072B1 (en) | 2015-10-06 | 2016-11-01 | Nscore, Inc. | MIS transistors configured to be placed in programmed state and erased state |
| US9966141B2 (en) | 2016-02-19 | 2018-05-08 | Nscore, Inc. | Nonvolatile memory cell employing hot carrier effect for data storage |
| KR102626791B1 (ko) * | 2017-08-28 | 2024-01-19 | 에이에스엠엘 네델란즈 비.브이. | 미리 결정된 시동 값을 갖는 메모리 디바이스 |
| US10777265B2 (en) | 2017-11-13 | 2020-09-15 | International Business Machines Corporation | Enhanced FDSOI physically unclonable function |
| CN111431511A (zh) * | 2019-05-21 | 2020-07-17 | 合肥晶合集成电路有限公司 | 锁存电路 |
| US11417407B1 (en) | 2021-04-01 | 2022-08-16 | Globalfoundries U.S. Inc. | Structures and methods of identifying unprogrammed bits for one-time-programmable-memory (OTPM) |
| US11961567B2 (en) * | 2021-09-21 | 2024-04-16 | PUFsecurity Corporation | Key storage device and key generation method |
| US20230214270A1 (en) * | 2021-12-31 | 2023-07-06 | Western Digital Technologies, Inc. | Readiness states for partitioned internal resources of a memory controller |
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| GB2000407B (en) * | 1977-06-27 | 1982-01-27 | Hughes Aircraft Co | Volatile/non-volatile logic latch circuit |
| US4821233A (en) * | 1985-09-19 | 1989-04-11 | Xilinx, Incorporated | 5-transistor memory cell with known state on power-up |
| US5325325A (en) * | 1990-03-30 | 1994-06-28 | Sharp Kabushiki Kaisha | Semiconductor memory device capable of initializing storage data |
| US5285069A (en) * | 1990-11-21 | 1994-02-08 | Ricoh Company, Ltd. | Array of field effect transistors of different threshold voltages in same semiconductor integrated circuit |
| JPH04289593A (ja) | 1991-03-19 | 1992-10-14 | Fujitsu Ltd | 不揮発性半導体記憶装置 |
| JPH0660667A (ja) * | 1992-08-11 | 1994-03-04 | Toshiba Corp | 半導体記憶装置 |
| JPH0676582A (ja) * | 1992-08-27 | 1994-03-18 | Hitachi Ltd | 半導体装置 |
| JPH06168591A (ja) * | 1992-11-27 | 1994-06-14 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5477176A (en) * | 1994-06-02 | 1995-12-19 | Motorola Inc. | Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory |
| US5703392A (en) * | 1995-06-02 | 1997-12-30 | Utron Technology Inc | Minimum size integrated circuit static memory cell |
| US5650350A (en) * | 1995-08-11 | 1997-07-22 | Micron Technology, Inc. | Semiconductor processing method of forming a static random access memory cell and static random access memory cell |
| JP3219236B2 (ja) * | 1996-02-22 | 2001-10-15 | シャープ株式会社 | 半導体記憶装置 |
| US6341093B1 (en) * | 2000-06-07 | 2002-01-22 | International Business Machines Corporation | SOI array sense and write margin qualification |
-
2002
- 2002-09-30 US US10/262,631 patent/US6906962B2/en not_active Expired - Lifetime
-
2003
- 2003-08-14 GB GB0319127A patent/GB2394338B/en not_active Expired - Fee Related
- 2003-09-17 TW TW092125647A patent/TWI291179B/zh not_active IP Right Cessation
- 2003-09-29 JP JP2003336597A patent/JP2004127499A/ja active Pending
- 2003-09-30 KR KR1020030067721A patent/KR101026335B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6906962B2 (en) | 2005-06-14 |
| GB0319127D0 (en) | 2003-09-17 |
| GB2394338A (en) | 2004-04-21 |
| GB2394338B (en) | 2007-04-25 |
| TW200414224A (en) | 2004-08-01 |
| KR20040029260A (ko) | 2004-04-06 |
| US20040062083A1 (en) | 2004-04-01 |
| KR101026335B1 (ko) | 2011-04-04 |
| JP2004127499A (ja) | 2004-04-22 |
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Legal Events
| Date | Code | Title | Description |
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| MM4A | Annulment or lapse of patent due to non-payment of fees |