TWI278038B - Method of forming layers of oxide on a surface of a substrate - Google Patents
Method of forming layers of oxide on a surface of a substrate Download PDFInfo
- Publication number
- TWI278038B TWI278038B TW092103374A TW92103374A TWI278038B TW I278038 B TWI278038 B TW I278038B TW 092103374 A TW092103374 A TW 092103374A TW 92103374 A TW92103374 A TW 92103374A TW I278038 B TWI278038 B TW I278038B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- oxide layer
- initial
- layer
- thickness
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0144—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0181—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10207122A DE10207122B4 (de) | 2002-02-20 | 2002-02-20 | Ein Verfahren zur Herstellung von Schichten aus Oxid auf einer Oberfläche eines Substrats |
| US10/208,308 US6703278B2 (en) | 2002-02-20 | 2002-07-30 | Method of forming layers of oxide on a surface of a substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200304187A TW200304187A (en) | 2003-09-16 |
| TWI278038B true TWI278038B (en) | 2007-04-01 |
Family
ID=27766671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092103374A TWI278038B (en) | 2002-02-20 | 2003-02-19 | Method of forming layers of oxide on a surface of a substrate |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1476899B1 (enExample) |
| JP (1) | JP4145802B2 (enExample) |
| CN (1) | CN1315162C (enExample) |
| AU (1) | AU2002351408A1 (enExample) |
| TW (1) | TWI278038B (enExample) |
| WO (1) | WO2003073491A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100678321B1 (ko) | 2005-12-14 | 2007-02-02 | 동부일렉트로닉스 주식회사 | 서로 다른 두께의 게이트 유전층들을 형성하는 방법 |
| DE102017104906A1 (de) * | 2017-03-08 | 2018-09-13 | Olav Birlem | Anordnung und Verfahren zum Bereitstellen einer Vielzahl von Nanodrähten |
| CN108257860A (zh) * | 2018-01-19 | 2018-07-06 | 武汉新芯集成电路制造有限公司 | 一种栅极氧化层的制作方法 |
| US11430701B2 (en) | 2020-09-25 | 2022-08-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Gate oxide structures in semiconductor devices |
| US12119222B2 (en) | 2021-01-14 | 2024-10-15 | Changxin Memory Technologies, Inc. | Method for preparing semiconductor structure and semiconductor structure |
| CN114765107A (zh) * | 2021-01-14 | 2022-07-19 | 长鑫存储技术有限公司 | 半导体结构的制备方法及半导体结构 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6033943A (en) * | 1996-08-23 | 2000-03-07 | Advanced Micro Devices, Inc. | Dual gate oxide thickness integrated circuit and process for making same |
| US6087236A (en) * | 1998-11-24 | 2000-07-11 | Intel Corporation | Integrated circuit with multiple gate dielectric structures |
| US6235590B1 (en) * | 1998-12-18 | 2001-05-22 | Lsi Logic Corporation | Fabrication of differential gate oxide thicknesses on a single integrated circuit chip |
| KR20010004417A (ko) * | 1999-06-28 | 2001-01-15 | 김영환 | 반도체장치의 듀얼 게이트산화막 형성 방법 |
-
2002
- 2002-12-20 JP JP2003572081A patent/JP4145802B2/ja not_active Expired - Fee Related
- 2002-12-20 WO PCT/US2002/040807 patent/WO2003073491A1/en not_active Ceased
- 2002-12-20 EP EP02787067A patent/EP1476899B1/en not_active Expired - Lifetime
- 2002-12-20 CN CNB028281977A patent/CN1315162C/zh not_active Expired - Fee Related
- 2002-12-20 AU AU2002351408A patent/AU2002351408A1/en not_active Abandoned
-
2003
- 2003-02-19 TW TW092103374A patent/TWI278038B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005518675A (ja) | 2005-06-23 |
| CN1620718A (zh) | 2005-05-25 |
| EP1476899A1 (en) | 2004-11-17 |
| TW200304187A (en) | 2003-09-16 |
| AU2002351408A1 (en) | 2003-09-09 |
| EP1476899B1 (en) | 2007-03-07 |
| CN1315162C (zh) | 2007-05-09 |
| JP4145802B2 (ja) | 2008-09-03 |
| WO2003073491A1 (en) | 2003-09-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |