TWI264766B - Method for fabricating recessed gate structure - Google Patents

Method for fabricating recessed gate structure

Info

Publication number
TWI264766B
TWI264766B TW093137119A TW93137119A TWI264766B TW I264766 B TWI264766 B TW I264766B TW 093137119 A TW093137119 A TW 093137119A TW 93137119 A TW93137119 A TW 93137119A TW I264766 B TWI264766 B TW I264766B
Authority
TW
Taiwan
Prior art keywords
layer
silicon layer
conductive silicon
recessed gate
conductive
Prior art date
Application number
TW093137119A
Other languages
English (en)
Other versions
TW200520071A (en
Inventor
Se-Aug Jang
Heung-Jae Cho
Woo-Jin Kim
Hyung-Soon Park
Seo-Min Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200520071A publication Critical patent/TW200520071A/zh
Application granted granted Critical
Publication of TWI264766B publication Critical patent/TWI264766B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
TW093137119A 2003-12-15 2004-12-02 Method for fabricating recessed gate structure TWI264766B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030091113A KR100566303B1 (ko) 2003-12-15 2003-12-15 리세스된 게이트 전극 형성 방법

Publications (2)

Publication Number Publication Date
TW200520071A TW200520071A (en) 2005-06-16
TWI264766B true TWI264766B (en) 2006-10-21

Family

ID=36584542

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093137119A TWI264766B (en) 2003-12-15 2004-12-02 Method for fabricating recessed gate structure

Country Status (5)

Country Link
US (1) US20060128130A1 (zh)
JP (1) JP2005183954A (zh)
KR (1) KR100566303B1 (zh)
CN (1) CN100555575C (zh)
TW (1) TWI264766B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100668851B1 (ko) 2005-06-30 2007-01-16 주식회사 하이닉스반도체 모스펫 소자 제조방법
KR100625795B1 (ko) 2005-08-25 2006-09-18 주식회사 하이닉스반도체 반도체 소자의 게이트 및 그 형성방법
JP4773169B2 (ja) * 2005-09-14 2011-09-14 エルピーダメモリ株式会社 半導体装置の製造方法
US7435673B2 (en) * 2005-09-28 2008-10-14 Samsung Electronics Co., Ltd. Methods of forming integrated circuit devices having metal interconnect structures therein
KR100697292B1 (ko) * 2005-10-04 2007-03-20 삼성전자주식회사 반도체 장치 및 그 형성 방법
KR100689840B1 (ko) * 2005-10-04 2007-03-08 삼성전자주식회사 리세스된 게이트 전극을 갖는 반도체소자 및 그의 제조방법
KR100673109B1 (ko) * 2005-11-17 2007-01-22 주식회사 하이닉스반도체 반도체소자의 리세스 게이트 형성방법
KR100702132B1 (ko) * 2005-12-22 2007-03-30 주식회사 하이닉스반도체 화학기계적연마를 이용한 리세스 게이트 형성 방법
KR100869359B1 (ko) 2006-09-28 2008-11-19 주식회사 하이닉스반도체 반도체 소자의 리세스 게이트 제조 방법
KR100780629B1 (ko) * 2006-11-15 2007-11-30 주식회사 하이닉스반도체 리세스 게이트를 갖는 반도체 소자의 제조 방법
KR100825796B1 (ko) 2006-12-14 2008-04-28 삼성전자주식회사 매몰 게이트를 구비한 반도체 소자의 제조 방법
KR101128886B1 (ko) * 2009-03-11 2012-03-26 주식회사 하이닉스반도체 반도체 소자의 게이트 및 그 형성방법
KR101886382B1 (ko) * 2011-12-14 2018-08-09 삼성전자주식회사 정보 저장 소자 및 그 제조 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6855593B2 (en) * 2002-07-11 2005-02-15 International Rectifier Corporation Trench Schottky barrier diode
KR100498476B1 (ko) * 2003-01-11 2005-07-01 삼성전자주식회사 리세스 채널 mosfet 및 그 제조방법
KR100471001B1 (ko) * 2003-07-02 2005-03-14 삼성전자주식회사 리세스형 트랜지스터 및 그의 제조방법

Also Published As

Publication number Publication date
CN100555575C (zh) 2009-10-28
TW200520071A (en) 2005-06-16
US20060128130A1 (en) 2006-06-15
KR100566303B1 (ko) 2006-03-30
KR20050059488A (ko) 2005-06-21
CN1630040A (zh) 2005-06-22
JP2005183954A (ja) 2005-07-07

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees